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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-none-linux-gnu < %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64-none-linux-gnu -global-isel < %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5define i64 @umull(i64 %x0, i64 %x1) {6; CHECK-LABEL: umull:7; CHECK:       // %bb.0: // %entry8; CHECK-NEXT:    umull x0, w1, w09; CHECK-NEXT:    ret10entry:11  %and = and i64 %x0, 429496729512  %and1 = and i64 %x1, 429496729513  %mul = mul nuw i64 %and1, %and14  ret i64 %mul15}16 17define i64 @umull2(i64 %x, i32 %y) {18; CHECK-LABEL: umull2:19; CHECK:       // %bb.0: // %entry20; CHECK-NEXT:    umull x0, w0, w121; CHECK-NEXT:    ret22entry:23  %and = and i64 %x, 429496729524  %conv = zext i32 %y to i6425  %mul = mul nuw nsw i64 %and, %conv26  ret i64 %mul27}28 29define i64 @umull2_commuted(i64 %x, i32 %y) {30; CHECK-LABEL: umull2_commuted:31; CHECK:       // %bb.0: // %entry32; CHECK-NEXT:    umull x0, w0, w133; CHECK-NEXT:    ret34entry:35  %and = and i64 %x, 429496729536  %conv = zext i32 %y to i6437  %mul = mul nuw nsw i64 %conv, %and38  ret i64 %mul39}40 41define i64 @smull(i64 %x0, i64 %x1) {42; CHECK-LABEL: smull:43; CHECK:       // %bb.0: // %entry44; CHECK-NEXT:    smull x0, w1, w045; CHECK-NEXT:    ret46entry:47  %sext = shl i64 %x0, 3248  %conv1 = ashr exact i64 %sext, 3249  %sext4 = shl i64 %x1, 3250  %conv3 = ashr exact i64 %sext4, 3251  %mul = mul nsw i64 %conv3, %conv152  ret i64 %mul53}54 55define i64 @smull2(i64 %x, i32 %y) {56; CHECK-LABEL: smull2:57; CHECK:       // %bb.0: // %entry58; CHECK-NEXT:    smull x0, w0, w159; CHECK-NEXT:    ret60entry:61  %shl = shl i64 %x, 3262  %shr = ashr exact i64 %shl, 3263  %conv = sext i32 %y to i6464  %mul = mul nsw i64 %shr, %conv65  ret i64 %mul66}67 68define i64 @smull2_commuted(i64 %x, i32 %y) {69; CHECK-LABEL: smull2_commuted:70; CHECK:       // %bb.0: // %entry71; CHECK-NEXT:    smull x0, w0, w172; CHECK-NEXT:    ret73entry:74  %shl = shl i64 %x, 3275  %shr = ashr exact i64 %shl, 3276  %conv = sext i32 %y to i6477  %mul = mul nsw i64 %conv, %shr78  ret i64 %mul79}80 81define i64 @smull_ldrsb_b(ptr %x0, i8 %x1) {82; CHECK-SD-LABEL: smull_ldrsb_b:83; CHECK-SD:       // %bb.0: // %entry84; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x185; CHECK-SD-NEXT:    ldrsb x8, [x0]86; CHECK-SD-NEXT:    sxtb x9, w187; CHECK-SD-NEXT:    smull x0, w8, w988; CHECK-SD-NEXT:    ret89;90; CHECK-GI-LABEL: smull_ldrsb_b:91; CHECK-GI:       // %bb.0: // %entry92; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x193; CHECK-GI-NEXT:    ldrsb x8, [x0]94; CHECK-GI-NEXT:    sxtb x9, w195; CHECK-GI-NEXT:    mul x0, x8, x996; CHECK-GI-NEXT:    ret97entry:98  %ext64 = load i8, ptr %x099  %sext = sext i8 %ext64 to i64100  %sext4 = sext i8 %x1 to i64101  %mul = mul i64 %sext, %sext4102  ret i64 %mul103}104 105define i64 @smull_ldrsb_b_commuted(ptr %x0, i8 %x1) {106; CHECK-SD-LABEL: smull_ldrsb_b_commuted:107; CHECK-SD:       // %bb.0: // %entry108; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1109; CHECK-SD-NEXT:    ldrsb x8, [x0]110; CHECK-SD-NEXT:    sxtb x9, w1111; CHECK-SD-NEXT:    smull x0, w9, w8112; CHECK-SD-NEXT:    ret113;114; CHECK-GI-LABEL: smull_ldrsb_b_commuted:115; CHECK-GI:       // %bb.0: // %entry116; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1117; CHECK-GI-NEXT:    ldrsb x8, [x0]118; CHECK-GI-NEXT:    sxtb x9, w1119; CHECK-GI-NEXT:    mul x0, x9, x8120; CHECK-GI-NEXT:    ret121entry:122  %ext64 = load i8, ptr %x0123  %sext = sext i8 %ext64 to i64124  %sext4 = sext i8 %x1 to i64125  %mul = mul i64 %sext4, %sext126  ret i64 %mul127}128 129define i64 @smull_ldrsb_h(ptr %x0, i16 %x1) {130; CHECK-SD-LABEL: smull_ldrsb_h:131; CHECK-SD:       // %bb.0: // %entry132; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1133; CHECK-SD-NEXT:    ldrsb x8, [x0]134; CHECK-SD-NEXT:    sxth x9, w1135; CHECK-SD-NEXT:    smull x0, w8, w9136; CHECK-SD-NEXT:    ret137;138; CHECK-GI-LABEL: smull_ldrsb_h:139; CHECK-GI:       // %bb.0: // %entry140; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1141; CHECK-GI-NEXT:    ldrsb x8, [x0]142; CHECK-GI-NEXT:    sxth x9, w1143; CHECK-GI-NEXT:    mul x0, x8, x9144; CHECK-GI-NEXT:    ret145entry:146  %ext64 = load i8, ptr %x0147  %sext = sext i8 %ext64 to i64148  %sext4 = sext i16 %x1 to i64149  %mul = mul i64 %sext, %sext4150  ret i64 %mul151}152 153define i64 @smull_ldrsb_w(ptr %x0, i32 %x1) {154; CHECK-SD-LABEL: smull_ldrsb_w:155; CHECK-SD:       // %bb.0: // %entry156; CHECK-SD-NEXT:    ldrsb x8, [x0]157; CHECK-SD-NEXT:    smull x0, w8, w1158; CHECK-SD-NEXT:    ret159;160; CHECK-GI-LABEL: smull_ldrsb_w:161; CHECK-GI:       // %bb.0: // %entry162; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1163; CHECK-GI-NEXT:    ldrsb x8, [x0]164; CHECK-GI-NEXT:    sxtw x9, w1165; CHECK-GI-NEXT:    mul x0, x8, x9166; CHECK-GI-NEXT:    ret167entry:168  %ext64 = load i8, ptr %x0169  %sext = sext i8 %ext64 to i64170  %sext4 = sext i32 %x1 to i64171  %mul = mul i64 %sext, %sext4172  ret i64 %mul173}174 175define i64 @smull_ldrsh_b(ptr %x0, i8 %x1) {176; CHECK-SD-LABEL: smull_ldrsh_b:177; CHECK-SD:       // %bb.0: // %entry178; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1179; CHECK-SD-NEXT:    ldrsh x8, [x0]180; CHECK-SD-NEXT:    sxtb x9, w1181; CHECK-SD-NEXT:    smull x0, w8, w9182; CHECK-SD-NEXT:    ret183;184; CHECK-GI-LABEL: smull_ldrsh_b:185; CHECK-GI:       // %bb.0: // %entry186; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1187; CHECK-GI-NEXT:    ldrsh x8, [x0]188; CHECK-GI-NEXT:    sxtb x9, w1189; CHECK-GI-NEXT:    mul x0, x8, x9190; CHECK-GI-NEXT:    ret191entry:192  %ext64 = load i16, ptr %x0193  %sext = sext i16 %ext64 to i64194  %sext4 = sext i8 %x1 to i64195  %mul = mul i64 %sext, %sext4196  ret i64 %mul197}198 199define i64 @smull_ldrsh_h(ptr %x0, i16 %x1) {200; CHECK-SD-LABEL: smull_ldrsh_h:201; CHECK-SD:       // %bb.0: // %entry202; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1203; CHECK-SD-NEXT:    ldrsh x8, [x0]204; CHECK-SD-NEXT:    sxth x9, w1205; CHECK-SD-NEXT:    smull x0, w8, w9206; CHECK-SD-NEXT:    ret207;208; CHECK-GI-LABEL: smull_ldrsh_h:209; CHECK-GI:       // %bb.0: // %entry210; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1211; CHECK-GI-NEXT:    ldrsh x8, [x0]212; CHECK-GI-NEXT:    sxth x9, w1213; CHECK-GI-NEXT:    mul x0, x8, x9214; CHECK-GI-NEXT:    ret215entry:216  %ext64 = load i16, ptr %x0217  %sext = sext i16 %ext64 to i64218  %sext4 = sext i16 %x1 to i64219  %mul = mul i64 %sext, %sext4220  ret i64 %mul221}222 223define i64 @smull_ldrsh_h_commuted(ptr %x0, i16 %x1) {224; CHECK-SD-LABEL: smull_ldrsh_h_commuted:225; CHECK-SD:       // %bb.0: // %entry226; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1227; CHECK-SD-NEXT:    ldrsh x8, [x0]228; CHECK-SD-NEXT:    sxth x9, w1229; CHECK-SD-NEXT:    smull x0, w9, w8230; CHECK-SD-NEXT:    ret231;232; CHECK-GI-LABEL: smull_ldrsh_h_commuted:233; CHECK-GI:       // %bb.0: // %entry234; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1235; CHECK-GI-NEXT:    ldrsh x8, [x0]236; CHECK-GI-NEXT:    sxth x9, w1237; CHECK-GI-NEXT:    mul x0, x9, x8238; CHECK-GI-NEXT:    ret239entry:240  %ext64 = load i16, ptr %x0241  %sext = sext i16 %ext64 to i64242  %sext4 = sext i16 %x1 to i64243  %mul = mul i64 %sext4, %sext244  ret i64 %mul245}246 247define i64 @smull_ldrsh_w(ptr %x0, i32 %x1) {248; CHECK-SD-LABEL: smull_ldrsh_w:249; CHECK-SD:       // %bb.0: // %entry250; CHECK-SD-NEXT:    ldrsh x8, [x0]251; CHECK-SD-NEXT:    smull x0, w8, w1252; CHECK-SD-NEXT:    ret253;254; CHECK-GI-LABEL: smull_ldrsh_w:255; CHECK-GI:       // %bb.0: // %entry256; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1257; CHECK-GI-NEXT:    ldrsh x8, [x0]258; CHECK-GI-NEXT:    sxtw x9, w1259; CHECK-GI-NEXT:    mul x0, x8, x9260; CHECK-GI-NEXT:    ret261entry:262  %ext64 = load i16, ptr %x0263  %sext = sext i16 %ext64 to i64264  %sext4 = sext i32 %x1 to i64265  %mul = mul i64 %sext, %sext4266  ret i64 %mul267}268 269define i64 @smull_ldrsw_b(ptr %x0, i8 %x1) {270; CHECK-SD-LABEL: smull_ldrsw_b:271; CHECK-SD:       // %bb.0: // %entry272; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1273; CHECK-SD-NEXT:    ldrsw x8, [x0]274; CHECK-SD-NEXT:    sxtb x9, w1275; CHECK-SD-NEXT:    smull x0, w8, w9276; CHECK-SD-NEXT:    ret277;278; CHECK-GI-LABEL: smull_ldrsw_b:279; CHECK-GI:       // %bb.0: // %entry280; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1281; CHECK-GI-NEXT:    ldrsw x8, [x0]282; CHECK-GI-NEXT:    sxtb x9, w1283; CHECK-GI-NEXT:    mul x0, x8, x9284; CHECK-GI-NEXT:    ret285entry:286  %ext64 = load i32, ptr %x0287  %sext = sext i32 %ext64 to i64288  %sext4 = sext i8 %x1 to i64289  %mul = mul i64 %sext, %sext4290  ret i64 %mul291}292 293define i64 @smull_ldrsw_h(ptr %x0, i16 %x1) {294; CHECK-SD-LABEL: smull_ldrsw_h:295; CHECK-SD:       // %bb.0: // %entry296; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1297; CHECK-SD-NEXT:    ldrsw x8, [x0]298; CHECK-SD-NEXT:    sxth x9, w1299; CHECK-SD-NEXT:    smull x0, w8, w9300; CHECK-SD-NEXT:    ret301;302; CHECK-GI-LABEL: smull_ldrsw_h:303; CHECK-GI:       // %bb.0: // %entry304; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1305; CHECK-GI-NEXT:    ldrsw x8, [x0]306; CHECK-GI-NEXT:    sxth x9, w1307; CHECK-GI-NEXT:    mul x0, x8, x9308; CHECK-GI-NEXT:    ret309entry:310  %ext64 = load i32, ptr %x0311  %sext = sext i32 %ext64 to i64312  %sext4 = sext i16 %x1 to i64313  %mul = mul i64 %sext, %sext4314  ret i64 %mul315}316 317define i64 @smull_ldrsw_w(ptr %x0, i32 %x1) {318; CHECK-SD-LABEL: smull_ldrsw_w:319; CHECK-SD:       // %bb.0: // %entry320; CHECK-SD-NEXT:    ldrsw x8, [x0]321; CHECK-SD-NEXT:    smull x0, w8, w1322; CHECK-SD-NEXT:    ret323;324; CHECK-GI-LABEL: smull_ldrsw_w:325; CHECK-GI:       // %bb.0: // %entry326; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1327; CHECK-GI-NEXT:    ldrsw x8, [x0]328; CHECK-GI-NEXT:    sxtw x9, w1329; CHECK-GI-NEXT:    mul x0, x8, x9330; CHECK-GI-NEXT:    ret331entry:332  %ext64 = load i32, ptr %x0333  %sext = sext i32 %ext64 to i64334  %sext4 = sext i32 %x1 to i64335  %mul = mul i64 %sext, %sext4336  ret i64 %mul337}338 339define i64 @smull_ldrsw_w_commuted(ptr %x0, i32 %x1) {340; CHECK-SD-LABEL: smull_ldrsw_w_commuted:341; CHECK-SD:       // %bb.0: // %entry342; CHECK-SD-NEXT:    ldrsw x8, [x0]343; CHECK-SD-NEXT:    smull x0, w8, w1344; CHECK-SD-NEXT:    ret345;346; CHECK-GI-LABEL: smull_ldrsw_w_commuted:347; CHECK-GI:       // %bb.0: // %entry348; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1349; CHECK-GI-NEXT:    ldrsw x8, [x0]350; CHECK-GI-NEXT:    sxtw x9, w1351; CHECK-GI-NEXT:    mul x0, x9, x8352; CHECK-GI-NEXT:    ret353entry:354  %ext64 = load i32, ptr %x0355  %sext = sext i32 %ext64 to i64356  %sext4 = sext i32 %x1 to i64357  %mul = mul i64 %sext4, %sext358  ret i64 %mul359}360 361define i64 @smull_sext_bb(i8 %x0, i8 %x1) {362; CHECK-SD-LABEL: smull_sext_bb:363; CHECK-SD:       // %bb.0: // %entry364; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1365; CHECK-SD-NEXT:    // kill: def $w0 killed $w0 def $x0366; CHECK-SD-NEXT:    sxtb x8, w0367; CHECK-SD-NEXT:    sxtb x9, w1368; CHECK-SD-NEXT:    smull x0, w8, w9369; CHECK-SD-NEXT:    ret370;371; CHECK-GI-LABEL: smull_sext_bb:372; CHECK-GI:       // %bb.0: // %entry373; CHECK-GI-NEXT:    // kill: def $w0 killed $w0 def $x0374; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1375; CHECK-GI-NEXT:    sxtb x8, w0376; CHECK-GI-NEXT:    sxtb x9, w1377; CHECK-GI-NEXT:    mul x0, x8, x9378; CHECK-GI-NEXT:    ret379entry:380  %sext = sext i8 %x0 to i64381  %sext4 = sext i8 %x1 to i64382  %mul = mul i64 %sext, %sext4383  ret i64 %mul384}385 386define i64 @smull_ldrsw_shift(ptr %x0, i64 %x1) {387; CHECK-SD-LABEL: smull_ldrsw_shift:388; CHECK-SD:       // %bb.0: // %entry389; CHECK-SD-NEXT:    ldrsw x8, [x0]390; CHECK-SD-NEXT:    smull x0, w8, w1391; CHECK-SD-NEXT:    ret392;393; CHECK-GI-LABEL: smull_ldrsw_shift:394; CHECK-GI:       // %bb.0: // %entry395; CHECK-GI-NEXT:    ldrsw x8, [x0]396; CHECK-GI-NEXT:    sxtw x9, w1397; CHECK-GI-NEXT:    mul x0, x8, x9398; CHECK-GI-NEXT:    ret399entry:400  %ext64 = load i32, ptr %x0401  %sext = sext i32 %ext64 to i64402  %shl = shl i64 %x1, 32403  %shr = ashr exact i64 %shl, 32404  %mul = mul i64 %sext, %shr405  ret i64 %mul406}407 408define i64 @smull_ldrsh_zextw(ptr %x0, i32 %x1) {409; CHECK-LABEL: smull_ldrsh_zextw:410; CHECK:       // %bb.0: // %entry411; CHECK-NEXT:    ldrsh x8, [x0]412; CHECK-NEXT:    mov w9, w1413; CHECK-NEXT:    mul x0, x8, x9414; CHECK-NEXT:    ret415entry:416  %ext64 = load i16, ptr %x0417  %sext = sext i16 %ext64 to i64418  %zext = zext i32 %x1 to i64419  %mul = mul i64 %sext, %zext420  ret i64 %mul421}422 423define i64 @smull_ldrsw_zexth(ptr %x0, i16 %x1) {424; CHECK-SD-LABEL: smull_ldrsw_zexth:425; CHECK-SD:       // %bb.0: // %entry426; CHECK-SD-NEXT:    ldrsw x8, [x0]427; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1428; CHECK-SD-NEXT:    and x9, x1, #0xffff429; CHECK-SD-NEXT:    smull x0, w8, w9430; CHECK-SD-NEXT:    ret431;432; CHECK-GI-LABEL: smull_ldrsw_zexth:433; CHECK-GI:       // %bb.0: // %entry434; CHECK-GI-NEXT:    ldrsw x8, [x0]435; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1436; CHECK-GI-NEXT:    and x9, x1, #0xffff437; CHECK-GI-NEXT:    mul x0, x8, x9438; CHECK-GI-NEXT:    ret439entry:440  %ext64 = load i32, ptr %x0441  %sext = sext i32 %ext64 to i64442  %zext = zext i16 %x1 to i64443  %mul = mul i64 %sext, %zext444  ret i64 %mul445}446 447define i64 @smull_ldrsw_zextb(ptr %x0, i8 %x1) {448; CHECK-SD-LABEL: smull_ldrsw_zextb:449; CHECK-SD:       // %bb.0: // %entry450; CHECK-SD-NEXT:    ldrsw x8, [x0]451; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1452; CHECK-SD-NEXT:    and x9, x1, #0xff453; CHECK-SD-NEXT:    smull x0, w8, w9454; CHECK-SD-NEXT:    ret455;456; CHECK-GI-LABEL: smull_ldrsw_zextb:457; CHECK-GI:       // %bb.0: // %entry458; CHECK-GI-NEXT:    ldrsw x8, [x0]459; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1460; CHECK-GI-NEXT:    and x9, x1, #0xff461; CHECK-GI-NEXT:    mul x0, x8, x9462; CHECK-GI-NEXT:    ret463entry:464  %ext64 = load i32, ptr %x0465  %sext = sext i32 %ext64 to i64466  %zext = zext i8 %x1 to i64467  %mul = mul i64 %sext, %zext468  ret i64 %mul469}470 471define i64 @smull_ldrsw_zextb_commuted(ptr %x0, i8 %x1) {472; CHECK-SD-LABEL: smull_ldrsw_zextb_commuted:473; CHECK-SD:       // %bb.0: // %entry474; CHECK-SD-NEXT:    ldrsw x8, [x0]475; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1476; CHECK-SD-NEXT:    and x9, x1, #0xff477; CHECK-SD-NEXT:    smull x0, w9, w8478; CHECK-SD-NEXT:    ret479;480; CHECK-GI-LABEL: smull_ldrsw_zextb_commuted:481; CHECK-GI:       // %bb.0: // %entry482; CHECK-GI-NEXT:    ldrsw x8, [x0]483; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1484; CHECK-GI-NEXT:    and x9, x1, #0xff485; CHECK-GI-NEXT:    mul x0, x9, x8486; CHECK-GI-NEXT:    ret487entry:488  %ext64 = load i32, ptr %x0489  %sext = sext i32 %ext64 to i64490  %zext = zext i8 %x1 to i64491  %mul = mul i64 %zext, %sext492  ret i64 %mul493}494 495define i64 @smaddl_ldrsb_h(ptr %x0, i16 %x1, i64 %x2) {496; CHECK-SD-LABEL: smaddl_ldrsb_h:497; CHECK-SD:       // %bb.0: // %entry498; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1499; CHECK-SD-NEXT:    ldrsb x8, [x0]500; CHECK-SD-NEXT:    sxth x9, w1501; CHECK-SD-NEXT:    smaddl x0, w8, w9, x2502; CHECK-SD-NEXT:    ret503;504; CHECK-GI-LABEL: smaddl_ldrsb_h:505; CHECK-GI:       // %bb.0: // %entry506; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1507; CHECK-GI-NEXT:    ldrsb x8, [x0]508; CHECK-GI-NEXT:    sxth x9, w1509; CHECK-GI-NEXT:    madd x0, x8, x9, x2510; CHECK-GI-NEXT:    ret511entry:512  %ext64 = load i8, ptr %x0513  %sext = sext i8 %ext64 to i64514  %sext4 = sext i16 %x1 to i64515  %mul = mul i64 %sext, %sext4516  %add = add i64 %x2, %mul517  ret i64 %add518}519 520define i64 @smaddl_ldrsb_h_commuted(ptr %x0, i16 %x1, i64 %x2) {521; CHECK-SD-LABEL: smaddl_ldrsb_h_commuted:522; CHECK-SD:       // %bb.0: // %entry523; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1524; CHECK-SD-NEXT:    ldrsb x8, [x0]525; CHECK-SD-NEXT:    sxth x9, w1526; CHECK-SD-NEXT:    smaddl x0, w9, w8, x2527; CHECK-SD-NEXT:    ret528;529; CHECK-GI-LABEL: smaddl_ldrsb_h_commuted:530; CHECK-GI:       // %bb.0: // %entry531; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1532; CHECK-GI-NEXT:    ldrsb x8, [x0]533; CHECK-GI-NEXT:    sxth x9, w1534; CHECK-GI-NEXT:    madd x0, x9, x8, x2535; CHECK-GI-NEXT:    ret536entry:537  %ext64 = load i8, ptr %x0538  %sext = sext i8 %ext64 to i64539  %sext4 = sext i16 %x1 to i64540  %mul = mul i64 %sext4, %sext541  %add = add i64 %x2, %mul542  ret i64 %add543}544 545define i64 @smaddl_ldrsh_w(ptr %x0, i32 %x1, i64 %x2) {546; CHECK-SD-LABEL: smaddl_ldrsh_w:547; CHECK-SD:       // %bb.0: // %entry548; CHECK-SD-NEXT:    ldrsh x8, [x0]549; CHECK-SD-NEXT:    smaddl x0, w8, w1, x2550; CHECK-SD-NEXT:    ret551;552; CHECK-GI-LABEL: smaddl_ldrsh_w:553; CHECK-GI:       // %bb.0: // %entry554; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1555; CHECK-GI-NEXT:    ldrsh x8, [x0]556; CHECK-GI-NEXT:    sxtw x9, w1557; CHECK-GI-NEXT:    madd x0, x8, x9, x2558; CHECK-GI-NEXT:    ret559entry:560  %ext64 = load i16, ptr %x0561  %sext = sext i16 %ext64 to i64562  %sext4 = sext i32 %x1 to i64563  %mul = mul i64 %sext, %sext4564  %add = add i64 %x2, %mul565  ret i64 %add566}567 568define i64 @smaddl_ldrsh_w_commuted(ptr %x0, i32 %x1, i64 %x2) {569; CHECK-SD-LABEL: smaddl_ldrsh_w_commuted:570; CHECK-SD:       // %bb.0: // %entry571; CHECK-SD-NEXT:    ldrsh x8, [x0]572; CHECK-SD-NEXT:    smaddl x0, w8, w1, x2573; CHECK-SD-NEXT:    ret574;575; CHECK-GI-LABEL: smaddl_ldrsh_w_commuted:576; CHECK-GI:       // %bb.0: // %entry577; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1578; CHECK-GI-NEXT:    ldrsh x8, [x0]579; CHECK-GI-NEXT:    sxtw x9, w1580; CHECK-GI-NEXT:    madd x0, x9, x8, x2581; CHECK-GI-NEXT:    ret582entry:583  %ext64 = load i16, ptr %x0584  %sext = sext i16 %ext64 to i64585  %sext4 = sext i32 %x1 to i64586  %mul = mul i64 %sext4, %sext587  %add = add i64 %x2, %mul588  ret i64 %add589}590 591define i64 @smaddl_ldrsw_b(ptr %x0, i8 %x1, i64 %x2) {592; CHECK-SD-LABEL: smaddl_ldrsw_b:593; CHECK-SD:       // %bb.0:594; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1595; CHECK-SD-NEXT:    ldrsw x8, [x0]596; CHECK-SD-NEXT:    sxtb x9, w1597; CHECK-SD-NEXT:    smaddl x0, w8, w9, x2598; CHECK-SD-NEXT:    ret599;600; CHECK-GI-LABEL: smaddl_ldrsw_b:601; CHECK-GI:       // %bb.0:602; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1603; CHECK-GI-NEXT:    ldrsw x8, [x0]604; CHECK-GI-NEXT:    sxtb x9, w1605; CHECK-GI-NEXT:    madd x0, x8, x9, x2606; CHECK-GI-NEXT:    ret607  %ext64 = load i32, ptr %x0608  %sext = sext i32 %ext64 to i64609  %sext2 = sext i8 %x1 to i64610  %mul = mul i64 %sext, %sext2611  %add = add i64 %x2, %mul612  ret i64 %add613}614 615define i64 @smaddl_ldrsw_b_commuted(ptr %x0, i8 %x1, i64 %x2) {616; CHECK-SD-LABEL: smaddl_ldrsw_b_commuted:617; CHECK-SD:       // %bb.0:618; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1619; CHECK-SD-NEXT:    ldrsw x8, [x0]620; CHECK-SD-NEXT:    sxtb x9, w1621; CHECK-SD-NEXT:    smaddl x0, w9, w8, x2622; CHECK-SD-NEXT:    ret623;624; CHECK-GI-LABEL: smaddl_ldrsw_b_commuted:625; CHECK-GI:       // %bb.0:626; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1627; CHECK-GI-NEXT:    ldrsw x8, [x0]628; CHECK-GI-NEXT:    sxtb x9, w1629; CHECK-GI-NEXT:    madd x0, x9, x8, x2630; CHECK-GI-NEXT:    ret631  %ext64 = load i32, ptr %x0632  %sext = sext i32 %ext64 to i64633  %sext2 = sext i8 %x1 to i64634  %mul = mul i64 %sext2, %sext635  %add = add i64 %x2, %mul636  ret i64 %add637}638 639define i64 @smaddl_ldrsw_ldrsw(ptr %x0, ptr %x1, i64 %x2) {640; CHECK-SD-LABEL: smaddl_ldrsw_ldrsw:641; CHECK-SD:       // %bb.0: // %entry642; CHECK-SD-NEXT:    ldrsw x8, [x0]643; CHECK-SD-NEXT:    ldrsw x9, [x1]644; CHECK-SD-NEXT:    smaddl x0, w8, w9, x2645; CHECK-SD-NEXT:    ret646;647; CHECK-GI-LABEL: smaddl_ldrsw_ldrsw:648; CHECK-GI:       // %bb.0: // %entry649; CHECK-GI-NEXT:    ldrsw x8, [x0]650; CHECK-GI-NEXT:    ldrsw x9, [x1]651; CHECK-GI-NEXT:    madd x0, x8, x9, x2652; CHECK-GI-NEXT:    ret653entry:654  %ext64 = load i32, ptr %x0655  %ext64_2 = load i32, ptr %x1656  %sext = sext i32 %ext64 to i64657  %sext2 = sext i32 %ext64_2 to i64658  %mul = mul i64 %sext, %sext2659  %add = add i64 %x2, %mul660  ret i64 %add661}662 663define i64 @smaddl_sext_hh(i16 %x0, i16 %x1, i64 %x2) {664; CHECK-SD-LABEL: smaddl_sext_hh:665; CHECK-SD:       // %bb.0: // %entry666; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1667; CHECK-SD-NEXT:    // kill: def $w0 killed $w0 def $x0668; CHECK-SD-NEXT:    sxth x8, w0669; CHECK-SD-NEXT:    sxth x9, w1670; CHECK-SD-NEXT:    smaddl x0, w8, w9, x2671; CHECK-SD-NEXT:    ret672;673; CHECK-GI-LABEL: smaddl_sext_hh:674; CHECK-GI:       // %bb.0: // %entry675; CHECK-GI-NEXT:    // kill: def $w0 killed $w0 def $x0676; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1677; CHECK-GI-NEXT:    sxth x8, w0678; CHECK-GI-NEXT:    sxth x9, w1679; CHECK-GI-NEXT:    madd x0, x8, x9, x2680; CHECK-GI-NEXT:    ret681entry:682  %sext = sext i16 %x0 to i64683  %sext2 = sext i16 %x1 to i64684  %mul = mul i64 %sext, %sext2685  %add = add i64 %x2, %mul686  ret i64 %add687}688 689define i64 @smaddl_ldrsw_shift(ptr %x0, i64 %x1, i64 %x2) {690; CHECK-SD-LABEL: smaddl_ldrsw_shift:691; CHECK-SD:       // %bb.0: // %entry692; CHECK-SD-NEXT:    ldrsw x8, [x0]693; CHECK-SD-NEXT:    smaddl x0, w8, w1, x2694; CHECK-SD-NEXT:    ret695;696; CHECK-GI-LABEL: smaddl_ldrsw_shift:697; CHECK-GI:       // %bb.0: // %entry698; CHECK-GI-NEXT:    ldrsw x8, [x0]699; CHECK-GI-NEXT:    sxtw x9, w1700; CHECK-GI-NEXT:    madd x0, x8, x9, x2701; CHECK-GI-NEXT:    ret702entry:703  %ext64 = load i32, ptr %x0704  %sext = sext i32 %ext64 to i64705  %shl = shl i64 %x1, 32706  %shr = ashr exact i64 %shl, 32707  %mul = mul i64 %sext, %shr708  %add = add i64 %x2, %mul709  ret i64 %add710}711 712define i64 @smaddl_ldrsw_zextb(ptr %x0, i8 %x1, i64 %x2) {713; CHECK-SD-LABEL: smaddl_ldrsw_zextb:714; CHECK-SD:       // %bb.0: // %entry715; CHECK-SD-NEXT:    ldrsw x8, [x0]716; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1717; CHECK-SD-NEXT:    and x9, x1, #0xff718; CHECK-SD-NEXT:    smaddl x0, w8, w9, x2719; CHECK-SD-NEXT:    ret720;721; CHECK-GI-LABEL: smaddl_ldrsw_zextb:722; CHECK-GI:       // %bb.0: // %entry723; CHECK-GI-NEXT:    ldrsw x8, [x0]724; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1725; CHECK-GI-NEXT:    and x9, x1, #0xff726; CHECK-GI-NEXT:    madd x0, x8, x9, x2727; CHECK-GI-NEXT:    ret728entry:729  %ext64 = load i32, ptr %x0730  %sext = sext i32 %ext64 to i64731  %zext = zext i8 %x1 to i64732  %mul = mul i64 %sext, %zext733  %add = add i64 %x2, %mul734  ret i64 %add735}736 737define i64 @smnegl_ldrsb_h(ptr %x0, i16 %x1) {738; CHECK-SD-LABEL: smnegl_ldrsb_h:739; CHECK-SD:       // %bb.0: // %entry740; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1741; CHECK-SD-NEXT:    ldrsb x8, [x0]742; CHECK-SD-NEXT:    sxth x9, w1743; CHECK-SD-NEXT:    smnegl x0, w8, w9744; CHECK-SD-NEXT:    ret745;746; CHECK-GI-LABEL: smnegl_ldrsb_h:747; CHECK-GI:       // %bb.0: // %entry748; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1749; CHECK-GI-NEXT:    ldrsb x8, [x0]750; CHECK-GI-NEXT:    sxth x9, w1751; CHECK-GI-NEXT:    mneg x0, x8, x9752; CHECK-GI-NEXT:    ret753entry:754  %ext64 = load i8, ptr %x0755  %sext = sext i8 %ext64 to i64756  %sext4 = sext i16 %x1 to i64757  %mul = mul i64 %sext, %sext4758  %sub = sub i64 0, %mul759  ret i64 %sub760}761 762define i64 @smnegl_ldrsb_h_commuted(ptr %x0, i16 %x1) {763; CHECK-SD-LABEL: smnegl_ldrsb_h_commuted:764; CHECK-SD:       // %bb.0: // %entry765; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1766; CHECK-SD-NEXT:    ldrsb x8, [x0]767; CHECK-SD-NEXT:    sxth x9, w1768; CHECK-SD-NEXT:    smnegl x0, w9, w8769; CHECK-SD-NEXT:    ret770;771; CHECK-GI-LABEL: smnegl_ldrsb_h_commuted:772; CHECK-GI:       // %bb.0: // %entry773; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1774; CHECK-GI-NEXT:    ldrsb x8, [x0]775; CHECK-GI-NEXT:    sxth x9, w1776; CHECK-GI-NEXT:    mneg x0, x9, x8777; CHECK-GI-NEXT:    ret778entry:779  %ext64 = load i8, ptr %x0780  %sext = sext i8 %ext64 to i64781  %sext4 = sext i16 %x1 to i64782  %mul = mul i64 %sext4, %sext783  %sub = sub i64 0, %mul784  ret i64 %sub785}786 787define i64 @smnegl_ldrsh_w(ptr %x0, i32 %x1) {788; CHECK-SD-LABEL: smnegl_ldrsh_w:789; CHECK-SD:       // %bb.0: // %entry790; CHECK-SD-NEXT:    ldrsh x8, [x0]791; CHECK-SD-NEXT:    smnegl x0, w8, w1792; CHECK-SD-NEXT:    ret793;794; CHECK-GI-LABEL: smnegl_ldrsh_w:795; CHECK-GI:       // %bb.0: // %entry796; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1797; CHECK-GI-NEXT:    ldrsh x8, [x0]798; CHECK-GI-NEXT:    sxtw x9, w1799; CHECK-GI-NEXT:    mneg x0, x8, x9800; CHECK-GI-NEXT:    ret801entry:802  %ext64 = load i16, ptr %x0803  %sext = sext i16 %ext64 to i64804  %sext4 = sext i32 %x1 to i64805  %mul = mul i64 %sext, %sext4806  %sub = sub i64 0, %mul807  ret i64 %sub808}809 810define i64 @smnegl_ldrsh_w_commuted(ptr %x0, i32 %x1) {811; CHECK-SD-LABEL: smnegl_ldrsh_w_commuted:812; CHECK-SD:       // %bb.0: // %entry813; CHECK-SD-NEXT:    ldrsh x8, [x0]814; CHECK-SD-NEXT:    smnegl x0, w8, w1815; CHECK-SD-NEXT:    ret816;817; CHECK-GI-LABEL: smnegl_ldrsh_w_commuted:818; CHECK-GI:       // %bb.0: // %entry819; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1820; CHECK-GI-NEXT:    ldrsh x8, [x0]821; CHECK-GI-NEXT:    sxtw x9, w1822; CHECK-GI-NEXT:    mneg x0, x9, x8823; CHECK-GI-NEXT:    ret824entry:825  %ext64 = load i16, ptr %x0826  %sext = sext i16 %ext64 to i64827  %sext4 = sext i32 %x1 to i64828  %mul = mul i64 %sext4, %sext829  %sub = sub i64 0, %mul830  ret i64 %sub831}832 833define i64 @smnegl_ldrsw_b(ptr %x0, i8 %x1) {834; CHECK-SD-LABEL: smnegl_ldrsw_b:835; CHECK-SD:       // %bb.0:836; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1837; CHECK-SD-NEXT:    ldrsw x8, [x0]838; CHECK-SD-NEXT:    sxtb x9, w1839; CHECK-SD-NEXT:    smnegl x0, w8, w9840; CHECK-SD-NEXT:    ret841;842; CHECK-GI-LABEL: smnegl_ldrsw_b:843; CHECK-GI:       // %bb.0:844; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1845; CHECK-GI-NEXT:    ldrsw x8, [x0]846; CHECK-GI-NEXT:    sxtb x9, w1847; CHECK-GI-NEXT:    mneg x0, x8, x9848; CHECK-GI-NEXT:    ret849  %ext64 = load i32, ptr %x0850  %sext = sext i32 %ext64 to i64851  %sext2 = sext i8 %x1 to i64852  %mul = mul i64 %sext, %sext2853  %sub = sub i64 0, %mul854  ret i64 %sub855}856 857define i64 @smnegl_ldrsw_b_commuted(ptr %x0, i8 %x1) {858; CHECK-SD-LABEL: smnegl_ldrsw_b_commuted:859; CHECK-SD:       // %bb.0:860; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1861; CHECK-SD-NEXT:    ldrsw x8, [x0]862; CHECK-SD-NEXT:    sxtb x9, w1863; CHECK-SD-NEXT:    smnegl x0, w9, w8864; CHECK-SD-NEXT:    ret865;866; CHECK-GI-LABEL: smnegl_ldrsw_b_commuted:867; CHECK-GI:       // %bb.0:868; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1869; CHECK-GI-NEXT:    ldrsw x8, [x0]870; CHECK-GI-NEXT:    sxtb x9, w1871; CHECK-GI-NEXT:    mneg x0, x9, x8872; CHECK-GI-NEXT:    ret873  %ext64 = load i32, ptr %x0874  %sext = sext i32 %ext64 to i64875  %sext2 = sext i8 %x1 to i64876  %mul = mul i64 %sext2, %sext877  %sub = sub i64 0, %mul878  ret i64 %sub879}880 881define i64 @smnegl_ldrsw_ldrsw(ptr %x0, ptr %x1) {882; CHECK-SD-LABEL: smnegl_ldrsw_ldrsw:883; CHECK-SD:       // %bb.0: // %entry884; CHECK-SD-NEXT:    ldrsw x8, [x0]885; CHECK-SD-NEXT:    ldrsw x9, [x1]886; CHECK-SD-NEXT:    smnegl x0, w8, w9887; CHECK-SD-NEXT:    ret888;889; CHECK-GI-LABEL: smnegl_ldrsw_ldrsw:890; CHECK-GI:       // %bb.0: // %entry891; CHECK-GI-NEXT:    ldrsw x8, [x0]892; CHECK-GI-NEXT:    ldrsw x9, [x1]893; CHECK-GI-NEXT:    mneg x0, x8, x9894; CHECK-GI-NEXT:    ret895entry:896  %ext64 = load i32, ptr %x0897  %ext64_2 = load i32, ptr %x1898  %sext = sext i32 %ext64 to i64899  %sext2 = sext i32 %ext64_2 to i64900  %mul = mul i64 %sext, %sext2901  %sub = sub i64 0, %mul902  ret i64 %sub903}904 905define i64 @smnegl_sext_hh(i16 %x0, i16 %x1) {906; CHECK-SD-LABEL: smnegl_sext_hh:907; CHECK-SD:       // %bb.0: // %entry908; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1909; CHECK-SD-NEXT:    // kill: def $w0 killed $w0 def $x0910; CHECK-SD-NEXT:    sxth x8, w0911; CHECK-SD-NEXT:    sxth x9, w1912; CHECK-SD-NEXT:    smnegl x0, w8, w9913; CHECK-SD-NEXT:    ret914;915; CHECK-GI-LABEL: smnegl_sext_hh:916; CHECK-GI:       // %bb.0: // %entry917; CHECK-GI-NEXT:    // kill: def $w0 killed $w0 def $x0918; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1919; CHECK-GI-NEXT:    sxth x8, w0920; CHECK-GI-NEXT:    sxth x9, w1921; CHECK-GI-NEXT:    mneg x0, x8, x9922; CHECK-GI-NEXT:    ret923entry:924  %sext = sext i16 %x0 to i64925  %sext2 = sext i16 %x1 to i64926  %mul = mul i64 %sext, %sext2927  %sub = sub i64 0, %mul928  ret i64 %sub929}930 931define i64 @smnegl_ldrsw_shift(ptr %x0, i64 %x1) {932; CHECK-SD-LABEL: smnegl_ldrsw_shift:933; CHECK-SD:       // %bb.0: // %entry934; CHECK-SD-NEXT:    ldrsw x8, [x0]935; CHECK-SD-NEXT:    smnegl x0, w8, w1936; CHECK-SD-NEXT:    ret937;938; CHECK-GI-LABEL: smnegl_ldrsw_shift:939; CHECK-GI:       // %bb.0: // %entry940; CHECK-GI-NEXT:    ldrsw x8, [x0]941; CHECK-GI-NEXT:    sxtw x9, w1942; CHECK-GI-NEXT:    mneg x0, x8, x9943; CHECK-GI-NEXT:    ret944entry:945  %ext64 = load i32, ptr %x0946  %sext = sext i32 %ext64 to i64947  %shl = shl i64 %x1, 32948  %shr = ashr exact i64 %shl, 32949  %mul = mul i64 %sext, %shr950  %sub = sub i64 0, %mul951  ret i64 %sub952}953 954define i64 @smnegl_ldrsw_zextb(ptr %x0, i8 %x1) {955; CHECK-SD-LABEL: smnegl_ldrsw_zextb:956; CHECK-SD:       // %bb.0: // %entry957; CHECK-SD-NEXT:    ldrsw x8, [x0]958; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1959; CHECK-SD-NEXT:    and x9, x1, #0xff960; CHECK-SD-NEXT:    smnegl x0, w8, w9961; CHECK-SD-NEXT:    ret962;963; CHECK-GI-LABEL: smnegl_ldrsw_zextb:964; CHECK-GI:       // %bb.0: // %entry965; CHECK-GI-NEXT:    ldrsw x8, [x0]966; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1967; CHECK-GI-NEXT:    and x9, x1, #0xff968; CHECK-GI-NEXT:    mneg x0, x8, x9969; CHECK-GI-NEXT:    ret970entry:971  %ext64 = load i32, ptr %x0972  %sext = sext i32 %ext64 to i64973  %zext = zext i8 %x1 to i64974  %mul = mul i64 %sext, %zext975  %sub = sub i64 0, %mul976  ret i64 %sub977}978 979define i64 @smsubl_ldrsb_h(ptr %x0, i16 %x1, i64 %x2) {980; CHECK-SD-LABEL: smsubl_ldrsb_h:981; CHECK-SD:       // %bb.0: // %entry982; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x1983; CHECK-SD-NEXT:    ldrsb x8, [x0]984; CHECK-SD-NEXT:    sxth x9, w1985; CHECK-SD-NEXT:    smsubl x0, w8, w9, x2986; CHECK-SD-NEXT:    ret987;988; CHECK-GI-LABEL: smsubl_ldrsb_h:989; CHECK-GI:       // %bb.0: // %entry990; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x1991; CHECK-GI-NEXT:    ldrsb x8, [x0]992; CHECK-GI-NEXT:    sxth x9, w1993; CHECK-GI-NEXT:    msub x0, x8, x9, x2994; CHECK-GI-NEXT:    ret995entry:996  %ext64 = load i8, ptr %x0997  %sext = sext i8 %ext64 to i64998  %sext4 = sext i16 %x1 to i64999  %mul = mul i64 %sext, %sext41000  %sub = sub i64 %x2, %mul1001  ret i64 %sub1002}1003 1004define i64 @smsubl_ldrsb_h_commuted(ptr %x0, i16 %x1, i64 %x2) {1005; CHECK-SD-LABEL: smsubl_ldrsb_h_commuted:1006; CHECK-SD:       // %bb.0: // %entry1007; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x11008; CHECK-SD-NEXT:    ldrsb x8, [x0]1009; CHECK-SD-NEXT:    sxth x9, w11010; CHECK-SD-NEXT:    smsubl x0, w9, w8, x21011; CHECK-SD-NEXT:    ret1012;1013; CHECK-GI-LABEL: smsubl_ldrsb_h_commuted:1014; CHECK-GI:       // %bb.0: // %entry1015; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x11016; CHECK-GI-NEXT:    ldrsb x8, [x0]1017; CHECK-GI-NEXT:    sxth x9, w11018; CHECK-GI-NEXT:    msub x0, x9, x8, x21019; CHECK-GI-NEXT:    ret1020entry:1021  %ext64 = load i8, ptr %x01022  %sext = sext i8 %ext64 to i641023  %sext4 = sext i16 %x1 to i641024  %mul = mul i64 %sext4, %sext1025  %sub = sub i64 %x2, %mul1026  ret i64 %sub1027}1028 1029define i64 @smsubl_ldrsh_w(ptr %x0, i32 %x1, i64 %x2) {1030; CHECK-SD-LABEL: smsubl_ldrsh_w:1031; CHECK-SD:       // %bb.0: // %entry1032; CHECK-SD-NEXT:    ldrsh x8, [x0]1033; CHECK-SD-NEXT:    smsubl x0, w8, w1, x21034; CHECK-SD-NEXT:    ret1035;1036; CHECK-GI-LABEL: smsubl_ldrsh_w:1037; CHECK-GI:       // %bb.0: // %entry1038; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x11039; CHECK-GI-NEXT:    ldrsh x8, [x0]1040; CHECK-GI-NEXT:    sxtw x9, w11041; CHECK-GI-NEXT:    msub x0, x8, x9, x21042; CHECK-GI-NEXT:    ret1043entry:1044  %ext64 = load i16, ptr %x01045  %sext = sext i16 %ext64 to i641046  %sext4 = sext i32 %x1 to i641047  %mul = mul i64 %sext, %sext41048  %sub = sub i64 %x2, %mul1049  ret i64 %sub1050}1051 1052define i64 @smsubl_ldrsh_w_commuted(ptr %x0, i32 %x1, i64 %x2) {1053; CHECK-SD-LABEL: smsubl_ldrsh_w_commuted:1054; CHECK-SD:       // %bb.0: // %entry1055; CHECK-SD-NEXT:    ldrsh x8, [x0]1056; CHECK-SD-NEXT:    smsubl x0, w8, w1, x21057; CHECK-SD-NEXT:    ret1058;1059; CHECK-GI-LABEL: smsubl_ldrsh_w_commuted:1060; CHECK-GI:       // %bb.0: // %entry1061; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x11062; CHECK-GI-NEXT:    ldrsh x8, [x0]1063; CHECK-GI-NEXT:    sxtw x9, w11064; CHECK-GI-NEXT:    msub x0, x9, x8, x21065; CHECK-GI-NEXT:    ret1066entry:1067  %ext64 = load i16, ptr %x01068  %sext = sext i16 %ext64 to i641069  %sext4 = sext i32 %x1 to i641070  %mul = mul i64 %sext4, %sext1071  %sub = sub i64 %x2, %mul1072  ret i64 %sub1073}1074 1075define i64 @smsubl_ldrsw_b(ptr %x0, i8 %x1, i64 %x2) {1076; CHECK-SD-LABEL: smsubl_ldrsw_b:1077; CHECK-SD:       // %bb.0:1078; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x11079; CHECK-SD-NEXT:    ldrsw x8, [x0]1080; CHECK-SD-NEXT:    sxtb x9, w11081; CHECK-SD-NEXT:    smsubl x0, w8, w9, x21082; CHECK-SD-NEXT:    ret1083;1084; CHECK-GI-LABEL: smsubl_ldrsw_b:1085; CHECK-GI:       // %bb.0:1086; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x11087; CHECK-GI-NEXT:    ldrsw x8, [x0]1088; CHECK-GI-NEXT:    sxtb x9, w11089; CHECK-GI-NEXT:    msub x0, x8, x9, x21090; CHECK-GI-NEXT:    ret1091  %ext64 = load i32, ptr %x01092  %sext = sext i32 %ext64 to i641093  %sext2 = sext i8 %x1 to i641094  %mul = mul i64 %sext, %sext21095  %sub = sub i64 %x2, %mul1096  ret i64 %sub1097}1098 1099define i64 @smsubl_ldrsw_b_commuted(ptr %x0, i8 %x1, i64 %x2) {1100; CHECK-SD-LABEL: smsubl_ldrsw_b_commuted:1101; CHECK-SD:       // %bb.0:1102; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x11103; CHECK-SD-NEXT:    ldrsw x8, [x0]1104; CHECK-SD-NEXT:    sxtb x9, w11105; CHECK-SD-NEXT:    smsubl x0, w9, w8, x21106; CHECK-SD-NEXT:    ret1107;1108; CHECK-GI-LABEL: smsubl_ldrsw_b_commuted:1109; CHECK-GI:       // %bb.0:1110; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x11111; CHECK-GI-NEXT:    ldrsw x8, [x0]1112; CHECK-GI-NEXT:    sxtb x9, w11113; CHECK-GI-NEXT:    msub x0, x9, x8, x21114; CHECK-GI-NEXT:    ret1115  %ext64 = load i32, ptr %x01116  %sext = sext i32 %ext64 to i641117  %sext2 = sext i8 %x1 to i641118  %mul = mul i64 %sext2, %sext1119  %sub = sub i64 %x2, %mul1120  ret i64 %sub1121}1122 1123define i64 @smsubl_ldrsw_ldrsw(ptr %x0, ptr %x1, i64 %x2) {1124; CHECK-SD-LABEL: smsubl_ldrsw_ldrsw:1125; CHECK-SD:       // %bb.0: // %entry1126; CHECK-SD-NEXT:    ldrsw x8, [x0]1127; CHECK-SD-NEXT:    ldrsw x9, [x1]1128; CHECK-SD-NEXT:    smsubl x0, w8, w9, x21129; CHECK-SD-NEXT:    ret1130;1131; CHECK-GI-LABEL: smsubl_ldrsw_ldrsw:1132; CHECK-GI:       // %bb.0: // %entry1133; CHECK-GI-NEXT:    ldrsw x8, [x0]1134; CHECK-GI-NEXT:    ldrsw x9, [x1]1135; CHECK-GI-NEXT:    msub x0, x8, x9, x21136; CHECK-GI-NEXT:    ret1137entry:1138  %ext64 = load i32, ptr %x01139  %ext64_2 = load i32, ptr %x11140  %sext = sext i32 %ext64 to i641141  %sext2 = sext i32 %ext64_2 to i641142  %mul = mul i64 %sext, %sext21143  %sub = sub i64 %x2, %mul1144  ret i64 %sub1145}1146 1147define i64 @smsubl_sext_hh(i16 %x0, i16 %x1, i64 %x2) {1148; CHECK-SD-LABEL: smsubl_sext_hh:1149; CHECK-SD:       // %bb.0: // %entry1150; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x11151; CHECK-SD-NEXT:    // kill: def $w0 killed $w0 def $x01152; CHECK-SD-NEXT:    sxth x8, w01153; CHECK-SD-NEXT:    sxth x9, w11154; CHECK-SD-NEXT:    smsubl x0, w8, w9, x21155; CHECK-SD-NEXT:    ret1156;1157; CHECK-GI-LABEL: smsubl_sext_hh:1158; CHECK-GI:       // %bb.0: // %entry1159; CHECK-GI-NEXT:    // kill: def $w0 killed $w0 def $x01160; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x11161; CHECK-GI-NEXT:    sxth x8, w01162; CHECK-GI-NEXT:    sxth x9, w11163; CHECK-GI-NEXT:    msub x0, x8, x9, x21164; CHECK-GI-NEXT:    ret1165entry:1166  %sext = sext i16 %x0 to i641167  %sext2 = sext i16 %x1 to i641168  %mul = mul i64 %sext, %sext21169  %sub = sub i64 %x2, %mul1170  ret i64 %sub1171}1172 1173define i64 @smsubl_ldrsw_shift(ptr %x0, i64 %x1, i64 %x2) {1174; CHECK-SD-LABEL: smsubl_ldrsw_shift:1175; CHECK-SD:       // %bb.0: // %entry1176; CHECK-SD-NEXT:    ldrsw x8, [x0]1177; CHECK-SD-NEXT:    smsubl x0, w8, w1, x21178; CHECK-SD-NEXT:    ret1179;1180; CHECK-GI-LABEL: smsubl_ldrsw_shift:1181; CHECK-GI:       // %bb.0: // %entry1182; CHECK-GI-NEXT:    ldrsw x8, [x0]1183; CHECK-GI-NEXT:    sxtw x9, w11184; CHECK-GI-NEXT:    msub x0, x8, x9, x21185; CHECK-GI-NEXT:    ret1186entry:1187  %ext64 = load i32, ptr %x01188  %sext = sext i32 %ext64 to i641189  %shl = shl i64 %x1, 321190  %shr = ashr exact i64 %shl, 321191  %mul = mul i64 %sext, %shr1192  %sub = sub i64 %x2, %mul1193  ret i64 %sub1194}1195 1196define i64 @smsubl_ldrsw_zextb(ptr %x0, i8 %x1, i64 %x2) {1197; CHECK-SD-LABEL: smsubl_ldrsw_zextb:1198; CHECK-SD:       // %bb.0: // %entry1199; CHECK-SD-NEXT:    ldrsw x8, [x0]1200; CHECK-SD-NEXT:    // kill: def $w1 killed $w1 def $x11201; CHECK-SD-NEXT:    and x9, x1, #0xff1202; CHECK-SD-NEXT:    smsubl x0, w8, w9, x21203; CHECK-SD-NEXT:    ret1204;1205; CHECK-GI-LABEL: smsubl_ldrsw_zextb:1206; CHECK-GI:       // %bb.0: // %entry1207; CHECK-GI-NEXT:    ldrsw x8, [x0]1208; CHECK-GI-NEXT:    // kill: def $w1 killed $w1 def $x11209; CHECK-GI-NEXT:    and x9, x1, #0xff1210; CHECK-GI-NEXT:    msub x0, x8, x9, x21211; CHECK-GI-NEXT:    ret1212entry:1213  %ext64 = load i32, ptr %x01214  %sext = sext i32 %ext64 to i641215  %zext = zext i8 %x1 to i641216  %mul = mul i64 %sext, %zext1217  %sub = sub i64 %x2, %mul1218  ret i64 %sub1219}1220 1221define i64 @smull_sext_ashr31(i32 %a, i64 %b) nounwind {1222; CHECK-LABEL: smull_sext_ashr31:1223; CHECK:       // %bb.0: // %entry1224; CHECK-NEXT:    // kill: def $w0 killed $w0 def $x01225; CHECK-NEXT:    sxtw x8, w01226; CHECK-NEXT:    asr x9, x1, #311227; CHECK-NEXT:    mul x0, x8, x91228; CHECK-NEXT:    ret1229entry:1230  %tmp1 = sext i32 %a to i641231  %c = ashr i64 %b, 311232  %tmp3 = mul i64 %tmp1, %c1233  ret i64 %tmp31234}1235 1236define i64 @smull_sext_ashr32(i32 %a, i64 %b) nounwind {1237; CHECK-SD-LABEL: smull_sext_ashr32:1238; CHECK-SD:       // %bb.0: // %entry1239; CHECK-SD-NEXT:    asr x8, x1, #321240; CHECK-SD-NEXT:    smull x0, w8, w01241; CHECK-SD-NEXT:    ret1242;1243; CHECK-GI-LABEL: smull_sext_ashr32:1244; CHECK-GI:       // %bb.0: // %entry1245; CHECK-GI-NEXT:    // kill: def $w0 killed $w0 def $x01246; CHECK-GI-NEXT:    sxtw x8, w01247; CHECK-GI-NEXT:    asr x9, x1, #321248; CHECK-GI-NEXT:    mul x0, x8, x91249; CHECK-GI-NEXT:    ret1250entry:1251  %tmp1 = sext i32 %a to i641252  %c = ashr i64 %b, 321253  %tmp3 = mul i64 %tmp1, %c1254  ret i64 %tmp31255}1256 1257 1258define i64 @smull_ashr31_both(i64 %a, i64 %b) nounwind {1259; CHECK-LABEL: smull_ashr31_both:1260; CHECK:       // %bb.0: // %entry1261; CHECK-NEXT:    asr x8, x0, #311262; CHECK-NEXT:    asr x9, x1, #311263; CHECK-NEXT:    mul x0, x8, x91264; CHECK-NEXT:    ret1265entry:1266  %tmp1 = ashr i64 %a, 311267  %c = ashr i64 %b, 311268  %tmp3 = mul i64 %tmp1, %c1269  ret i64 %tmp31270}1271 1272define i64 @smull_ashr32_both(i64 %a, i64 %b) nounwind {1273; CHECK-SD-LABEL: smull_ashr32_both:1274; CHECK-SD:       // %bb.0: // %entry1275; CHECK-SD-NEXT:    asr x8, x0, #321276; CHECK-SD-NEXT:    asr x9, x1, #321277; CHECK-SD-NEXT:    smull x0, w8, w91278; CHECK-SD-NEXT:    ret1279;1280; CHECK-GI-LABEL: smull_ashr32_both:1281; CHECK-GI:       // %bb.0: // %entry1282; CHECK-GI-NEXT:    asr x8, x0, #321283; CHECK-GI-NEXT:    asr x9, x1, #321284; CHECK-GI-NEXT:    mul x0, x8, x91285; CHECK-GI-NEXT:    ret1286entry:1287  %tmp1 = ashr i64 %a, 321288  %c = ashr i64 %b, 321289  %tmp3 = mul i64 %tmp1, %c1290  ret i64 %tmp31291}1292 1293define i64 @umull_ldrb_h(ptr %x0, i16 %x1) {1294; CHECK-LABEL: umull_ldrb_h:1295; CHECK:       // %bb.0: // %entry1296; CHECK-NEXT:    ldrb w8, [x0]1297; CHECK-NEXT:    // kill: def $w1 killed $w1 def $x11298; CHECK-NEXT:    and x9, x1, #0xffff1299; CHECK-NEXT:    umull x0, w8, w91300; CHECK-NEXT:    ret1301entry:1302  %ext64 = load i8, ptr %x01303  %zext = zext i8 %ext64 to i641304  %zext4 = zext i16 %x1 to i641305  %mul = mul i64 %zext, %zext41306  ret i64 %mul1307}1308 1309define i64 @umull_ldrb_h_commuted(ptr %x0, i16 %x1) {1310; CHECK-LABEL: umull_ldrb_h_commuted:1311; CHECK:       // %bb.0: // %entry1312; CHECK-NEXT:    ldrb w8, [x0]1313; CHECK-NEXT:    // kill: def $w1 killed $w1 def $x11314; CHECK-NEXT:    and x9, x1, #0xffff1315; CHECK-NEXT:    umull x0, w9, w81316; CHECK-NEXT:    ret1317entry:1318  %ext64 = load i8, ptr %x01319  %zext = zext i8 %ext64 to i641320  %zext4 = zext i16 %x1 to i641321  %mul = mul i64 %zext4, %zext1322  ret i64 %mul1323}1324 1325define i64 @umull_ldrh_w(ptr %x0, i32 %x1) {1326; CHECK-LABEL: umull_ldrh_w:1327; CHECK:       // %bb.0: // %entry1328; CHECK-NEXT:    ldrh w8, [x0]1329; CHECK-NEXT:    umull x0, w8, w11330; CHECK-NEXT:    ret1331entry:1332  %ext64 = load i16, ptr %x01333  %zext = zext i16 %ext64 to i641334  %zext4 = zext i32 %x1 to i641335  %mul = mul i64 %zext, %zext41336  ret i64 %mul1337}1338 1339define i64 @umull_ldr_b(ptr %x0, i8 %x1) {1340; CHECK-LABEL: umull_ldr_b:1341; CHECK:       // %bb.0: // %entry1342; CHECK-NEXT:    ldr w8, [x0]1343; CHECK-NEXT:    // kill: def $w1 killed $w1 def $x11344; CHECK-NEXT:    and x9, x1, #0xff1345; CHECK-NEXT:    umull x0, w8, w91346; CHECK-NEXT:    ret1347entry:1348  %ext64 = load i32, ptr %x01349  %zext = zext i32 %ext64 to i641350  %zext4 = zext i8 %x1 to i641351  %mul = mul i64 %zext, %zext41352  ret i64 %mul1353}1354 1355define i64 @umull_ldr2_w(ptr %x0, i32 %x1) {1356; CHECK-LABEL: umull_ldr2_w:1357; CHECK:       // %bb.0: // %entry1358; CHECK-NEXT:    ldr w8, [x0]1359; CHECK-NEXT:    umull x0, w8, w11360; CHECK-NEXT:    ret1361entry:1362  %ext64 = load i64, ptr %x01363  %and = and i64 %ext64, 42949672951364  %zext4 = zext i32 %x1 to i641365  %mul = mul i64 %and, %zext41366  ret i64 %mul1367}1368 1369define i64 @umull_ldr2_ldr2(ptr %x0, ptr %x1) {1370; CHECK-LABEL: umull_ldr2_ldr2:1371; CHECK:       // %bb.0: // %entry1372; CHECK-NEXT:    ldr w8, [x0]1373; CHECK-NEXT:    ldr w9, [x1]1374; CHECK-NEXT:    umull x0, w8, w91375; CHECK-NEXT:    ret1376entry:1377  %ext64 = load i64, ptr %x01378  %and = and i64 %ext64, 42949672951379  %ext64_2 = load i64, ptr %x11380  %and2 = and i64 %ext64_2, 42949672951381  %mul = mul i64 %and, %and21382  ret i64 %mul1383}1384 1385define i64 @umull_ldr2_d(ptr %x0, i64 %x1) {1386; CHECK-LABEL: umull_ldr2_d:1387; CHECK:       // %bb.0: // %entry1388; CHECK-NEXT:    ldr w8, [x0]1389; CHECK-NEXT:    umull x0, w8, w11390; CHECK-NEXT:    ret1391entry:1392  %ext64 = load i64, ptr %x01393  %and = and i64 %ext64, 42949672951394  %and2 = and i64 %x1, 42949672951395  %mul = mul i64 %and, %and21396  ret i64 %mul1397}1398 1399define i64 @umaddl_ldrb_h(ptr %x0, i16 %x1, i64 %x2) {1400; CHECK-LABEL: umaddl_ldrb_h:1401; CHECK:       // %bb.0: // %entry1402; CHECK-NEXT:    ldrb w8, [x0]1403; CHECK-NEXT:    // kill: def $w1 killed $w1 def $x11404; CHECK-NEXT:    and x9, x1, #0xffff1405; CHECK-NEXT:    umaddl x0, w8, w9, x21406; CHECK-NEXT:    ret1407entry:1408  %ext64 = load i8, ptr %x01409  %zext = zext i8 %ext64 to i641410  %zext4 = zext i16 %x1 to i641411  %mul = mul i64 %zext, %zext41412  %add = add i64 %mul, %x21413  ret i64 %add1414}1415 1416define i64 @umaddl_ldrb_h_commuted(ptr %x0, i16 %x1, i64 %x2) {1417; CHECK-LABEL: umaddl_ldrb_h_commuted:1418; CHECK:       // %bb.0: // %entry1419; CHECK-NEXT:    ldrb w8, [x0]1420; CHECK-NEXT:    // kill: def $w1 killed $w1 def $x11421; CHECK-NEXT:    and x9, x1, #0xffff1422; CHECK-NEXT:    umaddl x0, w9, w8, x21423; CHECK-NEXT:    ret1424entry:1425  %ext64 = load i8, ptr %x01426  %zext = zext i8 %ext64 to i641427  %zext4 = zext i16 %x1 to i641428  %mul = mul i64 %zext4, %zext1429  %add = add i64 %mul, %x21430  ret i64 %add1431}1432 1433define i64 @umaddl_ldrh_w(ptr %x0, i32 %x1, i64 %x2) {1434; CHECK-LABEL: umaddl_ldrh_w:1435; CHECK:       // %bb.0: // %entry1436; CHECK-NEXT:    ldrh w8, [x0]1437; CHECK-NEXT:    umaddl x0, w8, w1, x21438; CHECK-NEXT:    ret1439entry:1440  %ext64 = load i16, ptr %x01441  %zext = zext i16 %ext64 to i641442  %zext4 = zext i32 %x1 to i641443  %mul = mul i64 %zext, %zext41444  %add = add i64 %mul, %x21445  ret i64 %add1446}1447 1448define i64 @umaddl_ldr_b(ptr %x0, i8 %x1, i64 %x2) {1449; CHECK-LABEL: umaddl_ldr_b:1450; CHECK:       // %bb.0: // %entry1451; CHECK-NEXT:    ldr w8, [x0]1452; CHECK-NEXT:    // kill: def $w1 killed $w1 def $x11453; CHECK-NEXT:    and x9, x1, #0xff1454; CHECK-NEXT:    umaddl x0, w8, w9, x21455; CHECK-NEXT:    ret1456entry:1457  %ext64 = load i32, ptr %x01458  %zext = zext i32 %ext64 to i641459  %zext4 = zext i8 %x1 to i641460  %mul = mul i64 %zext, %zext41461  %add = add i64 %mul, %x21462  ret i64 %add1463}1464 1465define i64 @umaddl_ldr2_w(ptr %x0, i32 %x1, i64 %x2) {1466; CHECK-LABEL: umaddl_ldr2_w:1467; CHECK:       // %bb.0: // %entry1468; CHECK-NEXT:    ldr w8, [x0]1469; CHECK-NEXT:    umaddl x0, w8, w1, x21470; CHECK-NEXT:    ret1471entry:1472  %ext64 = load i64, ptr %x01473  %and = and i64 %ext64, 42949672951474  %zext4 = zext i32 %x1 to i641475  %mul = mul i64 %and, %zext41476  %add = add i64 %mul, %x21477  ret i64 %add1478}1479 1480define i64 @umaddl_ldr2_ldr2(ptr %x0, ptr %x1, i64 %x2) {1481; CHECK-LABEL: umaddl_ldr2_ldr2:1482; CHECK:       // %bb.0: // %entry1483; CHECK-NEXT:    ldr w8, [x0]1484; CHECK-NEXT:    ldr w9, [x1]1485; CHECK-NEXT:    umaddl x0, w8, w9, x21486; CHECK-NEXT:    ret1487entry:1488  %ext64 = load i64, ptr %x01489  %and = and i64 %ext64, 42949672951490  %ext64_2 = load i64, ptr %x11491  %and2 = and i64 %ext64_2, 42949672951492  %mul = mul i64 %and, %and21493  %add = add i64 %mul, %x21494  ret i64 %add1495}1496 1497define i64 @umaddl_ldr2_d(ptr %x0, i64 %x1, i64 %x2) {1498; CHECK-LABEL: umaddl_ldr2_d:1499; CHECK:       // %bb.0: // %entry1500; CHECK-NEXT:    ldr w8, [x0]1501; CHECK-NEXT:    umaddl x0, w8, w1, x21502; CHECK-NEXT:    ret1503entry:1504  %ext64 = load i64, ptr %x01505  %and = and i64 %ext64, 42949672951506  %and2 = and i64 %x1, 42949672951507  %mul = mul i64 %and, %and21508  %add = add i64 %mul, %x21509  ret i64 %add1510}1511 1512define i64 @umnegl_ldrb_h(ptr %x0, i16 %x1) {1513; CHECK-LABEL: umnegl_ldrb_h:1514; CHECK:       // %bb.0: // %entry1515; CHECK-NEXT:    ldrb w8, [x0]1516; CHECK-NEXT:    // kill: def $w1 killed $w1 def $x11517; CHECK-NEXT:    and x9, x1, #0xffff1518; CHECK-NEXT:    umnegl x0, w8, w91519; CHECK-NEXT:    ret1520entry:1521  %ext64 = load i8, ptr %x01522  %zext = zext i8 %ext64 to i641523  %zext4 = zext i16 %x1 to i641524  %mul = mul i64 %zext, %zext41525  %sub = sub i64 0, %mul1526  ret i64 %sub1527}1528 1529define i64 @umnegl_ldrb_h_commuted(ptr %x0, i16 %x1) {1530; CHECK-LABEL: umnegl_ldrb_h_commuted:1531; CHECK:       // %bb.0: // %entry1532; CHECK-NEXT:    ldrb w8, [x0]1533; CHECK-NEXT:    // kill: def $w1 killed $w1 def $x11534; CHECK-NEXT:    and x9, x1, #0xffff1535; CHECK-NEXT:    umnegl x0, w9, w81536; CHECK-NEXT:    ret1537entry:1538  %ext64 = load i8, ptr %x01539  %zext = zext i8 %ext64 to i641540  %zext4 = zext i16 %x1 to i641541  %mul = mul i64 %zext4, %zext1542  %sub = sub i64 0, %mul1543  ret i64 %sub1544}1545 1546define i64 @umnegl_ldrh_w(ptr %x0, i32 %x1) {1547; CHECK-LABEL: umnegl_ldrh_w:1548; CHECK:       // %bb.0: // %entry1549; CHECK-NEXT:    ldrh w8, [x0]1550; CHECK-NEXT:    umnegl x0, w8, w11551; CHECK-NEXT:    ret1552entry:1553  %ext64 = load i16, ptr %x01554  %zext = zext i16 %ext64 to i641555  %zext4 = zext i32 %x1 to i641556  %mul = mul i64 %zext, %zext41557  %sub = sub i64 0, %mul1558  ret i64 %sub1559}1560 1561define i64 @umnegl_ldr_b(ptr %x0, i8 %x1) {1562; CHECK-LABEL: umnegl_ldr_b:1563; CHECK:       // %bb.0: // %entry1564; CHECK-NEXT:    ldr w8, [x0]1565; CHECK-NEXT:    // kill: def $w1 killed $w1 def $x11566; CHECK-NEXT:    and x9, x1, #0xff1567; CHECK-NEXT:    umnegl x0, w8, w91568; CHECK-NEXT:    ret1569entry:1570  %ext64 = load i32, ptr %x01571  %zext = zext i32 %ext64 to i641572  %zext4 = zext i8 %x1 to i641573  %mul = mul i64 %zext, %zext41574  %sub = sub i64 0, %mul1575  ret i64 %sub1576}1577 1578define i64 @umnegl_ldr2_w(ptr %x0, i32 %x1) {1579; CHECK-LABEL: umnegl_ldr2_w:1580; CHECK:       // %bb.0: // %entry1581; CHECK-NEXT:    ldr w8, [x0]1582; CHECK-NEXT:    umnegl x0, w8, w11583; CHECK-NEXT:    ret1584entry:1585  %ext64 = load i64, ptr %x01586  %and = and i64 %ext64, 42949672951587  %zext4 = zext i32 %x1 to i641588  %mul = mul i64 %and, %zext41589  %sub = sub i64 0, %mul1590  ret i64 %sub1591}1592 1593define i64 @umnegl_ldr2_ldr2(ptr %x0, ptr %x1) {1594; CHECK-LABEL: umnegl_ldr2_ldr2:1595; CHECK:       // %bb.0: // %entry1596; CHECK-NEXT:    ldr w8, [x0]1597; CHECK-NEXT:    ldr w9, [x1]1598; CHECK-NEXT:    umnegl x0, w8, w91599; CHECK-NEXT:    ret1600entry:1601  %ext64 = load i64, ptr %x01602  %and = and i64 %ext64, 42949672951603  %ext64_2 = load i64, ptr %x11604  %and2 = and i64 %ext64_2, 42949672951605  %mul = mul i64 %and, %and21606  %sub = sub i64 0, %mul1607  ret i64 %sub1608}1609 1610define i64 @umnegl_ldr2_d(ptr %x0, i64 %x1) {1611; CHECK-LABEL: umnegl_ldr2_d:1612; CHECK:       // %bb.0: // %entry1613; CHECK-NEXT:    ldr w8, [x0]1614; CHECK-NEXT:    umnegl x0, w8, w11615; CHECK-NEXT:    ret1616entry:1617  %ext64 = load i64, ptr %x01618  %and = and i64 %ext64, 42949672951619  %and2 = and i64 %x1, 42949672951620  %mul = mul i64 %and, %and21621  %sub = sub i64 0, %mul1622  ret i64 %sub1623}1624 1625define i64 @umsubl_ldrb_h(ptr %x0, i16 %x1, i64 %x2) {1626; CHECK-LABEL: umsubl_ldrb_h:1627; CHECK:       // %bb.0: // %entry1628; CHECK-NEXT:    ldrb w8, [x0]1629; CHECK-NEXT:    // kill: def $w1 killed $w1 def $x11630; CHECK-NEXT:    and x9, x1, #0xffff1631; CHECK-NEXT:    umsubl x0, w8, w9, x21632; CHECK-NEXT:    ret1633entry:1634  %ext64 = load i8, ptr %x01635  %zext = zext i8 %ext64 to i641636  %zext4 = zext i16 %x1 to i641637  %mul = mul i64 %zext, %zext41638  %sub = sub i64 %x2, %mul1639  ret i64 %sub1640}1641 1642define i64 @umsubl_ldrb_h_commuted(ptr %x0, i16 %x1, i64 %x2) {1643; CHECK-LABEL: umsubl_ldrb_h_commuted:1644; CHECK:       // %bb.0: // %entry1645; CHECK-NEXT:    ldrb w8, [x0]1646; CHECK-NEXT:    // kill: def $w1 killed $w1 def $x11647; CHECK-NEXT:    and x9, x1, #0xffff1648; CHECK-NEXT:    umsubl x0, w9, w8, x21649; CHECK-NEXT:    ret1650entry:1651  %ext64 = load i8, ptr %x01652  %zext = zext i8 %ext64 to i641653  %zext4 = zext i16 %x1 to i641654  %mul = mul i64 %zext4, %zext1655  %sub = sub i64 %x2, %mul1656  ret i64 %sub1657}1658 1659define i64 @umsubl_ldrh_w(ptr %x0, i32 %x1, i64 %x2) {1660; CHECK-LABEL: umsubl_ldrh_w:1661; CHECK:       // %bb.0: // %entry1662; CHECK-NEXT:    ldrh w8, [x0]1663; CHECK-NEXT:    umsubl x0, w8, w1, x21664; CHECK-NEXT:    ret1665entry:1666  %ext64 = load i16, ptr %x01667  %zext = zext i16 %ext64 to i641668  %zext4 = zext i32 %x1 to i641669  %mul = mul i64 %zext, %zext41670  %sub = sub i64 %x2, %mul1671  ret i64 %sub1672}1673 1674define i64 @umsubl_ldr_b(ptr %x0, i8 %x1, i64 %x2) {1675; CHECK-LABEL: umsubl_ldr_b:1676; CHECK:       // %bb.0: // %entry1677; CHECK-NEXT:    ldr w8, [x0]1678; CHECK-NEXT:    // kill: def $w1 killed $w1 def $x11679; CHECK-NEXT:    and x9, x1, #0xff1680; CHECK-NEXT:    umsubl x0, w8, w9, x21681; CHECK-NEXT:    ret1682entry:1683  %ext64 = load i32, ptr %x01684  %zext = zext i32 %ext64 to i641685  %zext4 = zext i8 %x1 to i641686  %mul = mul i64 %zext, %zext41687  %sub = sub i64 %x2, %mul1688  ret i64 %sub1689}1690 1691define i64 @umsubl_ldr2_w(ptr %x0, i32 %x1, i64 %x2) {1692; CHECK-LABEL: umsubl_ldr2_w:1693; CHECK:       // %bb.0: // %entry1694; CHECK-NEXT:    ldr w8, [x0]1695; CHECK-NEXT:    umsubl x0, w8, w1, x21696; CHECK-NEXT:    ret1697entry:1698  %ext64 = load i64, ptr %x01699  %and = and i64 %ext64, 42949672951700  %zext4 = zext i32 %x1 to i641701  %mul = mul i64 %and, %zext41702  %sub = sub i64 %x2, %mul1703  ret i64 %sub1704}1705 1706define i64 @umsubl_ldr2_ldr2(ptr %x0, ptr %x1, i64 %x2) {1707; CHECK-LABEL: umsubl_ldr2_ldr2:1708; CHECK:       // %bb.0: // %entry1709; CHECK-NEXT:    ldr w8, [x0]1710; CHECK-NEXT:    ldr w9, [x1]1711; CHECK-NEXT:    umsubl x0, w8, w9, x21712; CHECK-NEXT:    ret1713entry:1714  %ext64 = load i64, ptr %x01715  %and = and i64 %ext64, 42949672951716  %ext64_2 = load i64, ptr %x11717  %and2 = and i64 %ext64_2, 42949672951718  %mul = mul i64 %and, %and21719  %sub = sub i64 %x2, %mul1720  ret i64 %sub1721}1722 1723define i64 @umsubl_ldr2_d(ptr %x0, i64 %x1, i64 %x2) {1724; CHECK-LABEL: umsubl_ldr2_d:1725; CHECK:       // %bb.0: // %entry1726; CHECK-NEXT:    ldr w8, [x0]1727; CHECK-NEXT:    umsubl x0, w8, w1, x21728; CHECK-NEXT:    ret1729entry:1730  %ext64 = load i64, ptr %x01731  %and = and i64 %ext64, 42949672951732  %and2 = and i64 %x1, 42949672951733  %mul = mul i64 %and, %and21734  %sub = sub i64 %x2, %mul1735  ret i64 %sub1736}1737 1738define i64 @umull_ldr2_w_cc1(ptr %x0, i32 %x1) {1739; CHECK-LABEL: umull_ldr2_w_cc1:1740; CHECK:       // %bb.0: // %entry1741; CHECK-NEXT:    ldr x8, [x0]1742; CHECK-NEXT:    and x8, x8, #0x7fffffff1743; CHECK-NEXT:    umull x0, w8, w11744; CHECK-NEXT:    ret1745entry:1746  %ext64 = load i64, ptr %x01747  %and = and i64 %ext64, 21474836471748  %zext4 = zext i32 %x1 to i641749  %mul = mul i64 %and, %zext41750  ret i64 %mul1751}1752 1753define i64 @umull_ldr2_w_cc2(ptr %x0, i32 %x1) {1754; CHECK-LABEL: umull_ldr2_w_cc2:1755; CHECK:       // %bb.0: // %entry1756; CHECK-NEXT:    ldr x8, [x0]1757; CHECK-NEXT:    mov w9, w11758; CHECK-NEXT:    and x8, x8, #0x1ffffffff1759; CHECK-NEXT:    mul x0, x8, x91760; CHECK-NEXT:    ret1761entry:1762  %ext64 = load i64, ptr %x01763  %and = and i64 %ext64, 85899345911764  %zext4 = zext i32 %x1 to i641765  %mul = mul i64 %and, %zext41766  ret i64 %mul1767}1768 1769define i64 @regression_umsubl(i64 %a, i32 %b, i64 %c) {1770; CHECK-LABEL: regression_umsubl:1771; CHECK:       // %bb.0: // %entry1772; CHECK-NEXT:    mov w8, w11773; CHECK-NEXT:    udiv x9, x0, x81774; CHECK-NEXT:    msub x0, x9, x8, x21775; CHECK-NEXT:    ret1776entry:1777  %zext1 = zext i32 %b to i641778  %res = udiv i64 %a, %zext11779  %mul = mul i64 %res, %zext11780  %sub = sub i64 %c, %mul1781  ret i64 %sub1782}1783 1784define i64 @umull_and_lshr(i64 %x) {1785; CHECK-LABEL: umull_and_lshr:1786; CHECK:       // %bb.0:1787; CHECK-NEXT:    lsr x8, x0, #321788; CHECK-NEXT:    umull x0, w0, w81789; CHECK-NEXT:    ret1790    %lo = and i64 %x, u0xffffffff1791    %hi = lshr i64 %x, 321792    %mul = mul i64 %lo, %hi1793    ret i64 %mul1794}1795 1796define i64 @umull_and_and(i64 %x, i64 %y) {1797; CHECK-LABEL: umull_and_and:1798; CHECK:       // %bb.0:1799; CHECK-NEXT:    umull x0, w0, w11800; CHECK-NEXT:    ret1801    %lo = and i64 %x, u0xffffffff1802    %hi = and i64 %y, u0xffffffff1803    %mul = mul i64 %lo, %hi1804    ret i64 %mul1805}1806 1807define i64 @umaddl_and_lshr(i64 %x, i64 %a) {1808; CHECK-LABEL: umaddl_and_lshr:1809; CHECK:       // %bb.0:1810; CHECK-NEXT:    lsr x8, x0, #321811; CHECK-NEXT:    umaddl x0, w0, w8, x11812; CHECK-NEXT:    ret1813    %lo = and i64 %x, u0xffffffff1814    %hi = lshr i64 %x, 321815    %mul = mul i64 %lo, %hi1816    %add = add i64 %a, %mul1817    ret i64 %add1818}1819 1820define i64 @umaddl_and_and(i64 %x, i64 %y, i64 %a) {1821; CHECK-LABEL: umaddl_and_and:1822; CHECK:       // %bb.0:1823; CHECK-NEXT:    umaddl x0, w0, w1, x21824; CHECK-NEXT:    ret1825    %lo = and i64 %x, u0xffffffff1826    %hi = and i64 %y, u0xffffffff1827    %mul = mul i64 %lo, %hi1828    %add = add i64 %a, %mul1829    ret i64 %add1830}1831 1832; Check which can contain multiple copies that should all be removed.1833define i32 @f(i32 %0) {1834; CHECK-SD-LABEL: f:1835; CHECK-SD:       // %bb.0: // %entry1836; CHECK-SD-NEXT:    // kill: def $w0 killed $w0 def $x01837; CHECK-SD-NEXT:    neg w8, w01838; CHECK-SD-NEXT:  .LBB93_1: // %B1839; CHECK-SD-NEXT:    // =>This Inner Loop Header: Depth=11840; CHECK-SD-NEXT:    cbnz x8, .LBB93_11841; CHECK-SD-NEXT:    b .LBB93_11842;1843; CHECK-GI-LABEL: f:1844; CHECK-GI:       // %bb.0: // %entry1845; CHECK-GI-NEXT:    neg w8, w01846; CHECK-GI-NEXT:  .LBB93_1: // %B1847; CHECK-GI-NEXT:    // =>This Inner Loop Header: Depth=11848; CHECK-GI-NEXT:    cbnz x8, .LBB93_11849; CHECK-GI-NEXT:    b .LBB93_11850entry:1851  %1 = sext i32 %0 to i641852  br label %A1853 1854A:1855  %2 = trunc i64 %1 to i321856  %a69.us = sub i32 0, %21857  %a69.us.fr = freeze i32 %a69.us1858  %3 = zext i32 %a69.us.fr to i641859  br label %B1860 1861B:1862  %t = icmp eq i64 0, %31863  br i1 %t, label %A, label %B1864}1865 1866define i64 @pr137274(ptr %ptr) {1867; CHECK-LABEL: pr137274:1868; CHECK:       // %bb.0:1869; CHECK-NEXT:    ldr x8, [x0]1870; CHECK-NEXT:    ldr w9, [x8, #8]!1871; CHECK-NEXT:    mul x0, x8, x91872; CHECK-NEXT:    ret1873  %l0 = load i64, ptr %ptr, align 81874  %add = add i64 %l0, 81875  %i1 = inttoptr i64 %add to ptr1876  %l2 = load i32, ptr %i1, align 41877  %conv = zext i32 %l2 to i641878  %mul = mul i64 %add, %conv1879  ret i64 %mul1880}1881