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1; RUN: llc < %s -mtriple aarch64-none-linux-gnu -stop-after=finalize-isel | FileCheck %s2 3define void @UphPNR(target("aarch64.svcount") %predcnt) "target-features"="+sme2" "aarch64_pstate_sm_enabled" {4entry:5; CHECK: %0:ppr = COPY $p06; CHECK: STR_PXI %0, %stack.0.predcnt.addr, 0 :: (store (<vscale x 1 x s16>) into %ir.predcnt.addr)7; CHECK: %1:pnr_p8to15 = COPY %08; CHECK: INLINEASM &"ld1w {z0.s,z1.s,z2.s,z3.s}, $0/z, [x10]", 1 /* sideeffect attdialect */, {{[0-9]+}} /* reguse:PNR_p8to15 */, %19; CHECK: RET_ReallyLR10 %predcnt.addr = alloca target("aarch64.svcount"), align 211 store target("aarch64.svcount") %predcnt, ptr %predcnt.addr, align 212 %0 = load target("aarch64.svcount"), ptr %predcnt.addr, align 213 call void asm sideeffect "ld1w {z0.s,z1.s,z2.s,z3.s}, $0/z, [x10]", "@3Uph"(target("aarch64.svcount") %0)14 ret void15}16 17define void @UpaPNR(target("aarch64.svcount") %predcnt) "target-features"="+sme2" "aarch64_pstate_sm_enabled" {18entry:19; CHECK: %0:ppr = COPY $p020; CHECK: STR_PXI %0, %stack.0.predcnt.addr, 0 :: (store (<vscale x 1 x s16>) into %ir.predcnt.addr)21; CHECK: %1:pnr = COPY %022; CHECK: INLINEASM &"ld1w {z0.s,z1.s,z2.s,z3.s}, $0/z, [x10]", 1 /* sideeffect attdialect */, {{[0-9]+}} /* reguse:PNR */, %123; CHECK: RET_ReallyLR24 %predcnt.addr = alloca target("aarch64.svcount"), align 225 store target("aarch64.svcount") %predcnt, ptr %predcnt.addr, align 226 %0 = load target("aarch64.svcount"), ptr %predcnt.addr, align 227 call void asm sideeffect "ld1w {z0.s,z1.s,z2.s,z3.s}, $0/z, [x10]", "@3Upa"(target("aarch64.svcount") %0)28 ret void29}30 31define void @UplPNR(target("aarch64.svcount") %predcnt) "target-features"="+sme2" "aarch64_pstate_sm_enabled" {32entry:33; CHECK: %0:ppr = COPY $p034; CHECK: STR_PXI %0, %stack.0.predcnt.addr, 0 :: (store (<vscale x 1 x s16>) into %ir.predcnt.addr)35; CHECK: %1:pnr_3b = COPY %036; CHECK: INLINEASM &"fadd z0.h, $0/m, z0.h, #0.5", 1 /* sideeffect attdialect */, {{[0-9]+}} /* reguse:PNR_3b */, %137; CHECK: RET_ReallyLR38 %predcnt.addr = alloca target("aarch64.svcount"), align 239 store target("aarch64.svcount") %predcnt, ptr %predcnt.addr, align 240 %0 = load target("aarch64.svcount"), ptr %predcnt.addr, align 241 call void asm sideeffect "fadd z0.h, $0/m, z0.h, #0.5", "@3Upl"(target("aarch64.svcount") %0)42 ret void43}44 45; Test that the z-register clobbers result in preserving %0 across the inline asm call.46define <2 x float> @sme_nosve_nonstreaming(ptr %in) "target-features"="+sme,-sve" {47entry:48; CHECK-LABEL: name: sme_nosve_nonstreaming49; CHECK: INLINEASM &"smstart sm; smstop sm;"50; CHECK-SAME: implicit-def early-clobber $q051; CHECK-SAME: implicit-def early-clobber $q152; CHECK-SAME: implicit-def early-clobber $q253; CHECK-SAME: implicit-def early-clobber $q354; CHECK-SAME: implicit-def early-clobber $q455; CHECK-SAME: implicit-def early-clobber $q556; CHECK-SAME: implicit-def early-clobber $q657; CHECK-SAME: implicit-def early-clobber $q758; CHECK-SAME: implicit-def early-clobber $q859; CHECK-SAME: implicit-def early-clobber $q960; CHECK-SAME: implicit-def early-clobber $q1061; CHECK-SAME: implicit-def early-clobber $q1162; CHECK-SAME: implicit-def early-clobber $q1263; CHECK-SAME: implicit-def early-clobber $q1364; CHECK-SAME: implicit-def early-clobber $q1465; CHECK-SAME: implicit-def early-clobber $q1566; CHECK-SAME: implicit-def early-clobber $q1667; CHECK-SAME: implicit-def early-clobber $q1768; CHECK-SAME: implicit-def early-clobber $q1869; CHECK-SAME: implicit-def early-clobber $q1970; CHECK-SAME: implicit-def early-clobber $q2071; CHECK-SAME: implicit-def early-clobber $q2172; CHECK-SAME: implicit-def early-clobber $q2273; CHECK-SAME: implicit-def early-clobber $q2374; CHECK-SAME: implicit-def early-clobber $q2475; CHECK-SAME: implicit-def early-clobber $q2576; CHECK-SAME: implicit-def early-clobber $q2677; CHECK-SAME: implicit-def early-clobber $q2778; CHECK-SAME: implicit-def early-clobber $q2879; CHECK-SAME: implicit-def early-clobber $q2980; CHECK-SAME: implicit-def early-clobber $q3081; CHECK-SAME: implicit-def early-clobber $q3182 %0 = load <2 x float>, ptr %in, align 883 call void asm sideeffect "smstart sm; smstop sm;", "~{z0},~{z1},~{z2},~{z3},~{z4},~{z5},~{z6},~{z7},~{z8},~{z9},~{z10},~{z11},~{z12},~{z13},~{z14},~{z15},~{z16},~{z17},~{z18},~{z19},~{z20},~{z21},~{z22},~{z23},~{z24},~{z25},~{z26},~{z27},~{z28},~{z29},~{z30},~{z31}"()84 ret <2 x float> %085}86 87define <2 x float> @sme_nosve_streaming(ptr %in) "target-features"="+sme,-sve" "aarch64_pstate_sm_enabled" {88entry:89; CHECK-LABEL: name: sme_nosve_streaming90; CHECK: INLINEASM &"smstart sm; smstop sm;"91; CHECK-SAME: implicit-def early-clobber $z092; CHECK-SAME: implicit-def early-clobber $z193; CHECK-SAME: implicit-def early-clobber $z294; CHECK-SAME: implicit-def early-clobber $z395; CHECK-SAME: implicit-def early-clobber $z496; CHECK-SAME: implicit-def early-clobber $z597; CHECK-SAME: implicit-def early-clobber $z698; CHECK-SAME: implicit-def early-clobber $z799; CHECK-SAME: implicit-def early-clobber $z8100; CHECK-SAME: implicit-def early-clobber $z9101; CHECK-SAME: implicit-def early-clobber $z10102; CHECK-SAME: implicit-def early-clobber $z11103; CHECK-SAME: implicit-def early-clobber $z12104; CHECK-SAME: implicit-def early-clobber $z13105; CHECK-SAME: implicit-def early-clobber $z14106; CHECK-SAME: implicit-def early-clobber $z15107; CHECK-SAME: implicit-def early-clobber $z16108; CHECK-SAME: implicit-def early-clobber $z17109; CHECK-SAME: implicit-def early-clobber $z18110; CHECK-SAME: implicit-def early-clobber $z19111; CHECK-SAME: implicit-def early-clobber $z20112; CHECK-SAME: implicit-def early-clobber $z21113; CHECK-SAME: implicit-def early-clobber $z22114; CHECK-SAME: implicit-def early-clobber $z23115; CHECK-SAME: implicit-def early-clobber $z24116; CHECK-SAME: implicit-def early-clobber $z25117; CHECK-SAME: implicit-def early-clobber $z26118; CHECK-SAME: implicit-def early-clobber $z27119; CHECK-SAME: implicit-def early-clobber $z28120; CHECK-SAME: implicit-def early-clobber $z29121; CHECK-SAME: implicit-def early-clobber $z30122; CHECK-SAME: implicit-def early-clobber $z31123 %0 = load <2 x float>, ptr %in, align 8124 call void asm sideeffect "smstart sm; smstop sm;", "~{z0},~{z1},~{z2},~{z3},~{z4},~{z5},~{z6},~{z7},~{z8},~{z9},~{z10},~{z11},~{z12},~{z13},~{z14},~{z15},~{z16},~{z17},~{z18},~{z19},~{z20},~{z21},~{z22},~{z23},~{z24},~{z25},~{z26},~{z27},~{z28},~{z29},~{z30},~{z31}"()125 ret <2 x float> %0126}127