brintos

brintos / llvm-project-archived public Read only

0
0
Text · 15.2 KiB · eb21589 Raw
507 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -verify-machineinstrs -mattr=+sve -global-isel=0 | FileCheck %s3; RUN: llc < %s -verify-machineinstrs -mattr=+sme -global-isel=0 -force-streaming | FileCheck %s4; RUN: llc < %s -verify-machineinstrs -mattr=+sve -global-isel=0 -force-streaming-compatible | FileCheck %s5 6target triple = "aarch64-unknown-linux-gnu"7 8define void @test_str_lane_s32(ptr %a, <vscale x 4 x i32> %b) {9; CHECK-LABEL: test_str_lane_s32:10; CHECK:       // %bb.0: // %entry11; CHECK-NEXT:    mov z0.s, z0.s[3]12; CHECK-NEXT:    str s0, [x0]13; CHECK-NEXT:    ret14 15entry:16  %0 = extractelement <vscale x 4 x i32> %b, i32 317  store i32 %0, ptr %a, align 418  ret void19}20 21define void @test_str_lane0_s32(ptr %a, <vscale x 4 x i32> %b) {22; CHECK-LABEL: test_str_lane0_s32:23; CHECK:       // %bb.0: // %entry24; CHECK-NEXT:    str s0, [x0]25; CHECK-NEXT:    ret26 27entry:28  %0 = extractelement <vscale x 4 x i32> %b, i32 029  store i32 %0, ptr %a, align 430  ret void31}32 33define void @test_str_lane_s64(ptr %a, <vscale x 2 x i64> %b) {34; CHECK-LABEL: test_str_lane_s64:35; CHECK:       // %bb.0: // %entry36; CHECK-NEXT:    mov z0.d, z0.d[1]37; CHECK-NEXT:    str d0, [x0]38; CHECK-NEXT:    ret39 40entry:41  %0 = extractelement <vscale x 2 x i64> %b, i32 142  store i64 %0, ptr %a, align 843  ret void44}45 46define void @test_str_lane0_s64(ptr %a, <vscale x 2 x i64> %b) {47; CHECK-LABEL: test_str_lane0_s64:48; CHECK:       // %bb.0: // %entry49; CHECK-NEXT:    str d0, [x0]50; CHECK-NEXT:    ret51 52entry:53  %0 = extractelement <vscale x 2 x i64> %b, i32 054  store i64 %0, ptr %a, align 855  ret void56}57 58define void @test_str_lane_f32(ptr %a, <vscale x 4 x float> %b) {59; CHECK-LABEL: test_str_lane_f32:60; CHECK:       // %bb.0: // %entry61; CHECK-NEXT:    mov z0.s, z0.s[3]62; CHECK-NEXT:    str s0, [x0]63; CHECK-NEXT:    ret64 65entry:66  %0 = extractelement <vscale x 4 x float> %b, i32 367  store float %0, ptr %a, align 468  ret void69}70 71define void @test_str_lane0_f32(ptr %a, <vscale x 4 x float> %b) {72; CHECK-LABEL: test_str_lane0_f32:73; CHECK:       // %bb.0: // %entry74; CHECK-NEXT:    str s0, [x0]75; CHECK-NEXT:    ret76 77entry:78  %0 = extractelement <vscale x 4 x float> %b, i32 079  store float %0, ptr %a, align 480  ret void81}82 83define void @test_str_lane_f64(ptr %a, <vscale x 2 x double> %b) {84; CHECK-LABEL: test_str_lane_f64:85; CHECK:       // %bb.0: // %entry86; CHECK-NEXT:    mov z0.d, z0.d[1]87; CHECK-NEXT:    str d0, [x0]88; CHECK-NEXT:    ret89 90entry:91  %0 = extractelement <vscale x 2 x double> %b, i32 192  store double %0, ptr %a, align 893  ret void94}95 96define void @test_str_lane0_f64(ptr %a, <vscale x 2 x double> %b) {97; CHECK-LABEL: test_str_lane0_f64:98; CHECK:       // %bb.0: // %entry99; CHECK-NEXT:    str d0, [x0]100; CHECK-NEXT:    ret101 102entry:103  %0 = extractelement <vscale x 2 x double> %b, i32 0104  store double %0, ptr %a, align 8105  ret void106}107 108define void @test_str_lane_s8(ptr %a, <vscale x 16 x i8> %b) {109; CHECK-LABEL: test_str_lane_s8:110; CHECK:       // %bb.0: // %entry111; CHECK-NEXT:    mov z0.b, z0.b[7]112; CHECK-NEXT:    str b0, [x0]113; CHECK-NEXT:    ret114entry:115  %0 = extractelement <vscale x 16 x i8> %b, i32 7116  store i8 %0, ptr %a, align 1117  ret void118}119 120define void @test_str_lane0_s8(ptr %a, <vscale x 16 x i8> %b) {121; CHECK-LABEL: test_str_lane0_s8:122; CHECK:       // %bb.0: // %entry123; CHECK-NEXT:    str b0, [x0]124; CHECK-NEXT:    ret125entry:126  %0 = extractelement <vscale x 16 x i8> %b, i32 0127  store i8 %0, ptr %a, align 1128  ret void129}130 131define void @test_str_lane_s16(ptr %a, <vscale x 8 x i16> %b) {132; CHECK-LABEL: test_str_lane_s16:133; CHECK:       // %bb.0: // %entry134; CHECK-NEXT:    mov z0.h, z0.h[3]135; CHECK-NEXT:    str h0, [x0]136; CHECK-NEXT:    ret137 138entry:139  %0 = extractelement <vscale x 8 x i16> %b, i32 3140  store i16 %0, ptr %a, align 2141  ret void142}143 144define void @test_str_lane0_s16(ptr %a, <vscale x 8 x i16> %b) {145; CHECK-LABEL: test_str_lane0_s16:146; CHECK:       // %bb.0: // %entry147; CHECK-NEXT:    str h0, [x0]148; CHECK-NEXT:    ret149 150entry:151  %0 = extractelement <vscale x 8 x i16> %b, i32 0152  store i16 %0, ptr %a, align 2153  ret void154}155 156define void @test_str_reduction_i32_to_i32(ptr %ptr, <vscale x 4 x i1> %p0, <vscale x 4 x i32> %v) {157; CHECK-LABEL: test_str_reduction_i32_to_i32:158; CHECK:       // %bb.0:159; CHECK-NEXT:    uaddv d0, p0, z0.s160; CHECK-NEXT:    str s0, [x0]161; CHECK-NEXT:    ret162 163  %reduce = tail call i64 @llvm.aarch64.sve.uaddv.nxv4i32(<vscale x 4 x i1> %p0, <vscale x 4 x i32> %v)164  %trunc = trunc i64 %reduce to i32165  store i32 %trunc, ptr %ptr, align 4166  ret void167}168 169define void @test_str_reduction_i32_to_i64(ptr %ptr, <vscale x 4 x i1> %p0, <vscale x 4 x i32> %v) {170; CHECK-LABEL: test_str_reduction_i32_to_i64:171; CHECK:       // %bb.0:172; CHECK-NEXT:    uaddv d0, p0, z0.s173; CHECK-NEXT:    str d0, [x0]174; CHECK-NEXT:    ret175 176  %reduce = tail call i64 @llvm.aarch64.sve.uaddv.nxv4i32(<vscale x 4 x i1> %p0, <vscale x 4 x i32> %v)177  store i64 %reduce, ptr %ptr, align 8178  ret void179}180 181define void @test_str_reduction_i32_to_i16(ptr %ptr, <vscale x 4 x i1> %p0, <vscale x 4 x i32> %v) {182; CHECK-LABEL: test_str_reduction_i32_to_i16:183; CHECK:       // %bb.0:184; CHECK-NEXT:    uaddv d0, p0, z0.s185; CHECK-NEXT:    str h0, [x0]186; CHECK-NEXT:    ret187 188  %reduce = tail call i64 @llvm.aarch64.sve.uaddv.nxv4i32(<vscale x 4 x i1> %p0, <vscale x 4 x i32> %v)189  %trunc = trunc i64 %reduce to i16190  store i16 %trunc, ptr %ptr, align 2191  ret void192}193 194define void @test_str_reduction_i32_to_i8(ptr %ptr, <vscale x 4 x i1> %p0, <vscale x 4 x i32> %v) {195; CHECK-LABEL: test_str_reduction_i32_to_i8:196; CHECK:       // %bb.0:197; CHECK-NEXT:    uaddv d0, p0, z0.s198; CHECK-NEXT:    str b0, [x0]199; CHECK-NEXT:    ret200 201  %reduce = tail call i64 @llvm.aarch64.sve.uaddv.nxv4i32(<vscale x 4 x i1> %p0, <vscale x 4 x i32> %v)202  %trunc = trunc i64 %reduce to i8203  store i8 %trunc, ptr %ptr, align 1204  ret void205}206 207define void @test_str_reduction_i32_to_i32_negative_offset(ptr %ptr, <vscale x 4 x i1> %p0, <vscale x 4 x i32> %v) {208; CHECK-LABEL: test_str_reduction_i32_to_i32_negative_offset:209; CHECK:       // %bb.0:210; CHECK-NEXT:    uaddv d0, p0, z0.s211; CHECK-NEXT:    stur s0, [x0, #-32]212; CHECK-NEXT:    ret213 214  %reduce = tail call i64 @llvm.aarch64.sve.uaddv.nxv4i32(<vscale x 4 x i1> %p0, <vscale x 4 x i32> %v)215  %trunc = trunc i64 %reduce to i32216  %out_ptr = getelementptr inbounds i32, ptr %ptr, i64 -8217  store i32 %trunc, ptr %out_ptr, align 4218  ret void219}220 221define void @test_str_reduction_i32_to_i64_negative_offset(ptr %ptr, <vscale x 4 x i1> %p0, <vscale x 4 x i32> %v) {222; CHECK-LABEL: test_str_reduction_i32_to_i64_negative_offset:223; CHECK:       // %bb.0:224; CHECK-NEXT:    uaddv d0, p0, z0.s225; CHECK-NEXT:    stur d0, [x0, #-64]226; CHECK-NEXT:    ret227 228  %reduce = tail call i64 @llvm.aarch64.sve.uaddv.nxv4i32(<vscale x 4 x i1> %p0, <vscale x 4 x i32> %v)229  %out_ptr = getelementptr inbounds i64, ptr %ptr, i64 -8230  store i64 %reduce, ptr %out_ptr, align 8231  ret void232}233 234define void @test_str_reduction_i32_to_i16_negative_offset(ptr %ptr, <vscale x 4 x i1> %p0, <vscale x 4 x i32> %v) {235; CHECK-LABEL: test_str_reduction_i32_to_i16_negative_offset:236; CHECK:       // %bb.0:237; CHECK-NEXT:    uaddv d0, p0, z0.s238; CHECK-NEXT:    stur h0, [x0, #-16]239; CHECK-NEXT:    ret240 241  %reduce = tail call i64 @llvm.aarch64.sve.uaddv.nxv4i32(<vscale x 4 x i1> %p0, <vscale x 4 x i32> %v)242  %trunc = trunc i64 %reduce to i16243  %out_ptr = getelementptr inbounds i16, ptr %ptr, i64 -8244  store i16 %trunc, ptr %out_ptr, align 2245  ret void246}247 248define void @test_str_reduction_i32_to_i8_negative_offset(ptr %ptr, <vscale x 4 x i1> %p0, <vscale x 4 x i32> %v) {249; CHECK-LABEL: test_str_reduction_i32_to_i8_negative_offset:250; CHECK:       // %bb.0:251; CHECK-NEXT:    uaddv d0, p0, z0.s252; CHECK-NEXT:    stur b0, [x0, #-8]253; CHECK-NEXT:    ret254 255  %reduce = tail call i64 @llvm.aarch64.sve.uaddv.nxv4i32(<vscale x 4 x i1> %p0, <vscale x 4 x i32> %v)256  %trunc = trunc i64 %reduce to i8257  %out_ptr = getelementptr inbounds i8, ptr %ptr, i64 -8258  store i8 %trunc, ptr %out_ptr, align 1259  ret void260}261 262define void @test_str_lane_s32_negative_offset(ptr %a, <vscale x 4 x i32> %b) {263; CHECK-LABEL: test_str_lane_s32_negative_offset:264; CHECK:       // %bb.0: // %entry265; CHECK-NEXT:    mov z0.s, z0.s[3]266; CHECK-NEXT:    stur s0, [x0, #-32]267; CHECK-NEXT:    ret268 269entry:270  %0 = extractelement <vscale x 4 x i32> %b, i32 3271  %out_ptr = getelementptr inbounds i32, ptr %a, i64 -8272  store i32 %0, ptr %out_ptr, align 4273  ret void274}275 276define void @test_str_lane0_s32_negative_offset(ptr %a, <vscale x 4 x i32> %b) {277; CHECK-LABEL: test_str_lane0_s32_negative_offset:278; CHECK:       // %bb.0: // %entry279; CHECK-NEXT:    stur s0, [x0, #-32]280; CHECK-NEXT:    ret281 282entry:283  %0 = extractelement <vscale x 4 x i32> %b, i32 0284  %out_ptr = getelementptr inbounds i32, ptr %a, i64 -8285  store i32 %0, ptr %out_ptr, align 4286  ret void287}288 289define void @test_str_lane_s64_negative_offset(ptr %a, <vscale x 2 x i64> %b) {290; CHECK-LABEL: test_str_lane_s64_negative_offset:291; CHECK:       // %bb.0: // %entry292; CHECK-NEXT:    mov z0.d, z0.d[1]293; CHECK-NEXT:    stur d0, [x0, #-64]294; CHECK-NEXT:    ret295 296entry:297  %0 = extractelement <vscale x 2 x i64> %b, i32 1298  %out_ptr = getelementptr inbounds i64, ptr %a, i64 -8299  store i64 %0, ptr %out_ptr, align 8300  ret void301}302 303define void @test_str_lane0_s64_negative_offset(ptr %a, <vscale x 2 x i64> %b) {304; CHECK-LABEL: test_str_lane0_s64_negative_offset:305; CHECK:       // %bb.0: // %entry306; CHECK-NEXT:    stur d0, [x0, #-64]307; CHECK-NEXT:    ret308 309entry:310  %0 = extractelement <vscale x 2 x i64> %b, i32 0311  %out_ptr = getelementptr inbounds i64, ptr %a, i64 -8312  store i64 %0, ptr %out_ptr, align 8313  ret void314}315 316define void @test_str_lane_s8_negative_offset(ptr %a, <vscale x 16 x i8> %b) {317; CHECK-LABEL: test_str_lane_s8_negative_offset:318; CHECK:       // %bb.0: // %entry319; CHECK-NEXT:    mov z0.b, z0.b[7]320; CHECK-NEXT:    stur b0, [x0, #-8]321; CHECK-NEXT:    ret322entry:323  %0 = extractelement <vscale x 16 x i8> %b, i32 7324  %out_ptr = getelementptr inbounds i8, ptr %a, i64 -8325  store i8 %0, ptr %out_ptr, align 1326  ret void327}328 329define void @test_str_lane0_s8_negative_offset(ptr %a, <vscale x 16 x i8> %b) {330; CHECK-LABEL: test_str_lane0_s8_negative_offset:331; CHECK:       // %bb.0: // %entry332; CHECK-NEXT:    stur b0, [x0, #-8]333; CHECK-NEXT:    ret334entry:335  %0 = extractelement <vscale x 16 x i8> %b, i32 0336  %out_ptr = getelementptr inbounds i8, ptr %a, i64 -8337  store i8 %0, ptr %out_ptr, align 1338  ret void339}340 341define void @test_str_lane_s16_negative_offset(ptr %a, <vscale x 8 x i16> %b) {342; CHECK-LABEL: test_str_lane_s16_negative_offset:343; CHECK:       // %bb.0: // %entry344; CHECK-NEXT:    mov z0.h, z0.h[3]345; CHECK-NEXT:    stur h0, [x0, #-16]346; CHECK-NEXT:    ret347 348entry:349  %0 = extractelement <vscale x 8 x i16> %b, i32 3350  %out_ptr = getelementptr inbounds i16, ptr %a, i64 -8351  store i16 %0, ptr %out_ptr, align 2352  ret void353}354 355define void @test_str_lane0_s16_negative_offset(ptr %a, <vscale x 8 x i16> %b) {356; CHECK-LABEL: test_str_lane0_s16_negative_offset:357; CHECK:       // %bb.0: // %entry358; CHECK-NEXT:    stur h0, [x0, #-16]359; CHECK-NEXT:    ret360 361entry:362  %0 = extractelement <vscale x 8 x i16> %b, i32 0363  %out_ptr = getelementptr inbounds i16, ptr %a, i64 -8364  store i16 %0, ptr %out_ptr, align 2365  ret void366}367 368define void @test_str_trunc_lane_s32_to_s16(ptr %a, <vscale x 4 x i32> %b) {369; CHECK-LABEL: test_str_trunc_lane_s32_to_s16:370; CHECK:       // %bb.0: // %entry371; CHECK-NEXT:    mov z0.s, z0.s[3]372; CHECK-NEXT:    str h0, [x0]373; CHECK-NEXT:    ret374 375entry:376  %0 = extractelement <vscale x 4 x i32> %b, i32 3377  %trunc = trunc i32 %0 to i16378  store i16 %trunc, ptr %a, align 2379  ret void380}381 382define void @test_str_trunc_lane0_s32_to_s16(ptr %a, <vscale x 4 x i32> %b) {383; CHECK-LABEL: test_str_trunc_lane0_s32_to_s16:384; CHECK:       // %bb.0: // %entry385; CHECK-NEXT:    str h0, [x0]386; CHECK-NEXT:    ret387 388entry:389  %0 = extractelement <vscale x 4 x i32> %b, i32 0390  %trunc = trunc i32 %0 to i16391  store i16 %trunc, ptr %a, align 2392  ret void393}394 395 396define void @test_str_trunc_lane_s32_to_s8(ptr %a, <vscale x 4 x i32> %b) {397; CHECK-LABEL: test_str_trunc_lane_s32_to_s8:398; CHECK:       // %bb.0: // %entry399; CHECK-NEXT:    mov z0.s, z0.s[3]400; CHECK-NEXT:    str b0, [x0]401; CHECK-NEXT:    ret402entry:403  %0 = extractelement <vscale x 4 x i32> %b, i32 3404  %trunc = trunc i32 %0 to i8405  store i8 %trunc, ptr %a, align 1406  ret void407}408 409define void @test_str_trunc_lane0_s32_to_s8(ptr %a, <vscale x 4 x i32> %b) {410; CHECK-LABEL: test_str_trunc_lane0_s32_to_s8:411; CHECK:       // %bb.0: // %entry412; CHECK-NEXT:    str b0, [x0]413; CHECK-NEXT:    ret414 415entry:416  %0 = extractelement <vscale x 4 x i32> %b, i32 0417  %trunc = trunc i32 %0 to i8418  store i8 %trunc, ptr %a, align 1419  ret void420}421 422define void @test_str_trunc_lane_s64_to_s8(ptr %a, <vscale x 2 x i64> %b) {423; CHECK-LABEL: test_str_trunc_lane_s64_to_s8:424; CHECK:       // %bb.0: // %entry425; CHECK-NEXT:    mov z0.d, z0.d[3]426; CHECK-NEXT:    str b0, [x0]427; CHECK-NEXT:    ret428 429entry:430  %0 = extractelement <vscale x 2 x i64> %b, i32 3431  %trunc = trunc i64 %0 to i8432  store i8 %trunc, ptr %a, align 1433  ret void434}435 436define void @test_str_trunc_lane_s32_to_s16_negative_offset(ptr %a, <vscale x 4 x i32> %b) {437; CHECK-LABEL: test_str_trunc_lane_s32_to_s16_negative_offset:438; CHECK:       // %bb.0: // %entry439; CHECK-NEXT:    mov z0.s, z0.s[3]440; CHECK-NEXT:    stur h0, [x0, #-16]441; CHECK-NEXT:    ret442 443entry:444  %0 = extractelement <vscale x 4 x i32> %b, i32 3445  %trunc = trunc i32 %0 to i16446  %out_ptr = getelementptr inbounds i16, ptr %a, i64 -8447  store i16 %trunc, ptr %out_ptr, align 2448  ret void449}450 451define void @test_str_trunc_lane0_s32_to_s16_negative_offset(ptr %a, <vscale x 4 x i32> %b) {452; CHECK-LABEL: test_str_trunc_lane0_s32_to_s16_negative_offset:453; CHECK:       // %bb.0: // %entry454; CHECK-NEXT:    stur h0, [x0, #-16]455; CHECK-NEXT:    ret456 457entry:458  %0 = extractelement <vscale x 4 x i32> %b, i32 0459  %trunc = trunc i32 %0 to i16460  %out_ptr = getelementptr inbounds i16, ptr %a, i64 -8461  store i16 %trunc, ptr %out_ptr, align 2462  ret void463}464 465define void @test_str_trunc_lane_s32_to_s8_negative_offset(ptr %a, <vscale x 4 x i32> %b) {466; CHECK-LABEL: test_str_trunc_lane_s32_to_s8_negative_offset:467; CHECK:       // %bb.0: // %entry468; CHECK-NEXT:    mov z0.s, z0.s[3]469; CHECK-NEXT:    stur b0, [x0, #-8]470; CHECK-NEXT:    ret471entry:472  %0 = extractelement <vscale x 4 x i32> %b, i32 3473  %trunc = trunc i32 %0 to i8474  %out_ptr = getelementptr inbounds i8, ptr %a, i64 -8475  store i8 %trunc, ptr %out_ptr, align 1476  ret void477}478 479define void @test_str_trunc_lane0_s32_to_s8_negative_offset(ptr %a, <vscale x 4 x i32> %b) {480; CHECK-LABEL: test_str_trunc_lane0_s32_to_s8_negative_offset:481; CHECK:       // %bb.0: // %entry482; CHECK-NEXT:    stur b0, [x0, #-8]483; CHECK-NEXT:    ret484 485entry:486  %0 = extractelement <vscale x 4 x i32> %b, i32 0487  %trunc = trunc i32 %0 to i8488  %out_ptr = getelementptr inbounds i8, ptr %a, i64 -8489  store i8 %trunc, ptr %out_ptr, align 1490  ret void491}492 493define void @test_str_trunc_lane_s64_to_s8_negative_offset(ptr %a, <vscale x 2 x i64> %b) {494; CHECK-LABEL: test_str_trunc_lane_s64_to_s8_negative_offset:495; CHECK:       // %bb.0: // %entry496; CHECK-NEXT:    mov z0.d, z0.d[3]497; CHECK-NEXT:    stur b0, [x0, #-8]498; CHECK-NEXT:    ret499 500entry:501  %0 = extractelement <vscale x 2 x i64> %b, i32 3502  %trunc = trunc i64 %0 to i8503  %out_ptr = getelementptr inbounds i8, ptr %a, i64 -8504  store i8 %trunc, ptr %out_ptr, align 1505  ret void506}507