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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc < %s -mtriple=aarch64-linux-gnu -O3 -verify-machineinstrs | FileCheck %s3 4define void @fnmaddd(ptr %a, ptr %b, ptr %c) {5; CHECK-LABEL: fnmaddd:6; CHECK: // %bb.0: // %entry7; CHECK-NEXT: ldr d0, [x0]8; CHECK-NEXT: ldr d1, [x1]9; CHECK-NEXT: ldr d2, [x2]10; CHECK-NEXT: fnmadd d0, d1, d0, d211; CHECK-NEXT: str d0, [x0]12; CHECK-NEXT: ret13entry:14 %0 = load double, ptr %a, align 815 %1 = load double, ptr %b, align 816 %mul = fmul fast double %1, %017 %2 = load double, ptr %c, align 818 %add = fadd fast double %mul, %219 %fneg = fneg fast double %add20 store double %fneg, ptr %a, align 821 ret void22}23 24; Don't combine: No flags25define void @fnmaddd_no_fast(ptr %a, ptr %b, ptr %c) {26; CHECK-LABEL: fnmaddd_no_fast:27; CHECK: // %bb.0: // %entry28; CHECK-NEXT: ldr d0, [x0]29; CHECK-NEXT: ldr d1, [x1]30; CHECK-NEXT: fmul d0, d1, d031; CHECK-NEXT: ldr d1, [x2]32; CHECK-NEXT: fadd d0, d0, d133; CHECK-NEXT: fneg d0, d034; CHECK-NEXT: str d0, [x0]35; CHECK-NEXT: ret36entry:37 %0 = load double, ptr %a, align 838 %1 = load double, ptr %b, align 839 %mul = fmul double %1, %040 %2 = load double, ptr %c, align 841 %add = fadd double %mul, %242 %fneg = fneg double %add43 store double %fneg, ptr %a, align 844 ret void45}46 47define void @fnmadds(ptr %a, ptr %b, ptr %c) {48; CHECK-LABEL: fnmadds:49; CHECK: // %bb.0: // %entry50; CHECK-NEXT: ldr s0, [x0]51; CHECK-NEXT: ldr s1, [x1]52; CHECK-NEXT: ldr s2, [x2]53; CHECK-NEXT: fnmadd s0, s1, s0, s254; CHECK-NEXT: str s0, [x0]55; CHECK-NEXT: ret56entry:57 %0 = load float, ptr %a, align 458 %1 = load float, ptr %b, align 459 %mul = fmul fast float %1, %060 %2 = load float, ptr %c, align 461 %add = fadd fast float %mul, %262 %fneg = fneg fast float %add63 store float %fneg, ptr %a, align 464 ret void65}66 67define void @fnmadds_nsz_contract(ptr %a, ptr %b, ptr %c) {68; CHECK-LABEL: fnmadds_nsz_contract:69; CHECK: // %bb.0: // %entry70; CHECK-NEXT: ldr s0, [x0]71; CHECK-NEXT: ldr s1, [x1]72; CHECK-NEXT: ldr s2, [x2]73; CHECK-NEXT: fnmadd s0, s1, s0, s274; CHECK-NEXT: str s0, [x0]75; CHECK-NEXT: ret76entry:77 %0 = load float, ptr %a, align 478 %1 = load float, ptr %b, align 479 %mul = fmul contract nsz float %1, %080 %2 = load float, ptr %c, align 481 %add = fadd contract nsz float %mul, %282 %fneg = fneg contract nsz float %add83 store float %fneg, ptr %a, align 484 ret void85}86 87; Don't combine: Missing nsz88define void @fnmadds_contract(ptr %a, ptr %b, ptr %c) {89; CHECK-LABEL: fnmadds_contract:90; CHECK: // %bb.0: // %entry91; CHECK-NEXT: ldr s0, [x0]92; CHECK-NEXT: ldr s1, [x1]93; CHECK-NEXT: ldr s2, [x2]94; CHECK-NEXT: fmadd s0, s1, s0, s295; CHECK-NEXT: fneg s0, s096; CHECK-NEXT: str s0, [x0]97; CHECK-NEXT: ret98entry:99 %0 = load float, ptr %a, align 4100 %1 = load float, ptr %b, align 4101 %mul = fmul contract float %1, %0102 %2 = load float, ptr %c, align 4103 %add = fadd contract float %mul, %2104 %fneg = fneg contract float %add105 store float %fneg, ptr %a, align 4106 ret void107}108 109; Don't combine: Missing contract110define void @fnmadds_nsz(ptr %a, ptr %b, ptr %c) {111; CHECK-LABEL: fnmadds_nsz:112; CHECK: // %bb.0: // %entry113; CHECK-NEXT: ldr s0, [x0]114; CHECK-NEXT: ldr s1, [x1]115; CHECK-NEXT: fmul s0, s1, s0116; CHECK-NEXT: ldr s1, [x2]117; CHECK-NEXT: fadd s0, s0, s1118; CHECK-NEXT: fneg s0, s0119; CHECK-NEXT: str s0, [x0]120; CHECK-NEXT: ret121entry:122 %0 = load float, ptr %a, align 4123 %1 = load float, ptr %b, align 4124 %mul = fmul nsz float %1, %0125 %2 = load float, ptr %c, align 4126 %add = fadd nsz float %mul, %2127 %fneg = fneg nsz float %add128 store float %fneg, ptr %a, align 4129 ret void130}131 132define void @fnmaddd_two_uses(ptr %a, ptr %b, ptr %c, ptr %d) {133; CHECK-LABEL: fnmaddd_two_uses:134; CHECK: // %bb.0: // %entry135; CHECK-NEXT: ldr d0, [x1]136; CHECK-NEXT: ldr d1, [x0]137; CHECK-NEXT: ldr d2, [x2]138; CHECK-NEXT: fmadd d0, d0, d1, d2139; CHECK-NEXT: fneg d1, d0140; CHECK-NEXT: str d1, [x0]141; CHECK-NEXT: str d0, [x3]142; CHECK-NEXT: ret143entry:144 %0 = load double, ptr %a, align 8145 %1 = load double, ptr %b, align 8146 %mul = fmul fast double %1, %0147 %2 = load double, ptr %c, align 8148 %add = fadd fast double %mul, %2149 %fneg1 = fneg fast double %add150 store double %fneg1, ptr %a, align 8151 store double %add, ptr %d, align 8152 ret void153}154