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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s3 4;5; trunc(abs(sub(sext(a),sext(b)))) -> abds(a,b)6;7 8define i8 @abd_ext_i8(i8 %a, i8 %b) nounwind {9; CHECK-LABEL: abd_ext_i8:10; CHECK: // %bb.0:11; CHECK-NEXT: sxtb w8, w012; CHECK-NEXT: subs w8, w8, w1, sxtb13; CHECK-NEXT: cneg w0, w8, mi14; CHECK-NEXT: ret15 %aext = sext i8 %a to i6416 %bext = sext i8 %b to i6417 %sub = sub i64 %aext, %bext18 %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)19 %trunc = trunc i64 %abs to i820 ret i8 %trunc21}22 23define i8 @abd_ext_i8_i16(i8 %a, i16 %b) nounwind {24; CHECK-LABEL: abd_ext_i8_i16:25; CHECK: // %bb.0:26; CHECK-NEXT: sxtb w8, w027; CHECK-NEXT: subs w8, w8, w1, sxth28; CHECK-NEXT: cneg w0, w8, mi29; CHECK-NEXT: ret30 %aext = sext i8 %a to i6431 %bext = sext i16 %b to i6432 %sub = sub i64 %aext, %bext33 %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)34 %trunc = trunc i64 %abs to i835 ret i8 %trunc36}37 38define i8 @abd_ext_i8_undef(i8 %a, i8 %b) nounwind {39; CHECK-LABEL: abd_ext_i8_undef:40; CHECK: // %bb.0:41; CHECK-NEXT: sxtb w8, w042; CHECK-NEXT: subs w8, w8, w1, sxtb43; CHECK-NEXT: cneg w0, w8, mi44; CHECK-NEXT: ret45 %aext = sext i8 %a to i6446 %bext = sext i8 %b to i6447 %sub = sub i64 %aext, %bext48 %abs = call i64 @llvm.abs.i64(i64 %sub, i1 true)49 %trunc = trunc i64 %abs to i850 ret i8 %trunc51}52 53define i16 @abd_ext_i16(i16 %a, i16 %b) nounwind {54; CHECK-LABEL: abd_ext_i16:55; CHECK: // %bb.0:56; CHECK-NEXT: sxth w8, w057; CHECK-NEXT: subs w8, w8, w1, sxth58; CHECK-NEXT: cneg w0, w8, mi59; CHECK-NEXT: ret60 %aext = sext i16 %a to i6461 %bext = sext i16 %b to i6462 %sub = sub i64 %aext, %bext63 %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)64 %trunc = trunc i64 %abs to i1665 ret i16 %trunc66}67 68define i16 @abd_ext_i16_i32(i16 %a, i32 %b) nounwind {69; CHECK-LABEL: abd_ext_i16_i32:70; CHECK: // %bb.0:71; CHECK-NEXT: sxth w8, w072; CHECK-NEXT: subs w8, w8, w173; CHECK-NEXT: cneg w0, w8, le74; CHECK-NEXT: ret75 %aext = sext i16 %a to i6476 %bext = sext i32 %b to i6477 %sub = sub i64 %aext, %bext78 %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)79 %trunc = trunc i64 %abs to i1680 ret i16 %trunc81}82 83define i16 @abd_ext_i16_undef(i16 %a, i16 %b) nounwind {84; CHECK-LABEL: abd_ext_i16_undef:85; CHECK: // %bb.0:86; CHECK-NEXT: sxth w8, w087; CHECK-NEXT: subs w8, w8, w1, sxth88; CHECK-NEXT: cneg w0, w8, mi89; CHECK-NEXT: ret90 %aext = sext i16 %a to i6491 %bext = sext i16 %b to i6492 %sub = sub i64 %aext, %bext93 %abs = call i64 @llvm.abs.i64(i64 %sub, i1 true)94 %trunc = trunc i64 %abs to i1695 ret i16 %trunc96}97 98define i32 @abd_ext_i32(i32 %a, i32 %b) nounwind {99; CHECK-LABEL: abd_ext_i32:100; CHECK: // %bb.0:101; CHECK-NEXT: subs w8, w0, w1102; CHECK-NEXT: cneg w0, w8, le103; CHECK-NEXT: ret104 %aext = sext i32 %a to i64105 %bext = sext i32 %b to i64106 %sub = sub i64 %aext, %bext107 %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)108 %trunc = trunc i64 %abs to i32109 ret i32 %trunc110}111 112define i32 @abd_ext_i32_i16(i32 %a, i16 %b) nounwind {113; CHECK-LABEL: abd_ext_i32_i16:114; CHECK: // %bb.0:115; CHECK-NEXT: subs w8, w0, w1, sxth116; CHECK-NEXT: cneg w0, w8, le117; CHECK-NEXT: ret118 %aext = sext i32 %a to i64119 %bext = sext i16 %b to i64120 %sub = sub i64 %aext, %bext121 %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)122 %trunc = trunc i64 %abs to i32123 ret i32 %trunc124}125 126define i32 @abd_ext_i32_undef(i32 %a, i32 %b) nounwind {127; CHECK-LABEL: abd_ext_i32_undef:128; CHECK: // %bb.0:129; CHECK-NEXT: subs w8, w0, w1130; CHECK-NEXT: cneg w0, w8, le131; CHECK-NEXT: ret132 %aext = sext i32 %a to i64133 %bext = sext i32 %b to i64134 %sub = sub i64 %aext, %bext135 %abs = call i64 @llvm.abs.i64(i64 %sub, i1 true)136 %trunc = trunc i64 %abs to i32137 ret i32 %trunc138}139 140define i64 @abd_ext_i64(i64 %a, i64 %b) nounwind {141; CHECK-LABEL: abd_ext_i64:142; CHECK: // %bb.0:143; CHECK-NEXT: subs x8, x0, x1144; CHECK-NEXT: cneg x0, x8, le145; CHECK-NEXT: ret146 %aext = sext i64 %a to i128147 %bext = sext i64 %b to i128148 %sub = sub i128 %aext, %bext149 %abs = call i128 @llvm.abs.i128(i128 %sub, i1 false)150 %trunc = trunc i128 %abs to i64151 ret i64 %trunc152}153 154define i64 @abd_ext_i64_undef(i64 %a, i64 %b) nounwind {155; CHECK-LABEL: abd_ext_i64_undef:156; CHECK: // %bb.0:157; CHECK-NEXT: subs x8, x0, x1158; CHECK-NEXT: cneg x0, x8, le159; CHECK-NEXT: ret160 %aext = sext i64 %a to i128161 %bext = sext i64 %b to i128162 %sub = sub i128 %aext, %bext163 %abs = call i128 @llvm.abs.i128(i128 %sub, i1 true)164 %trunc = trunc i128 %abs to i64165 ret i64 %trunc166}167 168define i128 @abd_ext_i128(i128 %a, i128 %b) nounwind {169; CHECK-LABEL: abd_ext_i128:170; CHECK: // %bb.0:171; CHECK-NEXT: subs x8, x0, x2172; CHECK-NEXT: sbc x9, x1, x3173; CHECK-NEXT: subs x10, x2, x0174; CHECK-NEXT: sbcs x11, x3, x1175; CHECK-NEXT: csel x0, x8, x10, lt176; CHECK-NEXT: csel x1, x9, x11, lt177; CHECK-NEXT: ret178 %aext = sext i128 %a to i256179 %bext = sext i128 %b to i256180 %sub = sub i256 %aext, %bext181 %abs = call i256 @llvm.abs.i256(i256 %sub, i1 false)182 %trunc = trunc i256 %abs to i128183 ret i128 %trunc184}185 186define i128 @abd_ext_i128_undef(i128 %a, i128 %b) nounwind {187; CHECK-LABEL: abd_ext_i128_undef:188; CHECK: // %bb.0:189; CHECK-NEXT: subs x8, x0, x2190; CHECK-NEXT: sbc x9, x1, x3191; CHECK-NEXT: subs x10, x2, x0192; CHECK-NEXT: sbcs x11, x3, x1193; CHECK-NEXT: csel x0, x8, x10, lt194; CHECK-NEXT: csel x1, x9, x11, lt195; CHECK-NEXT: ret196 %aext = sext i128 %a to i256197 %bext = sext i128 %b to i256198 %sub = sub i256 %aext, %bext199 %abs = call i256 @llvm.abs.i256(i256 %sub, i1 true)200 %trunc = trunc i256 %abs to i128201 ret i128 %trunc202}203 204;205; sub(smax(a,b),smin(a,b)) -> abds(a,b)206;207 208define i8 @abd_minmax_i8(i8 %a, i8 %b) nounwind {209; CHECK-LABEL: abd_minmax_i8:210; CHECK: // %bb.0:211; CHECK-NEXT: sxtb w8, w0212; CHECK-NEXT: subs w8, w8, w1, sxtb213; CHECK-NEXT: cneg w0, w8, mi214; CHECK-NEXT: ret215 %min = call i8 @llvm.smin.i8(i8 %a, i8 %b)216 %max = call i8 @llvm.smax.i8(i8 %a, i8 %b)217 %sub = sub i8 %max, %min218 ret i8 %sub219}220 221define i16 @abd_minmax_i16(i16 %a, i16 %b) nounwind {222; CHECK-LABEL: abd_minmax_i16:223; CHECK: // %bb.0:224; CHECK-NEXT: sxth w8, w0225; CHECK-NEXT: subs w8, w8, w1, sxth226; CHECK-NEXT: cneg w0, w8, mi227; CHECK-NEXT: ret228 %min = call i16 @llvm.smin.i16(i16 %a, i16 %b)229 %max = call i16 @llvm.smax.i16(i16 %a, i16 %b)230 %sub = sub i16 %max, %min231 ret i16 %sub232}233 234define i32 @abd_minmax_i32(i32 %a, i32 %b) nounwind {235; CHECK-LABEL: abd_minmax_i32:236; CHECK: // %bb.0:237; CHECK-NEXT: subs w8, w0, w1238; CHECK-NEXT: cneg w0, w8, le239; CHECK-NEXT: ret240 %min = call i32 @llvm.smin.i32(i32 %a, i32 %b)241 %max = call i32 @llvm.smax.i32(i32 %a, i32 %b)242 %sub = sub i32 %max, %min243 ret i32 %sub244}245 246define i64 @abd_minmax_i64(i64 %a, i64 %b) nounwind {247; CHECK-LABEL: abd_minmax_i64:248; CHECK: // %bb.0:249; CHECK-NEXT: subs x8, x0, x1250; CHECK-NEXT: cneg x0, x8, le251; CHECK-NEXT: ret252 %min = call i64 @llvm.smin.i64(i64 %a, i64 %b)253 %max = call i64 @llvm.smax.i64(i64 %a, i64 %b)254 %sub = sub i64 %max, %min255 ret i64 %sub256}257 258define i128 @abd_minmax_i128(i128 %a, i128 %b) nounwind {259; CHECK-LABEL: abd_minmax_i128:260; CHECK: // %bb.0:261; CHECK-NEXT: subs x8, x0, x2262; CHECK-NEXT: sbc x9, x1, x3263; CHECK-NEXT: subs x10, x2, x0264; CHECK-NEXT: sbcs x11, x3, x1265; CHECK-NEXT: csel x0, x8, x10, lt266; CHECK-NEXT: csel x1, x9, x11, lt267; CHECK-NEXT: ret268 %min = call i128 @llvm.smin.i128(i128 %a, i128 %b)269 %max = call i128 @llvm.smax.i128(i128 %a, i128 %b)270 %sub = sub i128 %max, %min271 ret i128 %sub272}273 274;275; select(icmp(a,b),sub(a,b),sub(b,a)) -> abds(a,b)276;277 278define i8 @abd_cmp_i8(i8 %a, i8 %b) nounwind {279; CHECK-LABEL: abd_cmp_i8:280; CHECK: // %bb.0:281; CHECK-NEXT: sxtb w8, w0282; CHECK-NEXT: subs w8, w8, w1, sxtb283; CHECK-NEXT: cneg w0, w8, mi284; CHECK-NEXT: ret285 %cmp = icmp sgt i8 %a, %b286 %ab = sub i8 %a, %b287 %ba = sub i8 %b, %a288 %sel = select i1 %cmp, i8 %ab, i8 %ba289 ret i8 %sel290}291 292define i16 @abd_cmp_i16(i16 %a, i16 %b) nounwind {293; CHECK-LABEL: abd_cmp_i16:294; CHECK: // %bb.0:295; CHECK-NEXT: sxth w8, w0296; CHECK-NEXT: subs w8, w8, w1, sxth297; CHECK-NEXT: cneg w0, w8, mi298; CHECK-NEXT: ret299 %cmp = icmp sge i16 %a, %b300 %ab = sub i16 %a, %b301 %ba = sub i16 %b, %a302 %sel = select i1 %cmp, i16 %ab, i16 %ba303 ret i16 %sel304}305 306define i32 @abd_cmp_i32(i32 %a, i32 %b) nounwind {307; CHECK-LABEL: abd_cmp_i32:308; CHECK: // %bb.0:309; CHECK-NEXT: subs w8, w0, w1310; CHECK-NEXT: cneg w0, w8, le311; CHECK-NEXT: ret312 %cmp = icmp slt i32 %a, %b313 %ab = sub i32 %a, %b314 %ba = sub i32 %b, %a315 %sel = select i1 %cmp, i32 %ba, i32 %ab316 ret i32 %sel317}318 319define i64 @abd_cmp_i64(i64 %a, i64 %b) nounwind {320; CHECK-LABEL: abd_cmp_i64:321; CHECK: // %bb.0:322; CHECK-NEXT: subs x8, x0, x1323; CHECK-NEXT: cneg x0, x8, le324; CHECK-NEXT: ret325 %cmp = icmp sge i64 %a, %b326 %ab = sub i64 %a, %b327 %ba = sub i64 %b, %a328 %sel = select i1 %cmp, i64 %ab, i64 %ba329 ret i64 %sel330}331 332define i128 @abd_cmp_i128(i128 %a, i128 %b) nounwind {333; CHECK-LABEL: abd_cmp_i128:334; CHECK: // %bb.0:335; CHECK-NEXT: subs x8, x0, x2336; CHECK-NEXT: sbc x9, x1, x3337; CHECK-NEXT: subs x10, x2, x0338; CHECK-NEXT: sbcs x11, x3, x1339; CHECK-NEXT: csel x0, x8, x10, lt340; CHECK-NEXT: csel x1, x9, x11, lt341; CHECK-NEXT: ret342 %cmp = icmp sge i128 %a, %b343 %ab = sub i128 %a, %b344 %ba = sub i128 %b, %a345 %sel = select i1 %cmp, i128 %ab, i128 %ba346 ret i128 %sel347}348 349;350; abs(sub_nsw(x, y)) -> abds(a,b)351;352 353define i8 @abd_subnsw_i8(i8 %a, i8 %b) nounwind {354; CHECK-LABEL: abd_subnsw_i8:355; CHECK: // %bb.0:356; CHECK-NEXT: sub w8, w0, w1357; CHECK-NEXT: sxtb w8, w8358; CHECK-NEXT: cmp w8, #0359; CHECK-NEXT: cneg w0, w8, mi360; CHECK-NEXT: ret361 %sub = sub nsw i8 %a, %b362 %abs = call i8 @llvm.abs.i8(i8 %sub, i1 false)363 ret i8 %abs364}365 366define i8 @abd_subnsw_i8_undef(i8 %a, i8 %b) nounwind {367; CHECK-LABEL: abd_subnsw_i8_undef:368; CHECK: // %bb.0:369; CHECK-NEXT: sub w8, w0, w1370; CHECK-NEXT: sxtb w8, w8371; CHECK-NEXT: cmp w8, #0372; CHECK-NEXT: cneg w0, w8, mi373; CHECK-NEXT: ret374 %sub = sub nsw i8 %a, %b375 %abs = call i8 @llvm.abs.i8(i8 %sub, i1 true)376 ret i8 %abs377}378 379define i16 @abd_subnsw_i16(i16 %a, i16 %b) nounwind {380; CHECK-LABEL: abd_subnsw_i16:381; CHECK: // %bb.0:382; CHECK-NEXT: sub w8, w0, w1383; CHECK-NEXT: sxth w8, w8384; CHECK-NEXT: cmp w8, #0385; CHECK-NEXT: cneg w0, w8, mi386; CHECK-NEXT: ret387 %sub = sub nsw i16 %a, %b388 %abs = call i16 @llvm.abs.i16(i16 %sub, i1 false)389 ret i16 %abs390}391 392define i16 @abd_subnsw_i16_undef(i16 %a, i16 %b) nounwind {393; CHECK-LABEL: abd_subnsw_i16_undef:394; CHECK: // %bb.0:395; CHECK-NEXT: sub w8, w0, w1396; CHECK-NEXT: sxth w8, w8397; CHECK-NEXT: cmp w8, #0398; CHECK-NEXT: cneg w0, w8, mi399; CHECK-NEXT: ret400 %sub = sub nsw i16 %a, %b401 %abs = call i16 @llvm.abs.i16(i16 %sub, i1 true)402 ret i16 %abs403}404 405define i32 @abd_subnsw_i32(i32 %a, i32 %b) nounwind {406; CHECK-LABEL: abd_subnsw_i32:407; CHECK: // %bb.0:408; CHECK-NEXT: subs w8, w0, w1409; CHECK-NEXT: cneg w0, w8, mi410; CHECK-NEXT: ret411 %sub = sub nsw i32 %a, %b412 %abs = call i32 @llvm.abs.i32(i32 %sub, i1 false)413 ret i32 %abs414}415 416define i32 @abd_subnsw_i32_undef(i32 %a, i32 %b) nounwind {417; CHECK-LABEL: abd_subnsw_i32_undef:418; CHECK: // %bb.0:419; CHECK-NEXT: subs w8, w0, w1420; CHECK-NEXT: cneg w0, w8, mi421; CHECK-NEXT: ret422 %sub = sub nsw i32 %a, %b423 %abs = call i32 @llvm.abs.i32(i32 %sub, i1 true)424 ret i32 %abs425}426 427define i64 @abd_subnsw_i64(i64 %a, i64 %b) nounwind {428; CHECK-LABEL: abd_subnsw_i64:429; CHECK: // %bb.0:430; CHECK-NEXT: subs x8, x0, x1431; CHECK-NEXT: cneg x0, x8, mi432; CHECK-NEXT: ret433 %sub = sub nsw i64 %a, %b434 %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)435 ret i64 %abs436}437 438define i64 @abd_subnsw_i64_undef(i64 %a, i64 %b) nounwind {439; CHECK-LABEL: abd_subnsw_i64_undef:440; CHECK: // %bb.0:441; CHECK-NEXT: subs x8, x0, x1442; CHECK-NEXT: cneg x0, x8, mi443; CHECK-NEXT: ret444 %sub = sub nsw i64 %a, %b445 %abs = call i64 @llvm.abs.i64(i64 %sub, i1 true)446 ret i64 %abs447}448 449define i128 @abd_subnsw_i128(i128 %a, i128 %b) nounwind {450; CHECK-LABEL: abd_subnsw_i128:451; CHECK: // %bb.0:452; CHECK-NEXT: subs x8, x0, x2453; CHECK-NEXT: sbc x9, x1, x3454; CHECK-NEXT: asr x10, x9, #63455; CHECK-NEXT: eor x8, x8, x10456; CHECK-NEXT: eor x9, x9, x10457; CHECK-NEXT: subs x0, x8, x10458; CHECK-NEXT: sbc x1, x9, x10459; CHECK-NEXT: ret460 %sub = sub nsw i128 %a, %b461 %abs = call i128 @llvm.abs.i128(i128 %sub, i1 false)462 ret i128 %abs463}464 465define i128 @abd_subnsw_i128_undef(i128 %a, i128 %b) nounwind {466; CHECK-LABEL: abd_subnsw_i128_undef:467; CHECK: // %bb.0:468; CHECK-NEXT: subs x8, x0, x2469; CHECK-NEXT: sbc x9, x1, x3470; CHECK-NEXT: asr x10, x9, #63471; CHECK-NEXT: eor x8, x8, x10472; CHECK-NEXT: eor x9, x9, x10473; CHECK-NEXT: subs x0, x8, x10474; CHECK-NEXT: sbc x1, x9, x10475; CHECK-NEXT: ret476 %sub = sub nsw i128 %a, %b477 %abs = call i128 @llvm.abs.i128(i128 %sub, i1 true)478 ret i128 %abs479}480 481;482; negative tests483;484 485define i32 @abd_sub_i32(i32 %a, i32 %b) nounwind {486; CHECK-LABEL: abd_sub_i32:487; CHECK: // %bb.0:488; CHECK-NEXT: subs w8, w0, w1489; CHECK-NEXT: cneg w0, w8, mi490; CHECK-NEXT: ret491 %sub = sub i32 %a, %b492 %abs = call i32 @llvm.abs.i32(i32 %sub, i1 false)493 ret i32 %abs494}495 496define i64 @vector_legalized(i16 %a, i16 %b) {497; CHECK-LABEL: vector_legalized:498; CHECK: // %bb.0:499; CHECK-NEXT: sxth w8, w0500; CHECK-NEXT: subs w8, w8, w1, sxth501; CHECK-NEXT: cneg w0, w8, mi502; CHECK-NEXT: ret503 %ea = sext i16 %a to i32504 %eb = sext i16 %b to i32505 %s = sub i32 %ea, %eb506 %ab = call i32 @llvm.abs.i32(i32 %s, i1 false)507 %e = zext i32 %ab to i64508 %red = call i64 @llvm.vector.reduce.add.v32i64(<32 x i64> zeroinitializer)509 %z = add i64 %red, %e510 ret i64 %z511}512 513;514; sub(select(icmp(a,b),a,b),select(icmp(a,b),b,a)) -> abds(a,b)515;516 517define i8 @abd_select_i8(i8 %a, i8 %b) nounwind {518; CHECK-LABEL: abd_select_i8:519; CHECK: // %bb.0:520; CHECK-NEXT: sxtb w8, w0521; CHECK-NEXT: subs w8, w8, w1, sxtb522; CHECK-NEXT: cneg w0, w8, mi523; CHECK-NEXT: ret524 %cmp = icmp slt i8 %a, %b525 %ab = select i1 %cmp, i8 %a, i8 %b526 %ba = select i1 %cmp, i8 %b, i8 %a527 %sub = sub i8 %ba, %ab528 ret i8 %sub529}530 531define i16 @abd_select_i16(i16 %a, i16 %b) nounwind {532; CHECK-LABEL: abd_select_i16:533; CHECK: // %bb.0:534; CHECK-NEXT: sxth w8, w0535; CHECK-NEXT: subs w8, w8, w1, sxth536; CHECK-NEXT: cneg w0, w8, mi537; CHECK-NEXT: ret538 %cmp = icmp sle i16 %a, %b539 %ab = select i1 %cmp, i16 %a, i16 %b540 %ba = select i1 %cmp, i16 %b, i16 %a541 %sub = sub i16 %ba, %ab542 ret i16 %sub543}544 545define i32 @abd_select_i32(i32 %a, i32 %b) nounwind {546; CHECK-LABEL: abd_select_i32:547; CHECK: // %bb.0:548; CHECK-NEXT: subs w8, w0, w1549; CHECK-NEXT: cneg w0, w8, le550; CHECK-NEXT: ret551 %cmp = icmp sgt i32 %a, %b552 %ab = select i1 %cmp, i32 %a, i32 %b553 %ba = select i1 %cmp, i32 %b, i32 %a554 %sub = sub i32 %ab, %ba555 ret i32 %sub556}557 558define i64 @abd_select_i64(i64 %a, i64 %b) nounwind {559; CHECK-LABEL: abd_select_i64:560; CHECK: // %bb.0:561; CHECK-NEXT: subs x8, x0, x1562; CHECK-NEXT: cneg x0, x8, le563; CHECK-NEXT: ret564 %cmp = icmp sge i64 %a, %b565 %ab = select i1 %cmp, i64 %a, i64 %b566 %ba = select i1 %cmp, i64 %b, i64 %a567 %sub = sub i64 %ab, %ba568 ret i64 %sub569}570 571define i128 @abd_select_i128(i128 %a, i128 %b) nounwind {572; CHECK-LABEL: abd_select_i128:573; CHECK: // %bb.0:574; CHECK-NEXT: subs x8, x0, x2575; CHECK-NEXT: sbc x9, x1, x3576; CHECK-NEXT: subs x10, x2, x0577; CHECK-NEXT: sbcs x11, x3, x1578; CHECK-NEXT: csel x0, x8, x10, lt579; CHECK-NEXT: csel x1, x9, x11, lt580; CHECK-NEXT: ret581 %cmp = icmp slt i128 %a, %b582 %ab = select i1 %cmp, i128 %a, i128 %b583 %ba = select i1 %cmp, i128 %b, i128 %a584 %sub = sub i128 %ba, %ab585 ret i128 %sub586}587 588declare i8 @llvm.abs.i8(i8, i1)589declare i16 @llvm.abs.i16(i16, i1)590declare i32 @llvm.abs.i32(i32, i1)591declare i64 @llvm.abs.i64(i64, i1)592declare i128 @llvm.abs.i128(i128, i1)593 594declare i8 @llvm.smax.i8(i8, i8)595declare i16 @llvm.smax.i16(i16, i16)596declare i32 @llvm.smax.i32(i32, i32)597declare i64 @llvm.smax.i64(i64, i64)598 599declare i8 @llvm.smin.i8(i8, i8)600declare i16 @llvm.smin.i16(i16, i16)601declare i32 @llvm.smin.i32(i32, i32)602declare i64 @llvm.smin.i64(i64, i64)603