405 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-linux-gnu | FileCheck %s3 4define i64 @addimm_mulimm_accept_00(i64 %a) {5; CHECK-LABEL: addimm_mulimm_accept_00:6; CHECK: // %bb.0:7; CHECK-NEXT: mov w8, #37 // =0x258; CHECK-NEXT: mov x9, #1147 // =0x47b9; CHECK-NEXT: madd x0, x0, x8, x910; CHECK-NEXT: ret11 %tmp0 = add i64 %a, 3112 %tmp1 = mul i64 %tmp0, 3713 ret i64 %tmp114}15 16define i64 @addimm_mulimm_accept_01(i64 %a) {17; CHECK-LABEL: addimm_mulimm_accept_01:18; CHECK: // %bb.0:19; CHECK-NEXT: mov w8, #37 // =0x2520; CHECK-NEXT: mov x9, #-1147 // =0xfffffffffffffb8521; CHECK-NEXT: madd x0, x0, x8, x922; CHECK-NEXT: ret23 %tmp0 = add i64 %a, -3124 %tmp1 = mul i64 %tmp0, 3725 ret i64 %tmp126}27 28define signext i32 @addimm_mulimm_accept_02(i32 signext %a) {29; CHECK-LABEL: addimm_mulimm_accept_02:30; CHECK: // %bb.0:31; CHECK-NEXT: mov w8, #37 // =0x2532; CHECK-NEXT: mov w9, #1147 // =0x47b33; CHECK-NEXT: madd w0, w0, w8, w934; CHECK-NEXT: ret35 %tmp0 = add i32 %a, 3136 %tmp1 = mul i32 %tmp0, 3737 ret i32 %tmp138}39 40define signext i32 @addimm_mulimm_accept_03(i32 signext %a) {41; CHECK-LABEL: addimm_mulimm_accept_03:42; CHECK: // %bb.0:43; CHECK-NEXT: mov w8, #37 // =0x2544; CHECK-NEXT: mov w9, #-1147 // =0xfffffb8545; CHECK-NEXT: madd w0, w0, w8, w946; CHECK-NEXT: ret47 %tmp0 = add i32 %a, -3148 %tmp1 = mul i32 %tmp0, 3749 ret i32 %tmp150}51 52define i64 @addimm_mulimm_accept_10(i64 %a) {53; CHECK-LABEL: addimm_mulimm_accept_10:54; CHECK: // %bb.0:55; CHECK-NEXT: mov w8, #37 // =0x2556; CHECK-NEXT: mov w9, #32888 // =0x807857; CHECK-NEXT: movk w9, #17, lsl #1658; CHECK-NEXT: madd x0, x0, x8, x959; CHECK-NEXT: ret60 %tmp0 = add i64 %a, 3100061 %tmp1 = mul i64 %tmp0, 3762 ret i64 %tmp163}64 65define i64 @addimm_mulimm_accept_11(i64 %a) {66; CHECK-LABEL: addimm_mulimm_accept_11:67; CHECK: // %bb.0:68; CHECK-NEXT: mov w8, #37 // =0x2569; CHECK-NEXT: mov x9, #-32888 // =0xffffffffffff7f8870; CHECK-NEXT: movk x9, #65518, lsl #1671; CHECK-NEXT: madd x0, x0, x8, x972; CHECK-NEXT: ret73 %tmp0 = add i64 %a, -3100074 %tmp1 = mul i64 %tmp0, 3775 ret i64 %tmp176}77 78define signext i32 @addimm_mulimm_accept_12(i32 signext %a) {79; CHECK-LABEL: addimm_mulimm_accept_12:80; CHECK: // %bb.0:81; CHECK-NEXT: mov w8, #37 // =0x2582; CHECK-NEXT: mov w9, #32888 // =0x807883; CHECK-NEXT: movk w9, #17, lsl #1684; CHECK-NEXT: madd w0, w0, w8, w985; CHECK-NEXT: ret86 %tmp0 = add i32 %a, 3100087 %tmp1 = mul i32 %tmp0, 3788 ret i32 %tmp189}90 91define signext i32 @addimm_mulimm_accept_13(i32 signext %a) {92; CHECK-LABEL: addimm_mulimm_accept_13:93; CHECK: // %bb.0:94; CHECK-NEXT: mov w8, #37 // =0x2595; CHECK-NEXT: mov w9, #32648 // =0x7f8896; CHECK-NEXT: movk w9, #65518, lsl #1697; CHECK-NEXT: madd w0, w0, w8, w998; CHECK-NEXT: ret99 %tmp0 = add i32 %a, -31000100 %tmp1 = mul i32 %tmp0, 37101 ret i32 %tmp1102}103 104define i64 @addimm_mulimm_reject_00(i64 %a) {105; CHECK-LABEL: addimm_mulimm_reject_00:106; CHECK: // %bb.0:107; CHECK-NEXT: mov w8, #3700 // =0xe74108; CHECK-NEXT: add x9, x0, #3100109; CHECK-NEXT: mul x0, x9, x8110; CHECK-NEXT: ret111 %tmp0 = add i64 %a, 3100112 %tmp1 = mul i64 %tmp0, 3700113 ret i64 %tmp1114}115 116define i64 @addimm_mulimm_reject_01(i64 %a) {117; CHECK-LABEL: addimm_mulimm_reject_01:118; CHECK: // %bb.0:119; CHECK-NEXT: mov w8, #3700 // =0xe74120; CHECK-NEXT: sub x9, x0, #3100121; CHECK-NEXT: mul x0, x9, x8122; CHECK-NEXT: ret123 %tmp0 = add i64 %a, -3100124 %tmp1 = mul i64 %tmp0, 3700125 ret i64 %tmp1126}127 128define signext i32 @addimm_mulimm_reject_02(i32 signext %a) {129; CHECK-LABEL: addimm_mulimm_reject_02:130; CHECK: // %bb.0:131; CHECK-NEXT: mov w8, #3700 // =0xe74132; CHECK-NEXT: add w9, w0, #3100133; CHECK-NEXT: mul w0, w9, w8134; CHECK-NEXT: ret135 %tmp0 = add i32 %a, 3100136 %tmp1 = mul i32 %tmp0, 3700137 ret i32 %tmp1138}139 140define signext i32 @addimm_mulimm_reject_03(i32 signext %a) {141; CHECK-LABEL: addimm_mulimm_reject_03:142; CHECK: // %bb.0:143; CHECK-NEXT: mov w8, #3700 // =0xe74144; CHECK-NEXT: sub w9, w0, #3100145; CHECK-NEXT: mul w0, w9, w8146; CHECK-NEXT: ret147 %tmp0 = add i32 %a, -3100148 %tmp1 = mul i32 %tmp0, 3700149 ret i32 %tmp1150}151 152define signext i32 @addmuladd(i32 signext %a) {153; CHECK-LABEL: addmuladd:154; CHECK: // %bb.0:155; CHECK-NEXT: mov w8, #324 // =0x144156; CHECK-NEXT: mov w9, #1300 // =0x514157; CHECK-NEXT: madd w0, w0, w8, w9158; CHECK-NEXT: ret159 %tmp0 = add i32 %a, 4160 %tmp1 = mul i32 %tmp0, 324161 %tmp2 = add i32 %tmp1, 4162 ret i32 %tmp2163}164 165define signext i32 @addmuladd_multiuse(i32 signext %a) {166; CHECK-LABEL: addmuladd_multiuse:167; CHECK: // %bb.0:168; CHECK-NEXT: mov w8, #324 // =0x144169; CHECK-NEXT: mov w9, #1300 // =0x514170; CHECK-NEXT: madd w8, w0, w8, w9171; CHECK-NEXT: add w9, w0, #4172; CHECK-NEXT: eor w0, w9, w8173; CHECK-NEXT: ret174 %tmp0 = add i32 %a, 4175 %tmp1 = mul i32 %tmp0, 324176 %tmp2 = add i32 %tmp1, 4177 %tmp3 = xor i32 %tmp0, %tmp2178 ret i32 %tmp3179}180 181define signext i32 @addmuladd_multiusemul(i32 signext %a) {182; CHECK-LABEL: addmuladd_multiusemul:183; CHECK: // %bb.0:184; CHECK-NEXT: mov w8, #324 // =0x144185; CHECK-NEXT: mul w8, w0, w8186; CHECK-NEXT: add w9, w8, #1296187; CHECK-NEXT: add w8, w8, #1300188; CHECK-NEXT: eor w0, w9, w8189; CHECK-NEXT: ret190 %tmp0 = add i32 %a, 4191 %tmp1 = mul i32 %tmp0, 324192 %tmp2 = add i32 %tmp1, 4193 %tmp3 = xor i32 %tmp1, %tmp2194 ret i32 %tmp3195}196 197define signext i32 @addmuladd_multiuse2(i32 signext %a) {198; CHECK-LABEL: addmuladd_multiuse2:199; CHECK: // %bb.0:200; CHECK-NEXT: mov w8, #324 // =0x144201; CHECK-NEXT: lsl w9, w0, #2202; CHECK-NEXT: mov w10, #1300 // =0x514203; CHECK-NEXT: madd w8, w0, w8, w10204; CHECK-NEXT: add w9, w9, #20205; CHECK-NEXT: eor w0, w8, w9206; CHECK-NEXT: ret207 %tmp0 = add i32 %a, 4208 %tmp1 = mul i32 %tmp0, 4209 %tmp2 = add i32 %tmp1, 4210 %tmp3 = mul i32 %tmp0, 324211 %tmp4 = add i32 %tmp3, 4212 %tmp5 = xor i32 %tmp4, %tmp2213 ret i32 %tmp5214}215 216define signext i32 @addaddmuladd(i32 signext %a, i32 %b) {217; CHECK-LABEL: addaddmuladd:218; CHECK: // %bb.0:219; CHECK-NEXT: mov w8, #324 // =0x144220; CHECK-NEXT: madd w8, w0, w8, w1221; CHECK-NEXT: add w0, w8, #1300222; CHECK-NEXT: ret223 %tmp0 = add i32 %a, 4224 %tmp1 = mul i32 %tmp0, 324225 %tmp2 = add i32 %tmp1, %b226 %tmp3 = add i32 %tmp2, 4227 ret i32 %tmp3228}229 230define signext i32 @addaddmuladd_multiuse(i32 signext %a, i32 %b) {231; CHECK-LABEL: addaddmuladd_multiuse:232; CHECK: // %bb.0:233; CHECK-NEXT: mov w8, #324 // =0x144234; CHECK-NEXT: add w9, w0, #4235; CHECK-NEXT: madd w8, w0, w8, w1236; CHECK-NEXT: add w8, w8, #1300237; CHECK-NEXT: eor w0, w9, w8238; CHECK-NEXT: ret239 %tmp0 = add i32 %a, 4240 %tmp1 = mul i32 %tmp0, 324241 %tmp2 = add i32 %tmp1, %b242 %tmp3 = add i32 %tmp2, 4243 %tmp4 = xor i32 %tmp0, %tmp3244 ret i32 %tmp4245}246 247define signext i32 @addaddmuladd_multiuse2(i32 signext %a, i32 %b) {248; CHECK-LABEL: addaddmuladd_multiuse2:249; CHECK: // %bb.0:250; CHECK-NEXT: mov w8, #324 // =0x144251; CHECK-NEXT: mov w9, #162 // =0xa2252; CHECK-NEXT: madd w8, w0, w8, w1253; CHECK-NEXT: madd w9, w0, w9, w1254; CHECK-NEXT: add w8, w8, #1300255; CHECK-NEXT: add w9, w9, #652256; CHECK-NEXT: eor w0, w9, w8257; CHECK-NEXT: ret258 %tmp0 = add i32 %a, 4259 %tmp1 = mul i32 %tmp0, 324260 %tmp2 = add i32 %tmp1, %b261 %tmp3 = add i32 %tmp2, 4262 %tmp1b = mul i32 %tmp0, 162263 %tmp2b = add i32 %tmp1b, %b264 %tmp3b = add i32 %tmp2b, 4265 %tmp4 = xor i32 %tmp3b, %tmp3266 ret i32 %tmp4267}268 269define <4 x i32> @addmuladd_vec(<4 x i32> %a) {270; CHECK-LABEL: addmuladd_vec:271; CHECK: // %bb.0:272; CHECK-NEXT: mov w8, #324 // =0x144273; CHECK-NEXT: mov w9, #1300 // =0x514274; CHECK-NEXT: dup v2.4s, w8275; CHECK-NEXT: dup v1.4s, w9276; CHECK-NEXT: mla v1.4s, v0.4s, v2.4s277; CHECK-NEXT: mov v0.16b, v1.16b278; CHECK-NEXT: ret279 %tmp0 = add <4 x i32> %a, <i32 4, i32 4, i32 4, i32 4>280 %tmp1 = mul <4 x i32> %tmp0, <i32 324, i32 324, i32 324, i32 324>281 %tmp2 = add <4 x i32> %tmp1, <i32 4, i32 4, i32 4, i32 4>282 ret <4 x i32> %tmp2283}284 285define <4 x i32> @addmuladd_vec_multiuse(<4 x i32> %a) {286; CHECK-LABEL: addmuladd_vec_multiuse:287; CHECK: // %bb.0:288; CHECK-NEXT: movi v1.4s, #4289; CHECK-NEXT: mov w8, #324 // =0x144290; CHECK-NEXT: dup v2.4s, w8291; CHECK-NEXT: add v0.4s, v0.4s, v1.4s292; CHECK-NEXT: mla v1.4s, v0.4s, v2.4s293; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b294; CHECK-NEXT: ret295 %tmp0 = add <4 x i32> %a, <i32 4, i32 4, i32 4, i32 4>296 %tmp1 = mul <4 x i32> %tmp0, <i32 324, i32 324, i32 324, i32 324>297 %tmp2 = add <4 x i32> %tmp1, <i32 4, i32 4, i32 4, i32 4>298 %tmp3 = xor <4 x i32> %tmp0, %tmp2299 ret <4 x i32> %tmp3300}301 302define void @addmuladd_gep(ptr %p, i64 %a) {303; CHECK-LABEL: addmuladd_gep:304; CHECK: // %bb.0:305; CHECK-NEXT: mov w8, #40 // =0x28306; CHECK-NEXT: str wzr, [x0, #10]!307; CHECK-NEXT: madd x8, x1, x8, x0308; CHECK-NEXT: str wzr, [x8, #20]309; CHECK-NEXT: ret310 %q = getelementptr i8, ptr %p, i64 10311 %r = getelementptr [10 x [10 x i32]], ptr %q, i64 0, i64 %a, i64 5312 store i32 0, ptr %q313 store i32 0, ptr %r314 ret void315}316 317define i32 @addmuladd_gep2(ptr %p, i32 %a) {318; CHECK-LABEL: addmuladd_gep2:319; CHECK: // %bb.0:320; CHECK-NEXT: mov w8, #3240 // =0xca8321; CHECK-NEXT: // kill: def $w1 killed $w1 def $x1322; CHECK-NEXT: smaddl x8, w1, w8, x0323; CHECK-NEXT: ldr w8, [x8, #3260]324; CHECK-NEXT: tbnz w8, #31, .LBB22_2325; CHECK-NEXT: // %bb.1:326; CHECK-NEXT: mov w0, wzr327; CHECK-NEXT: ret328; CHECK-NEXT: .LBB22_2: // %then329; CHECK-NEXT: sxtw x8, w1330; CHECK-NEXT: add x8, x8, #1331; CHECK-NEXT: str x8, [x0]332; CHECK-NEXT: mov w0, #1 // =0x1333; CHECK-NEXT: ret334 %b = sext i32 %a to i64335 %c = add nsw i64 %b, 1336 %d = mul nsw i64 %c, 81337 %g = getelementptr [10 x [10 x i32]], ptr %p, i64 0, i64 %d, i64 5338 %l = load i32, ptr %g, align 4339 %cc = icmp slt i32 %l, 0340 br i1 %cc, label %then, label %else341then:342 store i64 %c, ptr %p343 ret i32 1344else:345 ret i32 0346}347 348define signext i32 @addmuladd_multiuse2_nsw(i32 signext %a) {349; CHECK-LABEL: addmuladd_multiuse2_nsw:350; CHECK: // %bb.0:351; CHECK-NEXT: mov w8, #324 // =0x144352; CHECK-NEXT: lsl w9, w0, #2353; CHECK-NEXT: mov w10, #1300 // =0x514354; CHECK-NEXT: madd w8, w0, w8, w10355; CHECK-NEXT: add w9, w9, #20356; CHECK-NEXT: eor w0, w8, w9357; CHECK-NEXT: ret358 %tmp0 = add nsw i32 %a, 4359 %tmp1 = mul nsw i32 %tmp0, 4360 %tmp2 = add nsw i32 %tmp1, 4361 %tmp3 = mul nsw i32 %tmp0, 324362 %tmp4 = add nsw i32 %tmp3, 4363 %tmp5 = xor i32 %tmp4, %tmp2364 ret i32 %tmp5365}366 367define signext i32 @addmuladd_multiuse2_nuw(i32 signext %a) {368; CHECK-LABEL: addmuladd_multiuse2_nuw:369; CHECK: // %bb.0:370; CHECK-NEXT: mov w8, #324 // =0x144371; CHECK-NEXT: lsl w9, w0, #2372; CHECK-NEXT: mov w10, #1300 // =0x514373; CHECK-NEXT: madd w8, w0, w8, w10374; CHECK-NEXT: add w9, w9, #20375; CHECK-NEXT: eor w0, w8, w9376; CHECK-NEXT: ret377 %tmp0 = add nuw i32 %a, 4378 %tmp1 = mul nuw i32 %tmp0, 4379 %tmp2 = add nuw i32 %tmp1, 4380 %tmp3 = mul nuw i32 %tmp0, 324381 %tmp4 = add nuw i32 %tmp3, 4382 %tmp5 = xor i32 %tmp4, %tmp2383 ret i32 %tmp5384}385 386define signext i32 @addmuladd_multiuse2_nswnuw(i32 signext %a) {387; CHECK-LABEL: addmuladd_multiuse2_nswnuw:388; CHECK: // %bb.0:389; CHECK-NEXT: mov w8, #324 // =0x144390; CHECK-NEXT: lsl w9, w0, #2391; CHECK-NEXT: mov w10, #1300 // =0x514392; CHECK-NEXT: madd w8, w0, w8, w10393; CHECK-NEXT: add w9, w9, #20394; CHECK-NEXT: eor w0, w8, w9395; CHECK-NEXT: ret396 %tmp0 = add nsw nuw i32 %a, 4397 %tmp1 = mul nsw nuw i32 %tmp0, 4398 %tmp2 = add nsw nuw i32 %tmp1, 4399 %tmp3 = mul nsw nuw i32 %tmp0, 324400 %tmp4 = add nsw nuw i32 %tmp3, 4401 %tmp5 = xor i32 %tmp4, %tmp2402 ret i32 %tmp5403}404 405