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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-unknown-linux-gnu --aarch64-enable-sink-fold=true < %s | FileCheck %s3 4; Fold5; ptr - (ptr & (alignment-1))6; To7; ptr & (0 - alignment)8;9; This needs to be a backend-level fold because only by now pointers10; are just registers; in middle-end IR this can only be done via @llvm.ptrmask()11; intrinsic which is not sufficiently widely-spread yet.12;13; https://bugs.llvm.org/show_bug.cgi?id=4444814 15; The basic positive tests16 17define i32 @t0_32(i32 %ptr, i32 %alignment) nounwind {18; CHECK-LABEL: t0_32:19; CHECK: // %bb.0:20; CHECK-NEXT: neg w8, w121; CHECK-NEXT: and w0, w0, w822; CHECK-NEXT: ret23 %mask = add i32 %alignment, -124 %bias = and i32 %ptr, %mask25 %r = sub i32 %ptr, %bias26 ret i32 %r27}28define i64 @t1_64(i64 %ptr, i64 %alignment) nounwind {29; CHECK-LABEL: t1_64:30; CHECK: // %bb.0:31; CHECK-NEXT: neg x8, x132; CHECK-NEXT: and x0, x0, x833; CHECK-NEXT: ret34 %mask = add i64 %alignment, -135 %bias = and i64 %ptr, %mask36 %r = sub i64 %ptr, %bias37 ret i64 %r38}39 40define i32 @t2_commutative(i32 %ptr, i32 %alignment) nounwind {41; CHECK-LABEL: t2_commutative:42; CHECK: // %bb.0:43; CHECK-NEXT: neg w8, w144; CHECK-NEXT: and w0, w0, w845; CHECK-NEXT: ret46 %mask = add i32 %alignment, -147 %bias = and i32 %mask, %ptr ; swapped48 %r = sub i32 %ptr, %bias49 ret i32 %r50}51 52; Extra use tests53 54define i32 @t3_extrause0(i32 %ptr, i32 %alignment, ptr %mask_storage) nounwind {55; CHECK-LABEL: t3_extrause0:56; CHECK: // %bb.0:57; CHECK-NEXT: sub w8, w1, #158; CHECK-NEXT: bic w0, w0, w859; CHECK-NEXT: str w8, [x2]60; CHECK-NEXT: ret61 %mask = add i32 %alignment, -162 store i32 %mask, ptr %mask_storage63 %bias = and i32 %ptr, %mask64 %r = sub i32 %ptr, %bias65 ret i32 %r66}67define i32 @n4_extrause1(i32 %ptr, i32 %alignment, ptr %bias_storage) nounwind {68; CHECK-LABEL: n4_extrause1:69; CHECK: // %bb.0:70; CHECK-NEXT: sub w8, w1, #171; CHECK-NEXT: and w8, w0, w872; CHECK-NEXT: sub w0, w0, w873; CHECK-NEXT: str w8, [x2]74; CHECK-NEXT: ret75 %mask = add i32 %alignment, -176 %bias = and i32 %ptr, %mask ; has extra uses, can't fold77 store i32 %bias, ptr %bias_storage78 %r = sub i32 %ptr, %bias79 ret i32 %r80}81define i32 @n5_extrause2(i32 %ptr, i32 %alignment, ptr %mask_storage, ptr %bias_storage) nounwind {82; CHECK-LABEL: n5_extrause2:83; CHECK: // %bb.0:84; CHECK-NEXT: sub w8, w1, #185; CHECK-NEXT: and w9, w0, w886; CHECK-NEXT: str w8, [x2]87; CHECK-NEXT: sub w0, w0, w988; CHECK-NEXT: str w9, [x3]89; CHECK-NEXT: ret90 %mask = add i32 %alignment, -191 store i32 %mask, ptr %mask_storage92 %bias = and i32 %ptr, %mask ; has extra uses, can't fold93 store i32 %bias, ptr %bias_storage94 %r = sub i32 %ptr, %bias95 ret i32 %r96}97 98; Negative tests99 100define i32 @n6_different_ptrs(i32 %ptr0, i32 %ptr1, i32 %alignment) nounwind {101; CHECK-LABEL: n6_different_ptrs:102; CHECK: // %bb.0:103; CHECK-NEXT: sub w8, w2, #1104; CHECK-NEXT: and w8, w1, w8105; CHECK-NEXT: sub w0, w0, w8106; CHECK-NEXT: ret107 %mask = add i32 %alignment, -1108 %bias = and i32 %ptr1, %mask ; not %ptr0109 %r = sub i32 %ptr0, %bias ; not %ptr1110 ret i32 %r111}112define i32 @n7_different_ptrs_commutative(i32 %ptr0, i32 %ptr1, i32 %alignment) nounwind {113; CHECK-LABEL: n7_different_ptrs_commutative:114; CHECK: // %bb.0:115; CHECK-NEXT: sub w8, w2, #1116; CHECK-NEXT: and w8, w8, w1117; CHECK-NEXT: sub w0, w0, w8118; CHECK-NEXT: ret119 %mask = add i32 %alignment, -1120 %bias = and i32 %mask, %ptr1 ; swapped, not %ptr0121 %r = sub i32 %ptr0, %bias ; not %ptr1122 ret i32 %r123}124 125define i32 @n8_not_lowbit_mask(i32 %ptr, i32 %alignment) nounwind {126; CHECK-LABEL: n8_not_lowbit_mask:127; CHECK: // %bb.0:128; CHECK-NEXT: add w8, w1, #1129; CHECK-NEXT: bic w0, w0, w8130; CHECK-NEXT: ret131 %mask = add i32 %alignment, 1 ; not -1132 %bias = and i32 %ptr, %mask133 %r = sub i32 %ptr, %bias134 ret i32 %r135}136 137define i32 @n9_sub_is_not_commutative(i32 %ptr, i32 %alignment) nounwind {138; CHECK-LABEL: n9_sub_is_not_commutative:139; CHECK: // %bb.0:140; CHECK-NEXT: sub w8, w1, #1141; CHECK-NEXT: and w8, w0, w8142; CHECK-NEXT: sub w0, w8, w0143; CHECK-NEXT: ret144 %mask = add i32 %alignment, -1145 %bias = and i32 %ptr, %mask146 %r = sub i32 %bias, %ptr ; wrong order147 ret i32 %r148}149