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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=aarch64-none-eabi -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64-none-eabi -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5define i8 @and_i8(i8 %a, i8 %b) {6; CHECK-LABEL: and_i8:7; CHECK: // %bb.0: // %entry8; CHECK-NEXT: and w0, w0, w19; CHECK-NEXT: ret10entry:11 %s = and i8 %a, %b12 ret i8 %s13}14 15define i8 @or_i8(i8 %a, i8 %b) {16; CHECK-LABEL: or_i8:17; CHECK: // %bb.0: // %entry18; CHECK-NEXT: orr w0, w0, w119; CHECK-NEXT: ret20entry:21 %s = or i8 %a, %b22 ret i8 %s23}24 25define i8 @xor_i8(i8 %a, i8 %b) {26; CHECK-LABEL: xor_i8:27; CHECK: // %bb.0: // %entry28; CHECK-NEXT: eor w0, w0, w129; CHECK-NEXT: ret30entry:31 %s = xor i8 %a, %b32 ret i8 %s33}34 35define i16 @and_i16(i16 %a, i16 %b) {36; CHECK-LABEL: and_i16:37; CHECK: // %bb.0: // %entry38; CHECK-NEXT: and w0, w0, w139; CHECK-NEXT: ret40entry:41 %s = and i16 %a, %b42 ret i16 %s43}44 45define i16 @or_i16(i16 %a, i16 %b) {46; CHECK-LABEL: or_i16:47; CHECK: // %bb.0: // %entry48; CHECK-NEXT: orr w0, w0, w149; CHECK-NEXT: ret50entry:51 %s = or i16 %a, %b52 ret i16 %s53}54 55define i16 @xor_i16(i16 %a, i16 %b) {56; CHECK-LABEL: xor_i16:57; CHECK: // %bb.0: // %entry58; CHECK-NEXT: eor w0, w0, w159; CHECK-NEXT: ret60entry:61 %s = xor i16 %a, %b62 ret i16 %s63}64 65define i32 @and_i32(i32 %a, i32 %b) {66; CHECK-LABEL: and_i32:67; CHECK: // %bb.0: // %entry68; CHECK-NEXT: and w0, w0, w169; CHECK-NEXT: ret70entry:71 %s = and i32 %a, %b72 ret i32 %s73}74 75define i32 @or_i32(i32 %a, i32 %b) {76; CHECK-LABEL: or_i32:77; CHECK: // %bb.0: // %entry78; CHECK-NEXT: orr w0, w0, w179; CHECK-NEXT: ret80entry:81 %s = or i32 %a, %b82 ret i32 %s83}84 85define i32 @xor_i32(i32 %a, i32 %b) {86; CHECK-LABEL: xor_i32:87; CHECK: // %bb.0: // %entry88; CHECK-NEXT: eor w0, w0, w189; CHECK-NEXT: ret90entry:91 %s = xor i32 %a, %b92 ret i32 %s93}94 95define i64 @and_i64(i64 %a, i64 %b) {96; CHECK-LABEL: and_i64:97; CHECK: // %bb.0: // %entry98; CHECK-NEXT: and x0, x0, x199; CHECK-NEXT: ret100entry:101 %s = and i64 %a, %b102 ret i64 %s103}104 105define i64 @or_i64(i64 %a, i64 %b) {106; CHECK-LABEL: or_i64:107; CHECK: // %bb.0: // %entry108; CHECK-NEXT: orr x0, x0, x1109; CHECK-NEXT: ret110entry:111 %s = or i64 %a, %b112 ret i64 %s113}114 115define i64 @xor_i64(i64 %a, i64 %b) {116; CHECK-LABEL: xor_i64:117; CHECK: // %bb.0: // %entry118; CHECK-NEXT: eor x0, x0, x1119; CHECK-NEXT: ret120entry:121 %s = xor i64 %a, %b122 ret i64 %s123}124 125define i128 @and_i128(i128 %a, i128 %b) {126; CHECK-SD-LABEL: and_i128:127; CHECK-SD: // %bb.0: // %entry128; CHECK-SD-NEXT: and x1, x1, x3129; CHECK-SD-NEXT: and x0, x0, x2130; CHECK-SD-NEXT: ret131;132; CHECK-GI-LABEL: and_i128:133; CHECK-GI: // %bb.0: // %entry134; CHECK-GI-NEXT: and x0, x0, x2135; CHECK-GI-NEXT: and x1, x1, x3136; CHECK-GI-NEXT: ret137entry:138 %s = and i128 %a, %b139 ret i128 %s140}141 142define i128 @or_i128(i128 %a, i128 %b) {143; CHECK-SD-LABEL: or_i128:144; CHECK-SD: // %bb.0: // %entry145; CHECK-SD-NEXT: orr x1, x1, x3146; CHECK-SD-NEXT: orr x0, x0, x2147; CHECK-SD-NEXT: ret148;149; CHECK-GI-LABEL: or_i128:150; CHECK-GI: // %bb.0: // %entry151; CHECK-GI-NEXT: orr x0, x0, x2152; CHECK-GI-NEXT: orr x1, x1, x3153; CHECK-GI-NEXT: ret154entry:155 %s = or i128 %a, %b156 ret i128 %s157}158 159define i128 @xor_i128(i128 %a, i128 %b) {160; CHECK-SD-LABEL: xor_i128:161; CHECK-SD: // %bb.0: // %entry162; CHECK-SD-NEXT: eor x1, x1, x3163; CHECK-SD-NEXT: eor x0, x0, x2164; CHECK-SD-NEXT: ret165;166; CHECK-GI-LABEL: xor_i128:167; CHECK-GI: // %bb.0: // %entry168; CHECK-GI-NEXT: eor x0, x0, x2169; CHECK-GI-NEXT: eor x1, x1, x3170; CHECK-GI-NEXT: ret171entry:172 %s = xor i128 %a, %b173 ret i128 %s174}175 176define void @and_v2i8(ptr %p1, ptr %p2) {177; CHECK-SD-LABEL: and_v2i8:178; CHECK-SD: // %bb.0: // %entry179; CHECK-SD-NEXT: ldr h0, [x0]180; CHECK-SD-NEXT: ldr h1, [x1]181; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b182; CHECK-SD-NEXT: ushll v1.8h, v1.8b, #0183; CHECK-SD-NEXT: ushll v1.4s, v1.4h, #0184; CHECK-SD-NEXT: zip1 v0.4h, v0.4h, v0.4h185; CHECK-SD-NEXT: and v0.8b, v0.8b, v1.8b186; CHECK-SD-NEXT: mov s1, v0.s[1]187; CHECK-SD-NEXT: str b0, [x0]188; CHECK-SD-NEXT: stur b1, [x0, #1]189; CHECK-SD-NEXT: ret190;191; CHECK-GI-LABEL: and_v2i8:192; CHECK-GI: // %bb.0: // %entry193; CHECK-GI-NEXT: ld1 { v0.b }[0], [x0]194; CHECK-GI-NEXT: ld1 { v1.b }[0], [x1]195; CHECK-GI-NEXT: ldr b2, [x0, #1]196; CHECK-GI-NEXT: ldr b3, [x1, #1]197; CHECK-GI-NEXT: mov v0.s[1], v2.s[0]198; CHECK-GI-NEXT: mov v1.s[1], v3.s[0]199; CHECK-GI-NEXT: and v0.8b, v0.8b, v1.8b200; CHECK-GI-NEXT: mov s1, v0.s[1]201; CHECK-GI-NEXT: str b0, [x0]202; CHECK-GI-NEXT: str b1, [x0, #1]203; CHECK-GI-NEXT: ret204entry:205 %d = load <2 x i8>, ptr %p1206 %e = load <2 x i8>, ptr %p2207 %s = and <2 x i8> %d, %e208 store <2 x i8> %s, ptr %p1209 ret void210}211 212define void @or_v2i8(ptr %p1, ptr %p2) {213; CHECK-SD-LABEL: or_v2i8:214; CHECK-SD: // %bb.0: // %entry215; CHECK-SD-NEXT: ldr h0, [x0]216; CHECK-SD-NEXT: ldr h1, [x1]217; CHECK-SD-NEXT: ushll v0.8h, v0.8b, #0218; CHECK-SD-NEXT: ushll v1.8h, v1.8b, #0219; CHECK-SD-NEXT: ushll v0.4s, v0.4h, #0220; CHECK-SD-NEXT: ushll v1.4s, v1.4h, #0221; CHECK-SD-NEXT: orr v0.8b, v0.8b, v1.8b222; CHECK-SD-NEXT: mov s1, v0.s[1]223; CHECK-SD-NEXT: str b0, [x0]224; CHECK-SD-NEXT: stur b1, [x0, #1]225; CHECK-SD-NEXT: ret226;227; CHECK-GI-LABEL: or_v2i8:228; CHECK-GI: // %bb.0: // %entry229; CHECK-GI-NEXT: ld1 { v0.b }[0], [x0]230; CHECK-GI-NEXT: ld1 { v1.b }[0], [x1]231; CHECK-GI-NEXT: ldr b2, [x0, #1]232; CHECK-GI-NEXT: ldr b3, [x1, #1]233; CHECK-GI-NEXT: mov v0.s[1], v2.s[0]234; CHECK-GI-NEXT: mov v1.s[1], v3.s[0]235; CHECK-GI-NEXT: orr v0.8b, v0.8b, v1.8b236; CHECK-GI-NEXT: mov s1, v0.s[1]237; CHECK-GI-NEXT: str b0, [x0]238; CHECK-GI-NEXT: str b1, [x0, #1]239; CHECK-GI-NEXT: ret240entry:241 %d = load <2 x i8>, ptr %p1242 %e = load <2 x i8>, ptr %p2243 %s = or <2 x i8> %d, %e244 store <2 x i8> %s, ptr %p1245 ret void246}247 248define void @xor_v2i8(ptr %p1, ptr %p2) {249; CHECK-SD-LABEL: xor_v2i8:250; CHECK-SD: // %bb.0: // %entry251; CHECK-SD-NEXT: ldr h0, [x0]252; CHECK-SD-NEXT: ldr h1, [x1]253; CHECK-SD-NEXT: ushll v0.8h, v0.8b, #0254; CHECK-SD-NEXT: ushll v1.8h, v1.8b, #0255; CHECK-SD-NEXT: ushll v0.4s, v0.4h, #0256; CHECK-SD-NEXT: ushll v1.4s, v1.4h, #0257; CHECK-SD-NEXT: eor v0.8b, v0.8b, v1.8b258; CHECK-SD-NEXT: mov s1, v0.s[1]259; CHECK-SD-NEXT: str b0, [x0]260; CHECK-SD-NEXT: stur b1, [x0, #1]261; CHECK-SD-NEXT: ret262;263; CHECK-GI-LABEL: xor_v2i8:264; CHECK-GI: // %bb.0: // %entry265; CHECK-GI-NEXT: ld1 { v0.b }[0], [x0]266; CHECK-GI-NEXT: ld1 { v1.b }[0], [x1]267; CHECK-GI-NEXT: ldr b2, [x0, #1]268; CHECK-GI-NEXT: ldr b3, [x1, #1]269; CHECK-GI-NEXT: mov v0.s[1], v2.s[0]270; CHECK-GI-NEXT: mov v1.s[1], v3.s[0]271; CHECK-GI-NEXT: eor v0.8b, v0.8b, v1.8b272; CHECK-GI-NEXT: mov s1, v0.s[1]273; CHECK-GI-NEXT: str b0, [x0]274; CHECK-GI-NEXT: str b1, [x0, #1]275; CHECK-GI-NEXT: ret276entry:277 %d = load <2 x i8>, ptr %p1278 %e = load <2 x i8>, ptr %p2279 %s = xor <2 x i8> %d, %e280 store <2 x i8> %s, ptr %p1281 ret void282}283 284define void @and_v3i8(ptr %p1, ptr %p2) {285; CHECK-SD-LABEL: and_v3i8:286; CHECK-SD: // %bb.0: // %entry287; CHECK-SD-NEXT: sub sp, sp, #16288; CHECK-SD-NEXT: .cfi_def_cfa_offset 16289; CHECK-SD-NEXT: ldr s0, [x0]290; CHECK-SD-NEXT: ldr s1, [x1]291; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b292; CHECK-SD-NEXT: zip1 v1.8b, v1.8b, v0.8b293; CHECK-SD-NEXT: and v0.8b, v0.8b, v1.8b294; CHECK-SD-NEXT: uzp1 v1.8b, v0.8b, v0.8b295; CHECK-SD-NEXT: mov h0, v0.h[2]296; CHECK-SD-NEXT: ushll v1.4s, v1.4h, #0297; CHECK-SD-NEXT: stur b0, [x0, #2]298; CHECK-SD-NEXT: str h1, [x0]299; CHECK-SD-NEXT: add sp, sp, #16300; CHECK-SD-NEXT: ret301;302; CHECK-GI-LABEL: and_v3i8:303; CHECK-GI: // %bb.0: // %entry304; CHECK-GI-NEXT: ldr w8, [x0]305; CHECK-GI-NEXT: ldr w9, [x1]306; CHECK-GI-NEXT: fmov s0, w8307; CHECK-GI-NEXT: fmov s1, w9308; CHECK-GI-NEXT: mov b2, v0.b[1]309; CHECK-GI-NEXT: mov b3, v1.b[1]310; CHECK-GI-NEXT: mov b4, v0.b[2]311; CHECK-GI-NEXT: mov b5, v1.b[2]312; CHECK-GI-NEXT: fmov w8, s2313; CHECK-GI-NEXT: fmov w9, s3314; CHECK-GI-NEXT: mov v0.h[1], w8315; CHECK-GI-NEXT: mov v1.h[1], w9316; CHECK-GI-NEXT: fmov w8, s4317; CHECK-GI-NEXT: fmov w9, s5318; CHECK-GI-NEXT: mov v0.h[2], w8319; CHECK-GI-NEXT: mov v1.h[2], w9320; CHECK-GI-NEXT: and v0.8b, v0.8b, v1.8b321; CHECK-GI-NEXT: mov h1, v0.h[1]322; CHECK-GI-NEXT: mov h2, v0.h[2]323; CHECK-GI-NEXT: str b0, [x0]324; CHECK-GI-NEXT: str b1, [x0, #1]325; CHECK-GI-NEXT: str b2, [x0, #2]326; CHECK-GI-NEXT: ret327entry:328 %d = load <3 x i8>, ptr %p1329 %e = load <3 x i8>, ptr %p2330 %s = and <3 x i8> %d, %e331 store <3 x i8> %s, ptr %p1332 ret void333}334 335define void @or_v3i8(ptr %p1, ptr %p2) {336; CHECK-SD-LABEL: or_v3i8:337; CHECK-SD: // %bb.0: // %entry338; CHECK-SD-NEXT: sub sp, sp, #16339; CHECK-SD-NEXT: .cfi_def_cfa_offset 16340; CHECK-SD-NEXT: ldr s0, [x0]341; CHECK-SD-NEXT: ldr s1, [x1]342; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b343; CHECK-SD-NEXT: zip1 v1.8b, v1.8b, v0.8b344; CHECK-SD-NEXT: orr v0.8b, v0.8b, v1.8b345; CHECK-SD-NEXT: uzp1 v1.8b, v0.8b, v0.8b346; CHECK-SD-NEXT: mov h0, v0.h[2]347; CHECK-SD-NEXT: ushll v1.4s, v1.4h, #0348; CHECK-SD-NEXT: stur b0, [x0, #2]349; CHECK-SD-NEXT: str h1, [x0]350; CHECK-SD-NEXT: add sp, sp, #16351; CHECK-SD-NEXT: ret352;353; CHECK-GI-LABEL: or_v3i8:354; CHECK-GI: // %bb.0: // %entry355; CHECK-GI-NEXT: ldr w8, [x0]356; CHECK-GI-NEXT: ldr w9, [x1]357; CHECK-GI-NEXT: fmov s0, w8358; CHECK-GI-NEXT: fmov s1, w9359; CHECK-GI-NEXT: mov b2, v0.b[1]360; CHECK-GI-NEXT: mov b3, v1.b[1]361; CHECK-GI-NEXT: mov b4, v0.b[2]362; CHECK-GI-NEXT: mov b5, v1.b[2]363; CHECK-GI-NEXT: fmov w8, s2364; CHECK-GI-NEXT: fmov w9, s3365; CHECK-GI-NEXT: mov v0.h[1], w8366; CHECK-GI-NEXT: mov v1.h[1], w9367; CHECK-GI-NEXT: fmov w8, s4368; CHECK-GI-NEXT: fmov w9, s5369; CHECK-GI-NEXT: mov v0.h[2], w8370; CHECK-GI-NEXT: mov v1.h[2], w9371; CHECK-GI-NEXT: orr v0.8b, v0.8b, v1.8b372; CHECK-GI-NEXT: mov h1, v0.h[1]373; CHECK-GI-NEXT: mov h2, v0.h[2]374; CHECK-GI-NEXT: str b0, [x0]375; CHECK-GI-NEXT: str b1, [x0, #1]376; CHECK-GI-NEXT: str b2, [x0, #2]377; CHECK-GI-NEXT: ret378entry:379 %d = load <3 x i8>, ptr %p1380 %e = load <3 x i8>, ptr %p2381 %s = or <3 x i8> %d, %e382 store <3 x i8> %s, ptr %p1383 ret void384}385 386define void @xor_v3i8(ptr %p1, ptr %p2) {387; CHECK-SD-LABEL: xor_v3i8:388; CHECK-SD: // %bb.0: // %entry389; CHECK-SD-NEXT: sub sp, sp, #16390; CHECK-SD-NEXT: .cfi_def_cfa_offset 16391; CHECK-SD-NEXT: ldr s0, [x0]392; CHECK-SD-NEXT: ldr s1, [x1]393; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b394; CHECK-SD-NEXT: zip1 v1.8b, v1.8b, v0.8b395; CHECK-SD-NEXT: eor v0.8b, v0.8b, v1.8b396; CHECK-SD-NEXT: uzp1 v1.8b, v0.8b, v0.8b397; CHECK-SD-NEXT: mov h0, v0.h[2]398; CHECK-SD-NEXT: ushll v1.4s, v1.4h, #0399; CHECK-SD-NEXT: stur b0, [x0, #2]400; CHECK-SD-NEXT: str h1, [x0]401; CHECK-SD-NEXT: add sp, sp, #16402; CHECK-SD-NEXT: ret403;404; CHECK-GI-LABEL: xor_v3i8:405; CHECK-GI: // %bb.0: // %entry406; CHECK-GI-NEXT: ldr w8, [x0]407; CHECK-GI-NEXT: ldr w9, [x1]408; CHECK-GI-NEXT: fmov s0, w8409; CHECK-GI-NEXT: fmov s1, w9410; CHECK-GI-NEXT: mov b2, v0.b[1]411; CHECK-GI-NEXT: mov b3, v1.b[1]412; CHECK-GI-NEXT: mov b4, v0.b[2]413; CHECK-GI-NEXT: mov b5, v1.b[2]414; CHECK-GI-NEXT: fmov w8, s2415; CHECK-GI-NEXT: fmov w9, s3416; CHECK-GI-NEXT: mov v0.h[1], w8417; CHECK-GI-NEXT: mov v1.h[1], w9418; CHECK-GI-NEXT: fmov w8, s4419; CHECK-GI-NEXT: fmov w9, s5420; CHECK-GI-NEXT: mov v0.h[2], w8421; CHECK-GI-NEXT: mov v1.h[2], w9422; CHECK-GI-NEXT: eor v0.8b, v0.8b, v1.8b423; CHECK-GI-NEXT: mov h1, v0.h[1]424; CHECK-GI-NEXT: mov h2, v0.h[2]425; CHECK-GI-NEXT: str b0, [x0]426; CHECK-GI-NEXT: str b1, [x0, #1]427; CHECK-GI-NEXT: str b2, [x0, #2]428; CHECK-GI-NEXT: ret429entry:430 %d = load <3 x i8>, ptr %p1431 %e = load <3 x i8>, ptr %p2432 %s = xor <3 x i8> %d, %e433 store <3 x i8> %s, ptr %p1434 ret void435}436 437define void @and_v4i8(ptr %p1, ptr %p2) {438; CHECK-SD-LABEL: and_v4i8:439; CHECK-SD: // %bb.0: // %entry440; CHECK-SD-NEXT: ldr s0, [x0]441; CHECK-SD-NEXT: ldr s1, [x1]442; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b443; CHECK-SD-NEXT: zip1 v1.8b, v1.8b, v1.8b444; CHECK-SD-NEXT: and v0.8b, v0.8b, v1.8b445; CHECK-SD-NEXT: uzp1 v0.8b, v0.8b, v0.8b446; CHECK-SD-NEXT: str s0, [x0]447; CHECK-SD-NEXT: ret448;449; CHECK-GI-LABEL: and_v4i8:450; CHECK-GI: // %bb.0: // %entry451; CHECK-GI-NEXT: ldr w8, [x0]452; CHECK-GI-NEXT: ldr w9, [x1]453; CHECK-GI-NEXT: fmov s0, w8454; CHECK-GI-NEXT: fmov s1, w9455; CHECK-GI-NEXT: mov b2, v0.b[1]456; CHECK-GI-NEXT: mov b3, v1.b[1]457; CHECK-GI-NEXT: mov b4, v0.b[2]458; CHECK-GI-NEXT: mov b5, v0.b[3]459; CHECK-GI-NEXT: fmov w8, s2460; CHECK-GI-NEXT: mov b2, v1.b[2]461; CHECK-GI-NEXT: fmov w9, s3462; CHECK-GI-NEXT: mov b3, v1.b[3]463; CHECK-GI-NEXT: mov v0.h[1], w8464; CHECK-GI-NEXT: mov v1.h[1], w9465; CHECK-GI-NEXT: fmov w8, s4466; CHECK-GI-NEXT: fmov w9, s2467; CHECK-GI-NEXT: mov v0.h[2], w8468; CHECK-GI-NEXT: mov v1.h[2], w9469; CHECK-GI-NEXT: fmov w8, s5470; CHECK-GI-NEXT: fmov w9, s3471; CHECK-GI-NEXT: mov v0.h[3], w8472; CHECK-GI-NEXT: mov v1.h[3], w9473; CHECK-GI-NEXT: and v0.8b, v0.8b, v1.8b474; CHECK-GI-NEXT: uzp1 v0.8b, v0.8b, v0.8b475; CHECK-GI-NEXT: fmov w8, s0476; CHECK-GI-NEXT: str w8, [x0]477; CHECK-GI-NEXT: ret478entry:479 %d = load <4 x i8>, ptr %p1480 %e = load <4 x i8>, ptr %p2481 %s = and <4 x i8> %d, %e482 store <4 x i8> %s, ptr %p1483 ret void484}485 486define void @or_v4i8(ptr %p1, ptr %p2) {487; CHECK-SD-LABEL: or_v4i8:488; CHECK-SD: // %bb.0: // %entry489; CHECK-SD-NEXT: ldr s0, [x0]490; CHECK-SD-NEXT: ldr s1, [x1]491; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b492; CHECK-SD-NEXT: zip1 v1.8b, v1.8b, v1.8b493; CHECK-SD-NEXT: orr v0.8b, v0.8b, v1.8b494; CHECK-SD-NEXT: uzp1 v0.8b, v0.8b, v0.8b495; CHECK-SD-NEXT: str s0, [x0]496; CHECK-SD-NEXT: ret497;498; CHECK-GI-LABEL: or_v4i8:499; CHECK-GI: // %bb.0: // %entry500; CHECK-GI-NEXT: ldr w8, [x0]501; CHECK-GI-NEXT: ldr w9, [x1]502; CHECK-GI-NEXT: fmov s0, w8503; CHECK-GI-NEXT: fmov s1, w9504; CHECK-GI-NEXT: mov b2, v0.b[1]505; CHECK-GI-NEXT: mov b3, v1.b[1]506; CHECK-GI-NEXT: mov b4, v0.b[2]507; CHECK-GI-NEXT: mov b5, v0.b[3]508; CHECK-GI-NEXT: fmov w8, s2509; CHECK-GI-NEXT: mov b2, v1.b[2]510; CHECK-GI-NEXT: fmov w9, s3511; CHECK-GI-NEXT: mov b3, v1.b[3]512; CHECK-GI-NEXT: mov v0.h[1], w8513; CHECK-GI-NEXT: mov v1.h[1], w9514; CHECK-GI-NEXT: fmov w8, s4515; CHECK-GI-NEXT: fmov w9, s2516; CHECK-GI-NEXT: mov v0.h[2], w8517; CHECK-GI-NEXT: mov v1.h[2], w9518; CHECK-GI-NEXT: fmov w8, s5519; CHECK-GI-NEXT: fmov w9, s3520; CHECK-GI-NEXT: mov v0.h[3], w8521; CHECK-GI-NEXT: mov v1.h[3], w9522; CHECK-GI-NEXT: orr v0.8b, v0.8b, v1.8b523; CHECK-GI-NEXT: uzp1 v0.8b, v0.8b, v0.8b524; CHECK-GI-NEXT: fmov w8, s0525; CHECK-GI-NEXT: str w8, [x0]526; CHECK-GI-NEXT: ret527entry:528 %d = load <4 x i8>, ptr %p1529 %e = load <4 x i8>, ptr %p2530 %s = or <4 x i8> %d, %e531 store <4 x i8> %s, ptr %p1532 ret void533}534 535define void @xor_v4i8(ptr %p1, ptr %p2) {536; CHECK-SD-LABEL: xor_v4i8:537; CHECK-SD: // %bb.0: // %entry538; CHECK-SD-NEXT: ldr s0, [x0]539; CHECK-SD-NEXT: ldr s1, [x1]540; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b541; CHECK-SD-NEXT: zip1 v1.8b, v1.8b, v1.8b542; CHECK-SD-NEXT: eor v0.8b, v0.8b, v1.8b543; CHECK-SD-NEXT: uzp1 v0.8b, v0.8b, v0.8b544; CHECK-SD-NEXT: str s0, [x0]545; CHECK-SD-NEXT: ret546;547; CHECK-GI-LABEL: xor_v4i8:548; CHECK-GI: // %bb.0: // %entry549; CHECK-GI-NEXT: ldr w8, [x0]550; CHECK-GI-NEXT: ldr w9, [x1]551; CHECK-GI-NEXT: fmov s0, w8552; CHECK-GI-NEXT: fmov s1, w9553; CHECK-GI-NEXT: mov b2, v0.b[1]554; CHECK-GI-NEXT: mov b3, v1.b[1]555; CHECK-GI-NEXT: mov b4, v0.b[2]556; CHECK-GI-NEXT: mov b5, v0.b[3]557; CHECK-GI-NEXT: fmov w8, s2558; CHECK-GI-NEXT: mov b2, v1.b[2]559; CHECK-GI-NEXT: fmov w9, s3560; CHECK-GI-NEXT: mov b3, v1.b[3]561; CHECK-GI-NEXT: mov v0.h[1], w8562; CHECK-GI-NEXT: mov v1.h[1], w9563; CHECK-GI-NEXT: fmov w8, s4564; CHECK-GI-NEXT: fmov w9, s2565; CHECK-GI-NEXT: mov v0.h[2], w8566; CHECK-GI-NEXT: mov v1.h[2], w9567; CHECK-GI-NEXT: fmov w8, s5568; CHECK-GI-NEXT: fmov w9, s3569; CHECK-GI-NEXT: mov v0.h[3], w8570; CHECK-GI-NEXT: mov v1.h[3], w9571; CHECK-GI-NEXT: eor v0.8b, v0.8b, v1.8b572; CHECK-GI-NEXT: uzp1 v0.8b, v0.8b, v0.8b573; CHECK-GI-NEXT: fmov w8, s0574; CHECK-GI-NEXT: str w8, [x0]575; CHECK-GI-NEXT: ret576entry:577 %d = load <4 x i8>, ptr %p1578 %e = load <4 x i8>, ptr %p2579 %s = xor <4 x i8> %d, %e580 store <4 x i8> %s, ptr %p1581 ret void582}583 584define <8 x i8> @and_v8i8(<8 x i8> %d, <8 x i8> %e) {585; CHECK-LABEL: and_v8i8:586; CHECK: // %bb.0: // %entry587; CHECK-NEXT: and v0.8b, v0.8b, v1.8b588; CHECK-NEXT: ret589entry:590 %s = and <8 x i8> %d, %e591 ret <8 x i8> %s592}593 594define <8 x i8> @or_v8i8(<8 x i8> %d, <8 x i8> %e) {595; CHECK-LABEL: or_v8i8:596; CHECK: // %bb.0: // %entry597; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b598; CHECK-NEXT: ret599entry:600 %s = or <8 x i8> %d, %e601 ret <8 x i8> %s602}603 604define <8 x i8> @xor_v8i8(<8 x i8> %d, <8 x i8> %e) {605; CHECK-LABEL: xor_v8i8:606; CHECK: // %bb.0: // %entry607; CHECK-NEXT: eor v0.8b, v0.8b, v1.8b608; CHECK-NEXT: ret609entry:610 %s = xor <8 x i8> %d, %e611 ret <8 x i8> %s612}613 614define <16 x i8> @and_v16i8(<16 x i8> %d, <16 x i8> %e) {615; CHECK-LABEL: and_v16i8:616; CHECK: // %bb.0: // %entry617; CHECK-NEXT: and v0.16b, v0.16b, v1.16b618; CHECK-NEXT: ret619entry:620 %s = and <16 x i8> %d, %e621 ret <16 x i8> %s622}623 624define <16 x i8> @or_v16i8(<16 x i8> %d, <16 x i8> %e) {625; CHECK-LABEL: or_v16i8:626; CHECK: // %bb.0: // %entry627; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b628; CHECK-NEXT: ret629entry:630 %s = or <16 x i8> %d, %e631 ret <16 x i8> %s632}633 634define <16 x i8> @xor_v16i8(<16 x i8> %d, <16 x i8> %e) {635; CHECK-LABEL: xor_v16i8:636; CHECK: // %bb.0: // %entry637; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b638; CHECK-NEXT: ret639entry:640 %s = xor <16 x i8> %d, %e641 ret <16 x i8> %s642}643 644define <32 x i8> @and_v32i8(<32 x i8> %d, <32 x i8> %e) {645; CHECK-SD-LABEL: and_v32i8:646; CHECK-SD: // %bb.0: // %entry647; CHECK-SD-NEXT: and v1.16b, v1.16b, v3.16b648; CHECK-SD-NEXT: and v0.16b, v0.16b, v2.16b649; CHECK-SD-NEXT: ret650;651; CHECK-GI-LABEL: and_v32i8:652; CHECK-GI: // %bb.0: // %entry653; CHECK-GI-NEXT: and v0.16b, v0.16b, v2.16b654; CHECK-GI-NEXT: and v1.16b, v1.16b, v3.16b655; CHECK-GI-NEXT: ret656entry:657 %s = and <32 x i8> %d, %e658 ret <32 x i8> %s659}660 661define <32 x i8> @or_v32i8(<32 x i8> %d, <32 x i8> %e) {662; CHECK-SD-LABEL: or_v32i8:663; CHECK-SD: // %bb.0: // %entry664; CHECK-SD-NEXT: orr v1.16b, v1.16b, v3.16b665; CHECK-SD-NEXT: orr v0.16b, v0.16b, v2.16b666; CHECK-SD-NEXT: ret667;668; CHECK-GI-LABEL: or_v32i8:669; CHECK-GI: // %bb.0: // %entry670; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b671; CHECK-GI-NEXT: orr v1.16b, v1.16b, v3.16b672; CHECK-GI-NEXT: ret673entry:674 %s = or <32 x i8> %d, %e675 ret <32 x i8> %s676}677 678define <32 x i8> @xor_v32i8(<32 x i8> %d, <32 x i8> %e) {679; CHECK-SD-LABEL: xor_v32i8:680; CHECK-SD: // %bb.0: // %entry681; CHECK-SD-NEXT: eor v1.16b, v1.16b, v3.16b682; CHECK-SD-NEXT: eor v0.16b, v0.16b, v2.16b683; CHECK-SD-NEXT: ret684;685; CHECK-GI-LABEL: xor_v32i8:686; CHECK-GI: // %bb.0: // %entry687; CHECK-GI-NEXT: eor v0.16b, v0.16b, v2.16b688; CHECK-GI-NEXT: eor v1.16b, v1.16b, v3.16b689; CHECK-GI-NEXT: ret690entry:691 %s = xor <32 x i8> %d, %e692 ret <32 x i8> %s693}694 695define void @and_v2i16(ptr %p1, ptr %p2) {696; CHECK-SD-LABEL: and_v2i16:697; CHECK-SD: // %bb.0: // %entry698; CHECK-SD-NEXT: ldr s0, [x0]699; CHECK-SD-NEXT: ldr s1, [x1]700; CHECK-SD-NEXT: zip1 v0.4h, v0.4h, v0.4h701; CHECK-SD-NEXT: ushll v1.4s, v1.4h, #0702; CHECK-SD-NEXT: and v0.8b, v0.8b, v1.8b703; CHECK-SD-NEXT: mov s1, v0.s[1]704; CHECK-SD-NEXT: str h0, [x0]705; CHECK-SD-NEXT: str h1, [x0, #2]706; CHECK-SD-NEXT: ret707;708; CHECK-GI-LABEL: and_v2i16:709; CHECK-GI: // %bb.0: // %entry710; CHECK-GI-NEXT: ld1 { v0.h }[0], [x0]711; CHECK-GI-NEXT: ld1 { v1.h }[0], [x1]712; CHECK-GI-NEXT: ldr h2, [x0, #2]713; CHECK-GI-NEXT: ldr h3, [x1, #2]714; CHECK-GI-NEXT: mov v0.s[1], v2.s[0]715; CHECK-GI-NEXT: mov v1.s[1], v3.s[0]716; CHECK-GI-NEXT: and v0.8b, v0.8b, v1.8b717; CHECK-GI-NEXT: mov s1, v0.s[1]718; CHECK-GI-NEXT: str h0, [x0]719; CHECK-GI-NEXT: str h1, [x0, #2]720; CHECK-GI-NEXT: ret721entry:722 %d = load <2 x i16>, ptr %p1723 %e = load <2 x i16>, ptr %p2724 %s = and <2 x i16> %d, %e725 store <2 x i16> %s, ptr %p1726 ret void727}728 729define void @or_v2i16(ptr %p1, ptr %p2) {730; CHECK-SD-LABEL: or_v2i16:731; CHECK-SD: // %bb.0: // %entry732; CHECK-SD-NEXT: ldr s0, [x0]733; CHECK-SD-NEXT: ldr s1, [x1]734; CHECK-SD-NEXT: ushll v0.4s, v0.4h, #0735; CHECK-SD-NEXT: ushll v1.4s, v1.4h, #0736; CHECK-SD-NEXT: orr v0.8b, v0.8b, v1.8b737; CHECK-SD-NEXT: mov s1, v0.s[1]738; CHECK-SD-NEXT: str h0, [x0]739; CHECK-SD-NEXT: str h1, [x0, #2]740; CHECK-SD-NEXT: ret741;742; CHECK-GI-LABEL: or_v2i16:743; CHECK-GI: // %bb.0: // %entry744; CHECK-GI-NEXT: ld1 { v0.h }[0], [x0]745; CHECK-GI-NEXT: ld1 { v1.h }[0], [x1]746; CHECK-GI-NEXT: ldr h2, [x0, #2]747; CHECK-GI-NEXT: ldr h3, [x1, #2]748; CHECK-GI-NEXT: mov v0.s[1], v2.s[0]749; CHECK-GI-NEXT: mov v1.s[1], v3.s[0]750; CHECK-GI-NEXT: orr v0.8b, v0.8b, v1.8b751; CHECK-GI-NEXT: mov s1, v0.s[1]752; CHECK-GI-NEXT: str h0, [x0]753; CHECK-GI-NEXT: str h1, [x0, #2]754; CHECK-GI-NEXT: ret755entry:756 %d = load <2 x i16>, ptr %p1757 %e = load <2 x i16>, ptr %p2758 %s = or <2 x i16> %d, %e759 store <2 x i16> %s, ptr %p1760 ret void761}762 763define void @xor_v2i16(ptr %p1, ptr %p2) {764; CHECK-SD-LABEL: xor_v2i16:765; CHECK-SD: // %bb.0: // %entry766; CHECK-SD-NEXT: ldr s0, [x0]767; CHECK-SD-NEXT: ldr s1, [x1]768; CHECK-SD-NEXT: ushll v0.4s, v0.4h, #0769; CHECK-SD-NEXT: ushll v1.4s, v1.4h, #0770; CHECK-SD-NEXT: eor v0.8b, v0.8b, v1.8b771; CHECK-SD-NEXT: mov s1, v0.s[1]772; CHECK-SD-NEXT: str h0, [x0]773; CHECK-SD-NEXT: str h1, [x0, #2]774; CHECK-SD-NEXT: ret775;776; CHECK-GI-LABEL: xor_v2i16:777; CHECK-GI: // %bb.0: // %entry778; CHECK-GI-NEXT: ld1 { v0.h }[0], [x0]779; CHECK-GI-NEXT: ld1 { v1.h }[0], [x1]780; CHECK-GI-NEXT: ldr h2, [x0, #2]781; CHECK-GI-NEXT: ldr h3, [x1, #2]782; CHECK-GI-NEXT: mov v0.s[1], v2.s[0]783; CHECK-GI-NEXT: mov v1.s[1], v3.s[0]784; CHECK-GI-NEXT: eor v0.8b, v0.8b, v1.8b785; CHECK-GI-NEXT: mov s1, v0.s[1]786; CHECK-GI-NEXT: str h0, [x0]787; CHECK-GI-NEXT: str h1, [x0, #2]788; CHECK-GI-NEXT: ret789entry:790 %d = load <2 x i16>, ptr %p1791 %e = load <2 x i16>, ptr %p2792 %s = xor <2 x i16> %d, %e793 store <2 x i16> %s, ptr %p1794 ret void795}796 797define void @and_v3i16(ptr %p1, ptr %p2) {798; CHECK-SD-LABEL: and_v3i16:799; CHECK-SD: // %bb.0: // %entry800; CHECK-SD-NEXT: ldr x8, [x0]801; CHECK-SD-NEXT: ldr x9, [x1]802; CHECK-SD-NEXT: and x8, x8, x9803; CHECK-SD-NEXT: fmov d0, x8804; CHECK-SD-NEXT: str w8, [x0]805; CHECK-SD-NEXT: mov h0, v0.h[2]806; CHECK-SD-NEXT: str h0, [x0, #4]807; CHECK-SD-NEXT: ret808;809; CHECK-GI-LABEL: and_v3i16:810; CHECK-GI: // %bb.0: // %entry811; CHECK-GI-NEXT: ldr d0, [x0]812; CHECK-GI-NEXT: ldr d1, [x1]813; CHECK-GI-NEXT: add x8, x0, #2814; CHECK-GI-NEXT: add x9, x0, #4815; CHECK-GI-NEXT: and v0.8b, v0.8b, v1.8b816; CHECK-GI-NEXT: str h0, [x0]817; CHECK-GI-NEXT: st1 { v0.h }[1], [x8]818; CHECK-GI-NEXT: st1 { v0.h }[2], [x9]819; CHECK-GI-NEXT: ret820entry:821 %d = load <3 x i16>, ptr %p1822 %e = load <3 x i16>, ptr %p2823 %s = and <3 x i16> %d, %e824 store <3 x i16> %s, ptr %p1825 ret void826}827 828define void @or_v3i16(ptr %p1, ptr %p2) {829; CHECK-SD-LABEL: or_v3i16:830; CHECK-SD: // %bb.0: // %entry831; CHECK-SD-NEXT: ldr x8, [x0]832; CHECK-SD-NEXT: ldr x9, [x1]833; CHECK-SD-NEXT: orr x8, x8, x9834; CHECK-SD-NEXT: fmov d0, x8835; CHECK-SD-NEXT: str w8, [x0]836; CHECK-SD-NEXT: mov h0, v0.h[2]837; CHECK-SD-NEXT: str h0, [x0, #4]838; CHECK-SD-NEXT: ret839;840; CHECK-GI-LABEL: or_v3i16:841; CHECK-GI: // %bb.0: // %entry842; CHECK-GI-NEXT: ldr d0, [x0]843; CHECK-GI-NEXT: ldr d1, [x1]844; CHECK-GI-NEXT: add x8, x0, #2845; CHECK-GI-NEXT: add x9, x0, #4846; CHECK-GI-NEXT: orr v0.8b, v0.8b, v1.8b847; CHECK-GI-NEXT: str h0, [x0]848; CHECK-GI-NEXT: st1 { v0.h }[1], [x8]849; CHECK-GI-NEXT: st1 { v0.h }[2], [x9]850; CHECK-GI-NEXT: ret851entry:852 %d = load <3 x i16>, ptr %p1853 %e = load <3 x i16>, ptr %p2854 %s = or <3 x i16> %d, %e855 store <3 x i16> %s, ptr %p1856 ret void857}858 859define void @xor_v3i16(ptr %p1, ptr %p2) {860; CHECK-SD-LABEL: xor_v3i16:861; CHECK-SD: // %bb.0: // %entry862; CHECK-SD-NEXT: ldr x8, [x0]863; CHECK-SD-NEXT: ldr x9, [x1]864; CHECK-SD-NEXT: eor x8, x8, x9865; CHECK-SD-NEXT: fmov d0, x8866; CHECK-SD-NEXT: str w8, [x0]867; CHECK-SD-NEXT: mov h0, v0.h[2]868; CHECK-SD-NEXT: str h0, [x0, #4]869; CHECK-SD-NEXT: ret870;871; CHECK-GI-LABEL: xor_v3i16:872; CHECK-GI: // %bb.0: // %entry873; CHECK-GI-NEXT: ldr d0, [x0]874; CHECK-GI-NEXT: ldr d1, [x1]875; CHECK-GI-NEXT: add x8, x0, #2876; CHECK-GI-NEXT: add x9, x0, #4877; CHECK-GI-NEXT: eor v0.8b, v0.8b, v1.8b878; CHECK-GI-NEXT: str h0, [x0]879; CHECK-GI-NEXT: st1 { v0.h }[1], [x8]880; CHECK-GI-NEXT: st1 { v0.h }[2], [x9]881; CHECK-GI-NEXT: ret882entry:883 %d = load <3 x i16>, ptr %p1884 %e = load <3 x i16>, ptr %p2885 %s = xor <3 x i16> %d, %e886 store <3 x i16> %s, ptr %p1887 ret void888}889 890define <4 x i16> @and_v4i16(<4 x i16> %d, <4 x i16> %e) {891; CHECK-LABEL: and_v4i16:892; CHECK: // %bb.0: // %entry893; CHECK-NEXT: and v0.8b, v0.8b, v1.8b894; CHECK-NEXT: ret895entry:896 %s = and <4 x i16> %d, %e897 ret <4 x i16> %s898}899 900define <4 x i16> @or_v4i16(<4 x i16> %d, <4 x i16> %e) {901; CHECK-LABEL: or_v4i16:902; CHECK: // %bb.0: // %entry903; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b904; CHECK-NEXT: ret905entry:906 %s = or <4 x i16> %d, %e907 ret <4 x i16> %s908}909 910define <4 x i16> @xor_v4i16(<4 x i16> %d, <4 x i16> %e) {911; CHECK-LABEL: xor_v4i16:912; CHECK: // %bb.0: // %entry913; CHECK-NEXT: eor v0.8b, v0.8b, v1.8b914; CHECK-NEXT: ret915entry:916 %s = xor <4 x i16> %d, %e917 ret <4 x i16> %s918}919 920define <8 x i16> @and_v8i16(<8 x i16> %d, <8 x i16> %e) {921; CHECK-LABEL: and_v8i16:922; CHECK: // %bb.0: // %entry923; CHECK-NEXT: and v0.16b, v0.16b, v1.16b924; CHECK-NEXT: ret925entry:926 %s = and <8 x i16> %d, %e927 ret <8 x i16> %s928}929 930define <8 x i16> @or_v8i16(<8 x i16> %d, <8 x i16> %e) {931; CHECK-LABEL: or_v8i16:932; CHECK: // %bb.0: // %entry933; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b934; CHECK-NEXT: ret935entry:936 %s = or <8 x i16> %d, %e937 ret <8 x i16> %s938}939 940define <8 x i16> @xor_v8i16(<8 x i16> %d, <8 x i16> %e) {941; CHECK-LABEL: xor_v8i16:942; CHECK: // %bb.0: // %entry943; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b944; CHECK-NEXT: ret945entry:946 %s = xor <8 x i16> %d, %e947 ret <8 x i16> %s948}949 950define <16 x i16> @and_v16i16(<16 x i16> %d, <16 x i16> %e) {951; CHECK-SD-LABEL: and_v16i16:952; CHECK-SD: // %bb.0: // %entry953; CHECK-SD-NEXT: and v1.16b, v1.16b, v3.16b954; CHECK-SD-NEXT: and v0.16b, v0.16b, v2.16b955; CHECK-SD-NEXT: ret956;957; CHECK-GI-LABEL: and_v16i16:958; CHECK-GI: // %bb.0: // %entry959; CHECK-GI-NEXT: and v0.16b, v0.16b, v2.16b960; CHECK-GI-NEXT: and v1.16b, v1.16b, v3.16b961; CHECK-GI-NEXT: ret962entry:963 %s = and <16 x i16> %d, %e964 ret <16 x i16> %s965}966 967define <16 x i16> @or_v16i16(<16 x i16> %d, <16 x i16> %e) {968; CHECK-SD-LABEL: or_v16i16:969; CHECK-SD: // %bb.0: // %entry970; CHECK-SD-NEXT: orr v1.16b, v1.16b, v3.16b971; CHECK-SD-NEXT: orr v0.16b, v0.16b, v2.16b972; CHECK-SD-NEXT: ret973;974; CHECK-GI-LABEL: or_v16i16:975; CHECK-GI: // %bb.0: // %entry976; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b977; CHECK-GI-NEXT: orr v1.16b, v1.16b, v3.16b978; CHECK-GI-NEXT: ret979entry:980 %s = or <16 x i16> %d, %e981 ret <16 x i16> %s982}983 984define <16 x i16> @xor_v16i16(<16 x i16> %d, <16 x i16> %e) {985; CHECK-SD-LABEL: xor_v16i16:986; CHECK-SD: // %bb.0: // %entry987; CHECK-SD-NEXT: eor v1.16b, v1.16b, v3.16b988; CHECK-SD-NEXT: eor v0.16b, v0.16b, v2.16b989; CHECK-SD-NEXT: ret990;991; CHECK-GI-LABEL: xor_v16i16:992; CHECK-GI: // %bb.0: // %entry993; CHECK-GI-NEXT: eor v0.16b, v0.16b, v2.16b994; CHECK-GI-NEXT: eor v1.16b, v1.16b, v3.16b995; CHECK-GI-NEXT: ret996entry:997 %s = xor <16 x i16> %d, %e998 ret <16 x i16> %s999}1000 1001define <2 x i32> @and_v2i32(<2 x i32> %d, <2 x i32> %e) {1002; CHECK-LABEL: and_v2i32:1003; CHECK: // %bb.0: // %entry1004; CHECK-NEXT: and v0.8b, v0.8b, v1.8b1005; CHECK-NEXT: ret1006entry:1007 %s = and <2 x i32> %d, %e1008 ret <2 x i32> %s1009}1010 1011define <2 x i32> @or_v2i32(<2 x i32> %d, <2 x i32> %e) {1012; CHECK-LABEL: or_v2i32:1013; CHECK: // %bb.0: // %entry1014; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b1015; CHECK-NEXT: ret1016entry:1017 %s = or <2 x i32> %d, %e1018 ret <2 x i32> %s1019}1020 1021define <2 x i32> @xor_v2i32(<2 x i32> %d, <2 x i32> %e) {1022; CHECK-LABEL: xor_v2i32:1023; CHECK: // %bb.0: // %entry1024; CHECK-NEXT: eor v0.8b, v0.8b, v1.8b1025; CHECK-NEXT: ret1026entry:1027 %s = xor <2 x i32> %d, %e1028 ret <2 x i32> %s1029}1030 1031define <3 x i32> @and_v3i32(<3 x i32> %d, <3 x i32> %e) {1032; CHECK-LABEL: and_v3i32:1033; CHECK: // %bb.0: // %entry1034; CHECK-NEXT: and v0.16b, v0.16b, v1.16b1035; CHECK-NEXT: ret1036entry:1037 %s = and <3 x i32> %d, %e1038 ret <3 x i32> %s1039}1040 1041define <3 x i32> @or_v3i32(<3 x i32> %d, <3 x i32> %e) {1042; CHECK-LABEL: or_v3i32:1043; CHECK: // %bb.0: // %entry1044; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b1045; CHECK-NEXT: ret1046entry:1047 %s = or <3 x i32> %d, %e1048 ret <3 x i32> %s1049}1050 1051define <3 x i32> @xor_v3i32(<3 x i32> %d, <3 x i32> %e) {1052; CHECK-LABEL: xor_v3i32:1053; CHECK: // %bb.0: // %entry1054; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b1055; CHECK-NEXT: ret1056entry:1057 %s = xor <3 x i32> %d, %e1058 ret <3 x i32> %s1059}1060 1061define <4 x i32> @and_v4i32(<4 x i32> %d, <4 x i32> %e) {1062; CHECK-LABEL: and_v4i32:1063; CHECK: // %bb.0: // %entry1064; CHECK-NEXT: and v0.16b, v0.16b, v1.16b1065; CHECK-NEXT: ret1066entry:1067 %s = and <4 x i32> %d, %e1068 ret <4 x i32> %s1069}1070 1071define <4 x i32> @or_v4i32(<4 x i32> %d, <4 x i32> %e) {1072; CHECK-LABEL: or_v4i32:1073; CHECK: // %bb.0: // %entry1074; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b1075; CHECK-NEXT: ret1076entry:1077 %s = or <4 x i32> %d, %e1078 ret <4 x i32> %s1079}1080 1081define <4 x i32> @xor_v4i32(<4 x i32> %d, <4 x i32> %e) {1082; CHECK-LABEL: xor_v4i32:1083; CHECK: // %bb.0: // %entry1084; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b1085; CHECK-NEXT: ret1086entry:1087 %s = xor <4 x i32> %d, %e1088 ret <4 x i32> %s1089}1090 1091define <8 x i32> @and_v8i32(<8 x i32> %d, <8 x i32> %e) {1092; CHECK-SD-LABEL: and_v8i32:1093; CHECK-SD: // %bb.0: // %entry1094; CHECK-SD-NEXT: and v1.16b, v1.16b, v3.16b1095; CHECK-SD-NEXT: and v0.16b, v0.16b, v2.16b1096; CHECK-SD-NEXT: ret1097;1098; CHECK-GI-LABEL: and_v8i32:1099; CHECK-GI: // %bb.0: // %entry1100; CHECK-GI-NEXT: and v0.16b, v0.16b, v2.16b1101; CHECK-GI-NEXT: and v1.16b, v1.16b, v3.16b1102; CHECK-GI-NEXT: ret1103entry:1104 %s = and <8 x i32> %d, %e1105 ret <8 x i32> %s1106}1107 1108define <8 x i32> @or_v8i32(<8 x i32> %d, <8 x i32> %e) {1109; CHECK-SD-LABEL: or_v8i32:1110; CHECK-SD: // %bb.0: // %entry1111; CHECK-SD-NEXT: orr v1.16b, v1.16b, v3.16b1112; CHECK-SD-NEXT: orr v0.16b, v0.16b, v2.16b1113; CHECK-SD-NEXT: ret1114;1115; CHECK-GI-LABEL: or_v8i32:1116; CHECK-GI: // %bb.0: // %entry1117; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b1118; CHECK-GI-NEXT: orr v1.16b, v1.16b, v3.16b1119; CHECK-GI-NEXT: ret1120entry:1121 %s = or <8 x i32> %d, %e1122 ret <8 x i32> %s1123}1124 1125define <8 x i32> @xor_v8i32(<8 x i32> %d, <8 x i32> %e) {1126; CHECK-SD-LABEL: xor_v8i32:1127; CHECK-SD: // %bb.0: // %entry1128; CHECK-SD-NEXT: eor v1.16b, v1.16b, v3.16b1129; CHECK-SD-NEXT: eor v0.16b, v0.16b, v2.16b1130; CHECK-SD-NEXT: ret1131;1132; CHECK-GI-LABEL: xor_v8i32:1133; CHECK-GI: // %bb.0: // %entry1134; CHECK-GI-NEXT: eor v0.16b, v0.16b, v2.16b1135; CHECK-GI-NEXT: eor v1.16b, v1.16b, v3.16b1136; CHECK-GI-NEXT: ret1137entry:1138 %s = xor <8 x i32> %d, %e1139 ret <8 x i32> %s1140}1141 1142define <2 x i64> @and_v2i64(<2 x i64> %d, <2 x i64> %e) {1143; CHECK-LABEL: and_v2i64:1144; CHECK: // %bb.0: // %entry1145; CHECK-NEXT: and v0.16b, v0.16b, v1.16b1146; CHECK-NEXT: ret1147entry:1148 %s = and <2 x i64> %d, %e1149 ret <2 x i64> %s1150}1151 1152define <2 x i64> @or_v2i64(<2 x i64> %d, <2 x i64> %e) {1153; CHECK-LABEL: or_v2i64:1154; CHECK: // %bb.0: // %entry1155; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b1156; CHECK-NEXT: ret1157entry:1158 %s = or <2 x i64> %d, %e1159 ret <2 x i64> %s1160}1161 1162define <2 x i64> @xor_v2i64(<2 x i64> %d, <2 x i64> %e) {1163; CHECK-LABEL: xor_v2i64:1164; CHECK: // %bb.0: // %entry1165; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b1166; CHECK-NEXT: ret1167entry:1168 %s = xor <2 x i64> %d, %e1169 ret <2 x i64> %s1170}1171 1172define <3 x i64> @and_v3i64(<3 x i64> %d, <3 x i64> %e) {1173; CHECK-SD-LABEL: and_v3i64:1174; CHECK-SD: // %bb.0: // %entry1175; CHECK-SD-NEXT: and v0.8b, v0.8b, v3.8b1176; CHECK-SD-NEXT: and v1.8b, v1.8b, v4.8b1177; CHECK-SD-NEXT: and v2.8b, v2.8b, v5.8b1178; CHECK-SD-NEXT: ret1179;1180; CHECK-GI-LABEL: and_v3i64:1181; CHECK-GI: // %bb.0: // %entry1182; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q01183; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q31184; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q11185; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q41186; CHECK-GI-NEXT: fmov x8, d21187; CHECK-GI-NEXT: fmov x9, d51188; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]1189; CHECK-GI-NEXT: mov v3.d[1], v4.d[0]1190; CHECK-GI-NEXT: and x8, x8, x91191; CHECK-GI-NEXT: fmov d2, x81192; CHECK-GI-NEXT: and v0.16b, v0.16b, v3.16b1193; CHECK-GI-NEXT: mov d1, v0.d[1]1194; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q01195; CHECK-GI-NEXT: ret1196entry:1197 %s = and <3 x i64> %d, %e1198 ret <3 x i64> %s1199}1200 1201define <3 x i64> @or_v3i64(<3 x i64> %d, <3 x i64> %e) {1202; CHECK-SD-LABEL: or_v3i64:1203; CHECK-SD: // %bb.0: // %entry1204; CHECK-SD-NEXT: orr v0.8b, v0.8b, v3.8b1205; CHECK-SD-NEXT: orr v1.8b, v1.8b, v4.8b1206; CHECK-SD-NEXT: orr v2.8b, v2.8b, v5.8b1207; CHECK-SD-NEXT: ret1208;1209; CHECK-GI-LABEL: or_v3i64:1210; CHECK-GI: // %bb.0: // %entry1211; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q01212; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q31213; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q11214; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q41215; CHECK-GI-NEXT: fmov x8, d21216; CHECK-GI-NEXT: fmov x9, d51217; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]1218; CHECK-GI-NEXT: mov v3.d[1], v4.d[0]1219; CHECK-GI-NEXT: orr x8, x8, x91220; CHECK-GI-NEXT: fmov d2, x81221; CHECK-GI-NEXT: orr v0.16b, v0.16b, v3.16b1222; CHECK-GI-NEXT: mov d1, v0.d[1]1223; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q01224; CHECK-GI-NEXT: ret1225entry:1226 %s = or <3 x i64> %d, %e1227 ret <3 x i64> %s1228}1229 1230define <3 x i64> @xor_v3i64(<3 x i64> %d, <3 x i64> %e) {1231; CHECK-SD-LABEL: xor_v3i64:1232; CHECK-SD: // %bb.0: // %entry1233; CHECK-SD-NEXT: eor v0.8b, v0.8b, v3.8b1234; CHECK-SD-NEXT: eor v1.8b, v1.8b, v4.8b1235; CHECK-SD-NEXT: eor v2.8b, v2.8b, v5.8b1236; CHECK-SD-NEXT: ret1237;1238; CHECK-GI-LABEL: xor_v3i64:1239; CHECK-GI: // %bb.0: // %entry1240; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q01241; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q31242; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q11243; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q41244; CHECK-GI-NEXT: fmov x8, d21245; CHECK-GI-NEXT: fmov x9, d51246; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]1247; CHECK-GI-NEXT: mov v3.d[1], v4.d[0]1248; CHECK-GI-NEXT: eor x8, x8, x91249; CHECK-GI-NEXT: fmov d2, x81250; CHECK-GI-NEXT: eor v0.16b, v0.16b, v3.16b1251; CHECK-GI-NEXT: mov d1, v0.d[1]1252; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q01253; CHECK-GI-NEXT: ret1254entry:1255 %s = xor <3 x i64> %d, %e1256 ret <3 x i64> %s1257}1258 1259define <4 x i64> @and_v4i64(<4 x i64> %d, <4 x i64> %e) {1260; CHECK-SD-LABEL: and_v4i64:1261; CHECK-SD: // %bb.0: // %entry1262; CHECK-SD-NEXT: and v1.16b, v1.16b, v3.16b1263; CHECK-SD-NEXT: and v0.16b, v0.16b, v2.16b1264; CHECK-SD-NEXT: ret1265;1266; CHECK-GI-LABEL: and_v4i64:1267; CHECK-GI: // %bb.0: // %entry1268; CHECK-GI-NEXT: and v0.16b, v0.16b, v2.16b1269; CHECK-GI-NEXT: and v1.16b, v1.16b, v3.16b1270; CHECK-GI-NEXT: ret1271entry:1272 %s = and <4 x i64> %d, %e1273 ret <4 x i64> %s1274}1275 1276define <4 x i64> @or_v4i64(<4 x i64> %d, <4 x i64> %e) {1277; CHECK-SD-LABEL: or_v4i64:1278; CHECK-SD: // %bb.0: // %entry1279; CHECK-SD-NEXT: orr v1.16b, v1.16b, v3.16b1280; CHECK-SD-NEXT: orr v0.16b, v0.16b, v2.16b1281; CHECK-SD-NEXT: ret1282;1283; CHECK-GI-LABEL: or_v4i64:1284; CHECK-GI: // %bb.0: // %entry1285; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b1286; CHECK-GI-NEXT: orr v1.16b, v1.16b, v3.16b1287; CHECK-GI-NEXT: ret1288entry:1289 %s = or <4 x i64> %d, %e1290 ret <4 x i64> %s1291}1292 1293define <4 x i64> @xor_v4i64(<4 x i64> %d, <4 x i64> %e) {1294; CHECK-SD-LABEL: xor_v4i64:1295; CHECK-SD: // %bb.0: // %entry1296; CHECK-SD-NEXT: eor v1.16b, v1.16b, v3.16b1297; CHECK-SD-NEXT: eor v0.16b, v0.16b, v2.16b1298; CHECK-SD-NEXT: ret1299;1300; CHECK-GI-LABEL: xor_v4i64:1301; CHECK-GI: // %bb.0: // %entry1302; CHECK-GI-NEXT: eor v0.16b, v0.16b, v2.16b1303; CHECK-GI-NEXT: eor v1.16b, v1.16b, v3.16b1304; CHECK-GI-NEXT: ret1305entry:1306 %s = xor <4 x i64> %d, %e1307 ret <4 x i64> %s1308}1309 1310define <2 x i128> @and_v2i128(<2 x i128> %d, <2 x i128> %e) {1311; CHECK-SD-LABEL: and_v2i128:1312; CHECK-SD: // %bb.0: // %entry1313; CHECK-SD-NEXT: and x2, x2, x61314; CHECK-SD-NEXT: and x0, x0, x41315; CHECK-SD-NEXT: and x1, x1, x51316; CHECK-SD-NEXT: and x3, x3, x71317; CHECK-SD-NEXT: ret1318;1319; CHECK-GI-LABEL: and_v2i128:1320; CHECK-GI: // %bb.0: // %entry1321; CHECK-GI-NEXT: and x0, x0, x41322; CHECK-GI-NEXT: and x1, x1, x51323; CHECK-GI-NEXT: and x2, x2, x61324; CHECK-GI-NEXT: and x3, x3, x71325; CHECK-GI-NEXT: ret1326entry:1327 %s = and <2 x i128> %d, %e1328 ret <2 x i128> %s1329}1330 1331define <2 x i128> @or_v2i128(<2 x i128> %d, <2 x i128> %e) {1332; CHECK-SD-LABEL: or_v2i128:1333; CHECK-SD: // %bb.0: // %entry1334; CHECK-SD-NEXT: orr x2, x2, x61335; CHECK-SD-NEXT: orr x0, x0, x41336; CHECK-SD-NEXT: orr x1, x1, x51337; CHECK-SD-NEXT: orr x3, x3, x71338; CHECK-SD-NEXT: ret1339;1340; CHECK-GI-LABEL: or_v2i128:1341; CHECK-GI: // %bb.0: // %entry1342; CHECK-GI-NEXT: orr x0, x0, x41343; CHECK-GI-NEXT: orr x1, x1, x51344; CHECK-GI-NEXT: orr x2, x2, x61345; CHECK-GI-NEXT: orr x3, x3, x71346; CHECK-GI-NEXT: ret1347entry:1348 %s = or <2 x i128> %d, %e1349 ret <2 x i128> %s1350}1351 1352define <2 x i128> @xor_v2i128(<2 x i128> %d, <2 x i128> %e) {1353; CHECK-SD-LABEL: xor_v2i128:1354; CHECK-SD: // %bb.0: // %entry1355; CHECK-SD-NEXT: eor x2, x2, x61356; CHECK-SD-NEXT: eor x0, x0, x41357; CHECK-SD-NEXT: eor x1, x1, x51358; CHECK-SD-NEXT: eor x3, x3, x71359; CHECK-SD-NEXT: ret1360;1361; CHECK-GI-LABEL: xor_v2i128:1362; CHECK-GI: // %bb.0: // %entry1363; CHECK-GI-NEXT: eor x0, x0, x41364; CHECK-GI-NEXT: eor x1, x1, x51365; CHECK-GI-NEXT: eor x2, x2, x61366; CHECK-GI-NEXT: eor x3, x3, x71367; CHECK-GI-NEXT: ret1368entry:1369 %s = xor <2 x i128> %d, %e1370 ret <2 x i128> %s1371}1372 1373define <3 x i128> @and_v3i128(<3 x i128> %d, <3 x i128> %e) {1374; CHECK-SD-LABEL: and_v3i128:1375; CHECK-SD: // %bb.0: // %entry1376; CHECK-SD-NEXT: ldp x8, x9, [sp]1377; CHECK-SD-NEXT: and x0, x0, x61378; CHECK-SD-NEXT: ldp x11, x10, [sp, #16]1379; CHECK-SD-NEXT: and x1, x1, x71380; CHECK-SD-NEXT: and x2, x2, x81381; CHECK-SD-NEXT: and x3, x3, x91382; CHECK-SD-NEXT: and x4, x4, x111383; CHECK-SD-NEXT: and x5, x5, x101384; CHECK-SD-NEXT: ret1385;1386; CHECK-GI-LABEL: and_v3i128:1387; CHECK-GI: // %bb.0: // %entry1388; CHECK-GI-NEXT: ldp x8, x9, [sp]1389; CHECK-GI-NEXT: and x0, x0, x61390; CHECK-GI-NEXT: ldp x10, x11, [sp, #16]1391; CHECK-GI-NEXT: and x1, x1, x71392; CHECK-GI-NEXT: and x2, x2, x81393; CHECK-GI-NEXT: and x3, x3, x91394; CHECK-GI-NEXT: and x4, x4, x101395; CHECK-GI-NEXT: and x5, x5, x111396; CHECK-GI-NEXT: ret1397entry:1398 %s = and <3 x i128> %d, %e1399 ret <3 x i128> %s1400}1401 1402define <3 x i128> @or_v3i128(<3 x i128> %d, <3 x i128> %e) {1403; CHECK-SD-LABEL: or_v3i128:1404; CHECK-SD: // %bb.0: // %entry1405; CHECK-SD-NEXT: ldp x8, x9, [sp]1406; CHECK-SD-NEXT: orr x0, x0, x61407; CHECK-SD-NEXT: ldp x11, x10, [sp, #16]1408; CHECK-SD-NEXT: orr x1, x1, x71409; CHECK-SD-NEXT: orr x2, x2, x81410; CHECK-SD-NEXT: orr x3, x3, x91411; CHECK-SD-NEXT: orr x4, x4, x111412; CHECK-SD-NEXT: orr x5, x5, x101413; CHECK-SD-NEXT: ret1414;1415; CHECK-GI-LABEL: or_v3i128:1416; CHECK-GI: // %bb.0: // %entry1417; CHECK-GI-NEXT: ldp x8, x9, [sp]1418; CHECK-GI-NEXT: orr x0, x0, x61419; CHECK-GI-NEXT: ldp x10, x11, [sp, #16]1420; CHECK-GI-NEXT: orr x1, x1, x71421; CHECK-GI-NEXT: orr x2, x2, x81422; CHECK-GI-NEXT: orr x3, x3, x91423; CHECK-GI-NEXT: orr x4, x4, x101424; CHECK-GI-NEXT: orr x5, x5, x111425; CHECK-GI-NEXT: ret1426entry:1427 %s = or <3 x i128> %d, %e1428 ret <3 x i128> %s1429}1430 1431define <3 x i128> @xor_v3i128(<3 x i128> %d, <3 x i128> %e) {1432; CHECK-SD-LABEL: xor_v3i128:1433; CHECK-SD: // %bb.0: // %entry1434; CHECK-SD-NEXT: ldp x8, x9, [sp]1435; CHECK-SD-NEXT: eor x0, x0, x61436; CHECK-SD-NEXT: ldp x11, x10, [sp, #16]1437; CHECK-SD-NEXT: eor x1, x1, x71438; CHECK-SD-NEXT: eor x2, x2, x81439; CHECK-SD-NEXT: eor x3, x3, x91440; CHECK-SD-NEXT: eor x4, x4, x111441; CHECK-SD-NEXT: eor x5, x5, x101442; CHECK-SD-NEXT: ret1443;1444; CHECK-GI-LABEL: xor_v3i128:1445; CHECK-GI: // %bb.0: // %entry1446; CHECK-GI-NEXT: ldp x8, x9, [sp]1447; CHECK-GI-NEXT: eor x0, x0, x61448; CHECK-GI-NEXT: ldp x10, x11, [sp, #16]1449; CHECK-GI-NEXT: eor x1, x1, x71450; CHECK-GI-NEXT: eor x2, x2, x81451; CHECK-GI-NEXT: eor x3, x3, x91452; CHECK-GI-NEXT: eor x4, x4, x101453; CHECK-GI-NEXT: eor x5, x5, x111454; CHECK-GI-NEXT: ret1455entry:1456 %s = xor <3 x i128> %d, %e1457 ret <3 x i128> %s1458}1459 1460define <4 x i128> @and_v4i128(<4 x i128> %d, <4 x i128> %e) {1461; CHECK-SD-LABEL: and_v4i128:1462; CHECK-SD: // %bb.0: // %entry1463; CHECK-SD-NEXT: ldp x9, x8, [sp, #32]1464; CHECK-SD-NEXT: ldp x11, x10, [sp]1465; CHECK-SD-NEXT: ldp x13, x12, [sp, #16]1466; CHECK-SD-NEXT: ldp x15, x14, [sp, #48]1467; CHECK-SD-NEXT: and x4, x4, x91468; CHECK-SD-NEXT: and x0, x0, x111469; CHECK-SD-NEXT: and x1, x1, x101470; CHECK-SD-NEXT: and x5, x5, x81471; CHECK-SD-NEXT: and x2, x2, x131472; CHECK-SD-NEXT: and x3, x3, x121473; CHECK-SD-NEXT: and x6, x6, x151474; CHECK-SD-NEXT: and x7, x7, x141475; CHECK-SD-NEXT: ret1476;1477; CHECK-GI-LABEL: and_v4i128:1478; CHECK-GI: // %bb.0: // %entry1479; CHECK-GI-NEXT: ldp x8, x9, [sp]1480; CHECK-GI-NEXT: ldp x10, x11, [sp, #16]1481; CHECK-GI-NEXT: ldp x12, x13, [sp, #32]1482; CHECK-GI-NEXT: ldp x14, x15, [sp, #48]1483; CHECK-GI-NEXT: and x0, x0, x81484; CHECK-GI-NEXT: and x1, x1, x91485; CHECK-GI-NEXT: and x2, x2, x101486; CHECK-GI-NEXT: and x3, x3, x111487; CHECK-GI-NEXT: and x4, x4, x121488; CHECK-GI-NEXT: and x5, x5, x131489; CHECK-GI-NEXT: and x6, x6, x141490; CHECK-GI-NEXT: and x7, x7, x151491; CHECK-GI-NEXT: ret1492entry:1493 %s = and <4 x i128> %d, %e1494 ret <4 x i128> %s1495}1496 1497define <4 x i128> @or_v4i128(<4 x i128> %d, <4 x i128> %e) {1498; CHECK-SD-LABEL: or_v4i128:1499; CHECK-SD: // %bb.0: // %entry1500; CHECK-SD-NEXT: ldp x9, x8, [sp, #32]1501; CHECK-SD-NEXT: ldp x11, x10, [sp]1502; CHECK-SD-NEXT: ldp x13, x12, [sp, #16]1503; CHECK-SD-NEXT: ldp x15, x14, [sp, #48]1504; CHECK-SD-NEXT: orr x4, x4, x91505; CHECK-SD-NEXT: orr x0, x0, x111506; CHECK-SD-NEXT: orr x1, x1, x101507; CHECK-SD-NEXT: orr x5, x5, x81508; CHECK-SD-NEXT: orr x2, x2, x131509; CHECK-SD-NEXT: orr x3, x3, x121510; CHECK-SD-NEXT: orr x6, x6, x151511; CHECK-SD-NEXT: orr x7, x7, x141512; CHECK-SD-NEXT: ret1513;1514; CHECK-GI-LABEL: or_v4i128:1515; CHECK-GI: // %bb.0: // %entry1516; CHECK-GI-NEXT: ldp x8, x9, [sp]1517; CHECK-GI-NEXT: ldp x10, x11, [sp, #16]1518; CHECK-GI-NEXT: ldp x12, x13, [sp, #32]1519; CHECK-GI-NEXT: ldp x14, x15, [sp, #48]1520; CHECK-GI-NEXT: orr x0, x0, x81521; CHECK-GI-NEXT: orr x1, x1, x91522; CHECK-GI-NEXT: orr x2, x2, x101523; CHECK-GI-NEXT: orr x3, x3, x111524; CHECK-GI-NEXT: orr x4, x4, x121525; CHECK-GI-NEXT: orr x5, x5, x131526; CHECK-GI-NEXT: orr x6, x6, x141527; CHECK-GI-NEXT: orr x7, x7, x151528; CHECK-GI-NEXT: ret1529entry:1530 %s = or <4 x i128> %d, %e1531 ret <4 x i128> %s1532}1533 1534define <4 x i128> @xor_v4i128(<4 x i128> %d, <4 x i128> %e) {1535; CHECK-SD-LABEL: xor_v4i128:1536; CHECK-SD: // %bb.0: // %entry1537; CHECK-SD-NEXT: ldp x9, x8, [sp, #32]1538; CHECK-SD-NEXT: ldp x11, x10, [sp]1539; CHECK-SD-NEXT: ldp x13, x12, [sp, #16]1540; CHECK-SD-NEXT: ldp x15, x14, [sp, #48]1541; CHECK-SD-NEXT: eor x4, x4, x91542; CHECK-SD-NEXT: eor x0, x0, x111543; CHECK-SD-NEXT: eor x1, x1, x101544; CHECK-SD-NEXT: eor x5, x5, x81545; CHECK-SD-NEXT: eor x2, x2, x131546; CHECK-SD-NEXT: eor x3, x3, x121547; CHECK-SD-NEXT: eor x6, x6, x151548; CHECK-SD-NEXT: eor x7, x7, x141549; CHECK-SD-NEXT: ret1550;1551; CHECK-GI-LABEL: xor_v4i128:1552; CHECK-GI: // %bb.0: // %entry1553; CHECK-GI-NEXT: ldp x8, x9, [sp]1554; CHECK-GI-NEXT: ldp x10, x11, [sp, #16]1555; CHECK-GI-NEXT: ldp x12, x13, [sp, #32]1556; CHECK-GI-NEXT: ldp x14, x15, [sp, #48]1557; CHECK-GI-NEXT: eor x0, x0, x81558; CHECK-GI-NEXT: eor x1, x1, x91559; CHECK-GI-NEXT: eor x2, x2, x101560; CHECK-GI-NEXT: eor x3, x3, x111561; CHECK-GI-NEXT: eor x4, x4, x121562; CHECK-GI-NEXT: eor x5, x5, x131563; CHECK-GI-NEXT: eor x6, x6, x141564; CHECK-GI-NEXT: eor x7, x7, x151565; CHECK-GI-NEXT: ret1566entry:1567 %s = xor <4 x i128> %d, %e1568 ret <4 x i128> %s1569}1570