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1; RUN: llc -aarch64-load-store-renaming=true < %s -mtriple=arm64-apple-darwin -mcpu=cyclone -enable-misched=false -frame-pointer=all | FileCheck %s2; RUN: llc -aarch64-load-store-renaming=true < %s -mtriple=arm64-apple-darwin -O0 -frame-pointer=all -fast-isel | FileCheck -check-prefix=FAST %s3 4; rdar://126484415; Generated from arm64-arguments.c with -O2.6; Test passing structs with size < 8, < 16 and > 167; with alignment of 16 and without8 9; Structs with size < 810%struct.s38 = type { i32, i16 }11; With alignment of 16, the size will be padded to multiple of 16 bytes.12%struct.s39 = type { i32, i16, [10 x i8] }13; Structs with size < 1614%struct.s40 = type { i32, i16, i32, i16 }15%struct.s41 = type { i32, i16, i32, i16 }16; Structs with size > 1617%struct.s42 = type { i32, i16, i32, i16, i32, i16 }18%struct.s43 = type { i32, i16, i32, i16, i32, i16, [10 x i8] }19 20@g38 = common global %struct.s38 zeroinitializer, align 421@g38_2 = common global %struct.s38 zeroinitializer, align 422@g39 = common global %struct.s39 zeroinitializer, align 1623@g39_2 = common global %struct.s39 zeroinitializer, align 1624@g40 = common global %struct.s40 zeroinitializer, align 425@g40_2 = common global %struct.s40 zeroinitializer, align 426@g41 = common global %struct.s41 zeroinitializer, align 1627@g41_2 = common global %struct.s41 zeroinitializer, align 1628@g42 = common global %struct.s42 zeroinitializer, align 429@g42_2 = common global %struct.s42 zeroinitializer, align 430@g43 = common global %struct.s43 zeroinitializer, align 1631@g43_2 = common global %struct.s43 zeroinitializer, align 1632 33; structs with size < 8 bytes, passed via i64 in x1 and x234define i32 @f38(i32 %i, i64 %s1.coerce, i64 %s2.coerce) #0 {35entry:36; CHECK-LABEL: f3837; CHECK: add w[[A:[0-9]+]], w1, w038; CHECK: add {{w[0-9]+}}, w[[A]], w239 %s1.sroa.0.0.extract.trunc = trunc i64 %s1.coerce to i3240 %s1.sroa.1.4.extract.shift = lshr i64 %s1.coerce, 3241 %s2.sroa.0.0.extract.trunc = trunc i64 %s2.coerce to i3242 %s2.sroa.1.4.extract.shift = lshr i64 %s2.coerce, 3243 %sext8 = shl nuw nsw i64 %s1.sroa.1.4.extract.shift, 1644 %sext = trunc i64 %sext8 to i3245 %conv = ashr exact i32 %sext, 1646 %sext1011 = shl nuw nsw i64 %s2.sroa.1.4.extract.shift, 1647 %sext10 = trunc i64 %sext1011 to i3248 %conv6 = ashr exact i32 %sext10, 1649 %add = add i32 %s1.sroa.0.0.extract.trunc, %i50 %add3 = add i32 %add, %s2.sroa.0.0.extract.trunc51 %add4 = add i32 %add3, %conv52 %add7 = add i32 %add4, %conv653 ret i32 %add754}55 56define i32 @caller38() #1 {57entry:58; CHECK-LABEL: caller3859; CHECK: ldr x1,60; CHECK: ldr x2,61 %0 = load i64, ptr @g38, align 462 %1 = load i64, ptr @g38_2, align 463 %call = tail call i32 @f38(i32 3, i64 %0, i64 %1) #564 ret i32 %call65}66 67declare i32 @f38_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6,68 i32 %i7, i32 %i8, i32 %i9, i64 %s1.coerce, i64 %s2.coerce) #069 70; structs with size < 8 bytes, passed on stack at [sp+8] and [sp+16]71; i9 at [sp]72define i32 @caller38_stack() #1 {73entry:74; CHECK-LABEL: caller38_stack75; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #8]76; CHECK: mov w[[C:[0-9]+]], #977; CHECK: str w[[C]], [sp]78 %0 = load i64, ptr @g38, align 479 %1 = load i64, ptr @g38_2, align 480 %call = tail call i32 @f38_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6,81 i32 7, i32 8, i32 9, i64 %0, i64 %1) #582 ret i32 %call83}84 85; structs with size < 8 bytes, alignment of 1686; passed via i128 in x1 and x387define i32 @f39(i32 %i, i128 %s1.coerce, i128 %s2.coerce) #0 {88entry:89; CHECK-LABEL: f3990; CHECK: add w[[A:[0-9]+]], w1, w091; CHECK: add {{w[0-9]+}}, w[[A]], w392 %s1.sroa.0.0.extract.trunc = trunc i128 %s1.coerce to i3293 %s1.sroa.1.4.extract.shift = lshr i128 %s1.coerce, 3294 %s2.sroa.0.0.extract.trunc = trunc i128 %s2.coerce to i3295 %s2.sroa.1.4.extract.shift = lshr i128 %s2.coerce, 3296 %sext8 = shl nuw nsw i128 %s1.sroa.1.4.extract.shift, 1697 %sext = trunc i128 %sext8 to i3298 %conv = ashr exact i32 %sext, 1699 %sext1011 = shl nuw nsw i128 %s2.sroa.1.4.extract.shift, 16100 %sext10 = trunc i128 %sext1011 to i32101 %conv6 = ashr exact i32 %sext10, 16102 %add = add i32 %s1.sroa.0.0.extract.trunc, %i103 %add3 = add i32 %add, %s2.sroa.0.0.extract.trunc104 %add4 = add i32 %add3, %conv105 %add7 = add i32 %add4, %conv6106 ret i32 %add7107}108 109define i32 @caller39() #1 {110entry:111; CHECK-LABEL: caller39112; CHECK: ldp x1, x2,113; CHECK: ldp x3, x4,114 %0 = load i128, ptr @g39, align 16115 %1 = load i128, ptr @g39_2, align 16116 %call = tail call i32 @f39(i32 3, i128 %0, i128 %1) #5117 ret i32 %call118}119 120declare i32 @f39_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6,121 i32 %i7, i32 %i8, i32 %i9, i128 %s1.coerce, i128 %s2.coerce) #0122 123; structs with size < 8 bytes, alignment 16124; passed on stack at [sp+16] and [sp+32]125define i32 @caller39_stack() #1 {126entry:127; CHECK-LABEL: caller39_stack128; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #32]129; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #16]130; CHECK: mov w[[C:[0-9]+]], #9131; CHECK: str w[[C]], [sp]132 %0 = load i128, ptr @g39, align 16133 %1 = load i128, ptr @g39_2, align 16134 %call = tail call i32 @f39_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6,135 i32 7, i32 8, i32 9, i128 %0, i128 %1) #5136 ret i32 %call137}138 139; structs with size < 16 bytes140; passed via i128 in x1 and x3141define i32 @f40(i32 %i, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce) #0 {142entry:143; CHECK-LABEL: f40144; CHECK: add w[[A:[0-9]+]], w1, w0145; CHECK: add {{w[0-9]+}}, w[[A]], w3146 %s1.coerce.fca.0.extract = extractvalue [2 x i64] %s1.coerce, 0147 %s2.coerce.fca.0.extract = extractvalue [2 x i64] %s2.coerce, 0148 %s1.sroa.0.0.extract.trunc = trunc i64 %s1.coerce.fca.0.extract to i32149 %s2.sroa.0.0.extract.trunc = trunc i64 %s2.coerce.fca.0.extract to i32150 %s1.sroa.0.4.extract.shift = lshr i64 %s1.coerce.fca.0.extract, 32151 %sext8 = shl nuw nsw i64 %s1.sroa.0.4.extract.shift, 16152 %sext = trunc i64 %sext8 to i32153 %conv = ashr exact i32 %sext, 16154 %s2.sroa.0.4.extract.shift = lshr i64 %s2.coerce.fca.0.extract, 32155 %sext1011 = shl nuw nsw i64 %s2.sroa.0.4.extract.shift, 16156 %sext10 = trunc i64 %sext1011 to i32157 %conv6 = ashr exact i32 %sext10, 16158 %add = add i32 %s1.sroa.0.0.extract.trunc, %i159 %add3 = add i32 %add, %s2.sroa.0.0.extract.trunc160 %add4 = add i32 %add3, %conv161 %add7 = add i32 %add4, %conv6162 ret i32 %add7163}164 165define i32 @caller40() #1 {166entry:167; CHECK-LABEL: caller40168; CHECK: ldp x1, x2,169; CHECK: ldp x3, x4,170 %0 = load [2 x i64], ptr @g40, align 4171 %1 = load [2 x i64], ptr @g40_2, align 4172 %call = tail call i32 @f40(i32 3, [2 x i64] %0, [2 x i64] %1) #5173 ret i32 %call174}175 176declare i32 @f40_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6,177 i32 %i7, i32 %i8, i32 %i9, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce) #0178 179; structs with size < 16 bytes180; passed on stack at [sp+8] and [sp+24]181define i32 @caller40_stack() #1 {182entry:183; CHECK-LABEL: caller40_stack184; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #24]185; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #8]186; CHECK: mov w[[C:[0-9]+]], #9187; CHECK: str w[[C]], [sp]188 %0 = load [2 x i64], ptr @g40, align 4189 %1 = load [2 x i64], ptr @g40_2, align 4190 %call = tail call i32 @f40_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6,191 i32 7, i32 8, i32 9, [2 x i64] %0, [2 x i64] %1) #5192 ret i32 %call193}194 195; structs with size < 16 bytes, alignment of 16196; passed via i128 in x1 and x3197define i32 @f41(i32 %i, i128 %s1.coerce, i128 %s2.coerce) #0 {198entry:199; CHECK-LABEL: f41200; CHECK: add w[[A:[0-9]+]], w1, w0201; CHECK: add {{w[0-9]+}}, w[[A]], w3202 %s1.sroa.0.0.extract.trunc = trunc i128 %s1.coerce to i32203 %s1.sroa.1.4.extract.shift = lshr i128 %s1.coerce, 32204 %s2.sroa.0.0.extract.trunc = trunc i128 %s2.coerce to i32205 %s2.sroa.1.4.extract.shift = lshr i128 %s2.coerce, 32206 %sext8 = shl nuw nsw i128 %s1.sroa.1.4.extract.shift, 16207 %sext = trunc i128 %sext8 to i32208 %conv = ashr exact i32 %sext, 16209 %sext1011 = shl nuw nsw i128 %s2.sroa.1.4.extract.shift, 16210 %sext10 = trunc i128 %sext1011 to i32211 %conv6 = ashr exact i32 %sext10, 16212 %add = add i32 %s1.sroa.0.0.extract.trunc, %i213 %add3 = add i32 %add, %s2.sroa.0.0.extract.trunc214 %add4 = add i32 %add3, %conv215 %add7 = add i32 %add4, %conv6216 ret i32 %add7217}218 219define i32 @caller41() #1 {220entry:221; CHECK-LABEL: caller41222; CHECK: ldp x1, x2,223; CHECK: ldp x3, x4,224 %0 = load i128, ptr @g41, align 16225 %1 = load i128, ptr @g41_2, align 16226 %call = tail call i32 @f41(i32 3, i128 %0, i128 %1) #5227 ret i32 %call228}229 230declare i32 @f41_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6,231 i32 %i7, i32 %i8, i32 %i9, i128 %s1.coerce, i128 %s2.coerce) #0232 233; structs with size < 16 bytes, alignment of 16234; passed on stack at [sp+16] and [sp+32]235define i32 @caller41_stack() #1 {236entry:237; CHECK-LABEL: caller41_stack238; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #32]239; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #16]240; CHECK: mov w[[C:[0-9]+]], #9241; CHECK: str w[[C]], [sp]242 %0 = load i128, ptr @g41, align 16243 %1 = load i128, ptr @g41_2, align 16244 %call = tail call i32 @f41_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6,245 i32 7, i32 8, i32 9, i128 %0, i128 %1) #5246 ret i32 %call247}248 249; structs with size of 22 bytes, passed indirectly in x1 and x2250define i32 @f42(i32 %i, ptr nocapture %s1, ptr nocapture %s2) #2 {251entry:252; CHECK-LABEL: f42253; CHECK: ldr w[[A:[0-9]+]], [x1]254; CHECK: ldr w[[B:[0-9]+]], [x2]255; CHECK: add w[[C:[0-9]+]], w[[A]], w0256; CHECK: add {{w[0-9]+}}, w[[C]], w[[B]]257; FAST: f42258; FAST: ldr w[[A:[0-9]+]], [x1]259; FAST: ldr w[[B:[0-9]+]], [x2]260; FAST: add w[[C:[0-9]+]], w[[A]], w0261; FAST: add {{w[0-9]+}}, w[[C]], w[[B]]262 %0 = load i32, ptr %s1, align 4, !tbaa !0263 %1 = load i32, ptr %s2, align 4, !tbaa !0264 %s = getelementptr inbounds %struct.s42, ptr %s1, i64 0, i32 1265 %2 = load i16, ptr %s, align 2, !tbaa !3266 %conv = sext i16 %2 to i32267 %s5 = getelementptr inbounds %struct.s42, ptr %s2, i64 0, i32 1268 %3 = load i16, ptr %s5, align 2, !tbaa !3269 %conv6 = sext i16 %3 to i32270 %add = add i32 %0, %i271 %add3 = add i32 %add, %1272 %add4 = add i32 %add3, %conv273 %add7 = add i32 %add4, %conv6274 ret i32 %add7275}276 277; For s1, we allocate a 22-byte space, pass its address via x1278define i32 @caller42() #3 {279entry:280; CHECK-LABEL: caller42281; CHECK-DAG: str {{x[0-9]+}}, [sp, #48]282; CHECK-DAG: str {{q[0-9]+}}, [sp, #32]283; CHECK-DAG: str {{x[0-9]+}}, [sp, #16]284; CHECK-DAG: str {{q[0-9]+}}, [sp]285; CHECK: add x1, sp, #32286; CHECK: mov x2, sp287; Space for s1 is allocated at sp+32288; Space for s2 is allocated at sp289 290; FAST-LABEL: caller42291; FAST: sub sp, sp, #64292; Space for s1 is allocated at fp-24 = sp+24293; FAST: add x[[A:[0-9]+]], sp, #24294; Call memcpy with size = 24 (0x18)295; FAST: mov {{x[0-9]+}}, #24296; Space for s2 is allocated at sp297; FAST: mov x[[A:[0-9]+]], sp298; FAST: bl _memcpy299 %tmp = alloca %struct.s42, align 4300 %tmp1 = alloca %struct.s42, align 4301 call void @llvm.memcpy.p0.p0.i64(ptr align 4 %tmp, ptr align 4 @g42, i64 24, i1 false), !tbaa.struct !4302 call void @llvm.memcpy.p0.p0.i64(ptr align 4 %tmp1, ptr align 4 @g42_2, i64 24, i1 false), !tbaa.struct !4303 %call = call i32 @f42(i32 3, ptr %tmp, ptr %tmp1) #5304 ret i32 %call305}306 307declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) #4308 309declare i32 @f42_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6,310 i32 %i7, i32 %i8, i32 %i9, ptr nocapture %s1,311 ptr nocapture %s2) #2312 313define i32 @caller42_stack() #3 {314entry:315; CHECK-LABEL: caller42_stack316; CHECK: sub sp, sp, #112317; CHECK: add x29, sp, #96318; CHECK-DAG: stur {{x[0-9]+}}, [x29, #-16]319; CHECK-DAG: stur {{q[0-9]+}}, [x29, #-32]320; CHECK-DAG: str {{x[0-9]+}}, [sp, #48]321; CHECK-DAG: str {{q[0-9]+}}, [sp, #32]322; Space for s1 is allocated at x29-32 = sp+64323; Space for s2 is allocated at sp+32324; CHECK: add x[[B:[0-9]+]], sp, #32325; CHECK: str x[[B]], [sp, #16]326; CHECK: sub x[[A:[0-9]+]], x29, #32327; Address of s1 is passed on stack at sp+8328; CHECK: str x[[A]], [sp, #8]329; CHECK: mov w[[C:[0-9]+]], #9330; CHECK: str w[[C]], [sp]331 332; FAST-LABEL: caller42_stack333; Space for s1 is allocated at fp-24334; FAST: sub x[[A:[0-9]+]], x29, #24335; Call memcpy with size = 24 (0x18)336; FAST: mov {{x[0-9]+}}, #24337; FAST: bl _memcpy338; Space for s2 is allocated at sp+32339; FAST: add x[[B:[0-9]+]], sp, #32340; Call memcpy again341; FAST: bl _memcpy342; Address of s1 is passed on stack at sp+8343; FAST: str {{w[0-9]+}}, [sp]344; FAST: str {{x[0-9]+}}, [sp, #8]345; FAST: str {{x[0-9]+}}, [sp, #16]346 %tmp = alloca %struct.s42, align 4347 %tmp1 = alloca %struct.s42, align 4348 call void @llvm.memcpy.p0.p0.i64(ptr align 4 %tmp, ptr align 4 @g42, i64 24, i1 false), !tbaa.struct !4349 call void @llvm.memcpy.p0.p0.i64(ptr align 4 %tmp1, ptr align 4 @g42_2, i64 24, i1 false), !tbaa.struct !4350 %call = call i32 @f42_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7,351 i32 8, i32 9, ptr %tmp, ptr %tmp1) #5352 ret i32 %call353}354 355; structs with size of 22 bytes, alignment of 16356; passed indirectly in x1 and x2357define i32 @f43(i32 %i, ptr nocapture %s1, ptr nocapture %s2) #2 {358entry:359; CHECK-LABEL: f43360; CHECK: ldr w[[A:[0-9]+]], [x1]361; CHECK: ldr w[[B:[0-9]+]], [x2]362; CHECK: add w[[C:[0-9]+]], w[[A]], w0363; CHECK: add {{w[0-9]+}}, w[[C]], w[[B]]364; FAST-LABEL: f43365; FAST: ldr w[[A:[0-9]+]], [x1]366; FAST: ldr w[[B:[0-9]+]], [x2]367; FAST: add w[[C:[0-9]+]], w[[A]], w0368; FAST: add {{w[0-9]+}}, w[[C]], w[[B]]369 %0 = load i32, ptr %s1, align 4, !tbaa !0370 %1 = load i32, ptr %s2, align 4, !tbaa !0371 %s = getelementptr inbounds %struct.s43, ptr %s1, i64 0, i32 1372 %2 = load i16, ptr %s, align 2, !tbaa !3373 %conv = sext i16 %2 to i32374 %s5 = getelementptr inbounds %struct.s43, ptr %s2, i64 0, i32 1375 %3 = load i16, ptr %s5, align 2, !tbaa !3376 %conv6 = sext i16 %3 to i32377 %add = add i32 %0, %i378 %add3 = add i32 %add, %1379 %add4 = add i32 %add3, %conv380 %add7 = add i32 %add4, %conv6381 ret i32 %add7382}383 384define i32 @caller43() #3 {385entry:386; CHECK-LABEL: caller43387; CHECK-DAG: stp q1, q0, [sp, #32]388; CHECK-DAG: stp q1, q0, [sp]389; CHECK: add x1, sp, #32390; CHECK: mov x2, sp391; Space for s1 is allocated at sp+32392; Space for s2 is allocated at sp393 394; FAST-LABEL: caller43395; FAST: add x29, sp, #64396; Space for s1 is allocated at sp+32397; Space for s2 is allocated at sp398; FAST: str {{x[0-9]+}}, [sp, #32]399; FAST: str {{x[0-9]+}}, [sp, #40]400; FAST: str {{x[0-9]+}}, [sp, #48]401; FAST: str {{x[0-9]+}}, [sp, #56]402; FAST: str {{x[0-9]+}}, [sp]403; FAST: str {{x[0-9]+}}, [sp, #8]404; FAST: str {{x[0-9]+}}, [sp, #16]405; FAST: str {{x[0-9]+}}, [sp, #24]406; FAST: add x1, sp, #32407; FAST: mov x2, sp408 %tmp = alloca %struct.s43, align 16409 %tmp1 = alloca %struct.s43, align 16410 call void @llvm.memcpy.p0.p0.i64(ptr align 16 %tmp, ptr align 16 @g43, i64 32, i1 false), !tbaa.struct !4411 call void @llvm.memcpy.p0.p0.i64(ptr align 16 %tmp1, ptr align 16 @g43_2, i64 32, i1 false), !tbaa.struct !4412 %call = call i32 @f43(i32 3, ptr %tmp, ptr %tmp1) #5413 ret i32 %call414}415 416declare i32 @f43_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6,417 i32 %i7, i32 %i8, i32 %i9, ptr nocapture %s1,418 ptr nocapture %s2) #2419 420define i32 @caller43_stack() #3 {421entry:422; CHECK-LABEL: caller43_stack423; CHECK: sub sp, sp, #112424; CHECK: add x29, sp, #96425; CHECK-DAG: stp q1, q0, [x29, #-32]426; CHECK-DAG: stp q1, q0, [sp, #32]427; Space for s1 is allocated at x29-32 = sp+64428; Space for s2 is allocated at sp+32429; CHECK: add x[[B:[0-9]+]], sp, #32430; CHECK: str x[[B]], [sp, #16]431; CHECK: sub x[[A:[0-9]+]], x29, #32432; Address of s1 is passed on stack at sp+8433; CHECK: str x[[A]], [sp, #8]434; CHECK: mov w[[C:[0-9]+]], #9435; CHECK: str w[[C]], [sp]436 437; FAST-LABEL: caller43_stack438; FAST: sub sp, sp, #112439; Space for s1 is allocated at fp-32 = sp+64440; Space for s2 is allocated at sp+32441; FAST: stur {{x[0-9]+}}, [x29, #-32]442; FAST: stur {{x[0-9]+}}, [x29, #-24]443; FAST: stur {{x[0-9]+}}, [x29, #-16]444; FAST: stur {{x[0-9]+}}, [x29, #-8]445; FAST: str {{x[0-9]+}}, [sp, #32]446; FAST: str {{x[0-9]+}}, [sp, #40]447; FAST: str {{x[0-9]+}}, [sp, #48]448; FAST: str {{x[0-9]+}}, [sp, #56]449; Address of s1 is passed on stack at sp+8450; FAST: sub x[[A:[0-9]+]], x29, #32451; FAST: add x[[B:[0-9]+]], sp, #32452; FAST: str {{w[0-9]+}}, [sp]453; FAST: str x[[A]], [sp, #8]454; FAST: str x[[B]], [sp, #16]455 %tmp = alloca %struct.s43, align 16456 %tmp1 = alloca %struct.s43, align 16457 call void @llvm.memcpy.p0.p0.i64(ptr align 16 %tmp, ptr align 16 @g43, i64 32, i1 false), !tbaa.struct !4458 call void @llvm.memcpy.p0.p0.i64(ptr align 16 %tmp1, ptr align 16 @g43_2, i64 32, i1 false), !tbaa.struct !4459 %call = call i32 @f43_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7,460 i32 8, i32 9, ptr %tmp, ptr %tmp1) #5461 ret i32 %call462}463 464; rdar://13668927465; Check that we don't split an i128.466declare i32 @callee_i128_split(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5,467 i32 %i6, i32 %i7, i128 %s1, i32 %i8)468 469define i32 @i128_split() {470entry:471; CHECK-LABEL: i128_split472; "i128 %0" should be on stack at [sp].473; "i32 8" should be on stack at [sp, #16].474; CHECK: str {{w[0-9]+}}, [sp, #16]475; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp]476; FAST-LABEL: i128_split477; FAST: sub sp, sp478; FAST: mov x[[ADDR:[0-9]+]], sp479; FAST: str {{w[0-9]+}}, [x[[ADDR]], #16]480; Load/Store opt is disabled with -O0, so the i128 is split.481; FAST: str {{x[0-9]+}}, [x[[ADDR]], #8]482; FAST: str {{x[0-9]+}}, [x[[ADDR]]]483 %0 = load i128, ptr @g41, align 16484 %call = tail call i32 @callee_i128_split(i32 1, i32 2, i32 3, i32 4, i32 5,485 i32 6, i32 7, i128 %0, i32 8) #5486 ret i32 %call487}488 489declare i32 @callee_i64(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5,490 i32 %i6, i32 %i7, i64 %s1, i32 %i8)491 492define i32 @i64_split() {493entry:494; CHECK-LABEL: i64_split495; "i64 %0" should be in register x7.496; "i32 8" should be on stack at [sp].497; CHECK: ldr x7, [{{x[0-9]+}}]498; CHECK: str {{w[0-9]+}}, [sp]499; FAST-LABEL: i64_split500; FAST: ldr x7, [{{x[0-9]+}}]501; FAST: mov x[[R0:[0-9]+]], sp502; FAST: mov w[[R1:[0-9]+]], #8503; FAST: str w[[R1]], [x[[R0]]]504 %0 = load i64, ptr @g41, align 16505 %call = tail call i32 @callee_i64(i32 1, i32 2, i32 3, i32 4, i32 5,506 i32 6, i32 7, i64 %0, i32 8) #5507 ret i32 %call508}509 510attributes #0 = { noinline nounwind readnone "fp-contract-model"="standard" "relocation-model"="pic" "ssp-buffers-size"="8" }511attributes #1 = { nounwind readonly "fp-contract-model"="standard" "relocation-model"="pic" "ssp-buffers-size"="8" }512attributes #2 = { noinline nounwind readonly "fp-contract-model"="standard" "relocation-model"="pic" "ssp-buffers-size"="8" }513attributes #3 = { nounwind "fp-contract-model"="standard" "relocation-model"="pic" "ssp-buffers-size"="8" }514attributes #4 = { nounwind }515attributes #5 = { nobuiltin }516 517!0 = !{!"int", !1}518!1 = !{!"omnipotent char", !2}519!2 = !{!"Simple C/C++ TBAA"}520!3 = !{!"short", !1}521!4 = !{i64 0, i64 4, !0, i64 4, i64 2, !3, i64 8, i64 4, !0, i64 12, i64 2, !3, i64 16, i64 4, !0, i64 20, i64 2, !3}522