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1; RUN: llc -mtriple aarch64_be < %s -aarch64-enable-ldst-opt=false -o - | FileCheck %s2; RUN: llc -mtriple aarch64_be < %s -fast-isel=true -aarch64-enable-ldst-opt=false -o - | FileCheck %s3 4; CHECK-LABEL: test_i64_f64:5define i64 @test_i64_f64(double %p) {6; CHECK-NOT: rev7 %1 = fadd double %p, %p8 %2 = bitcast double %1 to i649 %3 = add i64 %2, %210 ret i64 %311}12 13; CHECK-LABEL: test_i64_v1i64:14define i64 @test_i64_v1i64(<1 x i64> %p) {15; CHECK-NOT: rev16 %1 = add <1 x i64> %p, %p17 %2 = bitcast <1 x i64> %1 to i6418 %3 = add i64 %2, %219 ret i64 %320}21 22; CHECK-LABEL: test_i64_v2f32:23define i64 @test_i64_v2f32(<2 x float> %p) {24; CHECK: rev64 v{{[0-9]+}}.2s25 %1 = fadd <2 x float> %p, %p26 %2 = bitcast <2 x float> %1 to i6427 %3 = add i64 %2, %228 ret i64 %329}30 31; CHECK-LABEL: test_i64_v2i32:32define i64 @test_i64_v2i32(<2 x i32> %p) {33; CHECK: rev64 v{{[0-9]+}}.2s34 %1 = add <2 x i32> %p, %p35 %2 = bitcast <2 x i32> %1 to i6436 %3 = add i64 %2, %237 ret i64 %338}39 40; CHECK-LABEL: test_i64_v4i16:41define i64 @test_i64_v4i16(<4 x i16> %p) {42; CHECK: rev64 v{{[0-9]+}}.4h43 %1 = add <4 x i16> %p, %p44 %2 = bitcast <4 x i16> %1 to i6445 %3 = add i64 %2, %246 ret i64 %347}48 49; CHECK-LABEL: test_i64_v8i8:50define i64 @test_i64_v8i8(<8 x i8> %p) {51; CHECK: rev64 v{{[0-9]+}}.8b52 %1 = add <8 x i8> %p, %p53 %2 = bitcast <8 x i8> %1 to i6454 %3 = add i64 %2, %255 ret i64 %356}57 58; CHECK-LABEL: test_f64_i64:59define double @test_f64_i64(i64 %p) {60; CHECK-NOT: rev61 %1 = add i64 %p, %p62 %2 = bitcast i64 %1 to double63 %3 = fadd double %2, %264 ret double %365}66 67; CHECK-LABEL: test_f64_v1i64:68define double @test_f64_v1i64(<1 x i64> %p) {69; CHECK-NOT: rev70 %1 = add <1 x i64> %p, %p71 %2 = bitcast <1 x i64> %1 to double72 %3 = fadd double %2, %273 ret double %374}75 76; CHECK-LABEL: test_f64_v2f32:77define double @test_f64_v2f32(<2 x float> %p) {78; CHECK: rev64 v{{[0-9]+}}.2s79 %1 = fadd <2 x float> %p, %p80 %2 = bitcast <2 x float> %1 to double81 %3 = fadd double %2, %282 ret double %383}84 85; CHECK-LABEL: test_f64_v2i32:86define double @test_f64_v2i32(<2 x i32> %p) {87; CHECK: rev64 v{{[0-9]+}}.2s88 %1 = add <2 x i32> %p, %p89 %2 = bitcast <2 x i32> %1 to double90 %3 = fadd double %2, %291 ret double %392}93 94; CHECK-LABEL: test_f64_v4i16:95define double @test_f64_v4i16(<4 x i16> %p) {96; CHECK: rev64 v{{[0-9]+}}.4h97 %1 = add <4 x i16> %p, %p98 %2 = bitcast <4 x i16> %1 to double99 %3 = fadd double %2, %2100 ret double %3101}102 103; CHECK-LABEL: test_f64_v8i8:104define double @test_f64_v8i8(<8 x i8> %p) {105; CHECK: rev64 v{{[0-9]+}}.8b106 %1 = add <8 x i8> %p, %p107 %2 = bitcast <8 x i8> %1 to double108 %3 = fadd double %2, %2109 ret double %3110}111 112; CHECK-LABEL: test_v1i64_i64:113define <1 x i64> @test_v1i64_i64(i64 %p) {114; CHECK-NOT: rev115 %1 = add i64 %p, %p116 %2 = bitcast i64 %1 to <1 x i64>117 %3 = add <1 x i64> %2, %2118 ret <1 x i64> %3119}120 121; CHECK-LABEL: test_v1i64_f64:122define <1 x i64> @test_v1i64_f64(double %p) {123; CHECK-NOT: rev124 %1 = fadd double %p, %p125 %2 = bitcast double %1 to <1 x i64>126 %3 = add <1 x i64> %2, %2127 ret <1 x i64> %3128}129 130; CHECK-LABEL: test_v1i64_v2f32:131define <1 x i64> @test_v1i64_v2f32(<2 x float> %p) {132; CHECK: rev64 v{{[0-9]+}}.2s133 %1 = fadd <2 x float> %p, %p134 %2 = bitcast <2 x float> %1 to <1 x i64>135 %3 = add <1 x i64> %2, %2136 ret <1 x i64> %3137}138 139; CHECK-LABEL: test_v1i64_v2i32:140define <1 x i64> @test_v1i64_v2i32(<2 x i32> %p) {141; CHECK: rev64 v{{[0-9]+}}.2s142 %1 = add <2 x i32> %p, %p143 %2 = bitcast <2 x i32> %1 to <1 x i64>144 %3 = add <1 x i64> %2, %2145 ret <1 x i64> %3146}147 148; CHECK-LABEL: test_v1i64_v4i16:149define <1 x i64> @test_v1i64_v4i16(<4 x i16> %p) {150; CHECK: rev64 v{{[0-9]+}}.4h151 %1 = add <4 x i16> %p, %p152 %2 = bitcast <4 x i16> %1 to <1 x i64>153 %3 = add <1 x i64> %2, %2154 ret <1 x i64> %3155}156 157; CHECK-LABEL: test_v1i64_v8i8:158define <1 x i64> @test_v1i64_v8i8(<8 x i8> %p) {159; CHECK: rev64 v{{[0-9]+}}.8b160 %1 = add <8 x i8> %p, %p161 %2 = bitcast <8 x i8> %1 to <1 x i64>162 %3 = add <1 x i64> %2, %2163 ret <1 x i64> %3164}165 166; CHECK-LABEL: test_v2f32_i64:167define <2 x float> @test_v2f32_i64(i64 %p) {168; CHECK: rev64 v{{[0-9]+}}.2s169 %1 = add i64 %p, %p170 %2 = bitcast i64 %1 to <2 x float>171 %3 = fadd <2 x float> %2, %2172 ret <2 x float> %3173}174 175; CHECK-LABEL: test_v2f32_f64:176define <2 x float> @test_v2f32_f64(double %p) {177; CHECK: rev64 v{{[0-9]+}}.2s178 %1 = fadd double %p, %p179 %2 = bitcast double %1 to <2 x float>180 %3 = fadd <2 x float> %2, %2181 ret <2 x float> %3182}183 184; CHECK-LABEL: test_v2f32_v1i64:185define <2 x float> @test_v2f32_v1i64(<1 x i64> %p) {186; CHECK: rev64 v{{[0-9]+}}.2s187 %1 = add <1 x i64> %p, %p188 %2 = bitcast <1 x i64> %1 to <2 x float>189 %3 = fadd <2 x float> %2, %2190 ret <2 x float> %3191}192 193; CHECK-LABEL: test_v2f32_v2i32:194define <2 x float> @test_v2f32_v2i32(<2 x i32> %p) {195; CHECK: rev64 v{{[0-9]+}}.2s196; CHECK: rev64 v{{[0-9]+}}.2s197 %1 = add <2 x i32> %p, %p198 %2 = bitcast <2 x i32> %1 to <2 x float>199 %3 = fadd <2 x float> %2, %2200 ret <2 x float> %3201}202 203; CHECK-LABEL: test_v2f32_v4i16:204define <2 x float> @test_v2f32_v4i16(<4 x i16> %p) {205; CHECK: rev64 v{{[0-9]+}}.4h206; CHECK: rev64 v{{[0-9]+}}.2s207 %1 = add <4 x i16> %p, %p208 %2 = bitcast <4 x i16> %1 to <2 x float>209 %3 = fadd <2 x float> %2, %2210 ret <2 x float> %3211}212 213; CHECK-LABEL: test_v2f32_v8i8:214define <2 x float> @test_v2f32_v8i8(<8 x i8> %p) {215; CHECK: rev64 v{{[0-9]+}}.8b216; CHECK: rev64 v{{[0-9]+}}.2s217 %1 = add <8 x i8> %p, %p218 %2 = bitcast <8 x i8> %1 to <2 x float>219 %3 = fadd <2 x float> %2, %2220 ret <2 x float> %3221}222 223; CHECK-LABEL: test_v2i32_i64:224define <2 x i32> @test_v2i32_i64(i64 %p) {225; CHECK: rev64 v{{[0-9]+}}.2s226 %1 = add i64 %p, %p227 %2 = bitcast i64 %1 to <2 x i32>228 %3 = add <2 x i32> %2, %2229 ret <2 x i32> %3230}231 232; CHECK-LABEL: test_v2i32_f64:233define <2 x i32> @test_v2i32_f64(double %p) {234; CHECK: rev64 v{{[0-9]+}}.2s235 %1 = fadd double %p, %p236 %2 = bitcast double %1 to <2 x i32>237 %3 = add <2 x i32> %2, %2238 ret <2 x i32> %3239}240 241; CHECK-LABEL: test_v2i32_v1i64:242define <2 x i32> @test_v2i32_v1i64(<1 x i64> %p) {243; CHECK: rev64 v{{[0-9]+}}.2s244 %1 = add <1 x i64> %p, %p245 %2 = bitcast <1 x i64> %1 to <2 x i32>246 %3 = add <2 x i32> %2, %2247 ret <2 x i32> %3248}249 250; CHECK-LABEL: test_v2i32_v2f32:251define <2 x i32> @test_v2i32_v2f32(<2 x float> %p) {252; CHECK: rev64 v{{[0-9]+}}.2s253; CHECK: rev64 v{{[0-9]+}}.2s254 %1 = fadd <2 x float> %p, %p255 %2 = bitcast <2 x float> %1 to <2 x i32>256 %3 = add <2 x i32> %2, %2257 ret <2 x i32> %3258}259 260; CHECK-LABEL: test_v2i32_v4i16:261define <2 x i32> @test_v2i32_v4i16(<4 x i16> %p) {262; CHECK: rev64 v{{[0-9]+}}.4h263; CHECK: rev64 v{{[0-9]+}}.2s264 %1 = add <4 x i16> %p, %p265 %2 = bitcast <4 x i16> %1 to <2 x i32>266 %3 = add <2 x i32> %2, %2267 ret <2 x i32> %3268}269 270; CHECK-LABEL: test_v2i32_v8i8:271define <2 x i32> @test_v2i32_v8i8(<8 x i8> %p) {272; CHECK: rev64 v{{[0-9]+}}.8b273; CHECK: rev64 v{{[0-9]+}}.2s274 %1 = add <8 x i8> %p, %p275 %2 = bitcast <8 x i8> %1 to <2 x i32>276 %3 = add <2 x i32> %2, %2277 ret <2 x i32> %3278}279 280; CHECK-LABEL: test_v4i16_i64:281define <4 x i16> @test_v4i16_i64(i64 %p) {282; CHECK: rev64 v{{[0-9]+}}.4h283 %1 = add i64 %p, %p284 %2 = bitcast i64 %1 to <4 x i16>285 %3 = add <4 x i16> %2, %2286 ret <4 x i16> %3287}288 289; CHECK-LABEL: test_v4i16_f64:290define <4 x i16> @test_v4i16_f64(double %p) {291; CHECK: rev64 v{{[0-9]+}}.4h292 %1 = fadd double %p, %p293 %2 = bitcast double %1 to <4 x i16>294 %3 = add <4 x i16> %2, %2295 ret <4 x i16> %3296}297 298; CHECK-LABEL: test_v4i16_v1i64:299define <4 x i16> @test_v4i16_v1i64(<1 x i64> %p) {300; CHECK: rev64 v{{[0-9]+}}.4h301 %1 = add <1 x i64> %p, %p302 %2 = bitcast <1 x i64> %1 to <4 x i16>303 %3 = add <4 x i16> %2, %2304 ret <4 x i16> %3305}306 307; CHECK-LABEL: test_v4i16_v2f32:308define <4 x i16> @test_v4i16_v2f32(<2 x float> %p) {309; CHECK: rev64 v{{[0-9]+}}.2s310; CHECK: rev64 v{{[0-9]+}}.4h311 %1 = fadd <2 x float> %p, %p312 %2 = bitcast <2 x float> %1 to <4 x i16>313 %3 = add <4 x i16> %2, %2314 ret <4 x i16> %3315}316 317; CHECK-LABEL: test_v4i16_v2i32:318define <4 x i16> @test_v4i16_v2i32(<2 x i32> %p) {319; CHECK: rev64 v{{[0-9]+}}.2s320; CHECK: rev64 v{{[0-9]+}}.4h321 %1 = add <2 x i32> %p, %p322 %2 = bitcast <2 x i32> %1 to <4 x i16>323 %3 = add <4 x i16> %2, %2324 ret <4 x i16> %3325}326 327; CHECK-LABEL: test_v4i16_v8i8:328define <4 x i16> @test_v4i16_v8i8(<8 x i8> %p) {329; CHECK: rev64 v{{[0-9]+}}.8b330; CHECK: rev64 v{{[0-9]+}}.4h331 %1 = add <8 x i8> %p, %p332 %2 = bitcast <8 x i8> %1 to <4 x i16>333 %3 = add <4 x i16> %2, %2334 ret <4 x i16> %3335}336 337; CHECK-LABEL: test_v8i8_i64:338define <8 x i8> @test_v8i8_i64(i64 %p) {339; CHECK: rev64 v{{[0-9]+}}.8b340 %1 = add i64 %p, %p341 %2 = bitcast i64 %1 to <8 x i8>342 %3 = add <8 x i8> %2, %2343 ret <8 x i8> %3344}345 346; CHECK-LABEL: test_v8i8_f64:347define <8 x i8> @test_v8i8_f64(double %p) {348; CHECK: rev64 v{{[0-9]+}}.8b349 %1 = fadd double %p, %p350 %2 = bitcast double %1 to <8 x i8>351 %3 = add <8 x i8> %2, %2352 ret <8 x i8> %3353}354 355; CHECK-LABEL: test_v8i8_v1i64:356define <8 x i8> @test_v8i8_v1i64(<1 x i64> %p) {357; CHECK: rev64 v{{[0-9]+}}.8b358 %1 = add <1 x i64> %p, %p359 %2 = bitcast <1 x i64> %1 to <8 x i8>360 %3 = add <8 x i8> %2, %2361 ret <8 x i8> %3362}363 364; CHECK-LABEL: test_v8i8_v2f32:365define <8 x i8> @test_v8i8_v2f32(<2 x float> %p) {366; CHECK: rev64 v{{[0-9]+}}.2s367; CHECK: rev64 v{{[0-9]+}}.8b368 %1 = fadd <2 x float> %p, %p369 %2 = bitcast <2 x float> %1 to <8 x i8>370 %3 = add <8 x i8> %2, %2371 ret <8 x i8> %3372}373 374; CHECK-LABEL: test_v8i8_v2i32:375define <8 x i8> @test_v8i8_v2i32(<2 x i32> %p) {376; CHECK: rev64 v{{[0-9]+}}.2s377; CHECK: rev64 v{{[0-9]+}}.8b378 %1 = add <2 x i32> %p, %p379 %2 = bitcast <2 x i32> %1 to <8 x i8>380 %3 = add <8 x i8> %2, %2381 ret <8 x i8> %3382}383 384; CHECK-LABEL: test_v8i8_v4i16:385define <8 x i8> @test_v8i8_v4i16(<4 x i16> %p) {386; CHECK: rev64 v{{[0-9]+}}.4h387; CHECK: rev64 v{{[0-9]+}}.8b388 %1 = add <4 x i16> %p, %p389 %2 = bitcast <4 x i16> %1 to <8 x i8>390 %3 = add <8 x i8> %2, %2391 ret <8 x i8> %3392}393 394; CHECK-LABEL: test_f128_v2f64:395define fp128 @test_f128_v2f64(<2 x double> %p) {396; CHECK: ext397 %1 = fadd <2 x double> %p, %p398 %2 = bitcast <2 x double> %1 to fp128399 %3 = fadd fp128 %2, %2400 ret fp128 %3401}402 403; CHECK-LABEL: test_f128_v2i64:404define fp128 @test_f128_v2i64(<2 x i64> %p) {405; CHECK: ext406 %1 = add <2 x i64> %p, %p407 %2 = bitcast <2 x i64> %1 to fp128408 %3 = fadd fp128 %2, %2409 ret fp128 %3410}411 412; CHECK-LABEL: test_f128_v4f32:413define fp128 @test_f128_v4f32(<4 x float> %p) {414; CHECK: rev64 v{{[0-9]+}}.4s415; CHECK: ext416 %1 = fadd <4 x float> %p, %p417 %2 = bitcast <4 x float> %1 to fp128418 %3 = fadd fp128 %2, %2419 ret fp128 %3420}421 422; CHECK-LABEL: test_f128_v4i32:423define fp128 @test_f128_v4i32(<4 x i32> %p) {424; CHECK: rev64 v{{[0-9]+}}.4s425; CHECK: ext426 %1 = add <4 x i32> %p, %p427 %2 = bitcast <4 x i32> %1 to fp128428 %3 = fadd fp128 %2, %2429 ret fp128 %3430}431 432; CHECK-LABEL: test_f128_v8i16:433define fp128 @test_f128_v8i16(<8 x i16> %p) {434; CHECK: rev64 v{{[0-9]+}}.8h435; CHECK: ext436 %1 = add <8 x i16> %p, %p437 %2 = bitcast <8 x i16> %1 to fp128438 %3 = fadd fp128 %2, %2439 ret fp128 %3440}441 442; CHECK-LABEL: test_f128_v16i8:443define fp128 @test_f128_v16i8(<16 x i8> %p) {444; CHECK: rev64 v{{[0-9]+}}.16b445; CHECK: ext446 %1 = add <16 x i8> %p, %p447 %2 = bitcast <16 x i8> %1 to fp128448 %3 = fadd fp128 %2, %2449 ret fp128 %3450}451 452; CHECK-LABEL: test_v2f64_f128:453define <2 x double> @test_v2f64_f128(fp128 %p) {454; CHECK: ext455 %1 = fadd fp128 %p, %p456 %2 = bitcast fp128 %1 to <2 x double>457 %3 = fadd <2 x double> %2, %2458 ret <2 x double> %3459}460 461; CHECK-LABEL: test_v2f64_v2i64:462define <2 x double> @test_v2f64_v2i64(<2 x i64> %p) {463; CHECK: ext464; CHECK: ext465 %1 = add <2 x i64> %p, %p466 %2 = bitcast <2 x i64> %1 to <2 x double>467 %3 = fadd <2 x double> %2, %2468 ret <2 x double> %3469}470 471; CHECK-LABEL: test_v2f64_v4f32:472define <2 x double> @test_v2f64_v4f32(<4 x float> %p) {473; CHECK: rev64 v{{[0-9]+}}.4s474; CHECK: ext475; CHECK: ext476 %1 = fadd <4 x float> %p, %p477 %2 = bitcast <4 x float> %1 to <2 x double>478 %3 = fadd <2 x double> %2, %2479 ret <2 x double> %3480}481 482; CHECK-LABEL: test_v2f64_v4i32:483define <2 x double> @test_v2f64_v4i32(<4 x i32> %p) {484; CHECK: rev64 v{{[0-9]+}}.4s485; CHECK: ext486; CHECK: ext487 %1 = add <4 x i32> %p, %p488 %2 = bitcast <4 x i32> %1 to <2 x double>489 %3 = fadd <2 x double> %2, %2490 ret <2 x double> %3491}492 493; CHECK-LABEL: test_v2f64_v8i16:494define <2 x double> @test_v2f64_v8i16(<8 x i16> %p) {495; CHECK: rev64 v{{[0-9]+}}.8h496; CHECK: ext497; CHECK: ext498 %1 = add <8 x i16> %p, %p499 %2 = bitcast <8 x i16> %1 to <2 x double>500 %3 = fadd <2 x double> %2, %2501 ret <2 x double> %3502}503 504; CHECK-LABEL: test_v2f64_v16i8:505define <2 x double> @test_v2f64_v16i8(<16 x i8> %p) {506; CHECK: rev64 v{{[0-9]+}}.16b507; CHECK: ext508; CHECK: ext509 %1 = add <16 x i8> %p, %p510 %2 = bitcast <16 x i8> %1 to <2 x double>511 %3 = fadd <2 x double> %2, %2512 ret <2 x double> %3513}514 515; CHECK-LABEL: test_v2i64_f128:516define <2 x i64> @test_v2i64_f128(fp128 %p) {517; CHECK: ext518 %1 = fadd fp128 %p, %p519 %2 = bitcast fp128 %1 to <2 x i64>520 %3 = add <2 x i64> %2, %2521 ret <2 x i64> %3522}523 524; CHECK-LABEL: test_v2i64_v2f64:525define <2 x i64> @test_v2i64_v2f64(<2 x double> %p) {526; CHECK: ext527; CHECK: ext528 %1 = fadd <2 x double> %p, %p529 %2 = bitcast <2 x double> %1 to <2 x i64>530 %3 = add <2 x i64> %2, %2531 ret <2 x i64> %3532}533 534; CHECK-LABEL: test_v2i64_v4f32:535define <2 x i64> @test_v2i64_v4f32(<4 x float> %p) {536; CHECK: rev64 v{{[0-9]+}}.4s537; CHECK: ext538; CHECK: ext539 %1 = fadd <4 x float> %p, %p540 %2 = bitcast <4 x float> %1 to <2 x i64>541 %3 = add <2 x i64> %2, %2542 ret <2 x i64> %3543}544 545; CHECK-LABEL: test_v2i64_v4i32:546define <2 x i64> @test_v2i64_v4i32(<4 x i32> %p) {547; CHECK: rev64 v{{[0-9]+}}.4s548; CHECK: ext549; CHECK: ext550 %1 = add <4 x i32> %p, %p551 %2 = bitcast <4 x i32> %1 to <2 x i64>552 %3 = add <2 x i64> %2, %2553 ret <2 x i64> %3554}555 556; CHECK-LABEL: test_v2i64_v8i16:557define <2 x i64> @test_v2i64_v8i16(<8 x i16> %p) {558; CHECK: rev64 v{{[0-9]+}}.8h559; CHECK: ext560; CHECK: ext561 %1 = add <8 x i16> %p, %p562 %2 = bitcast <8 x i16> %1 to <2 x i64>563 %3 = add <2 x i64> %2, %2564 ret <2 x i64> %3565}566 567; CHECK-LABEL: test_v2i64_v16i8:568define <2 x i64> @test_v2i64_v16i8(<16 x i8> %p) {569; CHECK: rev64 v{{[0-9]+}}.16b570; CHECK: ext571; CHECK: ext572 %1 = add <16 x i8> %p, %p573 %2 = bitcast <16 x i8> %1 to <2 x i64>574 %3 = add <2 x i64> %2, %2575 ret <2 x i64> %3576}577 578; CHECK-LABEL: test_v4f32_f128:579define <4 x float> @test_v4f32_f128(fp128 %p) {580; CHECK: rev64 v{{[0-9]+}}.4s581; CHECK: ext582 %1 = fadd fp128 %p, %p583 %2 = bitcast fp128 %1 to <4 x float>584 %3 = fadd <4 x float> %2, %2585 ret <4 x float> %3586}587 588; CHECK-LABEL: test_v4f32_v2f64:589define <4 x float> @test_v4f32_v2f64(<2 x double> %p) {590; CHECK: ext591; CHECK: rev64 v{{[0-9]+}}.4s592; CHECK: ext593 %1 = fadd <2 x double> %p, %p594 %2 = bitcast <2 x double> %1 to <4 x float>595 %3 = fadd <4 x float> %2, %2596 ret <4 x float> %3597}598 599; CHECK-LABEL: test_v4f32_v2i64:600define <4 x float> @test_v4f32_v2i64(<2 x i64> %p) {601; CHECK: ext602; CHECK: rev64 v{{[0-9]+}}.4s603; CHECK: ext604 %1 = add <2 x i64> %p, %p605 %2 = bitcast <2 x i64> %1 to <4 x float>606 %3 = fadd <4 x float> %2, %2607 ret <4 x float> %3608}609 610; CHECK-LABEL: test_v4f32_v4i32:611define <4 x float> @test_v4f32_v4i32(<4 x i32> %p) {612; CHECK: rev64 v{{[0-9]+}}.4s613; CHECK: ext614; CHECK: rev64 v{{[0-9]+}}.4s615; CHECK: ext616 %1 = add <4 x i32> %p, %p617 %2 = bitcast <4 x i32> %1 to <4 x float>618 %3 = fadd <4 x float> %2, %2619 ret <4 x float> %3620}621 622; CHECK-LABEL: test_v4f32_v8i16:623define <4 x float> @test_v4f32_v8i16(<8 x i16> %p) {624; CHECK: rev64 v{{[0-9]+}}.8h625; CHECK: ext626; CHECK: rev64 v{{[0-9]+}}.4s627; CHECK: ext628 %1 = add <8 x i16> %p, %p629 %2 = bitcast <8 x i16> %1 to <4 x float>630 %3 = fadd <4 x float> %2, %2631 ret <4 x float> %3632}633 634; CHECK-LABEL: test_v4f32_v16i8:635define <4 x float> @test_v4f32_v16i8(<16 x i8> %p) {636; CHECK: rev64 v{{[0-9]+}}.16b637; CHECK: ext638; CHECK: rev64 v{{[0-9]+}}.4s639; CHECK: ext640 %1 = add <16 x i8> %p, %p641 %2 = bitcast <16 x i8> %1 to <4 x float>642 %3 = fadd <4 x float> %2, %2643 ret <4 x float> %3644}645 646; CHECK-LABEL: test_v4i32_f128:647define <4 x i32> @test_v4i32_f128(fp128 %p) {648; CHECK: rev64 v{{[0-9]+}}.4s649; CHECK: ext650 %1 = fadd fp128 %p, %p651 %2 = bitcast fp128 %1 to <4 x i32>652 %3 = add <4 x i32> %2, %2653 ret <4 x i32> %3654}655 656; CHECK-LABEL: test_v4i32_v2f64:657define <4 x i32> @test_v4i32_v2f64(<2 x double> %p) {658; CHECK: ext659; CHECK: rev64 v{{[0-9]+}}.4s660; CHECK: ext661 %1 = fadd <2 x double> %p, %p662 %2 = bitcast <2 x double> %1 to <4 x i32>663 %3 = add <4 x i32> %2, %2664 ret <4 x i32> %3665}666 667; CHECK-LABEL: test_v4i32_v2i64:668define <4 x i32> @test_v4i32_v2i64(<2 x i64> %p) {669; CHECK: ext670; CHECK: rev64 v{{[0-9]+}}.4s671; CHECK: ext672 %1 = add <2 x i64> %p, %p673 %2 = bitcast <2 x i64> %1 to <4 x i32>674 %3 = add <4 x i32> %2, %2675 ret <4 x i32> %3676}677 678; CHECK-LABEL: test_v4i32_v4f32:679define <4 x i32> @test_v4i32_v4f32(<4 x float> %p) {680; CHECK: rev64 v{{[0-9]+}}.4s681; CHECK: ext682; CHECK: rev64 v{{[0-9]+}}.4s683; CHECK: ext684 %1 = fadd <4 x float> %p, %p685 %2 = bitcast <4 x float> %1 to <4 x i32>686 %3 = add <4 x i32> %2, %2687 ret <4 x i32> %3688}689 690; CHECK-LABEL: test_v4i32_v8i16:691define <4 x i32> @test_v4i32_v8i16(<8 x i16> %p) {692; CHECK: rev64 v{{[0-9]+}}.8h693; CHECK: ext694; CHECK: rev64 v{{[0-9]+}}.4s695; CHECK: ext696 %1 = add <8 x i16> %p, %p697 %2 = bitcast <8 x i16> %1 to <4 x i32>698 %3 = add <4 x i32> %2, %2699 ret <4 x i32> %3700}701 702; CHECK-LABEL: test_v4i32_v16i8:703define <4 x i32> @test_v4i32_v16i8(<16 x i8> %p) {704; CHECK: rev64 v{{[0-9]+}}.16b705; CHECK: ext706; CHECK: rev64 v{{[0-9]+}}.4s707; CHECK: ext708 %1 = add <16 x i8> %p, %p709 %2 = bitcast <16 x i8> %1 to <4 x i32>710 %3 = add <4 x i32> %2, %2711 ret <4 x i32> %3712}713 714; CHECK-LABEL: test_v8i16_f128:715define <8 x i16> @test_v8i16_f128(fp128 %p) {716; CHECK: rev64 v{{[0-9]+}}.8h717; CHECK: ext718 %1 = fadd fp128 %p, %p719 %2 = bitcast fp128 %1 to <8 x i16>720 %3 = add <8 x i16> %2, %2721 ret <8 x i16> %3722}723 724; CHECK-LABEL: test_v8i16_v2f64:725define <8 x i16> @test_v8i16_v2f64(<2 x double> %p) {726; CHECK: ext727; CHECK: rev64 v{{[0-9]+}}.8h728; CHECK: ext729 %1 = fadd <2 x double> %p, %p730 %2 = bitcast <2 x double> %1 to <8 x i16>731 %3 = add <8 x i16> %2, %2732 ret <8 x i16> %3733}734 735; CHECK-LABEL: test_v8i16_v2i64:736define <8 x i16> @test_v8i16_v2i64(<2 x i64> %p) {737; CHECK: ext738; CHECK: rev64 v{{[0-9]+}}.8h739; CHECK: ext740 %1 = add <2 x i64> %p, %p741 %2 = bitcast <2 x i64> %1 to <8 x i16>742 %3 = add <8 x i16> %2, %2743 ret <8 x i16> %3744}745 746; CHECK-LABEL: test_v8i16_v4f32:747define <8 x i16> @test_v8i16_v4f32(<4 x float> %p) {748; CHECK: rev64 v{{[0-9]+}}.4s749; CHECK: ext750; CHECK: rev64 v{{[0-9]+}}.8h751; CHECK: ext752 %1 = fadd <4 x float> %p, %p753 %2 = bitcast <4 x float> %1 to <8 x i16>754 %3 = add <8 x i16> %2, %2755 ret <8 x i16> %3756}757 758; CHECK-LABEL: test_v8i16_v4i32:759define <8 x i16> @test_v8i16_v4i32(<4 x i32> %p) {760; CHECK: rev64 v{{[0-9]+}}.4s761; CHECK: ext762; CHECK: rev64 v{{[0-9]+}}.8h763; CHECK: ext764 %1 = add <4 x i32> %p, %p765 %2 = bitcast <4 x i32> %1 to <8 x i16>766 %3 = add <8 x i16> %2, %2767 ret <8 x i16> %3768}769 770; CHECK-LABEL: test_v8i16_v16i8:771define <8 x i16> @test_v8i16_v16i8(<16 x i8> %p) {772; CHECK: rev64 v{{[0-9]+}}.16b773; CHECK: ext774; CHECK: rev64 v{{[0-9]+}}.8h775; CHECK: ext776 %1 = add <16 x i8> %p, %p777 %2 = bitcast <16 x i8> %1 to <8 x i16>778 %3 = add <8 x i16> %2, %2779 ret <8 x i16> %3780}781 782; CHECK-LABEL: test_v16i8_f128:783define <16 x i8> @test_v16i8_f128(fp128 %p) {784; CHECK: rev64 v{{[0-9]+}}.16b785; CHECK: ext786 %1 = fadd fp128 %p, %p787 %2 = bitcast fp128 %1 to <16 x i8>788 %3 = add <16 x i8> %2, %2789 ret <16 x i8> %3790}791 792; CHECK-LABEL: test_v16i8_v2f64:793define <16 x i8> @test_v16i8_v2f64(<2 x double> %p) {794; CHECK: ext795; CHECK: rev64 v{{[0-9]+}}.16b796; CHECK: ext797 %1 = fadd <2 x double> %p, %p798 %2 = bitcast <2 x double> %1 to <16 x i8>799 %3 = add <16 x i8> %2, %2800 ret <16 x i8> %3801}802 803; CHECK-LABEL: test_v16i8_v2i64:804define <16 x i8> @test_v16i8_v2i64(<2 x i64> %p) {805; CHECK: ext806; CHECK: rev64 v{{[0-9]+}}.16b807; CHECK: ext808 %1 = add <2 x i64> %p, %p809 %2 = bitcast <2 x i64> %1 to <16 x i8>810 %3 = add <16 x i8> %2, %2811 ret <16 x i8> %3812}813 814; CHECK-LABEL: test_v16i8_v4f32:815define <16 x i8> @test_v16i8_v4f32(<4 x float> %p) {816; CHECK: rev64 v{{[0-9]+}}.4s817; CHECK: ext818; CHECK: rev64 v{{[0-9]+}}.16b819; CHECK: ext820 %1 = fadd <4 x float> %p, %p821 %2 = bitcast <4 x float> %1 to <16 x i8>822 %3 = add <16 x i8> %2, %2823 ret <16 x i8> %3824}825 826; CHECK-LABEL: test_v16i8_v4i32:827define <16 x i8> @test_v16i8_v4i32(<4 x i32> %p) {828; CHECK: rev64 v{{[0-9]+}}.4s829; CHECK: ext830; CHECK: rev64 v{{[0-9]+}}.16b831; CHECK: ext832 %1 = add <4 x i32> %p, %p833 %2 = bitcast <4 x i32> %1 to <16 x i8>834 %3 = add <16 x i8> %2, %2835 ret <16 x i8> %3836}837 838; CHECK-LABEL: test_v16i8_v8i16:839define <16 x i8> @test_v16i8_v8i16(<8 x i16> %p) {840; CHECK: rev64 v{{[0-9]+}}.8h841; CHECK: ext842; CHECK: rev64 v{{[0-9]+}}.16b843; CHECK: ext844 %1 = add <8 x i16> %p, %p845 %2 = bitcast <8 x i16> %1 to <16 x i8>846 %3 = add <16 x i8> %2, %2847 ret <16 x i8> %3848}849