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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+bf16 | FileCheck %s3 4; Check that building a vector from floats doesn't insert an unnecessary5; copy for lane zero.6define <4 x float>  @foo(float %a, float %b, float %c, float %d) nounwind {7; CHECK-LABEL: foo:8; CHECK:       // %bb.0:9; CHECK-NEXT:    // kill: def $s0 killed $s0 def $q010; CHECK-NEXT:    // kill: def $s1 killed $s1 def $q111; CHECK-NEXT:    // kill: def $s2 killed $s2 def $q212; CHECK-NEXT:    // kill: def $s3 killed $s3 def $q313; CHECK-NEXT:    mov v0.s[1], v1.s[0]14; CHECK-NEXT:    mov v0.s[2], v2.s[0]15; CHECK-NEXT:    mov v0.s[3], v3.s[0]16; CHECK-NEXT:    ret17  %1 = insertelement <4 x float> undef, float %a, i32 018  %2 = insertelement <4 x float> %1, float %b, i32 119  %3 = insertelement <4 x float> %2, float %c, i32 220  %4 = insertelement <4 x float> %3, float %d, i32 321  ret <4 x float> %422}23 24define <8 x i16> @build_all_zero(<8 x i16> %a) #1 {25; CHECK-LABEL: build_all_zero:26; CHECK:       // %bb.0:27; CHECK-NEXT:    mov w8, #44672 // =0xae8028; CHECK-NEXT:    fmov s1, w829; CHECK-NEXT:    mul v0.8h, v0.8h, v1.8h30; CHECK-NEXT:    ret31  %b = add <8 x i16> %a, <i16 -32768, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>32  %c = mul <8 x i16> %b, <i16 -20864, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>33  ret <8 x i16> %c34}35 36; There is an optimization in DAG Combiner as following:37;   fold (concat_vectors (BUILD_VECTOR A, B, ...), (BUILD_VECTOR C, D, ...))38;        -> (BUILD_VECTOR A, B, ..., C, D, ...)39; This case checks when A,B and C,D are different types, there should be no40; assertion failure.41define <8 x i16> @concat_2_build_vector(<4 x i16> %in0) {42; CHECK-LABEL: concat_2_build_vector:43; CHECK:       // %bb.0:44; CHECK-NEXT:    movi v0.2d, #000000000000000045; CHECK-NEXT:    ret46  %vshl_n = shl <4 x i16> %in0, <i16 8, i16 8, i16 8, i16 8>47  %vshl_n2 = shl <4 x i16> %vshl_n, <i16 9, i16 9, i16 9, i16 9>48  %shuffle.i = shufflevector <4 x i16> %vshl_n2, <4 x i16> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>49  ret <8 x i16> %shuffle.i50}51 52; The lowering of a widened f16 BUILD_VECTOR tries to optimize it by building53; an equivalent integer vector and BITCAST-ing that. This case checks that54; normalizing the vector generates a valid result. The choice of the55; constant prevents earlier passes from replacing the BUILD_VECTOR.56define void @widen_f16_build_vector(ptr %addr) {57; CHECK-LABEL: widen_f16_build_vector:58; CHECK:       // %bb.0:59; CHECK-NEXT:    mov w8, #13294 // =0x33ee60; CHECK-NEXT:    movk w8, #13294, lsl #1661; CHECK-NEXT:    str w8, [x0]62; CHECK-NEXT:    ret63  store <2 x half> <half 0xH33EE, half 0xH33EE>, ptr %addr, align 264  ret void65}66 67; Check that a single element vector is constructed with a mov68define <1 x i64> @single_element_vector_i64(<1 x i64> %arg) {69; CHECK-LABEL: single_element_vector_i64:70; CHECK:       // %bb.0: // %entry71; CHECK-NEXT:    mov w8, #1 // =0x172; CHECK-NEXT:    fmov d1, x873; CHECK-NEXT:    add d0, d0, d174; CHECK-NEXT:    ret75entry:76  %add = add <1 x i64> %arg, <i64 1>77  ret <1 x i64> %add78}79 80define <1 x double> @single_element_vector_double(<1 x double> %arg) {81; CHECK-LABEL: single_element_vector_double:82; CHECK:       // %bb.0: // %entry83; CHECK-NEXT:    fmov d1, #1.0000000084; CHECK-NEXT:    fadd d0, d0, d185; CHECK-NEXT:    ret86entry:87  %add = fadd <1 x double> %arg, <double 1.0>88  ret <1 x double> %add89}90 91; Make sure BUILD_VECTOR does not get stuck in a loop trying to convert a92; single element FP vector constant from a scalar to vector.93define <1 x double> @convert_single_fp_vector_constant(i1 %cmp) {94; CHECK-LABEL: convert_single_fp_vector_constant:95; CHECK:       // %bb.0: // %entry96; CHECK-NEXT:    tst w0, #0x197; CHECK-NEXT:    mov x8, #4607182418800017408 // =0x3ff000000000000098; CHECK-NEXT:    csetm x9, ne99; CHECK-NEXT:    fmov d0, x8100; CHECK-NEXT:    fmov d1, x9101; CHECK-NEXT:    and v0.8b, v0.8b, v1.8b102; CHECK-NEXT:    ret103entry:104  %sel = select i1 %cmp, <1 x double> <double 1.000000e+00>, <1 x double> zeroinitializer105  ret <1 x double> %sel106}107 108; All Zero and All -Zero tests.109 110define <2 x double> @poszero_v2f64(<2 x double> %a) {111; CHECK-LABEL: poszero_v2f64:112; CHECK:       // %bb.0:113; CHECK-NEXT:    movi v1.2d, #0000000000000000114; CHECK-NEXT:    fadd v0.2d, v0.2d, v1.2d115; CHECK-NEXT:    ret116  %b = fadd <2 x double> %a, <double 0.0, double 0.0>117  ret <2 x double> %b118}119 120define <2 x double> @negzero_v2f64(<2 x double> %a) {121; CHECK-LABEL: negzero_v2f64:122; CHECK:       // %bb.0:123; CHECK-NEXT:    movi v1.2d, #0000000000000000124; CHECK-NEXT:    fneg v1.2d, v1.2d125; CHECK-NEXT:    fmul v0.2d, v0.2d, v1.2d126; CHECK-NEXT:    ret127  %b = fmul <2 x double> %a, <double -0.0, double -0.0>128  ret <2 x double> %b129}130 131define <1 x double> @poszero_v1f64(<1 x double> %a) {132; CHECK-LABEL: poszero_v1f64:133; CHECK:       // %bb.0:134; CHECK-NEXT:    movi d1, #0000000000000000135; CHECK-NEXT:    fadd d0, d0, d1136; CHECK-NEXT:    ret137  %b = fadd <1 x double> %a, <double 0.0>138  ret <1 x double> %b139}140 141define <1 x double> @negzero_v1f64(<1 x double> %a) {142; CHECK-LABEL: negzero_v1f64:143; CHECK:       // %bb.0:144; CHECK-NEXT:    mov x8, #-9223372036854775808 // =0x8000000000000000145; CHECK-NEXT:    fmov d1, x8146; CHECK-NEXT:    fmul d0, d0, d1147; CHECK-NEXT:    ret148  %b = fmul <1 x double> %a, <double -0.0>149  ret <1 x double> %b150}151 152define <4 x float> @poszero_v4f32(<4 x float> %a) {153; CHECK-LABEL: poszero_v4f32:154; CHECK:       // %bb.0:155; CHECK-NEXT:    movi v1.2d, #0000000000000000156; CHECK-NEXT:    fadd v0.4s, v0.4s, v1.4s157; CHECK-NEXT:    ret158  %b = fadd <4 x float> %a, <float 0.0, float 0.0, float 0.0, float 0.0>159  ret <4 x float> %b160}161 162define <4 x float> @negzero_v4f32(<4 x float> %a) {163; CHECK-LABEL: negzero_v4f32:164; CHECK:       // %bb.0:165; CHECK-NEXT:    movi v1.4s, #128, lsl #24166; CHECK-NEXT:    fmul v0.4s, v0.4s, v1.4s167; CHECK-NEXT:    ret168  %b = fmul <4 x float> %a, <float -0.0, float -0.0, float -0.0, float -0.0>169  ret <4 x float> %b170}171 172define <2 x float> @poszero_v2f32(<2 x float> %a) {173; CHECK-LABEL: poszero_v2f32:174; CHECK:       // %bb.0:175; CHECK-NEXT:    movi d1, #0000000000000000176; CHECK-NEXT:    fadd v0.2s, v0.2s, v1.2s177; CHECK-NEXT:    ret178  %b = fadd <2 x float> %a, <float 0.0, float 0.0>179  ret <2 x float> %b180}181 182define <2 x float> @negzero_v2f32(<2 x float> %a) {183; CHECK-LABEL: negzero_v2f32:184; CHECK:       // %bb.0:185; CHECK-NEXT:    movi v1.2s, #128, lsl #24186; CHECK-NEXT:    fmul v0.2s, v0.2s, v1.2s187; CHECK-NEXT:    ret188  %b = fmul <2 x float> %a, <float -0.0, float -0.0>189  ret <2 x float> %b190}191 192define <8 x half> @poszero_v8f16(<8 x half> %a) {193; CHECK-LABEL: poszero_v8f16:194; CHECK:       // %bb.0:195; CHECK-NEXT:    movi v1.2d, #0000000000000000196; CHECK-NEXT:    fadd v0.8h, v0.8h, v1.8h197; CHECK-NEXT:    ret198  %b = fadd <8 x half> %a, <half 0.0, half 0.0, half 0.0, half 0.0, half 0.0, half 0.0, half 0.0, half 0.0>199  ret <8 x half> %b200}201 202define <8 x half> @negzero_v8f16(<8 x half> %a) {203; CHECK-LABEL: negzero_v8f16:204; CHECK:       // %bb.0:205; CHECK-NEXT:    movi v1.8h, #128, lsl #8206; CHECK-NEXT:    fmul v0.8h, v0.8h, v1.8h207; CHECK-NEXT:    ret208  %b = fmul <8 x half> %a, <half -0.0, half -0.0, half -0.0, half -0.0, half -0.0, half -0.0, half -0.0, half -0.0>209  ret <8 x half> %b210}211 212define <4 x half> @poszero_v4f16(<4 x half> %a) {213; CHECK-LABEL: poszero_v4f16:214; CHECK:       // %bb.0:215; CHECK-NEXT:    movi d1, #0000000000000000216; CHECK-NEXT:    fadd v0.4h, v0.4h, v1.4h217; CHECK-NEXT:    ret218  %b = fadd <4 x half> %a, <half 0.0, half 0.0, half 0.0, half 0.0>219  ret <4 x half> %b220}221 222define <4 x half> @negzero_v4f16(<4 x half> %a) {223; CHECK-LABEL: negzero_v4f16:224; CHECK:       // %bb.0:225; CHECK-NEXT:    movi v1.4h, #128, lsl #8226; CHECK-NEXT:    fmul v0.4h, v0.4h, v1.4h227; CHECK-NEXT:    ret228  %b = fmul <4 x half> %a, <half -0.0, half -0.0, half -0.0, half -0.0>229  ret <4 x half> %b230}231 232define <8 x bfloat> @poszero_v8bf16(<8 x bfloat> %a) {233; CHECK-LABEL: poszero_v8bf16:234; CHECK:       // %bb.0:235; CHECK-NEXT:    movi v0.2d, #0000000000000000236; CHECK-NEXT:    ret237  ret <8 x bfloat> <bfloat 0.0, bfloat 0.0, bfloat 0.0, bfloat 0.0, bfloat 0.0, bfloat 0.0, bfloat 0.0, bfloat 0.0>238}239 240define <8 x bfloat> @negzero_v8bf16(<8 x bfloat> %a) {241; CHECK-LABEL: negzero_v8bf16:242; CHECK:       // %bb.0:243; CHECK-NEXT:    movi v0.8h, #128, lsl #8244; CHECK-NEXT:    ret245  ret <8 x bfloat> <bfloat -0.0, bfloat -0.0, bfloat -0.0, bfloat -0.0, bfloat -0.0, bfloat -0.0, bfloat -0.0, bfloat -0.0>246}247 248define <4 x bfloat> @poszero_v4bf16(<4 x bfloat> %a) {249; CHECK-LABEL: poszero_v4bf16:250; CHECK:       // %bb.0:251; CHECK-NEXT:    movi d0, #0000000000000000252; CHECK-NEXT:    ret253  ret <4 x bfloat> <bfloat 0.0, bfloat 0.0, bfloat 0.0, bfloat 0.0>254}255 256define <4 x bfloat> @negzero_v4bf16(<4 x bfloat> %a) {257; CHECK-LABEL: negzero_v4bf16:258; CHECK:       // %bb.0:259; CHECK-NEXT:    movi v0.4h, #128, lsl #8260; CHECK-NEXT:    ret261  ret <4 x bfloat> <bfloat -0.0, bfloat -0.0, bfloat -0.0, bfloat -0.0>262}263