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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 62# RUN: llc -o - -mtriple=arm64-apple-ios -run-pass=postrapseudos -simplify-mir -verify-machineinstrs -mattr="-zcz-gpr32,-zcz-gpr64" %s \3# RUN: | FileCheck --check-prefix=CHECK-NOZCZ-GPR32-NOZCZ-GPR64 %s4# RUN: llc -o - -mtriple=arm64-apple-ios -run-pass=postrapseudos -simplify-mir -verify-machineinstrs -mattr="+zcz-gpr32,-zcz-gpr64" %s \5# RUN: | FileCheck --check-prefix=CHECK-ZCZ-GPR32-NOZCZ-GPR64 %s6# RUN: llc -o - -mtriple=arm64-apple-ios -run-pass=postrapseudos -simplify-mir -verify-machineinstrs -mattr="-zcz-gpr32,+zcz-gpr64" %s \7# RUN: | FileCheck --check-prefix=CHECK-NOZCZ-GPR32-ZCZ-GPR64 %s8# RUN: llc -o - -mtriple=arm64-apple-ios -run-pass=postrapseudos -simplify-mir -verify-machineinstrs -mattr="+zcz-gpr32,+zcz-gpr64" %s \9# RUN: | FileCheck --check-prefix=CHECK-ZCZ-GPR32-ZCZ-GPR64 %s10 11--- |12 define void @f0(i64 noundef %x) { ret void }13 define void @f1(i64 noundef %x) { ret void }14 define void @f2(i32 noundef) { ret void }15...16---17name: f018liveins:19 - { reg: '$x0' }20body: |21 bb.0:22 liveins: $x0, $lr23 ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-LABEL: name: f024 ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64: liveins: $x0, $lr25 ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-NEXT: {{ $}}26 ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-NEXT: $w0 = ORRWrr $wzr, $wzr27 ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w028 ;29 ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-LABEL: name: f030 ; CHECK-ZCZ-GPR32-NOZCZ-GPR64: liveins: $x0, $lr31 ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-NEXT: {{ $}}32 ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-NEXT: $w0 = MOVZWi 0, 033 ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w034 ;35 ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-LABEL: name: f036 ; CHECK-NOZCZ-GPR32-ZCZ-GPR64: liveins: $x0, $lr37 ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: {{ $}}38 ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: $x0 = MOVZXi 0, 039 ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w040 ;41 ; CHECK-ZCZ-GPR32-ZCZ-GPR64-LABEL: name: f042 ; CHECK-ZCZ-GPR32-ZCZ-GPR64: liveins: $x0, $lr43 ; CHECK-ZCZ-GPR32-ZCZ-GPR64-NEXT: {{ $}}44 ; CHECK-ZCZ-GPR32-ZCZ-GPR64-NEXT: $w0 = MOVZWi 0, 045 ; CHECK-ZCZ-GPR32-ZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w046 $w0 = COPY $wzr47 BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w048...49---50name: f151liveins:52 - { reg: '$x0' }53body: |54 bb.0:55 liveins: $x0, $lr56 ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-LABEL: name: f157 ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64: liveins: $x0, $lr58 ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-NEXT: {{ $}}59 ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-NEXT: $x0 = ORRXrr $xzr, $xzr60 ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w061 ;62 ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-LABEL: name: f163 ; CHECK-ZCZ-GPR32-NOZCZ-GPR64: liveins: $x0, $lr64 ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-NEXT: {{ $}}65 ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-NEXT: $x0 = ORRXrr $xzr, $xzr66 ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w067 ;68 ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-LABEL: name: f169 ; CHECK-NOZCZ-GPR32-ZCZ-GPR64: liveins: $x0, $lr70 ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: {{ $}}71 ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: $x0 = MOVZXi 0, 072 ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w073 ;74 ; CHECK-ZCZ-GPR32-ZCZ-GPR64-LABEL: name: f175 ; CHECK-ZCZ-GPR32-ZCZ-GPR64: liveins: $x0, $lr76 ; CHECK-ZCZ-GPR32-ZCZ-GPR64-NEXT: {{ $}}77 ; CHECK-ZCZ-GPR32-ZCZ-GPR64-NEXT: $x0 = MOVZXi 0, 078 ; CHECK-ZCZ-GPR32-ZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w079 $x0 = COPY $xzr80 BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w081...82