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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=arm64-eabi -mattr=crypto -aarch64-neon-syntax=apple -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=arm64-eabi -mattr=crypto -aarch64-neon-syntax=apple -global-isel -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5 6declare <16 x i8> @llvm.aarch64.crypto.aese(<16 x i8> %data, <16 x i8> %key)7declare <16 x i8> @llvm.aarch64.crypto.aesd(<16 x i8> %data, <16 x i8> %key)8declare <16 x i8> @llvm.aarch64.crypto.aesmc(<16 x i8> %data)9declare <16 x i8> @llvm.aarch64.crypto.aesimc(<16 x i8> %data)10 11define <16 x i8> @test_aese(<16 x i8> %data, <16 x i8> %key) {12; CHECK-LABEL: test_aese:13; CHECK: // %bb.0:14; CHECK-NEXT: aese.16b v0, v115; CHECK-NEXT: ret16 %res = call <16 x i8> @llvm.aarch64.crypto.aese(<16 x i8> %data, <16 x i8> %key)17 ret <16 x i8> %res18}19 20define <16 x i8> @test_aesd(<16 x i8> %data, <16 x i8> %key) {21; CHECK-LABEL: test_aesd:22; CHECK: // %bb.0:23; CHECK-NEXT: aesd.16b v0, v124; CHECK-NEXT: ret25 %res = call <16 x i8> @llvm.aarch64.crypto.aesd(<16 x i8> %data, <16 x i8> %key)26 ret <16 x i8> %res27}28 29define <16 x i8> @test_aesmc(<16 x i8> %data) {30; CHECK-LABEL: test_aesmc:31; CHECK: // %bb.0:32; CHECK-NEXT: aesmc.16b v0, v033; CHECK-NEXT: ret34 %res = call <16 x i8> @llvm.aarch64.crypto.aesmc(<16 x i8> %data)35 ret <16 x i8> %res36}37 38define <16 x i8> @test_aesimc(<16 x i8> %data) {39; CHECK-LABEL: test_aesimc:40; CHECK: // %bb.0:41; CHECK-NEXT: aesimc.16b v0, v042; CHECK-NEXT: ret43 %res = call <16 x i8> @llvm.aarch64.crypto.aesimc(<16 x i8> %data)44 ret <16 x i8> %res45}46 47declare <4 x i32> @llvm.aarch64.crypto.sha1c(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)48declare <4 x i32> @llvm.aarch64.crypto.sha1p(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)49declare <4 x i32> @llvm.aarch64.crypto.sha1m(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)50declare i32 @llvm.aarch64.crypto.sha1h(i32 %hash_e)51declare <4 x i32> @llvm.aarch64.crypto.sha1su0(<4 x i32> %wk0_3, <4 x i32> %wk4_7, <4 x i32> %wk8_11)52declare <4 x i32> @llvm.aarch64.crypto.sha1su1(<4 x i32> %wk0_3, <4 x i32> %wk12_15)53 54define <4 x i32> @test_sha1c(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) {55; CHECK-LABEL: test_sha1c:56; CHECK: // %bb.0:57; CHECK-NEXT: fmov s2, w058; CHECK-NEXT: sha1c.4s q0, s2, v159; CHECK-NEXT: ret60 %res = call <4 x i32> @llvm.aarch64.crypto.sha1c(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)61 ret <4 x i32> %res62}63 64; <rdar://problem/14742333> Incomplete removal of unnecessary FMOV instructions in intrinsic SHA165define <4 x i32> @test_sha1c_in_a_row(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) {66; CHECK-LABEL: test_sha1c_in_a_row:67; CHECK: // %bb.0:68; CHECK-NEXT: fmov s2, w069; CHECK-NEXT: mov.16b v3, v070; CHECK-NEXT: sha1c.4s q3, s2, v171; CHECK-NEXT: sha1c.4s q0, s3, v172; CHECK-NEXT: ret73 %res = call <4 x i32> @llvm.aarch64.crypto.sha1c(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)74 %extract = extractelement <4 x i32> %res, i32 075 %res2 = call <4 x i32> @llvm.aarch64.crypto.sha1c(<4 x i32> %hash_abcd, i32 %extract, <4 x i32> %wk)76 ret <4 x i32> %res277}78 79define <4 x i32> @test_sha1p(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) {80; CHECK-LABEL: test_sha1p:81; CHECK: // %bb.0:82; CHECK-NEXT: fmov s2, w083; CHECK-NEXT: sha1p.4s q0, s2, v184; CHECK-NEXT: ret85 %res = call <4 x i32> @llvm.aarch64.crypto.sha1p(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)86 ret <4 x i32> %res87}88 89define <4 x i32> @test_sha1m(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) {90; CHECK-LABEL: test_sha1m:91; CHECK: // %bb.0:92; CHECK-NEXT: fmov s2, w093; CHECK-NEXT: sha1m.4s q0, s2, v194; CHECK-NEXT: ret95 %res = call <4 x i32> @llvm.aarch64.crypto.sha1m(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)96 ret <4 x i32> %res97}98 99define i32 @test_sha1h(i32 %hash_e) {100; CHECK-LABEL: test_sha1h:101; CHECK: // %bb.0:102; CHECK-NEXT: fmov s0, w0103; CHECK-NEXT: sha1h s0, s0104; CHECK-NEXT: fmov w0, s0105; CHECK-NEXT: ret106 %res = call i32 @llvm.aarch64.crypto.sha1h(i32 %hash_e)107 ret i32 %res108}109 110define <4 x i32> @test_sha1su0(<4 x i32> %wk0_3, <4 x i32> %wk4_7, <4 x i32> %wk8_11) {111; CHECK-LABEL: test_sha1su0:112; CHECK: // %bb.0:113; CHECK-NEXT: sha1su0.4s v0, v1, v2114; CHECK-NEXT: ret115 %res = call <4 x i32> @llvm.aarch64.crypto.sha1su0(<4 x i32> %wk0_3, <4 x i32> %wk4_7, <4 x i32> %wk8_11)116 ret <4 x i32> %res117}118 119define <4 x i32> @test_sha1su1(<4 x i32> %wk0_3, <4 x i32> %wk12_15) {120; CHECK-LABEL: test_sha1su1:121; CHECK: // %bb.0:122; CHECK-NEXT: sha1su1.4s v0, v1123; CHECK-NEXT: ret124 %res = call <4 x i32> @llvm.aarch64.crypto.sha1su1(<4 x i32> %wk0_3, <4 x i32> %wk12_15)125 ret <4 x i32> %res126}127 128declare <4 x i32> @llvm.aarch64.crypto.sha256h(<4 x i32> %hash_abcd, <4 x i32> %hash_efgh, <4 x i32> %wk)129declare <4 x i32> @llvm.aarch64.crypto.sha256h2(<4 x i32> %hash_efgh, <4 x i32> %hash_abcd, <4 x i32> %wk)130declare <4 x i32> @llvm.aarch64.crypto.sha256su0(<4 x i32> %w0_3, <4 x i32> %w4_7)131declare <4 x i32> @llvm.aarch64.crypto.sha256su1(<4 x i32> %w0_3, <4 x i32> %w8_11, <4 x i32> %w12_15)132 133define <4 x i32> @test_sha256h(<4 x i32> %hash_abcd, <4 x i32> %hash_efgh, <4 x i32> %wk) {134; CHECK-LABEL: test_sha256h:135; CHECK: // %bb.0:136; CHECK-NEXT: sha256h.4s q0, q1, v2137; CHECK-NEXT: ret138 %res = call <4 x i32> @llvm.aarch64.crypto.sha256h(<4 x i32> %hash_abcd, <4 x i32> %hash_efgh, <4 x i32> %wk)139 ret <4 x i32> %res140}141 142define <4 x i32> @test_sha256h2(<4 x i32> %hash_efgh, <4 x i32> %hash_abcd, <4 x i32> %wk) {143; CHECK-LABEL: test_sha256h2:144; CHECK: // %bb.0:145; CHECK-NEXT: sha256h2.4s q0, q1, v2146; CHECK-NEXT: ret147 148 %res = call <4 x i32> @llvm.aarch64.crypto.sha256h2(<4 x i32> %hash_efgh, <4 x i32> %hash_abcd, <4 x i32> %wk)149 ret <4 x i32> %res150}151 152define <4 x i32> @test_sha256su0(<4 x i32> %w0_3, <4 x i32> %w4_7) {153; CHECK-LABEL: test_sha256su0:154; CHECK: // %bb.0:155; CHECK-NEXT: sha256su0.4s v0, v1156; CHECK-NEXT: ret157 %res = call <4 x i32> @llvm.aarch64.crypto.sha256su0(<4 x i32> %w0_3, <4 x i32> %w4_7)158 ret <4 x i32> %res159}160 161define <4 x i32> @test_sha256su1(<4 x i32> %w0_3, <4 x i32> %w8_11, <4 x i32> %w12_15) {162; CHECK-LABEL: test_sha256su1:163; CHECK: // %bb.0:164; CHECK-NEXT: sha256su1.4s v0, v1, v2165; CHECK-NEXT: ret166 %res = call <4 x i32> @llvm.aarch64.crypto.sha256su1(<4 x i32> %w0_3, <4 x i32> %w8_11, <4 x i32> %w12_15)167 ret <4 x i32> %res168}169;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:170; CHECK-GI: {{.*}}171; CHECK-SD: {{.*}}172