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1; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s2 3;4; Floating-point scalar convert to signed integer (to nearest with ties to away)5;6define i32 @fcvtas_1w1s(float %A) nounwind {7;CHECK-LABEL: fcvtas_1w1s:8;CHECK: fcvtas w0, s09;CHECK-NEXT: ret10 %tmp3 = call i32 @llvm.aarch64.neon.fcvtas.i32.f32(float %A)11 ret i32 %tmp312}13 14define i64 @fcvtas_1x1s(float %A) nounwind {15;CHECK-LABEL: fcvtas_1x1s:16;CHECK: fcvtas x0, s017;CHECK-NEXT: ret18 %tmp3 = call i64 @llvm.aarch64.neon.fcvtas.i64.f32(float %A)19 ret i64 %tmp320}21 22define i32 @fcvtas_1w1d(double %A) nounwind {23;CHECK-LABEL: fcvtas_1w1d:24;CHECK: fcvtas w0, d025;CHECK-NEXT: ret26 %tmp3 = call i32 @llvm.aarch64.neon.fcvtas.i32.f64(double %A)27 ret i32 %tmp328}29 30define i64 @fcvtas_1x1d(double %A) nounwind {31;CHECK-LABEL: fcvtas_1x1d:32;CHECK: fcvtas x0, d033;CHECK-NEXT: ret34 %tmp3 = call i64 @llvm.aarch64.neon.fcvtas.i64.f64(double %A)35 ret i64 %tmp336}37 38declare i32 @llvm.aarch64.neon.fcvtas.i32.f32(float) nounwind readnone39declare i64 @llvm.aarch64.neon.fcvtas.i64.f32(float) nounwind readnone40declare i32 @llvm.aarch64.neon.fcvtas.i32.f64(double) nounwind readnone41declare i64 @llvm.aarch64.neon.fcvtas.i64.f64(double) nounwind readnone42 43;44; Floating-point scalar convert to unsigned integer45;46define i32 @fcvtau_1w1s(float %A) nounwind {47;CHECK-LABEL: fcvtau_1w1s:48;CHECK: fcvtau w0, s049;CHECK-NEXT: ret50 %tmp3 = call i32 @llvm.aarch64.neon.fcvtau.i32.f32(float %A)51 ret i32 %tmp352}53 54define i64 @fcvtau_1x1s(float %A) nounwind {55;CHECK-LABEL: fcvtau_1x1s:56;CHECK: fcvtau x0, s057;CHECK-NEXT: ret58 %tmp3 = call i64 @llvm.aarch64.neon.fcvtau.i64.f32(float %A)59 ret i64 %tmp360}61 62define i32 @fcvtau_1w1d(double %A) nounwind {63;CHECK-LABEL: fcvtau_1w1d:64;CHECK: fcvtau w0, d065;CHECK-NEXT: ret66 %tmp3 = call i32 @llvm.aarch64.neon.fcvtau.i32.f64(double %A)67 ret i32 %tmp368}69 70define i64 @fcvtau_1x1d(double %A) nounwind {71;CHECK-LABEL: fcvtau_1x1d:72;CHECK: fcvtau x0, d073;CHECK-NEXT: ret74 %tmp3 = call i64 @llvm.aarch64.neon.fcvtau.i64.f64(double %A)75 ret i64 %tmp376}77 78declare i32 @llvm.aarch64.neon.fcvtau.i32.f32(float) nounwind readnone79declare i64 @llvm.aarch64.neon.fcvtau.i64.f32(float) nounwind readnone80declare i32 @llvm.aarch64.neon.fcvtau.i32.f64(double) nounwind readnone81declare i64 @llvm.aarch64.neon.fcvtau.i64.f64(double) nounwind readnone82 83;84; Floating-point scalar convert to signed integer (toward -Inf)85;86define i32 @fcvtms_1w1s(float %A) nounwind {87;CHECK-LABEL: fcvtms_1w1s:88;CHECK: fcvtms w0, s089;CHECK-NEXT: ret90 %tmp3 = call i32 @llvm.aarch64.neon.fcvtms.i32.f32(float %A)91 ret i32 %tmp392}93 94define i64 @fcvtms_1x1s(float %A) nounwind {95;CHECK-LABEL: fcvtms_1x1s:96;CHECK: fcvtms x0, s097;CHECK-NEXT: ret98 %tmp3 = call i64 @llvm.aarch64.neon.fcvtms.i64.f32(float %A)99 ret i64 %tmp3100}101 102define i32 @fcvtms_1w1d(double %A) nounwind {103;CHECK-LABEL: fcvtms_1w1d:104;CHECK: fcvtms w0, d0105;CHECK-NEXT: ret106 %tmp3 = call i32 @llvm.aarch64.neon.fcvtms.i32.f64(double %A)107 ret i32 %tmp3108}109 110define i64 @fcvtms_1x1d(double %A) nounwind {111;CHECK-LABEL: fcvtms_1x1d:112;CHECK: fcvtms x0, d0113;CHECK-NEXT: ret114 %tmp3 = call i64 @llvm.aarch64.neon.fcvtms.i64.f64(double %A)115 ret i64 %tmp3116}117 118declare i32 @llvm.aarch64.neon.fcvtms.i32.f32(float) nounwind readnone119declare i64 @llvm.aarch64.neon.fcvtms.i64.f32(float) nounwind readnone120declare i32 @llvm.aarch64.neon.fcvtms.i32.f64(double) nounwind readnone121declare i64 @llvm.aarch64.neon.fcvtms.i64.f64(double) nounwind readnone122 123;124; Floating-point scalar convert to unsigned integer (toward -Inf)125;126define i32 @fcvtmu_1w1s(float %A) nounwind {127;CHECK-LABEL: fcvtmu_1w1s:128;CHECK: fcvtmu w0, s0129;CHECK-NEXT: ret130 %tmp3 = call i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float %A)131 ret i32 %tmp3132}133 134define i64 @fcvtmu_1x1s(float %A) nounwind {135;CHECK-LABEL: fcvtmu_1x1s:136;CHECK: fcvtmu x0, s0137;CHECK-NEXT: ret138 %tmp3 = call i64 @llvm.aarch64.neon.fcvtmu.i64.f32(float %A)139 ret i64 %tmp3140}141 142define i32 @fcvtmu_1w1d(double %A) nounwind {143;CHECK-LABEL: fcvtmu_1w1d:144;CHECK: fcvtmu w0, d0145;CHECK-NEXT: ret146 %tmp3 = call i32 @llvm.aarch64.neon.fcvtmu.i32.f64(double %A)147 ret i32 %tmp3148}149 150define i64 @fcvtmu_1x1d(double %A) nounwind {151;CHECK-LABEL: fcvtmu_1x1d:152;CHECK: fcvtmu x0, d0153;CHECK-NEXT: ret154 %tmp3 = call i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double %A)155 ret i64 %tmp3156}157 158declare i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float) nounwind readnone159declare i64 @llvm.aarch64.neon.fcvtmu.i64.f32(float) nounwind readnone160declare i32 @llvm.aarch64.neon.fcvtmu.i32.f64(double) nounwind readnone161declare i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double) nounwind readnone162 163;164; Floating-point scalar convert to signed integer (to nearest with ties to even)165;166define i32 @fcvtns_1w1s(float %A) nounwind {167;CHECK-LABEL: fcvtns_1w1s:168;CHECK: fcvtns w0, s0169;CHECK-NEXT: ret170 %tmp3 = call i32 @llvm.aarch64.neon.fcvtns.i32.f32(float %A)171 ret i32 %tmp3172}173 174define i64 @fcvtns_1x1s(float %A) nounwind {175;CHECK-LABEL: fcvtns_1x1s:176;CHECK: fcvtns x0, s0177;CHECK-NEXT: ret178 %tmp3 = call i64 @llvm.aarch64.neon.fcvtns.i64.f32(float %A)179 ret i64 %tmp3180}181 182define i32 @fcvtns_1w1d(double %A) nounwind {183;CHECK-LABEL: fcvtns_1w1d:184;CHECK: fcvtns w0, d0185;CHECK-NEXT: ret186 %tmp3 = call i32 @llvm.aarch64.neon.fcvtns.i32.f64(double %A)187 ret i32 %tmp3188}189 190define i64 @fcvtns_1x1d(double %A) nounwind {191;CHECK-LABEL: fcvtns_1x1d:192;CHECK: fcvtns x0, d0193;CHECK-NEXT: ret194 %tmp3 = call i64 @llvm.aarch64.neon.fcvtns.i64.f64(double %A)195 ret i64 %tmp3196}197 198declare i32 @llvm.aarch64.neon.fcvtns.i32.f32(float) nounwind readnone199declare i64 @llvm.aarch64.neon.fcvtns.i64.f32(float) nounwind readnone200declare i32 @llvm.aarch64.neon.fcvtns.i32.f64(double) nounwind readnone201declare i64 @llvm.aarch64.neon.fcvtns.i64.f64(double) nounwind readnone202 203;204; Floating-point scalar convert to unsigned integer (to nearest with ties to even)205;206define i32 @fcvtnu_1w1s(float %A) nounwind {207;CHECK-LABEL: fcvtnu_1w1s:208;CHECK: fcvtnu w0, s0209;CHECK-NEXT: ret210 %tmp3 = call i32 @llvm.aarch64.neon.fcvtnu.i32.f32(float %A)211 ret i32 %tmp3212}213 214define i64 @fcvtnu_1x1s(float %A) nounwind {215;CHECK-LABEL: fcvtnu_1x1s:216;CHECK: fcvtnu x0, s0217;CHECK-NEXT: ret218 %tmp3 = call i64 @llvm.aarch64.neon.fcvtnu.i64.f32(float %A)219 ret i64 %tmp3220}221 222define i32 @fcvtnu_1w1d(double %A) nounwind {223;CHECK-LABEL: fcvtnu_1w1d:224;CHECK: fcvtnu w0, d0225;CHECK-NEXT: ret226 %tmp3 = call i32 @llvm.aarch64.neon.fcvtnu.i32.f64(double %A)227 ret i32 %tmp3228}229 230define i64 @fcvtnu_1x1d(double %A) nounwind {231;CHECK-LABEL: fcvtnu_1x1d:232;CHECK: fcvtnu x0, d0233;CHECK-NEXT: ret234 %tmp3 = call i64 @llvm.aarch64.neon.fcvtnu.i64.f64(double %A)235 ret i64 %tmp3236}237 238declare i32 @llvm.aarch64.neon.fcvtnu.i32.f32(float) nounwind readnone239declare i64 @llvm.aarch64.neon.fcvtnu.i64.f32(float) nounwind readnone240declare i32 @llvm.aarch64.neon.fcvtnu.i32.f64(double) nounwind readnone241declare i64 @llvm.aarch64.neon.fcvtnu.i64.f64(double) nounwind readnone242 243;244; Floating-point scalar convert to signed integer (toward +Inf)245;246define i32 @fcvtps_1w1s(float %A) nounwind {247;CHECK-LABEL: fcvtps_1w1s:248;CHECK: fcvtps w0, s0249;CHECK-NEXT: ret250 %tmp3 = call i32 @llvm.aarch64.neon.fcvtps.i32.f32(float %A)251 ret i32 %tmp3252}253 254define i64 @fcvtps_1x1s(float %A) nounwind {255;CHECK-LABEL: fcvtps_1x1s:256;CHECK: fcvtps x0, s0257;CHECK-NEXT: ret258 %tmp3 = call i64 @llvm.aarch64.neon.fcvtps.i64.f32(float %A)259 ret i64 %tmp3260}261 262define i32 @fcvtps_1w1d(double %A) nounwind {263;CHECK-LABEL: fcvtps_1w1d:264;CHECK: fcvtps w0, d0265;CHECK-NEXT: ret266 %tmp3 = call i32 @llvm.aarch64.neon.fcvtps.i32.f64(double %A)267 ret i32 %tmp3268}269 270define i64 @fcvtps_1x1d(double %A) nounwind {271;CHECK-LABEL: fcvtps_1x1d:272;CHECK: fcvtps x0, d0273;CHECK-NEXT: ret274 %tmp3 = call i64 @llvm.aarch64.neon.fcvtps.i64.f64(double %A)275 ret i64 %tmp3276}277 278declare i32 @llvm.aarch64.neon.fcvtps.i32.f32(float) nounwind readnone279declare i64 @llvm.aarch64.neon.fcvtps.i64.f32(float) nounwind readnone280declare i32 @llvm.aarch64.neon.fcvtps.i32.f64(double) nounwind readnone281declare i64 @llvm.aarch64.neon.fcvtps.i64.f64(double) nounwind readnone282 283;284; Floating-point scalar convert to unsigned integer (toward +Inf)285;286define i32 @fcvtpu_1w1s(float %A) nounwind {287;CHECK-LABEL: fcvtpu_1w1s:288;CHECK: fcvtpu w0, s0289;CHECK-NEXT: ret290 %tmp3 = call i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float %A)291 ret i32 %tmp3292}293 294define i64 @fcvtpu_1x1s(float %A) nounwind {295;CHECK-LABEL: fcvtpu_1x1s:296;CHECK: fcvtpu x0, s0297;CHECK-NEXT: ret298 %tmp3 = call i64 @llvm.aarch64.neon.fcvtpu.i64.f32(float %A)299 ret i64 %tmp3300}301 302define i32 @fcvtpu_1w1d(double %A) nounwind {303;CHECK-LABEL: fcvtpu_1w1d:304;CHECK: fcvtpu w0, d0305;CHECK-NEXT: ret306 %tmp3 = call i32 @llvm.aarch64.neon.fcvtpu.i32.f64(double %A)307 ret i32 %tmp3308}309 310define i64 @fcvtpu_1x1d(double %A) nounwind {311;CHECK-LABEL: fcvtpu_1x1d:312;CHECK: fcvtpu x0, d0313;CHECK-NEXT: ret314 %tmp3 = call i64 @llvm.aarch64.neon.fcvtpu.i64.f64(double %A)315 ret i64 %tmp3316}317 318declare i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float) nounwind readnone319declare i64 @llvm.aarch64.neon.fcvtpu.i64.f32(float) nounwind readnone320declare i32 @llvm.aarch64.neon.fcvtpu.i32.f64(double) nounwind readnone321declare i64 @llvm.aarch64.neon.fcvtpu.i64.f64(double) nounwind readnone322 323;324; Floating-point scalar convert to signed integer (toward zero)325;326define i32 @fcvtzs_1w1s(float %A) nounwind {327;CHECK-LABEL: fcvtzs_1w1s:328;CHECK: fcvtzs w0, s0329;CHECK-NEXT: ret330 %tmp3 = call i32 @llvm.aarch64.neon.fcvtzs.i32.f32(float %A)331 ret i32 %tmp3332}333 334define i64 @fcvtzs_1x1s(float %A) nounwind {335;CHECK-LABEL: fcvtzs_1x1s:336;CHECK: fcvtzs x0, s0337;CHECK-NEXT: ret338 %tmp3 = call i64 @llvm.aarch64.neon.fcvtzs.i64.f32(float %A)339 ret i64 %tmp3340}341 342define i32 @fcvtzs_1w1d(double %A) nounwind {343;CHECK-LABEL: fcvtzs_1w1d:344;CHECK: fcvtzs w0, d0345;CHECK-NEXT: ret346 %tmp3 = call i32 @llvm.aarch64.neon.fcvtzs.i32.f64(double %A)347 ret i32 %tmp3348}349 350define i64 @fcvtzs_1x1d(double %A) nounwind {351;CHECK-LABEL: fcvtzs_1x1d:352;CHECK: fcvtzs x0, d0353;CHECK-NEXT: ret354 %tmp3 = call i64 @llvm.aarch64.neon.fcvtzs.i64.f64(double %A)355 ret i64 %tmp3356}357 358declare i32 @llvm.aarch64.neon.fcvtzs.i32.f32(float) nounwind readnone359declare i64 @llvm.aarch64.neon.fcvtzs.i64.f32(float) nounwind readnone360declare i32 @llvm.aarch64.neon.fcvtzs.i32.f64(double) nounwind readnone361declare i64 @llvm.aarch64.neon.fcvtzs.i64.f64(double) nounwind readnone362 363;364; Floating-point scalar convert to unsigned integer (toward zero)365;366define i32 @fcvtzu_1w1s(float %A) nounwind {367;CHECK-LABEL: fcvtzu_1w1s:368;CHECK: fcvtzu w0, s0369;CHECK-NEXT: ret370 %tmp3 = call i32 @llvm.aarch64.neon.fcvtzu.i32.f32(float %A)371 ret i32 %tmp3372}373 374define i64 @fcvtzu_1x1s(float %A) nounwind {375;CHECK-LABEL: fcvtzu_1x1s:376;CHECK: fcvtzu x0, s0377;CHECK-NEXT: ret378 %tmp3 = call i64 @llvm.aarch64.neon.fcvtzu.i64.f32(float %A)379 ret i64 %tmp3380}381 382define i32 @fcvtzu_1w1d(double %A) nounwind {383;CHECK-LABEL: fcvtzu_1w1d:384;CHECK: fcvtzu w0, d0385;CHECK-NEXT: ret386 %tmp3 = call i32 @llvm.aarch64.neon.fcvtzu.i32.f64(double %A)387 ret i32 %tmp3388}389 390define i64 @fcvtzu_1x1d(double %A) nounwind {391;CHECK-LABEL: fcvtzu_1x1d:392;CHECK: fcvtzu x0, d0393;CHECK-NEXT: ret394 %tmp3 = call i64 @llvm.aarch64.neon.fcvtzu.i64.f64(double %A)395 ret i64 %tmp3396}397 398declare i32 @llvm.aarch64.neon.fcvtzu.i32.f32(float) nounwind readnone399declare i64 @llvm.aarch64.neon.fcvtzu.i64.f32(float) nounwind readnone400declare i32 @llvm.aarch64.neon.fcvtzu.i32.f64(double) nounwind readnone401declare i64 @llvm.aarch64.neon.fcvtzu.i64.f64(double) nounwind readnone402