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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s --check-prefix=CHECK-SD3; RUN: llc < %s -mtriple=arm64-eabi -global-isel=1 -aarch64-neon-syntax=apple | FileCheck %s --check-prefix=CHECK-GI4 5; Extract of an upper half of a vector is an "ext.16b v0, v0, v0, #8" insn.6 7define <8 x i8> @v8i8(<16 x i8> %a) nounwind {8; CHECK-SD-LABEL: v8i8:9; CHECK-SD: // %bb.0:10; CHECK-SD-NEXT: ext.16b v0, v0, v0, #811; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q012; CHECK-SD-NEXT: ret13;14; CHECK-GI-LABEL: v8i8:15; CHECK-GI: // %bb.0:16; CHECK-GI-NEXT: mov d0, v0[1]17; CHECK-GI-NEXT: ret18 %ret = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>19 ret <8 x i8> %ret20}21 22define <4 x i16> @v4i16(<8 x i16> %a) nounwind {23; CHECK-SD-LABEL: v4i16:24; CHECK-SD: // %bb.0:25; CHECK-SD-NEXT: ext.16b v0, v0, v0, #826; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q027; CHECK-SD-NEXT: ret28;29; CHECK-GI-LABEL: v4i16:30; CHECK-GI: // %bb.0:31; CHECK-GI-NEXT: mov d0, v0[1]32; CHECK-GI-NEXT: ret33 %ret = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>34 ret <4 x i16> %ret35}36 37define <2 x i32> @v2i32(<4 x i32> %a) nounwind {38; CHECK-SD-LABEL: v2i32:39; CHECK-SD: // %bb.0:40; CHECK-SD-NEXT: ext.16b v0, v0, v0, #841; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q042; CHECK-SD-NEXT: ret43;44; CHECK-GI-LABEL: v2i32:45; CHECK-GI: // %bb.0:46; CHECK-GI-NEXT: mov d0, v0[1]47; CHECK-GI-NEXT: ret48 %ret = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> <i32 2, i32 3>49 ret <2 x i32> %ret50}51 52define <1 x i64> @v1i64(<2 x i64> %a) nounwind {53; CHECK-SD-LABEL: v1i64:54; CHECK-SD: // %bb.0:55; CHECK-SD-NEXT: ext.16b v0, v0, v0, #856; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q057; CHECK-SD-NEXT: ret58;59; CHECK-GI-LABEL: v1i64:60; CHECK-GI: // %bb.0:61; CHECK-GI-NEXT: mov d0, v0[1]62; CHECK-GI-NEXT: ret63 %ret = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> <i32 1>64 ret <1 x i64> %ret65}66 67define <1 x ptr> @v1p0(<2 x ptr> %a) nounwind {68; CHECK-SD-LABEL: v1p0:69; CHECK-SD: // %bb.0:70; CHECK-SD-NEXT: ext.16b v0, v0, v0, #871; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q072; CHECK-SD-NEXT: ret73;74; CHECK-GI-LABEL: v1p0:75; CHECK-GI: // %bb.0:76; CHECK-GI-NEXT: mov d0, v0[1]77; CHECK-GI-NEXT: ret78 %ret = shufflevector <2 x ptr> %a, <2 x ptr> %a, <1 x i32> <i32 1>79 ret <1 x ptr> %ret80}81 82define <2 x float> @v2f32(<4 x float> %a) nounwind {83; CHECK-SD-LABEL: v2f32:84; CHECK-SD: // %bb.0:85; CHECK-SD-NEXT: ext.16b v0, v0, v0, #886; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q087; CHECK-SD-NEXT: ret88;89; CHECK-GI-LABEL: v2f32:90; CHECK-GI: // %bb.0:91; CHECK-GI-NEXT: mov d0, v0[1]92; CHECK-GI-NEXT: ret93 %ret = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 2, i32 3>94 ret <2 x float> %ret95}96 97define <1 x double> @v1f64(<2 x double> %a) nounwind {98; CHECK-SD-LABEL: v1f64:99; CHECK-SD: // %bb.0:100; CHECK-SD-NEXT: ext.16b v0, v0, v0, #8101; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0102; CHECK-SD-NEXT: ret103;104; CHECK-GI-LABEL: v1f64:105; CHECK-GI: // %bb.0:106; CHECK-GI-NEXT: mov d0, v0[1]107; CHECK-GI-NEXT: ret108 %ret = shufflevector <2 x double> %a, <2 x double> %a, <1 x i32> <i32 1>109 ret <1 x double> %ret110}111