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1; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -relocation-model=dynamic-no-pic -mtriple=arm64-apple-ios < %s | FileCheck %s --check-prefix=ARM642 3@message = global [80 x i8] c"The LLVM Compiler Infrastructure\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 164@temp = common global [80 x i8] zeroinitializer, align 165 6define void @t1() {7; ARM64-LABEL: t18; ARM64: adrp x8, _message@PAGE9; ARM64: add x0, x8, _message@PAGEOFF10; ARM64: mov [[REG:w[0-9]+]], wzr11; ARM64: mov x2, #8012; ARM64: uxtb w1, [[REG]]13; ARM64: bl _memset14 call void @llvm.memset.p0.i64(ptr align 16 @message, i8 0, i64 80, i1 false)15 ret void16}17 18declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1)19 20define void @t2() {21; ARM64-LABEL: t222; ARM64: adrp x8, _temp@GOTPAGE23; ARM64: ldr x0, [x8, _temp@GOTPAGEOFF]24; ARM64: adrp x8, _message@PAGE25; ARM64: add x1, x8, _message@PAGEOFF26; ARM64: mov x2, #8027; ARM64: bl _memcpy28 call void @llvm.memcpy.p0.p0.i64(ptr align 16 @temp, ptr align 16 @message, i64 80, i1 false)29 ret void30}31 32declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1)33 34define void @t3() {35; ARM64-LABEL: t336; ARM64: adrp x8, _temp@GOTPAGE37; ARM64: ldr x0, [x8, _temp@GOTPAGEOFF]38; ARM64: adrp x8, _message@PAGE39; ARM64: add x1, x8, _message@PAGEOFF40; ARM64: mov x2, #2041; ARM64: bl _memmove42 call void @llvm.memmove.p0.p0.i64(ptr align 16 @temp, ptr align 16 @message, i64 20, i1 false)43 ret void44}45 46declare void @llvm.memmove.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1)47 48define void @t4() {49; ARM64-LABEL: t450; ARM64: adrp x8, _temp@GOTPAGE51; ARM64: ldr [[REG0:x[0-9]+]], [x8, _temp@GOTPAGEOFF]52; ARM64: adrp [[REG1:x[0-9]+]], _message@PAGE53; ARM64: add [[REG2:x[0-9]+]], [[REG1]], _message@PAGEOFF54; ARM64: ldr x10, [[[REG2]]]55; ARM64: str x10, [[[REG0]]]56; ARM64: ldr x10, [[[REG2]], #8]57; ARM64: str x10, [[[REG0]], #8]58; ARM64: ldrb [[REG3:w[0-9]+]], [[[REG2]], #16]59; ARM64: strb [[REG3]], [[[REG0]], #16]60; ARM64: ret61 call void @llvm.memcpy.p0.p0.i64(ptr align 16 @temp, ptr align 16 @message, i64 17, i1 false)62 ret void63}64 65define void @t5() {66; ARM64-LABEL: t567; ARM64: adrp x8, _temp@GOTPAGE68; ARM64: ldr [[REG0:x[0-9]+]], [x8, _temp@GOTPAGEOFF]69; ARM64: adrp [[REG3:x[0-9]+]], _message@PAGE70; ARM64: add [[REG1:x[0-9]+]], [[REG3]], _message@PAGEOFF71; ARM64: ldr x10, [[[REG1]]]72; ARM64: str x10, [[[REG0]]]73; ARM64: ldr x10, [[[REG1]], #8]74; ARM64: str x10, [[[REG0]], #8]75; ARM64: ldrb [[REG4:w[0-9]+]], [[[REG1]], #16]76; ARM64: strb [[REG4]], [[[REG0]], #16]77; ARM64: ret78 call void @llvm.memcpy.p0.p0.i64(ptr align 8 @temp, ptr align 8 @message, i64 17, i1 false)79 ret void80}81 82define void @t6() {83; ARM64-LABEL: t684; ARM64: adrp x8, _temp@GOTPAGE85; ARM64: ldr [[REG0:x[0-9]+]], [x8, _temp@GOTPAGEOFF]86; ARM64: adrp [[REG1:x[0-9]+]], _message@PAGE87; ARM64: add [[REG2:x[0-9]+]], [[REG1]], _message@PAGEOFF88; ARM64: ldr w10, [[[REG2]]]89; ARM64: str w10, [[[REG0]]]90; ARM64: ldr w10, [[[REG2]], #4]91; ARM64: str w10, [[[REG0]], #4]92; ARM64: ldrb [[REG3:w[0-9]+]], [[[REG2]], #8]93; ARM64: strb [[REG3]], [[[REG0]], #8]94; ARM64: ret95 call void @llvm.memcpy.p0.p0.i64(ptr align 4 @temp, ptr align 4 @message, i64 9, i1 false)96 ret void97}98 99define void @t7() {100; ARM64-LABEL: t7101; ARM64: adrp x8, _temp@GOTPAGE102; ARM64: ldr [[REG0:x[0-9]+]], [x8, _temp@GOTPAGEOFF]103; ARM64: adrp [[REG1:x[0-9]+]], _message@PAGE104; ARM64: add [[REG2:x[0-9]+]], [[REG1]], _message@PAGEOFF105; ARM64: ldrh w10, [[[REG2]]]106; ARM64: strh w10, [[[REG0]]]107; ARM64: ldrh w10, [[[REG2]], #2]108; ARM64: strh w10, [[[REG0]], #2]109; ARM64: ldrh w10, [[[REG2]], #4]110; ARM64: strh w10, [[[REG0]], #4]111; ARM64: ldrb [[REG3:w[0-9]+]], [[[REG2]], #6]112; ARM64: strb [[REG3]], [[[REG0]], #6]113; ARM64: ret114 call void @llvm.memcpy.p0.p0.i64(ptr align 2 @temp, ptr align 2 @message, i64 7, i1 false)115 ret void116}117 118define void @t8() {119; ARM64-LABEL: t8120; ARM64: adrp x8, _temp@GOTPAGE121; ARM64: ldr [[REG0:x[0-9]+]], [x8, _temp@GOTPAGEOFF]122; ARM64: adrp [[REG1:x[0-9]+]], _message@PAGE123; ARM64: add [[REG2:x[0-9]+]], [[REG1:x[0-9]+]], _message@PAGEOFF124; ARM64: ldrb w10, [[[REG2]]]125; ARM64: strb w10, [[[REG0]]]126; ARM64: ldrb w10, [[[REG2]], #1]127; ARM64: strb w10, [[[REG0]], #1]128; ARM64: ldrb w10, [[[REG2]], #2]129; ARM64: strb w10, [[[REG0]], #2]130; ARM64: ldrb [[REG3:w[0-9]+]], [[[REG2]], #3]131; ARM64: strb [[REG3]], [[[REG0]], #3]132; ARM64: ret133 call void @llvm.memcpy.p0.p0.i64(ptr align 1 @temp, ptr align 1 @message, i64 4, i1 false)134 ret void135}136 137define void @test_distant_memcpy(ptr %dst) {138; ARM64-LABEL: test_distant_memcpy:139; ARM64: mov [[ARRAY:x[0-9]+]], sp140; ARM64: mov [[OFFSET:x[0-9]+]], #8000141; ARM64: add x[[ADDR:[0-9]+]], [[ARRAY]], [[OFFSET]]142; ARM64: ldrb [[BYTE:w[0-9]+]], [x[[ADDR]]]143; ARM64: strb [[BYTE]], [x0]144 %array = alloca i8, i32 8192145 %elem = getelementptr i8, ptr %array, i32 8000146 call void @llvm.memcpy.p0.p0.i64(ptr %dst, ptr %elem, i64 1, i1 false)147 ret void148}149