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1; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s2 3;; Test returns.4define void @t0() nounwind ssp {5entry:6; CHECK: t07; CHECK: ret8 ret void9}10 11define i32 @t1(i32 %a) nounwind ssp {12entry:13; CHECK: t114; CHECK: str w0, [sp, #12]15; CHECK-NEXT: ldr w0, [sp, #12]16; CHECK: ret17 %a.addr = alloca i32, align 418 store i32 %a, ptr %a.addr, align 419 %tmp = load i32, ptr %a.addr, align 420 ret i32 %tmp21}22 23define i64 @t2(i64 %a) nounwind ssp {24entry:25; CHECK: t226; CHECK: str x0, [sp, #8]27; CHECK-NEXT: ldr x0, [sp, #8]28; CHECK: ret29 %a.addr = alloca i64, align 830 store i64 %a, ptr %a.addr, align 831 %tmp = load i64, ptr %a.addr, align 832 ret i64 %tmp33}34 35define signext i16 @ret_i16(i16 signext %a) nounwind {36entry:37; CHECK: @ret_i1638; CHECK: sxth w0, {{w[0-9]+}}39 %a.addr = alloca i16, align 140 store i16 %a, ptr %a.addr, align 141 %0 = load i16, ptr %a.addr, align 142 ret i16 %043}44 45define signext i8 @ret_i8(i8 signext %a) nounwind {46entry:47; CHECK: @ret_i848; CHECK: sxtb w0, {{w[0-9]+}}49 %a.addr = alloca i8, align 150 store i8 %a, ptr %a.addr, align 151 %0 = load i8, ptr %a.addr, align 152 ret i8 %053}54 55define signext i1 @ret_i1(i1 signext %a) nounwind {56entry:57; CHECK: @ret_i158; CHECK: and [[REG:w[0-9]+]], {{w[0-9]+}}, #0x159; CHECK: sbfx w0, [[REG]], #0, #160 %a.addr = alloca i1, align 161 store i1 %a, ptr %a.addr, align 162 %0 = load i1, ptr %a.addr, align 163 ret i1 %064}65