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1; RUN: llc < %s -asm-verbose=false -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s2 3define float @test_f32(ptr %A, ptr %B, ptr %C) nounwind {4;CHECK-LABEL: test_f32:5;CHECK: fmadd6;CHECK-NOT: fmadd7 %tmp1 = load float, ptr %A8 %tmp2 = load float, ptr %B9 %tmp3 = load float, ptr %C10 %tmp4 = call float @llvm.fmuladd.f32(float %tmp1, float %tmp2, float %tmp3)11 ret float %tmp412}13 14define <2 x float> @test_v2f32(ptr %A, ptr %B, ptr %C) nounwind {15;CHECK-LABEL: test_v2f32:16;CHECK: fmla.2s17;CHECK-NOT: fmla.2s18 %tmp1 = load <2 x float>, ptr %A19 %tmp2 = load <2 x float>, ptr %B20 %tmp3 = load <2 x float>, ptr %C21 %tmp4 = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %tmp1, <2 x float> %tmp2, <2 x float> %tmp3)22 ret <2 x float> %tmp423}24 25define <4 x float> @test_v4f32(ptr %A, ptr %B, ptr %C) nounwind {26;CHECK-LABEL: test_v4f32:27;CHECK: fmla.4s28;CHECK-NOT: fmla.4s29 %tmp1 = load <4 x float>, ptr %A30 %tmp2 = load <4 x float>, ptr %B31 %tmp3 = load <4 x float>, ptr %C32 %tmp4 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %tmp1, <4 x float> %tmp2, <4 x float> %tmp3)33 ret <4 x float> %tmp434}35 36define <8 x float> @test_v8f32(ptr %A, ptr %B, ptr %C) nounwind {37;CHECK-LABEL: test_v8f32:38;CHECK: fmla.4s39;CHECK: fmla.4s40;CHECK-NOT: fmla.4s41 %tmp1 = load <8 x float>, ptr %A42 %tmp2 = load <8 x float>, ptr %B43 %tmp3 = load <8 x float>, ptr %C44 %tmp4 = call <8 x float> @llvm.fmuladd.v8f32(<8 x float> %tmp1, <8 x float> %tmp2, <8 x float> %tmp3)45 ret <8 x float> %tmp446}47 48define double @test_f64(ptr %A, ptr %B, ptr %C) nounwind {49;CHECK-LABEL: test_f64:50;CHECK: fmadd51;CHECK-NOT: fmadd52 %tmp1 = load double, ptr %A53 %tmp2 = load double, ptr %B54 %tmp3 = load double, ptr %C55 %tmp4 = call double @llvm.fmuladd.f64(double %tmp1, double %tmp2, double %tmp3)56 ret double %tmp457}58 59define <2 x double> @test_v2f64(ptr %A, ptr %B, ptr %C) nounwind {60;CHECK-LABEL: test_v2f64:61;CHECK: fmla.2d62;CHECK-NOT: fmla.2d63 %tmp1 = load <2 x double>, ptr %A64 %tmp2 = load <2 x double>, ptr %B65 %tmp3 = load <2 x double>, ptr %C66 %tmp4 = call <2 x double> @llvm.fmuladd.v2f64(<2 x double> %tmp1, <2 x double> %tmp2, <2 x double> %tmp3)67 ret <2 x double> %tmp468}69 70define <4 x double> @test_v4f64(ptr %A, ptr %B, ptr %C) nounwind {71;CHECK-LABEL: test_v4f64:72;CHECK: fmla.2d73;CHECK: fmla.2d74;CHECK-NOT: fmla.2d75 %tmp1 = load <4 x double>, ptr %A76 %tmp2 = load <4 x double>, ptr %B77 %tmp3 = load <4 x double>, ptr %C78 %tmp4 = call <4 x double> @llvm.fmuladd.v4f64(<4 x double> %tmp1, <4 x double> %tmp2, <4 x double> %tmp3)79 ret <4 x double> %tmp480}81 82declare float @llvm.fmuladd.f32(float, float, float) nounwind readnone83declare <2 x float> @llvm.fmuladd.v2f32(<2 x float>, <2 x float>, <2 x float>) nounwind readnone84declare <4 x float> @llvm.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>) nounwind readnone85declare <8 x float> @llvm.fmuladd.v8f32(<8 x float>, <8 x float>, <8 x float>) nounwind readnone86declare double @llvm.fmuladd.f64(double, double, double) nounwind readnone87declare <2 x double> @llvm.fmuladd.v2f64(<2 x double>, <2 x double>, <2 x double>) nounwind readnone88declare <4 x double> @llvm.fmuladd.v4f64(<4 x double>, <4 x double>, <4 x double>) nounwind readnone89