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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=arm64-linux-gnu -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=arm64-linux-gnu -verify-machineinstrs -global-isel -global-isel-abort=2 < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5; CHECK-GI: warning: Instruction selection used fallback path for test_neg_sub6 7define fp128 @test_add(fp128 %lhs, fp128 %rhs) {8; CHECK-LABEL: test_add:9; CHECK: // %bb.0:10; CHECK-NEXT: b __addtf311 %val = fadd fp128 %lhs, %rhs12 ret fp128 %val13}14 15define fp128 @test_sub(fp128 %lhs, fp128 %rhs) {16; CHECK-LABEL: test_sub:17; CHECK: // %bb.0:18; CHECK-NEXT: b __subtf319 %val = fsub fp128 %lhs, %rhs20 ret fp128 %val21}22 23define fp128 @test_mul(fp128 %lhs, fp128 %rhs) {24; CHECK-LABEL: test_mul:25; CHECK: // %bb.0:26; CHECK-NEXT: b __multf327 %val = fmul fp128 %lhs, %rhs28 ret fp128 %val29}30 31define fp128 @test_div(fp128 %lhs, fp128 %rhs) {32; CHECK-LABEL: test_div:33; CHECK: // %bb.0:34; CHECK-NEXT: b __divtf335 %val = fdiv fp128 %lhs, %rhs36 ret fp128 %val37}38 39define i32 @test_fptosi_32(fp128 %val) {40; CHECK-SD-LABEL: test_fptosi_32:41; CHECK-SD: // %bb.0:42; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill43; CHECK-SD-NEXT: .cfi_def_cfa_offset 1644; CHECK-SD-NEXT: .cfi_offset w30, -1645; CHECK-SD-NEXT: bl __fixtfsi46; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload47; CHECK-SD-NEXT: ret48;49; CHECK-GI-LABEL: test_fptosi_32:50; CHECK-GI: // %bb.0:51; CHECK-GI-NEXT: b __fixtfsi52 %val32 = fptosi fp128 %val to i3253 ret i32 %val3254}55 56define i64 @test_fptosi_64(fp128 %val) {57; CHECK-SD-LABEL: test_fptosi_64:58; CHECK-SD: // %bb.0:59; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill60; CHECK-SD-NEXT: .cfi_def_cfa_offset 1661; CHECK-SD-NEXT: .cfi_offset w30, -1662; CHECK-SD-NEXT: bl __fixtfdi63; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload64; CHECK-SD-NEXT: ret65;66; CHECK-GI-LABEL: test_fptosi_64:67; CHECK-GI: // %bb.0:68; CHECK-GI-NEXT: b __fixtfdi69 %val64 = fptosi fp128 %val to i6470 ret i64 %val6471}72 73define i32 @test_fptoui_32(fp128 %val) {74; CHECK-SD-LABEL: test_fptoui_32:75; CHECK-SD: // %bb.0:76; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill77; CHECK-SD-NEXT: .cfi_def_cfa_offset 1678; CHECK-SD-NEXT: .cfi_offset w30, -1679; CHECK-SD-NEXT: bl __fixunstfsi80; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload81; CHECK-SD-NEXT: ret82;83; CHECK-GI-LABEL: test_fptoui_32:84; CHECK-GI: // %bb.0:85; CHECK-GI-NEXT: b __fixunstfsi86 %val32 = fptoui fp128 %val to i3287 ret i32 %val3288}89 90define i64 @test_fptoui_64(fp128 %val) {91; CHECK-SD-LABEL: test_fptoui_64:92; CHECK-SD: // %bb.0:93; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill94; CHECK-SD-NEXT: .cfi_def_cfa_offset 1695; CHECK-SD-NEXT: .cfi_offset w30, -1696; CHECK-SD-NEXT: bl __fixunstfdi97; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload98; CHECK-SD-NEXT: ret99;100; CHECK-GI-LABEL: test_fptoui_64:101; CHECK-GI: // %bb.0:102; CHECK-GI-NEXT: b __fixunstfdi103 %val64 = fptoui fp128 %val to i64104 ret i64 %val64105}106 107define fp128 @test_sitofp_32(i32 %src32) {108; CHECK-SD-LABEL: test_sitofp_32:109; CHECK-SD: // %bb.0:110; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill111; CHECK-SD-NEXT: .cfi_def_cfa_offset 16112; CHECK-SD-NEXT: .cfi_offset w30, -16113; CHECK-SD-NEXT: bl __floatsitf114; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload115; CHECK-SD-NEXT: ret116;117; CHECK-GI-LABEL: test_sitofp_32:118; CHECK-GI: // %bb.0:119; CHECK-GI-NEXT: b __floatsitf120 %val32 = sitofp i32 %src32 to fp128121 ret fp128 %val32122}123 124define fp128 @test_sitofp_64(i64 %src64) {125; CHECK-SD-LABEL: test_sitofp_64:126; CHECK-SD: // %bb.0:127; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill128; CHECK-SD-NEXT: .cfi_def_cfa_offset 16129; CHECK-SD-NEXT: .cfi_offset w30, -16130; CHECK-SD-NEXT: bl __floatditf131; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload132; CHECK-SD-NEXT: ret133;134; CHECK-GI-LABEL: test_sitofp_64:135; CHECK-GI: // %bb.0:136; CHECK-GI-NEXT: b __floatditf137 %val64 = sitofp i64 %src64 to fp128138 ret fp128 %val64139}140 141define fp128 @test_uitofp_32(i32 %src32) {142; CHECK-SD-LABEL: test_uitofp_32:143; CHECK-SD: // %bb.0:144; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill145; CHECK-SD-NEXT: .cfi_def_cfa_offset 16146; CHECK-SD-NEXT: .cfi_offset w30, -16147; CHECK-SD-NEXT: bl __floatunsitf148; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload149; CHECK-SD-NEXT: ret150;151; CHECK-GI-LABEL: test_uitofp_32:152; CHECK-GI: // %bb.0:153; CHECK-GI-NEXT: b __floatunsitf154 %val32 = uitofp i32 %src32 to fp128155 ret fp128 %val32156}157 158define fp128 @test_uitofp_64(i64 %src64) {159; CHECK-SD-LABEL: test_uitofp_64:160; CHECK-SD: // %bb.0:161; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill162; CHECK-SD-NEXT: .cfi_def_cfa_offset 16163; CHECK-SD-NEXT: .cfi_offset w30, -16164; CHECK-SD-NEXT: bl __floatunditf165; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload166; CHECK-SD-NEXT: ret167;168; CHECK-GI-LABEL: test_uitofp_64:169; CHECK-GI: // %bb.0:170; CHECK-GI-NEXT: b __floatunditf171 %val64 = uitofp i64 %src64 to fp128172 ret fp128 %val64173}174 175; Technically, everything after the call to __letf2 is redundant, but we'll let176; LLVM have its fun for now.177define i1 @test_setcc1(fp128 %lhs, fp128 %rhs) {178; CHECK-LABEL: test_setcc1:179; CHECK: // %bb.0:180; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill181; CHECK-NEXT: .cfi_def_cfa_offset 16182; CHECK-NEXT: .cfi_offset w30, -16183; CHECK-NEXT: bl __letf2184; CHECK-NEXT: cmp w0, #0185; CHECK-NEXT: cset w0, le186; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload187; CHECK-NEXT: ret188 %val = fcmp ole fp128 %lhs, %rhs189 ret i1 %val190}191 192define i1 @test_setcc2(fp128 %lhs, fp128 %rhs) {193; CHECK-LABEL: test_setcc2:194; CHECK: // %bb.0:195; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill196; CHECK-NEXT: .cfi_def_cfa_offset 16197; CHECK-NEXT: .cfi_offset w30, -16198; CHECK-NEXT: bl __letf2199; CHECK-NEXT: cmp w0, #0200; CHECK-NEXT: cset w0, gt201; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload202; CHECK-NEXT: ret203 %val = fcmp ugt fp128 %lhs, %rhs204 ret i1 %val205}206 207define i1 @test_setcc3(fp128 %lhs, fp128 %rhs) {208; CHECK-SD-LABEL: test_setcc3:209; CHECK-SD: // %bb.0:210; CHECK-SD-NEXT: sub sp, sp, #48211; CHECK-SD-NEXT: stp x30, x19, [sp, #32] // 16-byte Folded Spill212; CHECK-SD-NEXT: .cfi_def_cfa_offset 48213; CHECK-SD-NEXT: .cfi_offset w19, -8214; CHECK-SD-NEXT: .cfi_offset w30, -16215; CHECK-SD-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill216; CHECK-SD-NEXT: bl __eqtf2217; CHECK-SD-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload218; CHECK-SD-NEXT: mov w19, w0219; CHECK-SD-NEXT: bl __unordtf2220; CHECK-SD-NEXT: cmp w0, #0221; CHECK-SD-NEXT: ccmp w19, #0, #4, eq222; CHECK-SD-NEXT: ldp x30, x19, [sp, #32] // 16-byte Folded Reload223; CHECK-SD-NEXT: cset w0, eq224; CHECK-SD-NEXT: add sp, sp, #48225; CHECK-SD-NEXT: ret226;227; CHECK-GI-LABEL: test_setcc3:228; CHECK-GI: // %bb.0:229; CHECK-GI-NEXT: sub sp, sp, #48230; CHECK-GI-NEXT: stp x30, x19, [sp, #32] // 16-byte Folded Spill231; CHECK-GI-NEXT: .cfi_def_cfa_offset 48232; CHECK-GI-NEXT: .cfi_offset w19, -8233; CHECK-GI-NEXT: .cfi_offset w30, -16234; CHECK-GI-NEXT: stp q1, q0, [sp] // 32-byte Folded Spill235; CHECK-GI-NEXT: bl __eqtf2236; CHECK-GI-NEXT: ldp q1, q0, [sp] // 32-byte Folded Reload237; CHECK-GI-NEXT: cmp w0, #0238; CHECK-GI-NEXT: cset w19, eq239; CHECK-GI-NEXT: bl __unordtf2240; CHECK-GI-NEXT: cmp w0, #0241; CHECK-GI-NEXT: cset w8, ne242; CHECK-GI-NEXT: orr w0, w19, w8243; CHECK-GI-NEXT: ldp x30, x19, [sp, #32] // 16-byte Folded Reload244; CHECK-GI-NEXT: add sp, sp, #48245; CHECK-GI-NEXT: ret246 %val = fcmp ueq fp128 %lhs, %rhs247 ret i1 %val248}249 250; olt == !uge, which LLVM optimizes this to.251define i32 @test_br_cc(fp128 %lhs, fp128 %rhs) {252; CHECK-SD-LABEL: test_br_cc:253; CHECK-SD: // %bb.0: // %common.ret254; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill255; CHECK-SD-NEXT: .cfi_def_cfa_offset 16256; CHECK-SD-NEXT: .cfi_offset w30, -16257; CHECK-SD-NEXT: bl __lttf2258; CHECK-SD-NEXT: mov w8, #29 // =0x1d259; CHECK-SD-NEXT: cmp w0, #0260; CHECK-SD-NEXT: mov w9, #42 // =0x2a261; CHECK-SD-NEXT: csel w0, w9, w8, mi262; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload263; CHECK-SD-NEXT: ret264;265; CHECK-GI-LABEL: test_br_cc:266; CHECK-GI: // %bb.0: // %common.ret267; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill268; CHECK-GI-NEXT: .cfi_def_cfa_offset 16269; CHECK-GI-NEXT: .cfi_offset w30, -16270; CHECK-GI-NEXT: bl __lttf2271; CHECK-GI-NEXT: mov w8, #29 // =0x1d272; CHECK-GI-NEXT: mov w9, #42 // =0x2a273; CHECK-GI-NEXT: cmp w0, #0274; CHECK-GI-NEXT: csel w0, w9, w8, mi275; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload276; CHECK-GI-NEXT: ret277 %cond = fcmp olt fp128 %lhs, %rhs278 br i1 %cond, label %iftrue, label %iffalse279 280iftrue:281 ret i32 42282iffalse:283 ret i32 29284}285 286define fp128 @test_select(i1 %cond, fp128 %lhs, fp128 %rhs) {287; CHECK-SD-LABEL: test_select:288; CHECK-SD: // %bb.0:289; CHECK-SD-NEXT: tst w0, #0x1290; CHECK-SD-NEXT: b.eq .LBB16_2291; CHECK-SD-NEXT: // %bb.1:292; CHECK-SD-NEXT: mov v1.16b, v0.16b293; CHECK-SD-NEXT: .LBB16_2:294; CHECK-SD-NEXT: mov v0.16b, v1.16b295; CHECK-SD-NEXT: ret296;297; CHECK-GI-LABEL: test_select:298; CHECK-GI: // %bb.0:299; CHECK-GI-NEXT: and w8, w0, #0x1300; CHECK-GI-NEXT: mov d2, v0.d[1]301; CHECK-GI-NEXT: mov d3, v1.d[1]302; CHECK-GI-NEXT: tst w8, #0x1303; CHECK-GI-NEXT: fcsel d0, d0, d1, ne304; CHECK-GI-NEXT: fcsel d1, d2, d3, ne305; CHECK-GI-NEXT: fmov x8, d0306; CHECK-GI-NEXT: mov v0.d[0], x8307; CHECK-GI-NEXT: fmov x8, d1308; CHECK-GI-NEXT: mov v0.d[1], x8309; CHECK-GI-NEXT: ret310 %val = select i1 %cond, fp128 %lhs, fp128 %rhs311 ret fp128 %val312}313 314define half @test_round_f16(fp128 %val) {315; CHECK-SD-LABEL: test_round_f16:316; CHECK-SD: // %bb.0:317; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill318; CHECK-SD-NEXT: .cfi_def_cfa_offset 16319; CHECK-SD-NEXT: .cfi_offset w30, -16320; CHECK-SD-NEXT: bl __trunctfhf2321; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload322; CHECK-SD-NEXT: ret323;324; CHECK-GI-LABEL: test_round_f16:325; CHECK-GI: // %bb.0:326; CHECK-GI-NEXT: b __trunctfhf2327 %dst = fptrunc fp128 %val to half328 ret half %dst329}330 331define float @test_round_f32(fp128 %val) {332; CHECK-SD-LABEL: test_round_f32:333; CHECK-SD: // %bb.0:334; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill335; CHECK-SD-NEXT: .cfi_def_cfa_offset 16336; CHECK-SD-NEXT: .cfi_offset w30, -16337; CHECK-SD-NEXT: bl __trunctfsf2338; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload339; CHECK-SD-NEXT: ret340;341; CHECK-GI-LABEL: test_round_f32:342; CHECK-GI: // %bb.0:343; CHECK-GI-NEXT: b __trunctfsf2344 %dst = fptrunc fp128 %val to float345 ret float %dst346}347 348define double @test_round_f64(fp128 %val) {349; CHECK-SD-LABEL: test_round_f64:350; CHECK-SD: // %bb.0:351; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill352; CHECK-SD-NEXT: .cfi_def_cfa_offset 16353; CHECK-SD-NEXT: .cfi_offset w30, -16354; CHECK-SD-NEXT: bl __trunctfdf2355; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload356; CHECK-SD-NEXT: ret357;358; CHECK-GI-LABEL: test_round_f64:359; CHECK-GI: // %bb.0:360; CHECK-GI-NEXT: b __trunctfdf2361 %dst = fptrunc fp128 %val to double362 ret double %dst363}364 365define fp128 @test_extend_f16(half %val) {366; CHECK-LABEL: test_extend_f16:367; CHECK: // %bb.0:368; CHECK-NEXT: b __extendhftf2369 %dst = fpext half %val to fp128370 ret fp128 %dst371}372 373define fp128 @test_extend_f32(float %val) {374; CHECK-LABEL: test_extend_f32:375; CHECK: // %bb.0:376; CHECK-NEXT: b __extendsftf2377 %dst = fpext float %val to fp128378 ret fp128 %dst379}380 381define fp128 @test_extend_f64(double %val) {382; CHECK-LABEL: test_extend_f64:383; CHECK: // %bb.0:384; CHECK-NEXT: b __extenddftf2385 %dst = fpext double %val to fp128386 ret fp128 %dst387}388 389;; We convert this to fneg, and target-independent code expands it with390;; integer operations.391define fp128 @test_neg_sub(fp128 %in) {392; CHECK-LABEL: test_neg_sub:393; CHECK: // %bb.0:394; CHECK-NEXT: str q0, [sp, #-16]!395; CHECK-NEXT: .cfi_def_cfa_offset 16396; CHECK-NEXT: ldrb w8, [sp, #15]397; CHECK-NEXT: eor w8, w8, #0x80398; CHECK-NEXT: strb w8, [sp, #15]399; CHECK-NEXT: ldr q0, [sp], #16400; CHECK-NEXT: ret401 %ret = fsub fp128 0xL00000000000000008000000000000000, %in402 ret fp128 %ret403}404 405define fp128 @test_neg(fp128 %in) {406; CHECK-SD-LABEL: test_neg:407; CHECK-SD: // %bb.0:408; CHECK-SD-NEXT: str q0, [sp, #-16]!409; CHECK-SD-NEXT: .cfi_def_cfa_offset 16410; CHECK-SD-NEXT: ldrb w8, [sp, #15]411; CHECK-SD-NEXT: eor w8, w8, #0x80412; CHECK-SD-NEXT: strb w8, [sp, #15]413; CHECK-SD-NEXT: ldr q0, [sp], #16414; CHECK-SD-NEXT: ret415;416; CHECK-GI-LABEL: test_neg:417; CHECK-GI: // %bb.0:418; CHECK-GI-NEXT: mov x8, v0.d[1]419; CHECK-GI-NEXT: mov v0.d[0], v0.d[0]420; CHECK-GI-NEXT: eor x8, x8, #0x8000000000000000421; CHECK-GI-NEXT: mov v0.d[1], x8422; CHECK-GI-NEXT: ret423 %ret = fneg fp128 %in424 ret fp128 %ret425}426 427 428 429define <2 x fp128> @vec_add(<2 x fp128> %lhs, <2 x fp128> %rhs) {430; CHECK-SD-LABEL: vec_add:431; CHECK-SD: // %bb.0:432; CHECK-SD-NEXT: sub sp, sp, #64433; CHECK-SD-NEXT: str x30, [sp, #48] // 8-byte Spill434; CHECK-SD-NEXT: .cfi_def_cfa_offset 64435; CHECK-SD-NEXT: .cfi_offset w30, -16436; CHECK-SD-NEXT: stp q1, q3, [sp, #16] // 32-byte Folded Spill437; CHECK-SD-NEXT: mov v1.16b, v2.16b438; CHECK-SD-NEXT: bl __addtf3439; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill440; CHECK-SD-NEXT: ldp q0, q1, [sp, #16] // 32-byte Folded Reload441; CHECK-SD-NEXT: bl __addtf3442; CHECK-SD-NEXT: mov v1.16b, v0.16b443; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload444; CHECK-SD-NEXT: ldr x30, [sp, #48] // 8-byte Reload445; CHECK-SD-NEXT: add sp, sp, #64446; CHECK-SD-NEXT: ret447;448; CHECK-GI-LABEL: vec_add:449; CHECK-GI: // %bb.0:450; CHECK-GI-NEXT: sub sp, sp, #64451; CHECK-GI-NEXT: str x30, [sp, #48] // 8-byte Spill452; CHECK-GI-NEXT: .cfi_def_cfa_offset 64453; CHECK-GI-NEXT: .cfi_offset w30, -16454; CHECK-GI-NEXT: stp q3, q1, [sp, #16] // 32-byte Folded Spill455; CHECK-GI-NEXT: mov v1.16b, v2.16b456; CHECK-GI-NEXT: bl __addtf3457; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill458; CHECK-GI-NEXT: ldp q1, q0, [sp, #16] // 32-byte Folded Reload459; CHECK-GI-NEXT: bl __addtf3460; CHECK-GI-NEXT: mov v1.16b, v0.16b461; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload462; CHECK-GI-NEXT: ldr x30, [sp, #48] // 8-byte Reload463; CHECK-GI-NEXT: add sp, sp, #64464; CHECK-GI-NEXT: ret465 %val = fadd <2 x fp128> %lhs, %rhs466 ret <2 x fp128> %val467}468 469define <2 x fp128> @vec_sub(<2 x fp128> %lhs, <2 x fp128> %rhs) {470; CHECK-SD-LABEL: vec_sub:471; CHECK-SD: // %bb.0:472; CHECK-SD-NEXT: sub sp, sp, #64473; CHECK-SD-NEXT: str x30, [sp, #48] // 8-byte Spill474; CHECK-SD-NEXT: .cfi_def_cfa_offset 64475; CHECK-SD-NEXT: .cfi_offset w30, -16476; CHECK-SD-NEXT: stp q1, q3, [sp, #16] // 32-byte Folded Spill477; CHECK-SD-NEXT: mov v1.16b, v2.16b478; CHECK-SD-NEXT: bl __subtf3479; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill480; CHECK-SD-NEXT: ldp q0, q1, [sp, #16] // 32-byte Folded Reload481; CHECK-SD-NEXT: bl __subtf3482; CHECK-SD-NEXT: mov v1.16b, v0.16b483; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload484; CHECK-SD-NEXT: ldr x30, [sp, #48] // 8-byte Reload485; CHECK-SD-NEXT: add sp, sp, #64486; CHECK-SD-NEXT: ret487;488; CHECK-GI-LABEL: vec_sub:489; CHECK-GI: // %bb.0:490; CHECK-GI-NEXT: sub sp, sp, #64491; CHECK-GI-NEXT: str x30, [sp, #48] // 8-byte Spill492; CHECK-GI-NEXT: .cfi_def_cfa_offset 64493; CHECK-GI-NEXT: .cfi_offset w30, -16494; CHECK-GI-NEXT: stp q3, q1, [sp, #16] // 32-byte Folded Spill495; CHECK-GI-NEXT: mov v1.16b, v2.16b496; CHECK-GI-NEXT: bl __subtf3497; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill498; CHECK-GI-NEXT: ldp q1, q0, [sp, #16] // 32-byte Folded Reload499; CHECK-GI-NEXT: bl __subtf3500; CHECK-GI-NEXT: mov v1.16b, v0.16b501; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload502; CHECK-GI-NEXT: ldr x30, [sp, #48] // 8-byte Reload503; CHECK-GI-NEXT: add sp, sp, #64504; CHECK-GI-NEXT: ret505 %val = fsub <2 x fp128> %lhs, %rhs506 ret <2 x fp128> %val507}508 509define <2 x fp128> @vec_mul(<2 x fp128> %lhs, <2 x fp128> %rhs) {510; CHECK-SD-LABEL: vec_mul:511; CHECK-SD: // %bb.0:512; CHECK-SD-NEXT: sub sp, sp, #64513; CHECK-SD-NEXT: str x30, [sp, #48] // 8-byte Spill514; CHECK-SD-NEXT: .cfi_def_cfa_offset 64515; CHECK-SD-NEXT: .cfi_offset w30, -16516; CHECK-SD-NEXT: stp q1, q3, [sp, #16] // 32-byte Folded Spill517; CHECK-SD-NEXT: mov v1.16b, v2.16b518; CHECK-SD-NEXT: bl __multf3519; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill520; CHECK-SD-NEXT: ldp q0, q1, [sp, #16] // 32-byte Folded Reload521; CHECK-SD-NEXT: bl __multf3522; CHECK-SD-NEXT: mov v1.16b, v0.16b523; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload524; CHECK-SD-NEXT: ldr x30, [sp, #48] // 8-byte Reload525; CHECK-SD-NEXT: add sp, sp, #64526; CHECK-SD-NEXT: ret527;528; CHECK-GI-LABEL: vec_mul:529; CHECK-GI: // %bb.0:530; CHECK-GI-NEXT: sub sp, sp, #64531; CHECK-GI-NEXT: str x30, [sp, #48] // 8-byte Spill532; CHECK-GI-NEXT: .cfi_def_cfa_offset 64533; CHECK-GI-NEXT: .cfi_offset w30, -16534; CHECK-GI-NEXT: stp q3, q1, [sp, #16] // 32-byte Folded Spill535; CHECK-GI-NEXT: mov v1.16b, v2.16b536; CHECK-GI-NEXT: bl __multf3537; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill538; CHECK-GI-NEXT: ldp q1, q0, [sp, #16] // 32-byte Folded Reload539; CHECK-GI-NEXT: bl __multf3540; CHECK-GI-NEXT: mov v1.16b, v0.16b541; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload542; CHECK-GI-NEXT: ldr x30, [sp, #48] // 8-byte Reload543; CHECK-GI-NEXT: add sp, sp, #64544; CHECK-GI-NEXT: ret545 %val = fmul <2 x fp128> %lhs, %rhs546 ret <2 x fp128> %val547}548 549define <2 x fp128> @vec_div(<2 x fp128> %lhs, <2 x fp128> %rhs) {550; CHECK-SD-LABEL: vec_div:551; CHECK-SD: // %bb.0:552; CHECK-SD-NEXT: sub sp, sp, #64553; CHECK-SD-NEXT: str x30, [sp, #48] // 8-byte Spill554; CHECK-SD-NEXT: .cfi_def_cfa_offset 64555; CHECK-SD-NEXT: .cfi_offset w30, -16556; CHECK-SD-NEXT: stp q1, q3, [sp, #16] // 32-byte Folded Spill557; CHECK-SD-NEXT: mov v1.16b, v2.16b558; CHECK-SD-NEXT: bl __divtf3559; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill560; CHECK-SD-NEXT: ldp q0, q1, [sp, #16] // 32-byte Folded Reload561; CHECK-SD-NEXT: bl __divtf3562; CHECK-SD-NEXT: mov v1.16b, v0.16b563; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload564; CHECK-SD-NEXT: ldr x30, [sp, #48] // 8-byte Reload565; CHECK-SD-NEXT: add sp, sp, #64566; CHECK-SD-NEXT: ret567;568; CHECK-GI-LABEL: vec_div:569; CHECK-GI: // %bb.0:570; CHECK-GI-NEXT: sub sp, sp, #64571; CHECK-GI-NEXT: str x30, [sp, #48] // 8-byte Spill572; CHECK-GI-NEXT: .cfi_def_cfa_offset 64573; CHECK-GI-NEXT: .cfi_offset w30, -16574; CHECK-GI-NEXT: stp q3, q1, [sp, #16] // 32-byte Folded Spill575; CHECK-GI-NEXT: mov v1.16b, v2.16b576; CHECK-GI-NEXT: bl __divtf3577; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill578; CHECK-GI-NEXT: ldp q1, q0, [sp, #16] // 32-byte Folded Reload579; CHECK-GI-NEXT: bl __divtf3580; CHECK-GI-NEXT: mov v1.16b, v0.16b581; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload582; CHECK-GI-NEXT: ldr x30, [sp, #48] // 8-byte Reload583; CHECK-GI-NEXT: add sp, sp, #64584; CHECK-GI-NEXT: ret585 %val = fdiv <2 x fp128> %lhs, %rhs586 ret <2 x fp128> %val587}588 589define <2 x i32> @vec_fptosi_32(<2 x fp128> %val) {590; CHECK-SD-LABEL: vec_fptosi_32:591; CHECK-SD: // %bb.0:592; CHECK-SD-NEXT: sub sp, sp, #48593; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Spill594; CHECK-SD-NEXT: .cfi_def_cfa_offset 48595; CHECK-SD-NEXT: .cfi_offset w30, -16596; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Spill597; CHECK-SD-NEXT: bl __fixtfsi598; CHECK-SD-NEXT: fmov s0, w0599; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill600; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Reload601; CHECK-SD-NEXT: bl __fixtfsi602; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload603; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Reload604; CHECK-SD-NEXT: mov v0.s[1], w0605; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0606; CHECK-SD-NEXT: add sp, sp, #48607; CHECK-SD-NEXT: ret608;609; CHECK-GI-LABEL: vec_fptosi_32:610; CHECK-GI: // %bb.0:611; CHECK-GI-NEXT: sub sp, sp, #32612; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill613; CHECK-GI-NEXT: .cfi_def_cfa_offset 32614; CHECK-GI-NEXT: .cfi_offset w19, -8615; CHECK-GI-NEXT: .cfi_offset w30, -16616; CHECK-GI-NEXT: str q1, [sp] // 16-byte Spill617; CHECK-GI-NEXT: bl __fixtfsi618; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload619; CHECK-GI-NEXT: mov w19, w0620; CHECK-GI-NEXT: bl __fixtfsi621; CHECK-GI-NEXT: fmov s0, w19622; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload623; CHECK-GI-NEXT: mov v0.s[1], w0624; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0625; CHECK-GI-NEXT: add sp, sp, #32626; CHECK-GI-NEXT: ret627 %val32 = fptosi <2 x fp128> %val to <2 x i32>628 ret <2 x i32> %val32629}630 631define <2 x i64> @vec_fptosi_64(<2 x fp128> %val) {632; CHECK-SD-LABEL: vec_fptosi_64:633; CHECK-SD: // %bb.0:634; CHECK-SD-NEXT: sub sp, sp, #48635; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Spill636; CHECK-SD-NEXT: .cfi_def_cfa_offset 48637; CHECK-SD-NEXT: .cfi_offset w30, -16638; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill639; CHECK-SD-NEXT: mov v0.16b, v1.16b640; CHECK-SD-NEXT: bl __fixtfdi641; CHECK-SD-NEXT: fmov d0, x0642; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Spill643; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload644; CHECK-SD-NEXT: bl __fixtfdi645; CHECK-SD-NEXT: fmov d0, x0646; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Reload647; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Reload648; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]649; CHECK-SD-NEXT: add sp, sp, #48650; CHECK-SD-NEXT: ret651;652; CHECK-GI-LABEL: vec_fptosi_64:653; CHECK-GI: // %bb.0:654; CHECK-GI-NEXT: sub sp, sp, #32655; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill656; CHECK-GI-NEXT: .cfi_def_cfa_offset 32657; CHECK-GI-NEXT: .cfi_offset w19, -8658; CHECK-GI-NEXT: .cfi_offset w30, -16659; CHECK-GI-NEXT: str q1, [sp] // 16-byte Spill660; CHECK-GI-NEXT: bl __fixtfdi661; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload662; CHECK-GI-NEXT: mov x19, x0663; CHECK-GI-NEXT: bl __fixtfdi664; CHECK-GI-NEXT: fmov d0, x19665; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload666; CHECK-GI-NEXT: mov v0.d[1], x0667; CHECK-GI-NEXT: add sp, sp, #32668; CHECK-GI-NEXT: ret669 %val64 = fptosi <2 x fp128> %val to <2 x i64>670 ret <2 x i64> %val64671}672 673define <2 x i32> @vec_fptoui_32(<2 x fp128> %val) {674; CHECK-SD-LABEL: vec_fptoui_32:675; CHECK-SD: // %bb.0:676; CHECK-SD-NEXT: sub sp, sp, #48677; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Spill678; CHECK-SD-NEXT: .cfi_def_cfa_offset 48679; CHECK-SD-NEXT: .cfi_offset w30, -16680; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Spill681; CHECK-SD-NEXT: bl __fixunstfsi682; CHECK-SD-NEXT: fmov s0, w0683; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill684; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Reload685; CHECK-SD-NEXT: bl __fixunstfsi686; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload687; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Reload688; CHECK-SD-NEXT: mov v0.s[1], w0689; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0690; CHECK-SD-NEXT: add sp, sp, #48691; CHECK-SD-NEXT: ret692;693; CHECK-GI-LABEL: vec_fptoui_32:694; CHECK-GI: // %bb.0:695; CHECK-GI-NEXT: sub sp, sp, #32696; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill697; CHECK-GI-NEXT: .cfi_def_cfa_offset 32698; CHECK-GI-NEXT: .cfi_offset w19, -8699; CHECK-GI-NEXT: .cfi_offset w30, -16700; CHECK-GI-NEXT: str q1, [sp] // 16-byte Spill701; CHECK-GI-NEXT: bl __fixunstfsi702; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload703; CHECK-GI-NEXT: mov w19, w0704; CHECK-GI-NEXT: bl __fixunstfsi705; CHECK-GI-NEXT: fmov s0, w19706; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload707; CHECK-GI-NEXT: mov v0.s[1], w0708; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0709; CHECK-GI-NEXT: add sp, sp, #32710; CHECK-GI-NEXT: ret711 %val32 = fptoui <2 x fp128> %val to <2 x i32>712 ret <2 x i32> %val32713}714 715define <2 x i64> @vec_fptoui_64(<2 x fp128> %val) {716; CHECK-SD-LABEL: vec_fptoui_64:717; CHECK-SD: // %bb.0:718; CHECK-SD-NEXT: sub sp, sp, #48719; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Spill720; CHECK-SD-NEXT: .cfi_def_cfa_offset 48721; CHECK-SD-NEXT: .cfi_offset w30, -16722; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill723; CHECK-SD-NEXT: mov v0.16b, v1.16b724; CHECK-SD-NEXT: bl __fixunstfdi725; CHECK-SD-NEXT: fmov d0, x0726; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Spill727; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload728; CHECK-SD-NEXT: bl __fixunstfdi729; CHECK-SD-NEXT: fmov d0, x0730; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Reload731; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Reload732; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]733; CHECK-SD-NEXT: add sp, sp, #48734; CHECK-SD-NEXT: ret735;736; CHECK-GI-LABEL: vec_fptoui_64:737; CHECK-GI: // %bb.0:738; CHECK-GI-NEXT: sub sp, sp, #32739; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill740; CHECK-GI-NEXT: .cfi_def_cfa_offset 32741; CHECK-GI-NEXT: .cfi_offset w19, -8742; CHECK-GI-NEXT: .cfi_offset w30, -16743; CHECK-GI-NEXT: str q1, [sp] // 16-byte Spill744; CHECK-GI-NEXT: bl __fixunstfdi745; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload746; CHECK-GI-NEXT: mov x19, x0747; CHECK-GI-NEXT: bl __fixunstfdi748; CHECK-GI-NEXT: fmov d0, x19749; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload750; CHECK-GI-NEXT: mov v0.d[1], x0751; CHECK-GI-NEXT: add sp, sp, #32752; CHECK-GI-NEXT: ret753 %val64 = fptoui <2 x fp128> %val to <2 x i64>754 ret <2 x i64> %val64755}756 757define <2 x fp128> @vec_sitofp_32(<2 x i32> %src32) {758; CHECK-SD-LABEL: vec_sitofp_32:759; CHECK-SD: // %bb.0:760; CHECK-SD-NEXT: sub sp, sp, #32761; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Spill762; CHECK-SD-NEXT: .cfi_def_cfa_offset 32763; CHECK-SD-NEXT: .cfi_offset w30, -16764; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0765; CHECK-SD-NEXT: fmov w0, s0766; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill767; CHECK-SD-NEXT: bl __floatsitf768; CHECK-SD-NEXT: ldr q1, [sp] // 16-byte Reload769; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill770; CHECK-SD-NEXT: mov w0, v1.s[1]771; CHECK-SD-NEXT: bl __floatsitf772; CHECK-SD-NEXT: mov v1.16b, v0.16b773; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload774; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload775; CHECK-SD-NEXT: add sp, sp, #32776; CHECK-SD-NEXT: ret777;778; CHECK-GI-LABEL: vec_sitofp_32:779; CHECK-GI: // %bb.0:780; CHECK-GI-NEXT: sub sp, sp, #32781; CHECK-GI-NEXT: str d8, [sp, #16] // 8-byte Spill782; CHECK-GI-NEXT: str x30, [sp, #24] // 8-byte Spill783; CHECK-GI-NEXT: .cfi_def_cfa_offset 32784; CHECK-GI-NEXT: .cfi_offset w30, -8785; CHECK-GI-NEXT: .cfi_offset b8, -16786; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0787; CHECK-GI-NEXT: fmov w0, s0788; CHECK-GI-NEXT: mov s8, v0.s[1]789; CHECK-GI-NEXT: bl __floatsitf790; CHECK-GI-NEXT: fmov w0, s8791; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill792; CHECK-GI-NEXT: bl __floatsitf793; CHECK-GI-NEXT: mov v1.16b, v0.16b794; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload795; CHECK-GI-NEXT: ldr x30, [sp, #24] // 8-byte Reload796; CHECK-GI-NEXT: ldr d8, [sp, #16] // 8-byte Reload797; CHECK-GI-NEXT: add sp, sp, #32798; CHECK-GI-NEXT: ret799 %val32 = sitofp <2 x i32> %src32 to <2 x fp128>800 ret <2 x fp128> %val32801}802 803define <2 x fp128> @vec_sitofp_64(<2 x i64> %src64) {804; CHECK-SD-LABEL: vec_sitofp_64:805; CHECK-SD: // %bb.0:806; CHECK-SD-NEXT: sub sp, sp, #48807; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Spill808; CHECK-SD-NEXT: .cfi_def_cfa_offset 48809; CHECK-SD-NEXT: .cfi_offset w30, -16810; CHECK-SD-NEXT: fmov x0, d0811; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill812; CHECK-SD-NEXT: bl __floatditf813; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Spill814; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload815; CHECK-SD-NEXT: mov x0, v0.d[1]816; CHECK-SD-NEXT: bl __floatditf817; CHECK-SD-NEXT: mov v1.16b, v0.16b818; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Reload819; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Reload820; CHECK-SD-NEXT: add sp, sp, #48821; CHECK-SD-NEXT: ret822;823; CHECK-GI-LABEL: vec_sitofp_64:824; CHECK-GI: // %bb.0:825; CHECK-GI-NEXT: sub sp, sp, #32826; CHECK-GI-NEXT: str d8, [sp, #16] // 8-byte Spill827; CHECK-GI-NEXT: str x30, [sp, #24] // 8-byte Spill828; CHECK-GI-NEXT: .cfi_def_cfa_offset 32829; CHECK-GI-NEXT: .cfi_offset w30, -8830; CHECK-GI-NEXT: .cfi_offset b8, -16831; CHECK-GI-NEXT: fmov x0, d0832; CHECK-GI-NEXT: mov d8, v0.d[1]833; CHECK-GI-NEXT: bl __floatditf834; CHECK-GI-NEXT: fmov x0, d8835; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill836; CHECK-GI-NEXT: bl __floatditf837; CHECK-GI-NEXT: mov v1.16b, v0.16b838; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload839; CHECK-GI-NEXT: ldr x30, [sp, #24] // 8-byte Reload840; CHECK-GI-NEXT: ldr d8, [sp, #16] // 8-byte Reload841; CHECK-GI-NEXT: add sp, sp, #32842; CHECK-GI-NEXT: ret843 %val64 = sitofp <2 x i64> %src64 to <2 x fp128>844 ret <2 x fp128> %val64845}846 847define <2 x fp128> @vec_uitofp_32(<2 x i32> %src32) {848; CHECK-SD-LABEL: vec_uitofp_32:849; CHECK-SD: // %bb.0:850; CHECK-SD-NEXT: sub sp, sp, #32851; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Spill852; CHECK-SD-NEXT: .cfi_def_cfa_offset 32853; CHECK-SD-NEXT: .cfi_offset w30, -16854; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0855; CHECK-SD-NEXT: fmov w0, s0856; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill857; CHECK-SD-NEXT: bl __floatunsitf858; CHECK-SD-NEXT: ldr q1, [sp] // 16-byte Reload859; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill860; CHECK-SD-NEXT: mov w0, v1.s[1]861; CHECK-SD-NEXT: bl __floatunsitf862; CHECK-SD-NEXT: mov v1.16b, v0.16b863; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload864; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload865; CHECK-SD-NEXT: add sp, sp, #32866; CHECK-SD-NEXT: ret867;868; CHECK-GI-LABEL: vec_uitofp_32:869; CHECK-GI: // %bb.0:870; CHECK-GI-NEXT: sub sp, sp, #32871; CHECK-GI-NEXT: str d8, [sp, #16] // 8-byte Spill872; CHECK-GI-NEXT: str x30, [sp, #24] // 8-byte Spill873; CHECK-GI-NEXT: .cfi_def_cfa_offset 32874; CHECK-GI-NEXT: .cfi_offset w30, -8875; CHECK-GI-NEXT: .cfi_offset b8, -16876; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0877; CHECK-GI-NEXT: fmov w0, s0878; CHECK-GI-NEXT: mov s8, v0.s[1]879; CHECK-GI-NEXT: bl __floatunsitf880; CHECK-GI-NEXT: fmov w0, s8881; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill882; CHECK-GI-NEXT: bl __floatunsitf883; CHECK-GI-NEXT: mov v1.16b, v0.16b884; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload885; CHECK-GI-NEXT: ldr x30, [sp, #24] // 8-byte Reload886; CHECK-GI-NEXT: ldr d8, [sp, #16] // 8-byte Reload887; CHECK-GI-NEXT: add sp, sp, #32888; CHECK-GI-NEXT: ret889 %val32 = uitofp <2 x i32> %src32 to <2 x fp128>890 ret <2 x fp128> %val32891}892 893define <2 x fp128> @vec_uitofp_64(<2 x i64> %src64) {894; CHECK-SD-LABEL: vec_uitofp_64:895; CHECK-SD: // %bb.0:896; CHECK-SD-NEXT: sub sp, sp, #48897; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Spill898; CHECK-SD-NEXT: .cfi_def_cfa_offset 48899; CHECK-SD-NEXT: .cfi_offset w30, -16900; CHECK-SD-NEXT: fmov x0, d0901; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill902; CHECK-SD-NEXT: bl __floatunditf903; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Spill904; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload905; CHECK-SD-NEXT: mov x0, v0.d[1]906; CHECK-SD-NEXT: bl __floatunditf907; CHECK-SD-NEXT: mov v1.16b, v0.16b908; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Reload909; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Reload910; CHECK-SD-NEXT: add sp, sp, #48911; CHECK-SD-NEXT: ret912;913; CHECK-GI-LABEL: vec_uitofp_64:914; CHECK-GI: // %bb.0:915; CHECK-GI-NEXT: sub sp, sp, #32916; CHECK-GI-NEXT: str d8, [sp, #16] // 8-byte Spill917; CHECK-GI-NEXT: str x30, [sp, #24] // 8-byte Spill918; CHECK-GI-NEXT: .cfi_def_cfa_offset 32919; CHECK-GI-NEXT: .cfi_offset w30, -8920; CHECK-GI-NEXT: .cfi_offset b8, -16921; CHECK-GI-NEXT: fmov x0, d0922; CHECK-GI-NEXT: mov d8, v0.d[1]923; CHECK-GI-NEXT: bl __floatunditf924; CHECK-GI-NEXT: fmov x0, d8925; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill926; CHECK-GI-NEXT: bl __floatunditf927; CHECK-GI-NEXT: mov v1.16b, v0.16b928; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload929; CHECK-GI-NEXT: ldr x30, [sp, #24] // 8-byte Reload930; CHECK-GI-NEXT: ldr d8, [sp, #16] // 8-byte Reload931; CHECK-GI-NEXT: add sp, sp, #32932; CHECK-GI-NEXT: ret933 %val64 = uitofp <2 x i64> %src64 to <2 x fp128>934 ret <2 x fp128> %val64935}936 937define <2 x i1> @vec_setcc1(<2 x fp128> %lhs, <2 x fp128> %rhs) {938; CHECK-SD-LABEL: vec_setcc1:939; CHECK-SD: // %bb.0:940; CHECK-SD-NEXT: sub sp, sp, #48941; CHECK-SD-NEXT: str d8, [sp, #32] // 8-byte Spill942; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Spill943; CHECK-SD-NEXT: .cfi_def_cfa_offset 48944; CHECK-SD-NEXT: .cfi_offset w30, -8945; CHECK-SD-NEXT: .cfi_offset b8, -16946; CHECK-SD-NEXT: stp q0, q2, [sp] // 32-byte Folded Spill947; CHECK-SD-NEXT: mov v0.16b, v1.16b948; CHECK-SD-NEXT: mov v1.16b, v3.16b949; CHECK-SD-NEXT: bl __letf2950; CHECK-SD-NEXT: cmp w0, #0951; CHECK-SD-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload952; CHECK-SD-NEXT: cset w8, le953; CHECK-SD-NEXT: sbfx x8, x8, #0, #1954; CHECK-SD-NEXT: fmov d8, x8955; CHECK-SD-NEXT: bl __letf2956; CHECK-SD-NEXT: cmp w0, #0957; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Reload958; CHECK-SD-NEXT: cset w8, le959; CHECK-SD-NEXT: sbfx x8, x8, #0, #1960; CHECK-SD-NEXT: fmov d0, x8961; CHECK-SD-NEXT: zip1 v0.2s, v0.2s, v8.2s962; CHECK-SD-NEXT: ldr d8, [sp, #32] // 8-byte Reload963; CHECK-SD-NEXT: add sp, sp, #48964; CHECK-SD-NEXT: ret965;966; CHECK-GI-LABEL: vec_setcc1:967; CHECK-GI: // %bb.0:968; CHECK-GI-NEXT: sub sp, sp, #48969; CHECK-GI-NEXT: stp x30, x19, [sp, #32] // 16-byte Folded Spill970; CHECK-GI-NEXT: .cfi_def_cfa_offset 48971; CHECK-GI-NEXT: .cfi_offset w19, -8972; CHECK-GI-NEXT: .cfi_offset w30, -16973; CHECK-GI-NEXT: stp q3, q1, [sp] // 32-byte Folded Spill974; CHECK-GI-NEXT: mov v1.16b, v2.16b975; CHECK-GI-NEXT: bl __letf2976; CHECK-GI-NEXT: ldp q1, q0, [sp] // 32-byte Folded Reload977; CHECK-GI-NEXT: cmp w0, #0978; CHECK-GI-NEXT: cset w19, le979; CHECK-GI-NEXT: bl __letf2980; CHECK-GI-NEXT: fmov s0, w19981; CHECK-GI-NEXT: cmp w0, #0982; CHECK-GI-NEXT: cset w8, le983; CHECK-GI-NEXT: ldp x30, x19, [sp, #32] // 16-byte Folded Reload984; CHECK-GI-NEXT: mov v0.s[1], w8985; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0986; CHECK-GI-NEXT: add sp, sp, #48987; CHECK-GI-NEXT: ret988 %val = fcmp ole <2 x fp128> %lhs, %rhs989 ret <2 x i1> %val990}991 992define <2 x i1> @vec_setcc2(<2 x fp128> %lhs, <2 x fp128> %rhs) {993; CHECK-SD-LABEL: vec_setcc2:994; CHECK-SD: // %bb.0:995; CHECK-SD-NEXT: sub sp, sp, #48996; CHECK-SD-NEXT: str d8, [sp, #32] // 8-byte Spill997; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Spill998; CHECK-SD-NEXT: .cfi_def_cfa_offset 48999; CHECK-SD-NEXT: .cfi_offset w30, -81000; CHECK-SD-NEXT: .cfi_offset b8, -161001; CHECK-SD-NEXT: stp q0, q2, [sp] // 32-byte Folded Spill1002; CHECK-SD-NEXT: mov v0.16b, v1.16b1003; CHECK-SD-NEXT: mov v1.16b, v3.16b1004; CHECK-SD-NEXT: bl __letf21005; CHECK-SD-NEXT: cmp w0, #01006; CHECK-SD-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload1007; CHECK-SD-NEXT: cset w8, gt1008; CHECK-SD-NEXT: sbfx x8, x8, #0, #11009; CHECK-SD-NEXT: fmov d8, x81010; CHECK-SD-NEXT: bl __letf21011; CHECK-SD-NEXT: cmp w0, #01012; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Reload1013; CHECK-SD-NEXT: cset w8, gt1014; CHECK-SD-NEXT: sbfx x8, x8, #0, #11015; CHECK-SD-NEXT: fmov d0, x81016; CHECK-SD-NEXT: zip1 v0.2s, v0.2s, v8.2s1017; CHECK-SD-NEXT: ldr d8, [sp, #32] // 8-byte Reload1018; CHECK-SD-NEXT: add sp, sp, #481019; CHECK-SD-NEXT: ret1020;1021; CHECK-GI-LABEL: vec_setcc2:1022; CHECK-GI: // %bb.0:1023; CHECK-GI-NEXT: sub sp, sp, #481024; CHECK-GI-NEXT: stp x30, x19, [sp, #32] // 16-byte Folded Spill1025; CHECK-GI-NEXT: .cfi_def_cfa_offset 481026; CHECK-GI-NEXT: .cfi_offset w19, -81027; CHECK-GI-NEXT: .cfi_offset w30, -161028; CHECK-GI-NEXT: stp q3, q1, [sp] // 32-byte Folded Spill1029; CHECK-GI-NEXT: mov v1.16b, v2.16b1030; CHECK-GI-NEXT: bl __letf21031; CHECK-GI-NEXT: ldp q1, q0, [sp] // 32-byte Folded Reload1032; CHECK-GI-NEXT: cmp w0, #01033; CHECK-GI-NEXT: cset w19, gt1034; CHECK-GI-NEXT: bl __letf21035; CHECK-GI-NEXT: fmov s0, w191036; CHECK-GI-NEXT: cmp w0, #01037; CHECK-GI-NEXT: cset w8, gt1038; CHECK-GI-NEXT: ldp x30, x19, [sp, #32] // 16-byte Folded Reload1039; CHECK-GI-NEXT: mov v0.s[1], w81040; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q01041; CHECK-GI-NEXT: add sp, sp, #481042; CHECK-GI-NEXT: ret1043 %val = fcmp ugt <2 x fp128> %lhs, %rhs1044 ret <2 x i1> %val1045}1046 1047define <2 x i1> @vec_setcc3(<2 x fp128> %lhs, <2 x fp128> %rhs) {1048; CHECK-SD-LABEL: vec_setcc3:1049; CHECK-SD: // %bb.0:1050; CHECK-SD-NEXT: sub sp, sp, #961051; CHECK-SD-NEXT: str d8, [sp, #64] // 8-byte Spill1052; CHECK-SD-NEXT: stp x30, x19, [sp, #80] // 16-byte Folded Spill1053; CHECK-SD-NEXT: .cfi_def_cfa_offset 961054; CHECK-SD-NEXT: .cfi_offset w19, -81055; CHECK-SD-NEXT: .cfi_offset w30, -161056; CHECK-SD-NEXT: .cfi_offset b8, -321057; CHECK-SD-NEXT: stp q1, q3, [sp] // 32-byte Folded Spill1058; CHECK-SD-NEXT: stp q0, q2, [sp, #32] // 32-byte Folded Spill1059; CHECK-SD-NEXT: mov v0.16b, v1.16b1060; CHECK-SD-NEXT: mov v1.16b, v3.16b1061; CHECK-SD-NEXT: bl __eqtf21062; CHECK-SD-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload1063; CHECK-SD-NEXT: mov w19, w01064; CHECK-SD-NEXT: bl __unordtf21065; CHECK-SD-NEXT: cmp w0, #01066; CHECK-SD-NEXT: ldp q0, q1, [sp, #32] // 32-byte Folded Reload1067; CHECK-SD-NEXT: ccmp w19, #0, #4, eq1068; CHECK-SD-NEXT: cset w8, eq1069; CHECK-SD-NEXT: sbfx x8, x8, #0, #11070; CHECK-SD-NEXT: fmov d8, x81071; CHECK-SD-NEXT: bl __eqtf21072; CHECK-SD-NEXT: ldp q0, q1, [sp, #32] // 32-byte Folded Reload1073; CHECK-SD-NEXT: mov w19, w01074; CHECK-SD-NEXT: bl __unordtf21075; CHECK-SD-NEXT: cmp w0, #01076; CHECK-SD-NEXT: ccmp w19, #0, #4, eq1077; CHECK-SD-NEXT: ldp x30, x19, [sp, #80] // 16-byte Folded Reload1078; CHECK-SD-NEXT: cset w8, eq1079; CHECK-SD-NEXT: sbfx x8, x8, #0, #11080; CHECK-SD-NEXT: fmov d0, x81081; CHECK-SD-NEXT: zip1 v0.2s, v0.2s, v8.2s1082; CHECK-SD-NEXT: ldr d8, [sp, #64] // 8-byte Reload1083; CHECK-SD-NEXT: add sp, sp, #961084; CHECK-SD-NEXT: ret1085;1086; CHECK-GI-LABEL: vec_setcc3:1087; CHECK-GI: // %bb.0:1088; CHECK-GI-NEXT: sub sp, sp, #961089; CHECK-GI-NEXT: str x30, [sp, #64] // 8-byte Spill1090; CHECK-GI-NEXT: stp x20, x19, [sp, #80] // 16-byte Folded Spill1091; CHECK-GI-NEXT: .cfi_def_cfa_offset 961092; CHECK-GI-NEXT: .cfi_offset w19, -81093; CHECK-GI-NEXT: .cfi_offset w20, -161094; CHECK-GI-NEXT: .cfi_offset w30, -321095; CHECK-GI-NEXT: stp q2, q0, [sp] // 32-byte Folded Spill1096; CHECK-GI-NEXT: stp q3, q1, [sp, #32] // 32-byte Folded Spill1097; CHECK-GI-NEXT: mov v1.16b, v2.16b1098; CHECK-GI-NEXT: bl __eqtf21099; CHECK-GI-NEXT: ldp q1, q0, [sp] // 32-byte Folded Reload1100; CHECK-GI-NEXT: cmp w0, #01101; CHECK-GI-NEXT: cset w19, eq1102; CHECK-GI-NEXT: bl __unordtf21103; CHECK-GI-NEXT: ldp q1, q0, [sp, #32] // 32-byte Folded Reload1104; CHECK-GI-NEXT: cmp w0, #01105; CHECK-GI-NEXT: cset w8, ne1106; CHECK-GI-NEXT: orr w19, w19, w81107; CHECK-GI-NEXT: bl __eqtf21108; CHECK-GI-NEXT: ldp q1, q0, [sp, #32] // 32-byte Folded Reload1109; CHECK-GI-NEXT: cmp w0, #01110; CHECK-GI-NEXT: cset w20, eq1111; CHECK-GI-NEXT: bl __unordtf21112; CHECK-GI-NEXT: fmov s0, w191113; CHECK-GI-NEXT: cmp w0, #01114; CHECK-GI-NEXT: ldr x30, [sp, #64] // 8-byte Reload1115; CHECK-GI-NEXT: cset w8, ne1116; CHECK-GI-NEXT: orr w8, w20, w81117; CHECK-GI-NEXT: ldp x20, x19, [sp, #80] // 16-byte Folded Reload1118; CHECK-GI-NEXT: mov v0.s[1], w81119; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q01120; CHECK-GI-NEXT: add sp, sp, #961121; CHECK-GI-NEXT: ret1122 %val = fcmp ueq <2 x fp128> %lhs, %rhs1123 ret <2 x i1> %val1124}1125 1126define <2 x fp128> @vec_select(<2 x i1> %cond, <2 x fp128> %lhs, <2 x fp128> %rhs) {1127; CHECK-SD-LABEL: vec_select:1128; CHECK-SD: // %bb.0:1129; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q01130; CHECK-SD-NEXT: fmov w8, s01131; CHECK-SD-NEXT: tst w8, #0x11132; CHECK-SD-NEXT: b.eq .LBB40_21133; CHECK-SD-NEXT: // %bb.1:1134; CHECK-SD-NEXT: mov v3.16b, v1.16b1135; CHECK-SD-NEXT: .LBB40_2:1136; CHECK-SD-NEXT: mov w8, v0.s[1]1137; CHECK-SD-NEXT: tst w8, #0x11138; CHECK-SD-NEXT: b.eq .LBB40_41139; CHECK-SD-NEXT: // %bb.3:1140; CHECK-SD-NEXT: mov v4.16b, v2.16b1141; CHECK-SD-NEXT: .LBB40_4:1142; CHECK-SD-NEXT: mov v0.16b, v3.16b1143; CHECK-SD-NEXT: mov v1.16b, v4.16b1144; CHECK-SD-NEXT: ret1145;1146; CHECK-GI-LABEL: vec_select:1147; CHECK-GI: // %bb.0:1148; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q01149; CHECK-GI-NEXT: mov w8, v0.s[1]1150; CHECK-GI-NEXT: fmov w9, s01151; CHECK-GI-NEXT: mov d5, v1.d[1]1152; CHECK-GI-NEXT: mov d6, v3.d[1]1153; CHECK-GI-NEXT: and w9, w9, #0x11154; CHECK-GI-NEXT: tst w9, #0x11155; CHECK-GI-NEXT: and w8, w8, #0x11156; CHECK-GI-NEXT: fcsel d0, d1, d3, ne1157; CHECK-GI-NEXT: fcsel d3, d5, d6, ne1158; CHECK-GI-NEXT: tst w8, #0x11159; CHECK-GI-NEXT: mov d1, v2.d[1]1160; CHECK-GI-NEXT: mov d5, v4.d[1]1161; CHECK-GI-NEXT: fcsel d2, d2, d4, ne1162; CHECK-GI-NEXT: fmov x8, d01163; CHECK-GI-NEXT: fmov x9, d21164; CHECK-GI-NEXT: fcsel d2, d1, d5, ne1165; CHECK-GI-NEXT: mov v0.d[0], x81166; CHECK-GI-NEXT: fmov x8, d31167; CHECK-GI-NEXT: mov v1.d[0], x91168; CHECK-GI-NEXT: fmov x9, d21169; CHECK-GI-NEXT: mov v0.d[1], x81170; CHECK-GI-NEXT: mov v1.d[1], x91171; CHECK-GI-NEXT: ret1172 %val = select <2 x i1> %cond, <2 x fp128> %lhs, <2 x fp128> %rhs1173 ret <2 x fp128> %val1174}1175 1176define <2 x half> @vec_round_f16(<2 x fp128> %val) {1177; CHECK-SD-LABEL: vec_round_f16:1178; CHECK-SD: // %bb.0:1179; CHECK-SD-NEXT: sub sp, sp, #481180; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Spill1181; CHECK-SD-NEXT: .cfi_def_cfa_offset 481182; CHECK-SD-NEXT: .cfi_offset w30, -161183; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill1184; CHECK-SD-NEXT: mov v0.16b, v1.16b1185; CHECK-SD-NEXT: bl __trunctfhf21186; CHECK-SD-NEXT: // kill: def $h0 killed $h0 def $q01187; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Spill1188; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload1189; CHECK-SD-NEXT: bl __trunctfhf21190; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Reload1191; CHECK-SD-NEXT: // kill: def $h0 killed $h0 def $q01192; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Reload1193; CHECK-SD-NEXT: mov v0.h[1], v1.h[0]1194; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q01195; CHECK-SD-NEXT: add sp, sp, #481196; CHECK-SD-NEXT: ret1197;1198; CHECK-GI-LABEL: vec_round_f16:1199; CHECK-GI: // %bb.0:1200; CHECK-GI-NEXT: sub sp, sp, #481201; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Spill1202; CHECK-GI-NEXT: .cfi_def_cfa_offset 481203; CHECK-GI-NEXT: .cfi_offset w30, -161204; CHECK-GI-NEXT: str q1, [sp] // 16-byte Spill1205; CHECK-GI-NEXT: bl __trunctfhf21206; CHECK-GI-NEXT: // kill: def $h0 killed $h0 def $q01207; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Spill1208; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload1209; CHECK-GI-NEXT: bl __trunctfhf21210; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Reload1211; CHECK-GI-NEXT: // kill: def $h0 killed $h0 def $q01212; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Reload1213; CHECK-GI-NEXT: mov v1.h[1], v0.h[0]1214; CHECK-GI-NEXT: fmov d0, d11215; CHECK-GI-NEXT: add sp, sp, #481216; CHECK-GI-NEXT: ret1217 %dst = fptrunc <2 x fp128> %val to <2 x half>1218 ret <2 x half> %dst1219}1220 1221define <2 x float> @vec_round_f32(<2 x fp128> %val) {1222; CHECK-SD-LABEL: vec_round_f32:1223; CHECK-SD: // %bb.0:1224; CHECK-SD-NEXT: sub sp, sp, #481225; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Spill1226; CHECK-SD-NEXT: .cfi_def_cfa_offset 481227; CHECK-SD-NEXT: .cfi_offset w30, -161228; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill1229; CHECK-SD-NEXT: mov v0.16b, v1.16b1230; CHECK-SD-NEXT: bl __trunctfsf21231; CHECK-SD-NEXT: // kill: def $s0 killed $s0 def $q01232; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Spill1233; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload1234; CHECK-SD-NEXT: bl __trunctfsf21235; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Reload1236; CHECK-SD-NEXT: // kill: def $s0 killed $s0 def $q01237; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Reload1238; CHECK-SD-NEXT: mov v0.s[1], v1.s[0]1239; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q01240; CHECK-SD-NEXT: add sp, sp, #481241; CHECK-SD-NEXT: ret1242;1243; CHECK-GI-LABEL: vec_round_f32:1244; CHECK-GI: // %bb.0:1245; CHECK-GI-NEXT: sub sp, sp, #481246; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Spill1247; CHECK-GI-NEXT: .cfi_def_cfa_offset 481248; CHECK-GI-NEXT: .cfi_offset w30, -161249; CHECK-GI-NEXT: str q1, [sp] // 16-byte Spill1250; CHECK-GI-NEXT: bl __trunctfsf21251; CHECK-GI-NEXT: // kill: def $s0 killed $s0 def $q01252; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Spill1253; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload1254; CHECK-GI-NEXT: bl __trunctfsf21255; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Reload1256; CHECK-GI-NEXT: // kill: def $s0 killed $s0 def $q01257; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Reload1258; CHECK-GI-NEXT: mov v1.s[1], v0.s[0]1259; CHECK-GI-NEXT: fmov d0, d11260; CHECK-GI-NEXT: add sp, sp, #481261; CHECK-GI-NEXT: ret1262 %dst = fptrunc <2 x fp128> %val to <2 x float>1263 ret <2 x float> %dst1264}1265 1266define <2 x double> @vec_round_f64(<2 x fp128> %val) {1267; CHECK-SD-LABEL: vec_round_f64:1268; CHECK-SD: // %bb.0:1269; CHECK-SD-NEXT: sub sp, sp, #481270; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Spill1271; CHECK-SD-NEXT: .cfi_def_cfa_offset 481272; CHECK-SD-NEXT: .cfi_offset w30, -161273; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill1274; CHECK-SD-NEXT: mov v0.16b, v1.16b1275; CHECK-SD-NEXT: bl __trunctfdf21276; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q01277; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Spill1278; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload1279; CHECK-SD-NEXT: bl __trunctfdf21280; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Reload1281; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q01282; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Reload1283; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]1284; CHECK-SD-NEXT: add sp, sp, #481285; CHECK-SD-NEXT: ret1286;1287; CHECK-GI-LABEL: vec_round_f64:1288; CHECK-GI: // %bb.0:1289; CHECK-GI-NEXT: sub sp, sp, #481290; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Spill1291; CHECK-GI-NEXT: .cfi_def_cfa_offset 481292; CHECK-GI-NEXT: .cfi_offset w30, -161293; CHECK-GI-NEXT: str q1, [sp] // 16-byte Spill1294; CHECK-GI-NEXT: bl __trunctfdf21295; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q01296; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Spill1297; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload1298; CHECK-GI-NEXT: bl __trunctfdf21299; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Reload1300; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q01301; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Reload1302; CHECK-GI-NEXT: mov v1.d[1], v0.d[0]1303; CHECK-GI-NEXT: mov v0.16b, v1.16b1304; CHECK-GI-NEXT: add sp, sp, #481305; CHECK-GI-NEXT: ret1306 %dst = fptrunc <2 x fp128> %val to <2 x double>1307 ret <2 x double> %dst1308}1309 1310define <2 x fp128> @vec_extend_f16(<2 x half> %val) {1311; CHECK-SD-LABEL: vec_extend_f16:1312; CHECK-SD: // %bb.0:1313; CHECK-SD-NEXT: sub sp, sp, #321314; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Spill1315; CHECK-SD-NEXT: .cfi_def_cfa_offset 321316; CHECK-SD-NEXT: .cfi_offset w30, -161317; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q01318; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill1319; CHECK-SD-NEXT: // kill: def $h0 killed $h0 killed $q01320; CHECK-SD-NEXT: bl __extendhftf21321; CHECK-SD-NEXT: ldr q1, [sp] // 16-byte Reload1322; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill1323; CHECK-SD-NEXT: mov h1, v1.h[1]1324; CHECK-SD-NEXT: fmov s0, s11325; CHECK-SD-NEXT: bl __extendhftf21326; CHECK-SD-NEXT: mov v1.16b, v0.16b1327; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload1328; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload1329; CHECK-SD-NEXT: add sp, sp, #321330; CHECK-SD-NEXT: ret1331;1332; CHECK-GI-LABEL: vec_extend_f16:1333; CHECK-GI: // %bb.0:1334; CHECK-GI-NEXT: sub sp, sp, #321335; CHECK-GI-NEXT: str d8, [sp, #16] // 8-byte Spill1336; CHECK-GI-NEXT: str x30, [sp, #24] // 8-byte Spill1337; CHECK-GI-NEXT: .cfi_def_cfa_offset 321338; CHECK-GI-NEXT: .cfi_offset w30, -81339; CHECK-GI-NEXT: .cfi_offset b8, -161340; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q01341; CHECK-GI-NEXT: mov h8, v0.h[1]1342; CHECK-GI-NEXT: // kill: def $h0 killed $h0 killed $q01343; CHECK-GI-NEXT: bl __extendhftf21344; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill1345; CHECK-GI-NEXT: fmov s0, s81346; CHECK-GI-NEXT: bl __extendhftf21347; CHECK-GI-NEXT: mov v1.16b, v0.16b1348; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload1349; CHECK-GI-NEXT: ldr x30, [sp, #24] // 8-byte Reload1350; CHECK-GI-NEXT: ldr d8, [sp, #16] // 8-byte Reload1351; CHECK-GI-NEXT: add sp, sp, #321352; CHECK-GI-NEXT: ret1353 %dst = fpext <2 x half> %val to <2 x fp128>1354 ret <2 x fp128> %dst1355}1356 1357define <2 x fp128> @vec_extend_f32(<2 x float> %val) {1358; CHECK-SD-LABEL: vec_extend_f32:1359; CHECK-SD: // %bb.0:1360; CHECK-SD-NEXT: sub sp, sp, #321361; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Spill1362; CHECK-SD-NEXT: .cfi_def_cfa_offset 321363; CHECK-SD-NEXT: .cfi_offset w30, -161364; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q01365; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill1366; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q01367; CHECK-SD-NEXT: bl __extendsftf21368; CHECK-SD-NEXT: ldr q1, [sp] // 16-byte Reload1369; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill1370; CHECK-SD-NEXT: mov s1, v1.s[1]1371; CHECK-SD-NEXT: fmov s0, s11372; CHECK-SD-NEXT: bl __extendsftf21373; CHECK-SD-NEXT: mov v1.16b, v0.16b1374; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload1375; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload1376; CHECK-SD-NEXT: add sp, sp, #321377; CHECK-SD-NEXT: ret1378;1379; CHECK-GI-LABEL: vec_extend_f32:1380; CHECK-GI: // %bb.0:1381; CHECK-GI-NEXT: sub sp, sp, #321382; CHECK-GI-NEXT: str d8, [sp, #16] // 8-byte Spill1383; CHECK-GI-NEXT: str x30, [sp, #24] // 8-byte Spill1384; CHECK-GI-NEXT: .cfi_def_cfa_offset 321385; CHECK-GI-NEXT: .cfi_offset w30, -81386; CHECK-GI-NEXT: .cfi_offset b8, -161387; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q01388; CHECK-GI-NEXT: mov s8, v0.s[1]1389; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q01390; CHECK-GI-NEXT: bl __extendsftf21391; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill1392; CHECK-GI-NEXT: fmov s0, s81393; CHECK-GI-NEXT: bl __extendsftf21394; CHECK-GI-NEXT: mov v1.16b, v0.16b1395; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload1396; CHECK-GI-NEXT: ldr x30, [sp, #24] // 8-byte Reload1397; CHECK-GI-NEXT: ldr d8, [sp, #16] // 8-byte Reload1398; CHECK-GI-NEXT: add sp, sp, #321399; CHECK-GI-NEXT: ret1400 %dst = fpext <2 x float> %val to <2 x fp128>1401 ret <2 x fp128> %dst1402}1403 1404define <2 x fp128> @vec_extend_f64(<2 x double> %val) {1405; CHECK-SD-LABEL: vec_extend_f64:1406; CHECK-SD: // %bb.0:1407; CHECK-SD-NEXT: sub sp, sp, #481408; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Spill1409; CHECK-SD-NEXT: .cfi_def_cfa_offset 481410; CHECK-SD-NEXT: .cfi_offset w30, -161411; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill1412; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q01413; CHECK-SD-NEXT: bl __extenddftf21414; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Spill1415; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload1416; CHECK-SD-NEXT: mov d0, v0.d[1]1417; CHECK-SD-NEXT: bl __extenddftf21418; CHECK-SD-NEXT: mov v1.16b, v0.16b1419; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Reload1420; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Reload1421; CHECK-SD-NEXT: add sp, sp, #481422; CHECK-SD-NEXT: ret1423;1424; CHECK-GI-LABEL: vec_extend_f64:1425; CHECK-GI: // %bb.0:1426; CHECK-GI-NEXT: sub sp, sp, #321427; CHECK-GI-NEXT: str d8, [sp, #16] // 8-byte Spill1428; CHECK-GI-NEXT: str x30, [sp, #24] // 8-byte Spill1429; CHECK-GI-NEXT: .cfi_def_cfa_offset 321430; CHECK-GI-NEXT: .cfi_offset w30, -81431; CHECK-GI-NEXT: .cfi_offset b8, -161432; CHECK-GI-NEXT: mov d8, v0.d[1]1433; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q01434; CHECK-GI-NEXT: bl __extenddftf21435; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill1436; CHECK-GI-NEXT: fmov d0, d81437; CHECK-GI-NEXT: bl __extenddftf21438; CHECK-GI-NEXT: mov v1.16b, v0.16b1439; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload1440; CHECK-GI-NEXT: ldr x30, [sp, #24] // 8-byte Reload1441; CHECK-GI-NEXT: ldr d8, [sp, #16] // 8-byte Reload1442; CHECK-GI-NEXT: add sp, sp, #321443; CHECK-GI-NEXT: ret1444 %dst = fpext <2 x double> %val to <2 x fp128>1445 ret <2 x fp128> %dst1446}1447 1448define <2 x fp128> @vec_neg_sub(<2 x fp128> %in) {1449; CHECK-SD-LABEL: vec_neg_sub:1450; CHECK-SD: // %bb.0:1451; CHECK-SD-NEXT: sub sp, sp, #641452; CHECK-SD-NEXT: str x30, [sp, #48] // 8-byte Spill1453; CHECK-SD-NEXT: .cfi_def_cfa_offset 641454; CHECK-SD-NEXT: .cfi_offset w30, -161455; CHECK-SD-NEXT: str q1, [sp, #32] // 16-byte Spill1456; CHECK-SD-NEXT: mov v1.16b, v0.16b1457; CHECK-SD-NEXT: adrp x8, .LCPI47_01458; CHECK-SD-NEXT: ldr q0, [x8, :lo12:.LCPI47_0]1459; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill1460; CHECK-SD-NEXT: bl __subtf31461; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Spill1462; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload1463; CHECK-SD-NEXT: ldr q1, [sp, #32] // 16-byte Reload1464; CHECK-SD-NEXT: bl __subtf31465; CHECK-SD-NEXT: mov v1.16b, v0.16b1466; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Reload1467; CHECK-SD-NEXT: ldr x30, [sp, #48] // 8-byte Reload1468; CHECK-SD-NEXT: add sp, sp, #641469; CHECK-SD-NEXT: ret1470;1471; CHECK-GI-LABEL: vec_neg_sub:1472; CHECK-GI: // %bb.0:1473; CHECK-GI-NEXT: sub sp, sp, #641474; CHECK-GI-NEXT: str x30, [sp, #48] // 8-byte Spill1475; CHECK-GI-NEXT: .cfi_def_cfa_offset 641476; CHECK-GI-NEXT: .cfi_offset w30, -161477; CHECK-GI-NEXT: mov v2.16b, v0.16b1478; CHECK-GI-NEXT: adrp x8, .LCPI47_01479; CHECK-GI-NEXT: str q1, [sp, #32] // 16-byte Spill1480; CHECK-GI-NEXT: ldr q0, [x8, :lo12:.LCPI47_0]1481; CHECK-GI-NEXT: mov v1.16b, v2.16b1482; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill1483; CHECK-GI-NEXT: bl __subtf31484; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Spill1485; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload1486; CHECK-GI-NEXT: ldr q1, [sp, #32] // 16-byte Reload1487; CHECK-GI-NEXT: bl __subtf31488; CHECK-GI-NEXT: mov v1.16b, v0.16b1489; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Reload1490; CHECK-GI-NEXT: ldr x30, [sp, #48] // 8-byte Reload1491; CHECK-GI-NEXT: add sp, sp, #641492; CHECK-GI-NEXT: ret1493 %ret = fsub <2 x fp128> zeroinitializer, %in1494 ret <2 x fp128> %ret1495}1496 1497define <2 x fp128> @vec_neg(<2 x fp128> %in) {1498; CHECK-SD-LABEL: vec_neg:1499; CHECK-SD: // %bb.0:1500; CHECK-SD-NEXT: stp q0, q1, [sp, #-32]!1501; CHECK-SD-NEXT: .cfi_def_cfa_offset 321502; CHECK-SD-NEXT: ldrb w8, [sp, #15]1503; CHECK-SD-NEXT: eor w8, w8, #0x801504; CHECK-SD-NEXT: strb w8, [sp, #15]1505; CHECK-SD-NEXT: ldrb w8, [sp, #31]1506; CHECK-SD-NEXT: eor w8, w8, #0x801507; CHECK-SD-NEXT: strb w8, [sp, #31]1508; CHECK-SD-NEXT: ldp q0, q1, [sp], #321509; CHECK-SD-NEXT: ret1510;1511; CHECK-GI-LABEL: vec_neg:1512; CHECK-GI: // %bb.0:1513; CHECK-GI-NEXT: mov x8, v0.d[1]1514; CHECK-GI-NEXT: mov x9, v1.d[1]1515; CHECK-GI-NEXT: mov v0.d[0], v0.d[0]1516; CHECK-GI-NEXT: mov v1.d[0], v1.d[0]1517; CHECK-GI-NEXT: eor x8, x8, #0x80000000000000001518; CHECK-GI-NEXT: eor x9, x9, #0x80000000000000001519; CHECK-GI-NEXT: mov v0.d[1], x81520; CHECK-GI-NEXT: mov v1.d[1], x91521; CHECK-GI-NEXT: ret1522 %ret = fneg <2 x fp128> %in1523 ret <2 x fp128> %ret1524}1525