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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -global-isel=1 -mtriple=arm64-apple-ios7.0 -o - %s 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5@ptr = global ptr null6 7define <8 x i8> @test_v8i8_pre_load(ptr %addr) {8; CHECK-LABEL: test_v8i8_pre_load:9; CHECK: ; %bb.0:10; CHECK-NEXT: ldr d0, [x0, #40]!11; CHECK-NEXT: adrp x8, _ptr@PAGE12; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]13; CHECK-NEXT: ret14 %newaddr = getelementptr <8 x i8>, ptr %addr, i32 515 %val = load <8 x i8>, ptr %newaddr, align 816 store ptr %newaddr, ptr @ptr17 ret <8 x i8> %val18}19 20define <8 x i8> @test_v8i8_post_load(ptr %addr) {21; CHECK-LABEL: test_v8i8_post_load:22; CHECK: ; %bb.0:23; CHECK-NEXT: ldr d0, [x0], #4024; CHECK-NEXT: adrp x8, _ptr@PAGE25; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]26; CHECK-NEXT: ret27 %newaddr = getelementptr <8 x i8>, ptr %addr, i32 528 %val = load <8 x i8>, ptr %addr, align 829 store ptr %newaddr, ptr @ptr30 ret <8 x i8> %val31}32 33define void @test_v8i8_pre_store(<8 x i8> %in, ptr %addr) {34; CHECK-LABEL: test_v8i8_pre_store:35; CHECK: ; %bb.0:36; CHECK-NEXT: adrp x8, _ptr@PAGE37; CHECK-NEXT: str d0, [x0, #40]!38; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]39; CHECK-NEXT: ret40 %newaddr = getelementptr <8 x i8>, ptr %addr, i32 541 store <8 x i8> %in, ptr %newaddr, align 842 store ptr %newaddr, ptr @ptr43 ret void44}45 46define void @test_v8i8_post_store(<8 x i8> %in, ptr %addr) {47; CHECK-LABEL: test_v8i8_post_store:48; CHECK: ; %bb.0:49; CHECK-NEXT: adrp x8, _ptr@PAGE50; CHECK-NEXT: str d0, [x0], #4051; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]52; CHECK-NEXT: ret53 %newaddr = getelementptr <8 x i8>, ptr %addr, i32 554 store <8 x i8> %in, ptr %addr, align 855 store ptr %newaddr, ptr @ptr56 ret void57}58 59define <4 x i16> @test_v4i16_pre_load(ptr %addr) {60; CHECK-LABEL: test_v4i16_pre_load:61; CHECK: ; %bb.0:62; CHECK-NEXT: ldr d0, [x0, #40]!63; CHECK-NEXT: adrp x8, _ptr@PAGE64; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]65; CHECK-NEXT: ret66 %newaddr = getelementptr <4 x i16>, ptr %addr, i32 567 %val = load <4 x i16>, ptr %newaddr, align 868 store ptr %newaddr, ptr @ptr69 ret <4 x i16> %val70}71 72define <4 x i16> @test_v4i16_post_load(ptr %addr) {73; CHECK-LABEL: test_v4i16_post_load:74; CHECK: ; %bb.0:75; CHECK-NEXT: ldr d0, [x0], #4076; CHECK-NEXT: adrp x8, _ptr@PAGE77; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]78; CHECK-NEXT: ret79 %newaddr = getelementptr <4 x i16>, ptr %addr, i32 580 %val = load <4 x i16>, ptr %addr, align 881 store ptr %newaddr, ptr @ptr82 ret <4 x i16> %val83}84 85define void @test_v4i16_pre_store(<4 x i16> %in, ptr %addr) {86; CHECK-LABEL: test_v4i16_pre_store:87; CHECK: ; %bb.0:88; CHECK-NEXT: adrp x8, _ptr@PAGE89; CHECK-NEXT: str d0, [x0, #40]!90; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]91; CHECK-NEXT: ret92 %newaddr = getelementptr <4 x i16>, ptr %addr, i32 593 store <4 x i16> %in, ptr %newaddr, align 894 store ptr %newaddr, ptr @ptr95 ret void96}97 98define void @test_v4i16_post_store(<4 x i16> %in, ptr %addr) {99; CHECK-LABEL: test_v4i16_post_store:100; CHECK: ; %bb.0:101; CHECK-NEXT: adrp x8, _ptr@PAGE102; CHECK-NEXT: str d0, [x0], #40103; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]104; CHECK-NEXT: ret105 %newaddr = getelementptr <4 x i16>, ptr %addr, i32 5106 store <4 x i16> %in, ptr %addr, align 8107 store ptr %newaddr, ptr @ptr108 ret void109}110 111define <2 x i32> @test_v2i32_pre_load(ptr %addr) {112; CHECK-LABEL: test_v2i32_pre_load:113; CHECK: ; %bb.0:114; CHECK-NEXT: ldr d0, [x0, #40]!115; CHECK-NEXT: adrp x8, _ptr@PAGE116; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]117; CHECK-NEXT: ret118 %newaddr = getelementptr <2 x i32>, ptr %addr, i32 5119 %val = load <2 x i32>, ptr %newaddr, align 8120 store ptr %newaddr, ptr @ptr121 ret <2 x i32> %val122}123 124define <2 x i32> @test_v2i32_post_load(ptr %addr) {125; CHECK-LABEL: test_v2i32_post_load:126; CHECK: ; %bb.0:127; CHECK-NEXT: ldr d0, [x0], #40128; CHECK-NEXT: adrp x8, _ptr@PAGE129; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]130; CHECK-NEXT: ret131 %newaddr = getelementptr <2 x i32>, ptr %addr, i32 5132 %val = load <2 x i32>, ptr %addr, align 8133 store ptr %newaddr, ptr @ptr134 ret <2 x i32> %val135}136 137define void @test_v2i32_pre_store(<2 x i32> %in, ptr %addr) {138; CHECK-LABEL: test_v2i32_pre_store:139; CHECK: ; %bb.0:140; CHECK-NEXT: adrp x8, _ptr@PAGE141; CHECK-NEXT: str d0, [x0, #40]!142; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]143; CHECK-NEXT: ret144 %newaddr = getelementptr <2 x i32>, ptr %addr, i32 5145 store <2 x i32> %in, ptr %newaddr, align 8146 store ptr %newaddr, ptr @ptr147 ret void148}149 150define void @test_v2i32_post_store(<2 x i32> %in, ptr %addr) {151; CHECK-LABEL: test_v2i32_post_store:152; CHECK: ; %bb.0:153; CHECK-NEXT: adrp x8, _ptr@PAGE154; CHECK-NEXT: str d0, [x0], #40155; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]156; CHECK-NEXT: ret157 %newaddr = getelementptr <2 x i32>, ptr %addr, i32 5158 store <2 x i32> %in, ptr %addr, align 8159 store ptr %newaddr, ptr @ptr160 ret void161}162 163define <2 x float> @test_v2f32_pre_load(ptr %addr) {164; CHECK-LABEL: test_v2f32_pre_load:165; CHECK: ; %bb.0:166; CHECK-NEXT: ldr d0, [x0, #40]!167; CHECK-NEXT: adrp x8, _ptr@PAGE168; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]169; CHECK-NEXT: ret170 %newaddr = getelementptr <2 x float>, ptr %addr, i32 5171 %val = load <2 x float>, ptr %newaddr, align 8172 store ptr %newaddr, ptr @ptr173 ret <2 x float> %val174}175 176define <2 x float> @test_v2f32_post_load(ptr %addr) {177; CHECK-LABEL: test_v2f32_post_load:178; CHECK: ; %bb.0:179; CHECK-NEXT: ldr d0, [x0], #40180; CHECK-NEXT: adrp x8, _ptr@PAGE181; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]182; CHECK-NEXT: ret183 %newaddr = getelementptr <2 x float>, ptr %addr, i32 5184 %val = load <2 x float>, ptr %addr, align 8185 store ptr %newaddr, ptr @ptr186 ret <2 x float> %val187}188 189define void @test_v2f32_pre_store(<2 x float> %in, ptr %addr) {190; CHECK-LABEL: test_v2f32_pre_store:191; CHECK: ; %bb.0:192; CHECK-NEXT: adrp x8, _ptr@PAGE193; CHECK-NEXT: str d0, [x0, #40]!194; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]195; CHECK-NEXT: ret196 %newaddr = getelementptr <2 x float>, ptr %addr, i32 5197 store <2 x float> %in, ptr %newaddr, align 8198 store ptr %newaddr, ptr @ptr199 ret void200}201 202define void @test_v2f32_post_store(<2 x float> %in, ptr %addr) {203; CHECK-LABEL: test_v2f32_post_store:204; CHECK: ; %bb.0:205; CHECK-NEXT: adrp x8, _ptr@PAGE206; CHECK-NEXT: str d0, [x0], #40207; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]208; CHECK-NEXT: ret209 %newaddr = getelementptr <2 x float>, ptr %addr, i32 5210 store <2 x float> %in, ptr %addr, align 8211 store ptr %newaddr, ptr @ptr212 ret void213}214 215define <1 x i64> @test_v1i64_pre_load(ptr %addr) {216; CHECK-SD-LABEL: test_v1i64_pre_load:217; CHECK-SD: ; %bb.0:218; CHECK-SD-NEXT: ldr d0, [x0, #40]!219; CHECK-SD-NEXT: adrp x8, _ptr@PAGE220; CHECK-SD-NEXT: str x0, [x8, _ptr@PAGEOFF]221; CHECK-SD-NEXT: ret222;223; CHECK-GI-LABEL: test_v1i64_pre_load:224; CHECK-GI: ; %bb.0:225; CHECK-GI-NEXT: ldr x8, [x0, #40]!226; CHECK-GI-NEXT: adrp x9, _ptr@PAGE227; CHECK-GI-NEXT: str x0, [x9, _ptr@PAGEOFF]228; CHECK-GI-NEXT: fmov d0, x8229; CHECK-GI-NEXT: ret230 %newaddr = getelementptr <1 x i64>, ptr %addr, i32 5231 %val = load <1 x i64>, ptr %newaddr, align 8232 store ptr %newaddr, ptr @ptr233 ret <1 x i64> %val234}235 236define <1 x i64> @test_v1i64_post_load(ptr %addr) {237; CHECK-SD-LABEL: test_v1i64_post_load:238; CHECK-SD: ; %bb.0:239; CHECK-SD-NEXT: ldr d0, [x0], #40240; CHECK-SD-NEXT: adrp x8, _ptr@PAGE241; CHECK-SD-NEXT: str x0, [x8, _ptr@PAGEOFF]242; CHECK-SD-NEXT: ret243;244; CHECK-GI-LABEL: test_v1i64_post_load:245; CHECK-GI: ; %bb.0:246; CHECK-GI-NEXT: ldr x8, [x0], #40247; CHECK-GI-NEXT: adrp x9, _ptr@PAGE248; CHECK-GI-NEXT: str x0, [x9, _ptr@PAGEOFF]249; CHECK-GI-NEXT: fmov d0, x8250; CHECK-GI-NEXT: ret251 %newaddr = getelementptr <1 x i64>, ptr %addr, i32 5252 %val = load <1 x i64>, ptr %addr, align 8253 store ptr %newaddr, ptr @ptr254 ret <1 x i64> %val255}256 257define void @test_v1i64_pre_store(<1 x i64> %in, ptr %addr) {258; CHECK-LABEL: test_v1i64_pre_store:259; CHECK: ; %bb.0:260; CHECK-NEXT: adrp x8, _ptr@PAGE261; CHECK-NEXT: str d0, [x0, #40]!262; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]263; CHECK-NEXT: ret264 %newaddr = getelementptr <1 x i64>, ptr %addr, i32 5265 store <1 x i64> %in, ptr %newaddr, align 8266 store ptr %newaddr, ptr @ptr267 ret void268}269 270define void @test_v1i64_post_store(<1 x i64> %in, ptr %addr) {271; CHECK-LABEL: test_v1i64_post_store:272; CHECK: ; %bb.0:273; CHECK-NEXT: adrp x8, _ptr@PAGE274; CHECK-NEXT: str d0, [x0], #40275; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]276; CHECK-NEXT: ret277 %newaddr = getelementptr <1 x i64>, ptr %addr, i32 5278 store <1 x i64> %in, ptr %addr, align 8279 store ptr %newaddr, ptr @ptr280 ret void281}282 283define <16 x i8> @test_v16i8_pre_load(ptr %addr) {284; CHECK-LABEL: test_v16i8_pre_load:285; CHECK: ; %bb.0:286; CHECK-NEXT: ldr q0, [x0, #80]!287; CHECK-NEXT: adrp x8, _ptr@PAGE288; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]289; CHECK-NEXT: ret290 %newaddr = getelementptr <16 x i8>, ptr %addr, i32 5291 %val = load <16 x i8>, ptr %newaddr, align 8292 store ptr %newaddr, ptr @ptr293 ret <16 x i8> %val294}295 296define <16 x i8> @test_v16i8_post_load(ptr %addr) {297; CHECK-LABEL: test_v16i8_post_load:298; CHECK: ; %bb.0:299; CHECK-NEXT: ldr q0, [x0], #80300; CHECK-NEXT: adrp x8, _ptr@PAGE301; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]302; CHECK-NEXT: ret303 %newaddr = getelementptr <16 x i8>, ptr %addr, i32 5304 %val = load <16 x i8>, ptr %addr, align 8305 store ptr %newaddr, ptr @ptr306 ret <16 x i8> %val307}308 309define void @test_v16i8_pre_store(<16 x i8> %in, ptr %addr) {310; CHECK-LABEL: test_v16i8_pre_store:311; CHECK: ; %bb.0:312; CHECK-NEXT: adrp x8, _ptr@PAGE313; CHECK-NEXT: str q0, [x0, #80]!314; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]315; CHECK-NEXT: ret316 %newaddr = getelementptr <16 x i8>, ptr %addr, i32 5317 store <16 x i8> %in, ptr %newaddr, align 8318 store ptr %newaddr, ptr @ptr319 ret void320}321 322define void @test_v16i8_post_store(<16 x i8> %in, ptr %addr) {323; CHECK-LABEL: test_v16i8_post_store:324; CHECK: ; %bb.0:325; CHECK-NEXT: adrp x8, _ptr@PAGE326; CHECK-NEXT: str q0, [x0], #80327; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]328; CHECK-NEXT: ret329 %newaddr = getelementptr <16 x i8>, ptr %addr, i32 5330 store <16 x i8> %in, ptr %addr, align 8331 store ptr %newaddr, ptr @ptr332 ret void333}334 335define <8 x i16> @test_v8i16_pre_load(ptr %addr) {336; CHECK-LABEL: test_v8i16_pre_load:337; CHECK: ; %bb.0:338; CHECK-NEXT: ldr q0, [x0, #80]!339; CHECK-NEXT: adrp x8, _ptr@PAGE340; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]341; CHECK-NEXT: ret342 %newaddr = getelementptr <8 x i16>, ptr %addr, i32 5343 %val = load <8 x i16>, ptr %newaddr, align 8344 store ptr %newaddr, ptr @ptr345 ret <8 x i16> %val346}347 348define <8 x i16> @test_v8i16_post_load(ptr %addr) {349; CHECK-LABEL: test_v8i16_post_load:350; CHECK: ; %bb.0:351; CHECK-NEXT: ldr q0, [x0], #80352; CHECK-NEXT: adrp x8, _ptr@PAGE353; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]354; CHECK-NEXT: ret355 %newaddr = getelementptr <8 x i16>, ptr %addr, i32 5356 %val = load <8 x i16>, ptr %addr, align 8357 store ptr %newaddr, ptr @ptr358 ret <8 x i16> %val359}360 361define void @test_v8i16_pre_store(<8 x i16> %in, ptr %addr) {362; CHECK-LABEL: test_v8i16_pre_store:363; CHECK: ; %bb.0:364; CHECK-NEXT: adrp x8, _ptr@PAGE365; CHECK-NEXT: str q0, [x0, #80]!366; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]367; CHECK-NEXT: ret368 %newaddr = getelementptr <8 x i16>, ptr %addr, i32 5369 store <8 x i16> %in, ptr %newaddr, align 8370 store ptr %newaddr, ptr @ptr371 ret void372}373 374define void @test_v8i16_post_store(<8 x i16> %in, ptr %addr) {375; CHECK-LABEL: test_v8i16_post_store:376; CHECK: ; %bb.0:377; CHECK-NEXT: adrp x8, _ptr@PAGE378; CHECK-NEXT: str q0, [x0], #80379; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]380; CHECK-NEXT: ret381 %newaddr = getelementptr <8 x i16>, ptr %addr, i32 5382 store <8 x i16> %in, ptr %addr, align 8383 store ptr %newaddr, ptr @ptr384 ret void385}386 387define <4 x i32> @test_v4i32_pre_load(ptr %addr) {388; CHECK-LABEL: test_v4i32_pre_load:389; CHECK: ; %bb.0:390; CHECK-NEXT: ldr q0, [x0, #80]!391; CHECK-NEXT: adrp x8, _ptr@PAGE392; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]393; CHECK-NEXT: ret394 %newaddr = getelementptr <4 x i32>, ptr %addr, i32 5395 %val = load <4 x i32>, ptr %newaddr, align 8396 store ptr %newaddr, ptr @ptr397 ret <4 x i32> %val398}399 400define <4 x i32> @test_v4i32_post_load(ptr %addr) {401; CHECK-LABEL: test_v4i32_post_load:402; CHECK: ; %bb.0:403; CHECK-NEXT: ldr q0, [x0], #80404; CHECK-NEXT: adrp x8, _ptr@PAGE405; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]406; CHECK-NEXT: ret407 %newaddr = getelementptr <4 x i32>, ptr %addr, i32 5408 %val = load <4 x i32>, ptr %addr, align 8409 store ptr %newaddr, ptr @ptr410 ret <4 x i32> %val411}412 413define void @test_v4i32_pre_store(<4 x i32> %in, ptr %addr) {414; CHECK-LABEL: test_v4i32_pre_store:415; CHECK: ; %bb.0:416; CHECK-NEXT: adrp x8, _ptr@PAGE417; CHECK-NEXT: str q0, [x0, #80]!418; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]419; CHECK-NEXT: ret420 %newaddr = getelementptr <4 x i32>, ptr %addr, i32 5421 store <4 x i32> %in, ptr %newaddr, align 8422 store ptr %newaddr, ptr @ptr423 ret void424}425 426define void @test_v4i32_post_store(<4 x i32> %in, ptr %addr) {427; CHECK-LABEL: test_v4i32_post_store:428; CHECK: ; %bb.0:429; CHECK-NEXT: adrp x8, _ptr@PAGE430; CHECK-NEXT: str q0, [x0], #80431; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]432; CHECK-NEXT: ret433 %newaddr = getelementptr <4 x i32>, ptr %addr, i32 5434 store <4 x i32> %in, ptr %addr, align 8435 store ptr %newaddr, ptr @ptr436 ret void437}438 439 440define <4 x float> @test_v4f32_pre_load(ptr %addr) {441; CHECK-LABEL: test_v4f32_pre_load:442; CHECK: ; %bb.0:443; CHECK-NEXT: ldr q0, [x0, #80]!444; CHECK-NEXT: adrp x8, _ptr@PAGE445; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]446; CHECK-NEXT: ret447 %newaddr = getelementptr <4 x float>, ptr %addr, i32 5448 %val = load <4 x float>, ptr %newaddr, align 8449 store ptr %newaddr, ptr @ptr450 ret <4 x float> %val451}452 453define <4 x float> @test_v4f32_post_load(ptr %addr) {454; CHECK-LABEL: test_v4f32_post_load:455; CHECK: ; %bb.0:456; CHECK-NEXT: ldr q0, [x0], #80457; CHECK-NEXT: adrp x8, _ptr@PAGE458; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]459; CHECK-NEXT: ret460 %newaddr = getelementptr <4 x float>, ptr %addr, i32 5461 %val = load <4 x float>, ptr %addr, align 8462 store ptr %newaddr, ptr @ptr463 ret <4 x float> %val464}465 466define void @test_v4f32_pre_store(<4 x float> %in, ptr %addr) {467; CHECK-LABEL: test_v4f32_pre_store:468; CHECK: ; %bb.0:469; CHECK-NEXT: adrp x8, _ptr@PAGE470; CHECK-NEXT: str q0, [x0, #80]!471; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]472; CHECK-NEXT: ret473 %newaddr = getelementptr <4 x float>, ptr %addr, i32 5474 store <4 x float> %in, ptr %newaddr, align 8475 store ptr %newaddr, ptr @ptr476 ret void477}478 479define void @test_v4f32_post_store(<4 x float> %in, ptr %addr) {480; CHECK-LABEL: test_v4f32_post_store:481; CHECK: ; %bb.0:482; CHECK-NEXT: adrp x8, _ptr@PAGE483; CHECK-NEXT: str q0, [x0], #80484; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]485; CHECK-NEXT: ret486 %newaddr = getelementptr <4 x float>, ptr %addr, i32 5487 store <4 x float> %in, ptr %addr, align 8488 store ptr %newaddr, ptr @ptr489 ret void490}491 492 493define <2 x i64> @test_v2i64_pre_load(ptr %addr) {494; CHECK-LABEL: test_v2i64_pre_load:495; CHECK: ; %bb.0:496; CHECK-NEXT: ldr q0, [x0, #80]!497; CHECK-NEXT: adrp x8, _ptr@PAGE498; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]499; CHECK-NEXT: ret500 %newaddr = getelementptr <2 x i64>, ptr %addr, i32 5501 %val = load <2 x i64>, ptr %newaddr, align 8502 store ptr %newaddr, ptr @ptr503 ret <2 x i64> %val504}505 506define <2 x i64> @test_v2i64_post_load(ptr %addr) {507; CHECK-LABEL: test_v2i64_post_load:508; CHECK: ; %bb.0:509; CHECK-NEXT: ldr q0, [x0], #80510; CHECK-NEXT: adrp x8, _ptr@PAGE511; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]512; CHECK-NEXT: ret513 %newaddr = getelementptr <2 x i64>, ptr %addr, i32 5514 %val = load <2 x i64>, ptr %addr, align 8515 store ptr %newaddr, ptr @ptr516 ret <2 x i64> %val517}518 519define void @test_v2i64_pre_store(<2 x i64> %in, ptr %addr) {520; CHECK-LABEL: test_v2i64_pre_store:521; CHECK: ; %bb.0:522; CHECK-NEXT: adrp x8, _ptr@PAGE523; CHECK-NEXT: str q0, [x0, #80]!524; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]525; CHECK-NEXT: ret526 %newaddr = getelementptr <2 x i64>, ptr %addr, i32 5527 store <2 x i64> %in, ptr %newaddr, align 8528 store ptr %newaddr, ptr @ptr529 ret void530}531 532define void @test_v2i64_post_store(<2 x i64> %in, ptr %addr) {533; CHECK-LABEL: test_v2i64_post_store:534; CHECK: ; %bb.0:535; CHECK-NEXT: adrp x8, _ptr@PAGE536; CHECK-NEXT: str q0, [x0], #80537; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]538; CHECK-NEXT: ret539 %newaddr = getelementptr <2 x i64>, ptr %addr, i32 5540 store <2 x i64> %in, ptr %addr, align 8541 store ptr %newaddr, ptr @ptr542 ret void543}544 545 546define <2 x double> @test_v2f64_pre_load(ptr %addr) {547; CHECK-LABEL: test_v2f64_pre_load:548; CHECK: ; %bb.0:549; CHECK-NEXT: ldr q0, [x0, #80]!550; CHECK-NEXT: adrp x8, _ptr@PAGE551; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]552; CHECK-NEXT: ret553 %newaddr = getelementptr <2 x double>, ptr %addr, i32 5554 %val = load <2 x double>, ptr %newaddr, align 8555 store ptr %newaddr, ptr @ptr556 ret <2 x double> %val557}558 559define <2 x double> @test_v2f64_post_load(ptr %addr) {560; CHECK-LABEL: test_v2f64_post_load:561; CHECK: ; %bb.0:562; CHECK-NEXT: ldr q0, [x0], #80563; CHECK-NEXT: adrp x8, _ptr@PAGE564; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]565; CHECK-NEXT: ret566 %newaddr = getelementptr <2 x double>, ptr %addr, i32 5567 %val = load <2 x double>, ptr %addr, align 8568 store ptr %newaddr, ptr @ptr569 ret <2 x double> %val570}571 572define void @test_v2f64_pre_store(<2 x double> %in, ptr %addr) {573; CHECK-LABEL: test_v2f64_pre_store:574; CHECK: ; %bb.0:575; CHECK-NEXT: adrp x8, _ptr@PAGE576; CHECK-NEXT: str q0, [x0, #80]!577; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]578; CHECK-NEXT: ret579 %newaddr = getelementptr <2 x double>, ptr %addr, i32 5580 store <2 x double> %in, ptr %newaddr, align 8581 store ptr %newaddr, ptr @ptr582 ret void583}584 585define void @test_v2f64_post_store(<2 x double> %in, ptr %addr) {586; CHECK-LABEL: test_v2f64_post_store:587; CHECK: ; %bb.0:588; CHECK-NEXT: adrp x8, _ptr@PAGE589; CHECK-NEXT: str q0, [x0], #80590; CHECK-NEXT: str x0, [x8, _ptr@PAGEOFF]591; CHECK-NEXT: ret592 %newaddr = getelementptr <2 x double>, ptr %addr, i32 5593 store <2 x double> %in, ptr %addr, align 8594 store ptr %newaddr, ptr @ptr595 ret void596}597 598define ptr @test_v16i8_post_imm_st1_lane(<16 x i8> %in, ptr %addr) {599; CHECK-SD-LABEL: test_v16i8_post_imm_st1_lane:600; CHECK-SD: ; %bb.0:601; CHECK-SD-NEXT: st1.b { v0 }[3], [x0], #1602; CHECK-SD-NEXT: ret603;604; CHECK-GI-LABEL: test_v16i8_post_imm_st1_lane:605; CHECK-GI: ; %bb.0:606; CHECK-GI-NEXT: mov b0, v0[3]607; CHECK-GI-NEXT: str b0, [x0], #1608; CHECK-GI-NEXT: ret609 %elt = extractelement <16 x i8> %in, i32 3610 store i8 %elt, ptr %addr611 612 %newaddr = getelementptr i8, ptr %addr, i32 1613 ret ptr %newaddr614}615 616define ptr @test_v16i8_post_reg_st1_lane(<16 x i8> %in, ptr %addr) {617; CHECK-SD-LABEL: test_v16i8_post_reg_st1_lane:618; CHECK-SD: ; %bb.0:619; CHECK-SD-NEXT: mov w8, #2 ; =0x2620; CHECK-SD-NEXT: st1.b { v0 }[3], [x0], x8621; CHECK-SD-NEXT: ret622;623; CHECK-GI-LABEL: test_v16i8_post_reg_st1_lane:624; CHECK-GI: ; %bb.0:625; CHECK-GI-NEXT: mov b0, v0[3]626; CHECK-GI-NEXT: str b0, [x0], #2627; CHECK-GI-NEXT: ret628 %elt = extractelement <16 x i8> %in, i32 3629 store i8 %elt, ptr %addr630 631 %newaddr = getelementptr i8, ptr %addr, i32 2632 ret ptr %newaddr633}634 635 636define ptr @test_v8i16_post_imm_st1_lane(<8 x i16> %in, ptr %addr) {637; CHECK-SD-LABEL: test_v8i16_post_imm_st1_lane:638; CHECK-SD: ; %bb.0:639; CHECK-SD-NEXT: st1.h { v0 }[3], [x0], #2640; CHECK-SD-NEXT: ret641;642; CHECK-GI-LABEL: test_v8i16_post_imm_st1_lane:643; CHECK-GI: ; %bb.0:644; CHECK-GI-NEXT: mov h0, v0[3]645; CHECK-GI-NEXT: str h0, [x0], #2646; CHECK-GI-NEXT: ret647 %elt = extractelement <8 x i16> %in, i32 3648 store i16 %elt, ptr %addr649 650 %newaddr = getelementptr i16, ptr %addr, i32 1651 ret ptr %newaddr652}653 654define ptr @test_v8i16_post_reg_st1_lane(<8 x i16> %in, ptr %addr) {655; CHECK-SD-LABEL: test_v8i16_post_reg_st1_lane:656; CHECK-SD: ; %bb.0:657; CHECK-SD-NEXT: mov w8, #4 ; =0x4658; CHECK-SD-NEXT: st1.h { v0 }[3], [x0], x8659; CHECK-SD-NEXT: ret660;661; CHECK-GI-LABEL: test_v8i16_post_reg_st1_lane:662; CHECK-GI: ; %bb.0:663; CHECK-GI-NEXT: mov h0, v0[3]664; CHECK-GI-NEXT: str h0, [x0], #4665; CHECK-GI-NEXT: ret666 %elt = extractelement <8 x i16> %in, i32 3667 store i16 %elt, ptr %addr668 669 %newaddr = getelementptr i16, ptr %addr, i32 2670 ret ptr %newaddr671}672 673define ptr @test_v4i32_post_imm_st1_lane(<4 x i32> %in, ptr %addr) {674; CHECK-SD-LABEL: test_v4i32_post_imm_st1_lane:675; CHECK-SD: ; %bb.0:676; CHECK-SD-NEXT: st1.s { v0 }[3], [x0], #4677; CHECK-SD-NEXT: ret678;679; CHECK-GI-LABEL: test_v4i32_post_imm_st1_lane:680; CHECK-GI: ; %bb.0:681; CHECK-GI-NEXT: mov s0, v0[3]682; CHECK-GI-NEXT: str s0, [x0], #4683; CHECK-GI-NEXT: ret684 %elt = extractelement <4 x i32> %in, i32 3685 store i32 %elt, ptr %addr686 687 %newaddr = getelementptr i32, ptr %addr, i32 1688 ret ptr %newaddr689}690 691define ptr @test_v4i32_post_reg_st1_lane(<4 x i32> %in, ptr %addr) {692; CHECK-SD-LABEL: test_v4i32_post_reg_st1_lane:693; CHECK-SD: ; %bb.0:694; CHECK-SD-NEXT: mov w8, #8 ; =0x8695; CHECK-SD-NEXT: st1.s { v0 }[3], [x0], x8696; CHECK-SD-NEXT: ret697;698; CHECK-GI-LABEL: test_v4i32_post_reg_st1_lane:699; CHECK-GI: ; %bb.0:700; CHECK-GI-NEXT: mov s0, v0[3]701; CHECK-GI-NEXT: str s0, [x0], #8702; CHECK-GI-NEXT: ret703 %elt = extractelement <4 x i32> %in, i32 3704 store i32 %elt, ptr %addr705 706 %newaddr = getelementptr i32, ptr %addr, i32 2707 ret ptr %newaddr708}709 710define ptr @test_v4f32_post_imm_st1_lane(<4 x float> %in, ptr %addr) {711; CHECK-SD-LABEL: test_v4f32_post_imm_st1_lane:712; CHECK-SD: ; %bb.0:713; CHECK-SD-NEXT: st1.s { v0 }[3], [x0], #4714; CHECK-SD-NEXT: ret715;716; CHECK-GI-LABEL: test_v4f32_post_imm_st1_lane:717; CHECK-GI: ; %bb.0:718; CHECK-GI-NEXT: mov s0, v0[3]719; CHECK-GI-NEXT: str s0, [x0], #4720; CHECK-GI-NEXT: ret721 %elt = extractelement <4 x float> %in, i32 3722 store float %elt, ptr %addr723 724 %newaddr = getelementptr float, ptr %addr, i32 1725 ret ptr %newaddr726}727 728define ptr @test_v4f32_post_reg_st1_lane(<4 x float> %in, ptr %addr) {729; CHECK-SD-LABEL: test_v4f32_post_reg_st1_lane:730; CHECK-SD: ; %bb.0:731; CHECK-SD-NEXT: mov w8, #8 ; =0x8732; CHECK-SD-NEXT: st1.s { v0 }[3], [x0], x8733; CHECK-SD-NEXT: ret734;735; CHECK-GI-LABEL: test_v4f32_post_reg_st1_lane:736; CHECK-GI: ; %bb.0:737; CHECK-GI-NEXT: mov s0, v0[3]738; CHECK-GI-NEXT: str s0, [x0], #8739; CHECK-GI-NEXT: ret740 %elt = extractelement <4 x float> %in, i32 3741 store float %elt, ptr %addr742 743 %newaddr = getelementptr float, ptr %addr, i32 2744 ret ptr %newaddr745}746 747define ptr @test_v2i64_post_imm_st1_lane(<2 x i64> %in, ptr %addr) {748; CHECK-SD-LABEL: test_v2i64_post_imm_st1_lane:749; CHECK-SD: ; %bb.0:750; CHECK-SD-NEXT: st1.d { v0 }[1], [x0], #8751; CHECK-SD-NEXT: ret752;753; CHECK-GI-LABEL: test_v2i64_post_imm_st1_lane:754; CHECK-GI: ; %bb.0:755; CHECK-GI-NEXT: mov d0, v0[1]756; CHECK-GI-NEXT: str d0, [x0], #8757; CHECK-GI-NEXT: ret758 %elt = extractelement <2 x i64> %in, i64 1759 store i64 %elt, ptr %addr760 761 %newaddr = getelementptr i64, ptr %addr, i64 1762 ret ptr %newaddr763}764 765define ptr @test_v2i64_post_reg_st1_lane(<2 x i64> %in, ptr %addr) {766; CHECK-SD-LABEL: test_v2i64_post_reg_st1_lane:767; CHECK-SD: ; %bb.0:768; CHECK-SD-NEXT: mov w8, #16 ; =0x10769; CHECK-SD-NEXT: st1.d { v0 }[1], [x0], x8770; CHECK-SD-NEXT: ret771;772; CHECK-GI-LABEL: test_v2i64_post_reg_st1_lane:773; CHECK-GI: ; %bb.0:774; CHECK-GI-NEXT: mov d0, v0[1]775; CHECK-GI-NEXT: str d0, [x0], #16776; CHECK-GI-NEXT: ret777 %elt = extractelement <2 x i64> %in, i64 1778 store i64 %elt, ptr %addr779 780 %newaddr = getelementptr i64, ptr %addr, i64 2781 ret ptr %newaddr782}783 784define ptr @test_v2f64_post_imm_st1_lane(<2 x double> %in, ptr %addr) {785; CHECK-SD-LABEL: test_v2f64_post_imm_st1_lane:786; CHECK-SD: ; %bb.0:787; CHECK-SD-NEXT: st1.d { v0 }[1], [x0], #8788; CHECK-SD-NEXT: ret789;790; CHECK-GI-LABEL: test_v2f64_post_imm_st1_lane:791; CHECK-GI: ; %bb.0:792; CHECK-GI-NEXT: mov d0, v0[1]793; CHECK-GI-NEXT: str d0, [x0], #8794; CHECK-GI-NEXT: ret795 %elt = extractelement <2 x double> %in, i32 1796 store double %elt, ptr %addr797 798 %newaddr = getelementptr double, ptr %addr, i32 1799 ret ptr %newaddr800}801 802define ptr @test_v2f64_post_reg_st1_lane(<2 x double> %in, ptr %addr) {803; CHECK-SD-LABEL: test_v2f64_post_reg_st1_lane:804; CHECK-SD: ; %bb.0:805; CHECK-SD-NEXT: mov w8, #16 ; =0x10806; CHECK-SD-NEXT: st1.d { v0 }[1], [x0], x8807; CHECK-SD-NEXT: ret808;809; CHECK-GI-LABEL: test_v2f64_post_reg_st1_lane:810; CHECK-GI: ; %bb.0:811; CHECK-GI-NEXT: mov d0, v0[1]812; CHECK-GI-NEXT: str d0, [x0], #16813; CHECK-GI-NEXT: ret814 %elt = extractelement <2 x double> %in, i32 1815 store double %elt, ptr %addr816 817 %newaddr = getelementptr double, ptr %addr, i32 2818 ret ptr %newaddr819}820 821define ptr @test_v8i8_post_imm_st1_lane(<8 x i8> %in, ptr %addr) {822; CHECK-SD-LABEL: test_v8i8_post_imm_st1_lane:823; CHECK-SD: ; %bb.0:824; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0825; CHECK-SD-NEXT: st1.b { v0 }[3], [x0], #1826; CHECK-SD-NEXT: ret827;828; CHECK-GI-LABEL: test_v8i8_post_imm_st1_lane:829; CHECK-GI: ; %bb.0:830; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0831; CHECK-GI-NEXT: mov b0, v0[3]832; CHECK-GI-NEXT: str b0, [x0], #1833; CHECK-GI-NEXT: ret834 %elt = extractelement <8 x i8> %in, i32 3835 store i8 %elt, ptr %addr836 837 %newaddr = getelementptr i8, ptr %addr, i32 1838 ret ptr %newaddr839}840 841define ptr @test_v8i8_post_reg_st1_lane(<8 x i8> %in, ptr %addr) {842; CHECK-SD-LABEL: test_v8i8_post_reg_st1_lane:843; CHECK-SD: ; %bb.0:844; CHECK-SD-NEXT: mov w8, #2 ; =0x2845; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0846; CHECK-SD-NEXT: st1.b { v0 }[3], [x0], x8847; CHECK-SD-NEXT: ret848;849; CHECK-GI-LABEL: test_v8i8_post_reg_st1_lane:850; CHECK-GI: ; %bb.0:851; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0852; CHECK-GI-NEXT: mov b0, v0[3]853; CHECK-GI-NEXT: str b0, [x0], #2854; CHECK-GI-NEXT: ret855 %elt = extractelement <8 x i8> %in, i32 3856 store i8 %elt, ptr %addr857 858 %newaddr = getelementptr i8, ptr %addr, i32 2859 ret ptr %newaddr860}861 862define ptr @test_v4i16_post_imm_st1_lane(<4 x i16> %in, ptr %addr) {863; CHECK-SD-LABEL: test_v4i16_post_imm_st1_lane:864; CHECK-SD: ; %bb.0:865; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0866; CHECK-SD-NEXT: st1.h { v0 }[3], [x0], #2867; CHECK-SD-NEXT: ret868;869; CHECK-GI-LABEL: test_v4i16_post_imm_st1_lane:870; CHECK-GI: ; %bb.0:871; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0872; CHECK-GI-NEXT: mov h0, v0[3]873; CHECK-GI-NEXT: str h0, [x0], #2874; CHECK-GI-NEXT: ret875 %elt = extractelement <4 x i16> %in, i32 3876 store i16 %elt, ptr %addr877 878 %newaddr = getelementptr i16, ptr %addr, i32 1879 ret ptr %newaddr880}881 882define ptr @test_v4i16_post_reg_st1_lane(<4 x i16> %in, ptr %addr) {883; CHECK-SD-LABEL: test_v4i16_post_reg_st1_lane:884; CHECK-SD: ; %bb.0:885; CHECK-SD-NEXT: mov w8, #4 ; =0x4886; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0887; CHECK-SD-NEXT: st1.h { v0 }[3], [x0], x8888; CHECK-SD-NEXT: ret889;890; CHECK-GI-LABEL: test_v4i16_post_reg_st1_lane:891; CHECK-GI: ; %bb.0:892; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0893; CHECK-GI-NEXT: mov h0, v0[3]894; CHECK-GI-NEXT: str h0, [x0], #4895; CHECK-GI-NEXT: ret896 %elt = extractelement <4 x i16> %in, i32 3897 store i16 %elt, ptr %addr898 899 %newaddr = getelementptr i16, ptr %addr, i32 2900 ret ptr %newaddr901}902 903define ptr @test_v2i32_post_imm_st1_lane(<2 x i32> %in, ptr %addr) {904; CHECK-SD-LABEL: test_v2i32_post_imm_st1_lane:905; CHECK-SD: ; %bb.0:906; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0907; CHECK-SD-NEXT: st1.s { v0 }[1], [x0], #4908; CHECK-SD-NEXT: ret909;910; CHECK-GI-LABEL: test_v2i32_post_imm_st1_lane:911; CHECK-GI: ; %bb.0:912; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0913; CHECK-GI-NEXT: mov s0, v0[1]914; CHECK-GI-NEXT: str s0, [x0], #4915; CHECK-GI-NEXT: ret916 %elt = extractelement <2 x i32> %in, i32 1917 store i32 %elt, ptr %addr918 919 %newaddr = getelementptr i32, ptr %addr, i32 1920 ret ptr %newaddr921}922 923define ptr @test_v2i32_post_reg_st1_lane(<2 x i32> %in, ptr %addr) {924; CHECK-SD-LABEL: test_v2i32_post_reg_st1_lane:925; CHECK-SD: ; %bb.0:926; CHECK-SD-NEXT: mov w8, #8 ; =0x8927; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0928; CHECK-SD-NEXT: st1.s { v0 }[1], [x0], x8929; CHECK-SD-NEXT: ret930;931; CHECK-GI-LABEL: test_v2i32_post_reg_st1_lane:932; CHECK-GI: ; %bb.0:933; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0934; CHECK-GI-NEXT: mov s0, v0[1]935; CHECK-GI-NEXT: str s0, [x0], #8936; CHECK-GI-NEXT: ret937 %elt = extractelement <2 x i32> %in, i32 1938 store i32 %elt, ptr %addr939 940 %newaddr = getelementptr i32, ptr %addr, i32 2941 ret ptr %newaddr942}943 944define ptr @test_v2f32_post_imm_st1_lane(<2 x float> %in, ptr %addr) {945; CHECK-SD-LABEL: test_v2f32_post_imm_st1_lane:946; CHECK-SD: ; %bb.0:947; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0948; CHECK-SD-NEXT: st1.s { v0 }[1], [x0], #4949; CHECK-SD-NEXT: ret950;951; CHECK-GI-LABEL: test_v2f32_post_imm_st1_lane:952; CHECK-GI: ; %bb.0:953; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0954; CHECK-GI-NEXT: mov s0, v0[1]955; CHECK-GI-NEXT: str s0, [x0], #4956; CHECK-GI-NEXT: ret957 %elt = extractelement <2 x float> %in, i32 1958 store float %elt, ptr %addr959 960 %newaddr = getelementptr float, ptr %addr, i32 1961 ret ptr %newaddr962}963 964define ptr @test_v2f32_post_reg_st1_lane(<2 x float> %in, ptr %addr) {965; CHECK-SD-LABEL: test_v2f32_post_reg_st1_lane:966; CHECK-SD: ; %bb.0:967; CHECK-SD-NEXT: mov w8, #8 ; =0x8968; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0969; CHECK-SD-NEXT: st1.s { v0 }[1], [x0], x8970; CHECK-SD-NEXT: ret971;972; CHECK-GI-LABEL: test_v2f32_post_reg_st1_lane:973; CHECK-GI: ; %bb.0:974; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0975; CHECK-GI-NEXT: mov s0, v0[1]976; CHECK-GI-NEXT: str s0, [x0], #8977; CHECK-GI-NEXT: ret978 %elt = extractelement <2 x float> %in, i32 1979 store float %elt, ptr %addr980 981 %newaddr = getelementptr float, ptr %addr, i32 2982 ret ptr %newaddr983}984 985define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2(ptr %A, ptr %ptr) {986; CHECK-SD-LABEL: test_v16i8_post_imm_ld2:987; CHECK-SD: ; %bb.0:988; CHECK-SD-NEXT: ld2.16b { v0, v1 }, [x0], #32989; CHECK-SD-NEXT: str x0, [x1]990; CHECK-SD-NEXT: ret991;992; CHECK-GI-LABEL: test_v16i8_post_imm_ld2:993; CHECK-GI: ; %bb.0:994; CHECK-GI-NEXT: ld2.16b { v0, v1 }, [x0]995; CHECK-GI-NEXT: add x8, x0, #32996; CHECK-GI-NEXT: str x8, [x1]997; CHECK-GI-NEXT: ret998 %ld2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr %A)999 %tmp = getelementptr i8, ptr %A, i32 321000 store ptr %tmp, ptr %ptr1001 ret { <16 x i8>, <16 x i8> } %ld21002}1003 1004define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {1005; CHECK-SD-LABEL: test_v16i8_post_reg_ld2:1006; CHECK-SD: ; %bb.0:1007; CHECK-SD-NEXT: ld2.16b { v0, v1 }, [x0], x21008; CHECK-SD-NEXT: str x0, [x1]1009; CHECK-SD-NEXT: ret1010;1011; CHECK-GI-LABEL: test_v16i8_post_reg_ld2:1012; CHECK-GI: ; %bb.0:1013; CHECK-GI-NEXT: ld2.16b { v0, v1 }, [x0]1014; CHECK-GI-NEXT: add x8, x0, x21015; CHECK-GI-NEXT: str x8, [x1]1016; CHECK-GI-NEXT: ret1017 %ld2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr %A)1018 %tmp = getelementptr i8, ptr %A, i64 %inc1019 store ptr %tmp, ptr %ptr1020 ret { <16 x i8>, <16 x i8> } %ld21021}1022 1023declare { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr)1024 1025 1026define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2(ptr %A, ptr %ptr) {1027; CHECK-SD-LABEL: test_v8i8_post_imm_ld2:1028; CHECK-SD: ; %bb.0:1029; CHECK-SD-NEXT: ld2.8b { v0, v1 }, [x0], #161030; CHECK-SD-NEXT: str x0, [x1]1031; CHECK-SD-NEXT: ret1032;1033; CHECK-GI-LABEL: test_v8i8_post_imm_ld2:1034; CHECK-GI: ; %bb.0:1035; CHECK-GI-NEXT: ld2.8b { v0, v1 }, [x0]1036; CHECK-GI-NEXT: add x8, x0, #161037; CHECK-GI-NEXT: str x8, [x1]1038; CHECK-GI-NEXT: ret1039 %ld2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr %A)1040 %tmp = getelementptr i8, ptr %A, i32 161041 store ptr %tmp, ptr %ptr1042 ret { <8 x i8>, <8 x i8> } %ld21043}1044 1045define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {1046; CHECK-SD-LABEL: test_v8i8_post_reg_ld2:1047; CHECK-SD: ; %bb.0:1048; CHECK-SD-NEXT: ld2.8b { v0, v1 }, [x0], x21049; CHECK-SD-NEXT: str x0, [x1]1050; CHECK-SD-NEXT: ret1051;1052; CHECK-GI-LABEL: test_v8i8_post_reg_ld2:1053; CHECK-GI: ; %bb.0:1054; CHECK-GI-NEXT: ld2.8b { v0, v1 }, [x0]1055; CHECK-GI-NEXT: add x8, x0, x21056; CHECK-GI-NEXT: str x8, [x1]1057; CHECK-GI-NEXT: ret1058 %ld2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr %A)1059 %tmp = getelementptr i8, ptr %A, i64 %inc1060 store ptr %tmp, ptr %ptr1061 ret { <8 x i8>, <8 x i8> } %ld21062}1063 1064declare { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr)1065 1066 1067define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2(ptr %A, ptr %ptr) {1068; CHECK-SD-LABEL: test_v8i16_post_imm_ld2:1069; CHECK-SD: ; %bb.0:1070; CHECK-SD-NEXT: ld2.8h { v0, v1 }, [x0], #321071; CHECK-SD-NEXT: str x0, [x1]1072; CHECK-SD-NEXT: ret1073;1074; CHECK-GI-LABEL: test_v8i16_post_imm_ld2:1075; CHECK-GI: ; %bb.0:1076; CHECK-GI-NEXT: ld2.8h { v0, v1 }, [x0]1077; CHECK-GI-NEXT: add x8, x0, #321078; CHECK-GI-NEXT: str x8, [x1]1079; CHECK-GI-NEXT: ret1080 %ld2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr %A)1081 %tmp = getelementptr i16, ptr %A, i32 161082 store ptr %tmp, ptr %ptr1083 ret { <8 x i16>, <8 x i16> } %ld21084}1085 1086define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {1087; CHECK-SD-LABEL: test_v8i16_post_reg_ld2:1088; CHECK-SD: ; %bb.0:1089; CHECK-SD-NEXT: lsl x8, x2, #11090; CHECK-SD-NEXT: ld2.8h { v0, v1 }, [x0], x81091; CHECK-SD-NEXT: str x0, [x1]1092; CHECK-SD-NEXT: ret1093;1094; CHECK-GI-LABEL: test_v8i16_post_reg_ld2:1095; CHECK-GI: ; %bb.0:1096; CHECK-GI-NEXT: ld2.8h { v0, v1 }, [x0]1097; CHECK-GI-NEXT: add x8, x0, x2, lsl #11098; CHECK-GI-NEXT: str x8, [x1]1099; CHECK-GI-NEXT: ret1100 %ld2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr %A)1101 %tmp = getelementptr i16, ptr %A, i64 %inc1102 store ptr %tmp, ptr %ptr1103 ret { <8 x i16>, <8 x i16> } %ld21104}1105 1106declare { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr)1107 1108 1109define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2(ptr %A, ptr %ptr) {1110; CHECK-SD-LABEL: test_v4i16_post_imm_ld2:1111; CHECK-SD: ; %bb.0:1112; CHECK-SD-NEXT: ld2.4h { v0, v1 }, [x0], #161113; CHECK-SD-NEXT: str x0, [x1]1114; CHECK-SD-NEXT: ret1115;1116; CHECK-GI-LABEL: test_v4i16_post_imm_ld2:1117; CHECK-GI: ; %bb.0:1118; CHECK-GI-NEXT: ld2.4h { v0, v1 }, [x0]1119; CHECK-GI-NEXT: add x8, x0, #161120; CHECK-GI-NEXT: str x8, [x1]1121; CHECK-GI-NEXT: ret1122 %ld2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr %A)1123 %tmp = getelementptr i16, ptr %A, i32 81124 store ptr %tmp, ptr %ptr1125 ret { <4 x i16>, <4 x i16> } %ld21126}1127 1128define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {1129; CHECK-SD-LABEL: test_v4i16_post_reg_ld2:1130; CHECK-SD: ; %bb.0:1131; CHECK-SD-NEXT: lsl x8, x2, #11132; CHECK-SD-NEXT: ld2.4h { v0, v1 }, [x0], x81133; CHECK-SD-NEXT: str x0, [x1]1134; CHECK-SD-NEXT: ret1135;1136; CHECK-GI-LABEL: test_v4i16_post_reg_ld2:1137; CHECK-GI: ; %bb.0:1138; CHECK-GI-NEXT: ld2.4h { v0, v1 }, [x0]1139; CHECK-GI-NEXT: add x8, x0, x2, lsl #11140; CHECK-GI-NEXT: str x8, [x1]1141; CHECK-GI-NEXT: ret1142 %ld2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr %A)1143 %tmp = getelementptr i16, ptr %A, i64 %inc1144 store ptr %tmp, ptr %ptr1145 ret { <4 x i16>, <4 x i16> } %ld21146}1147 1148declare { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr)1149 1150 1151define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2(ptr %A, ptr %ptr) {1152; CHECK-SD-LABEL: test_v4i32_post_imm_ld2:1153; CHECK-SD: ; %bb.0:1154; CHECK-SD-NEXT: ld2.4s { v0, v1 }, [x0], #321155; CHECK-SD-NEXT: str x0, [x1]1156; CHECK-SD-NEXT: ret1157;1158; CHECK-GI-LABEL: test_v4i32_post_imm_ld2:1159; CHECK-GI: ; %bb.0:1160; CHECK-GI-NEXT: ld2.4s { v0, v1 }, [x0]1161; CHECK-GI-NEXT: add x8, x0, #321162; CHECK-GI-NEXT: str x8, [x1]1163; CHECK-GI-NEXT: ret1164 %ld2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %A)1165 %tmp = getelementptr i32, ptr %A, i32 81166 store ptr %tmp, ptr %ptr1167 ret { <4 x i32>, <4 x i32> } %ld21168}1169 1170define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {1171; CHECK-SD-LABEL: test_v4i32_post_reg_ld2:1172; CHECK-SD: ; %bb.0:1173; CHECK-SD-NEXT: lsl x8, x2, #21174; CHECK-SD-NEXT: ld2.4s { v0, v1 }, [x0], x81175; CHECK-SD-NEXT: str x0, [x1]1176; CHECK-SD-NEXT: ret1177;1178; CHECK-GI-LABEL: test_v4i32_post_reg_ld2:1179; CHECK-GI: ; %bb.0:1180; CHECK-GI-NEXT: ld2.4s { v0, v1 }, [x0]1181; CHECK-GI-NEXT: add x8, x0, x2, lsl #21182; CHECK-GI-NEXT: str x8, [x1]1183; CHECK-GI-NEXT: ret1184 %ld2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %A)1185 %tmp = getelementptr i32, ptr %A, i64 %inc1186 store ptr %tmp, ptr %ptr1187 ret { <4 x i32>, <4 x i32> } %ld21188}1189 1190declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr)1191 1192 1193define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2(ptr %A, ptr %ptr) {1194; CHECK-SD-LABEL: test_v2i32_post_imm_ld2:1195; CHECK-SD: ; %bb.0:1196; CHECK-SD-NEXT: ld2.2s { v0, v1 }, [x0], #161197; CHECK-SD-NEXT: str x0, [x1]1198; CHECK-SD-NEXT: ret1199;1200; CHECK-GI-LABEL: test_v2i32_post_imm_ld2:1201; CHECK-GI: ; %bb.0:1202; CHECK-GI-NEXT: ld2.2s { v0, v1 }, [x0]1203; CHECK-GI-NEXT: add x8, x0, #161204; CHECK-GI-NEXT: str x8, [x1]1205; CHECK-GI-NEXT: ret1206 %ld2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr %A)1207 %tmp = getelementptr i32, ptr %A, i32 41208 store ptr %tmp, ptr %ptr1209 ret { <2 x i32>, <2 x i32> } %ld21210}1211 1212define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {1213; CHECK-SD-LABEL: test_v2i32_post_reg_ld2:1214; CHECK-SD: ; %bb.0:1215; CHECK-SD-NEXT: lsl x8, x2, #21216; CHECK-SD-NEXT: ld2.2s { v0, v1 }, [x0], x81217; CHECK-SD-NEXT: str x0, [x1]1218; CHECK-SD-NEXT: ret1219;1220; CHECK-GI-LABEL: test_v2i32_post_reg_ld2:1221; CHECK-GI: ; %bb.0:1222; CHECK-GI-NEXT: ld2.2s { v0, v1 }, [x0]1223; CHECK-GI-NEXT: add x8, x0, x2, lsl #21224; CHECK-GI-NEXT: str x8, [x1]1225; CHECK-GI-NEXT: ret1226 %ld2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr %A)1227 %tmp = getelementptr i32, ptr %A, i64 %inc1228 store ptr %tmp, ptr %ptr1229 ret { <2 x i32>, <2 x i32> } %ld21230}1231 1232declare { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr)1233 1234 1235define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2(ptr %A, ptr %ptr) {1236; CHECK-SD-LABEL: test_v2i64_post_imm_ld2:1237; CHECK-SD: ; %bb.0:1238; CHECK-SD-NEXT: ld2.2d { v0, v1 }, [x0], #321239; CHECK-SD-NEXT: str x0, [x1]1240; CHECK-SD-NEXT: ret1241;1242; CHECK-GI-LABEL: test_v2i64_post_imm_ld2:1243; CHECK-GI: ; %bb.0:1244; CHECK-GI-NEXT: ld2.2d { v0, v1 }, [x0]1245; CHECK-GI-NEXT: add x8, x0, #321246; CHECK-GI-NEXT: str x8, [x1]1247; CHECK-GI-NEXT: ret1248 %ld2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr %A)1249 %tmp = getelementptr i64, ptr %A, i32 41250 store ptr %tmp, ptr %ptr1251 ret { <2 x i64>, <2 x i64> } %ld21252}1253 1254define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {1255; CHECK-SD-LABEL: test_v2i64_post_reg_ld2:1256; CHECK-SD: ; %bb.0:1257; CHECK-SD-NEXT: lsl x8, x2, #31258; CHECK-SD-NEXT: ld2.2d { v0, v1 }, [x0], x81259; CHECK-SD-NEXT: str x0, [x1]1260; CHECK-SD-NEXT: ret1261;1262; CHECK-GI-LABEL: test_v2i64_post_reg_ld2:1263; CHECK-GI: ; %bb.0:1264; CHECK-GI-NEXT: ld2.2d { v0, v1 }, [x0]1265; CHECK-GI-NEXT: add x8, x0, x2, lsl #31266; CHECK-GI-NEXT: str x8, [x1]1267; CHECK-GI-NEXT: ret1268 %ld2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr %A)1269 %tmp = getelementptr i64, ptr %A, i64 %inc1270 store ptr %tmp, ptr %ptr1271 ret { <2 x i64>, <2 x i64> } %ld21272}1273 1274declare { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr)1275 1276 1277define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2(ptr %A, ptr %ptr) {1278; CHECK-SD-LABEL: test_v1i64_post_imm_ld2:1279; CHECK-SD: ; %bb.0:1280; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], #161281; CHECK-SD-NEXT: str x0, [x1]1282; CHECK-SD-NEXT: ret1283;1284; CHECK-GI-LABEL: test_v1i64_post_imm_ld2:1285; CHECK-GI: ; %bb.0:1286; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0]1287; CHECK-GI-NEXT: add x8, x0, #161288; CHECK-GI-NEXT: str x8, [x1]1289; CHECK-GI-NEXT: ret1290 %ld2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr %A)1291 %tmp = getelementptr i64, ptr %A, i32 21292 store ptr %tmp, ptr %ptr1293 ret { <1 x i64>, <1 x i64> } %ld21294}1295 1296define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {1297; CHECK-SD-LABEL: test_v1i64_post_reg_ld2:1298; CHECK-SD: ; %bb.0:1299; CHECK-SD-NEXT: lsl x8, x2, #31300; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], x81301; CHECK-SD-NEXT: str x0, [x1]1302; CHECK-SD-NEXT: ret1303;1304; CHECK-GI-LABEL: test_v1i64_post_reg_ld2:1305; CHECK-GI: ; %bb.0:1306; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0]1307; CHECK-GI-NEXT: add x8, x0, x2, lsl #31308; CHECK-GI-NEXT: str x8, [x1]1309; CHECK-GI-NEXT: ret1310 %ld2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr %A)1311 %tmp = getelementptr i64, ptr %A, i64 %inc1312 store ptr %tmp, ptr %ptr1313 ret { <1 x i64>, <1 x i64> } %ld21314}1315 1316declare { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr)1317 1318 1319define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2(ptr %A, ptr %ptr) {1320; CHECK-SD-LABEL: test_v4f32_post_imm_ld2:1321; CHECK-SD: ; %bb.0:1322; CHECK-SD-NEXT: ld2.4s { v0, v1 }, [x0], #321323; CHECK-SD-NEXT: str x0, [x1]1324; CHECK-SD-NEXT: ret1325;1326; CHECK-GI-LABEL: test_v4f32_post_imm_ld2:1327; CHECK-GI: ; %bb.0:1328; CHECK-GI-NEXT: ld2.4s { v0, v1 }, [x0]1329; CHECK-GI-NEXT: add x8, x0, #321330; CHECK-GI-NEXT: str x8, [x1]1331; CHECK-GI-NEXT: ret1332 %ld2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0(ptr %A)1333 %tmp = getelementptr float, ptr %A, i32 81334 store ptr %tmp, ptr %ptr1335 ret { <4 x float>, <4 x float> } %ld21336}1337 1338define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {1339; CHECK-SD-LABEL: test_v4f32_post_reg_ld2:1340; CHECK-SD: ; %bb.0:1341; CHECK-SD-NEXT: lsl x8, x2, #21342; CHECK-SD-NEXT: ld2.4s { v0, v1 }, [x0], x81343; CHECK-SD-NEXT: str x0, [x1]1344; CHECK-SD-NEXT: ret1345;1346; CHECK-GI-LABEL: test_v4f32_post_reg_ld2:1347; CHECK-GI: ; %bb.0:1348; CHECK-GI-NEXT: ld2.4s { v0, v1 }, [x0]1349; CHECK-GI-NEXT: add x8, x0, x2, lsl #21350; CHECK-GI-NEXT: str x8, [x1]1351; CHECK-GI-NEXT: ret1352 %ld2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0(ptr %A)1353 %tmp = getelementptr float, ptr %A, i64 %inc1354 store ptr %tmp, ptr %ptr1355 ret { <4 x float>, <4 x float> } %ld21356}1357 1358declare { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0(ptr)1359 1360 1361define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2(ptr %A, ptr %ptr) {1362; CHECK-SD-LABEL: test_v2f32_post_imm_ld2:1363; CHECK-SD: ; %bb.0:1364; CHECK-SD-NEXT: ld2.2s { v0, v1 }, [x0], #161365; CHECK-SD-NEXT: str x0, [x1]1366; CHECK-SD-NEXT: ret1367;1368; CHECK-GI-LABEL: test_v2f32_post_imm_ld2:1369; CHECK-GI: ; %bb.0:1370; CHECK-GI-NEXT: ld2.2s { v0, v1 }, [x0]1371; CHECK-GI-NEXT: add x8, x0, #161372; CHECK-GI-NEXT: str x8, [x1]1373; CHECK-GI-NEXT: ret1374 %ld2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2.v2f32.p0(ptr %A)1375 %tmp = getelementptr float, ptr %A, i32 41376 store ptr %tmp, ptr %ptr1377 ret { <2 x float>, <2 x float> } %ld21378}1379 1380define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {1381; CHECK-SD-LABEL: test_v2f32_post_reg_ld2:1382; CHECK-SD: ; %bb.0:1383; CHECK-SD-NEXT: lsl x8, x2, #21384; CHECK-SD-NEXT: ld2.2s { v0, v1 }, [x0], x81385; CHECK-SD-NEXT: str x0, [x1]1386; CHECK-SD-NEXT: ret1387;1388; CHECK-GI-LABEL: test_v2f32_post_reg_ld2:1389; CHECK-GI: ; %bb.0:1390; CHECK-GI-NEXT: ld2.2s { v0, v1 }, [x0]1391; CHECK-GI-NEXT: add x8, x0, x2, lsl #21392; CHECK-GI-NEXT: str x8, [x1]1393; CHECK-GI-NEXT: ret1394 %ld2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2.v2f32.p0(ptr %A)1395 %tmp = getelementptr float, ptr %A, i64 %inc1396 store ptr %tmp, ptr %ptr1397 ret { <2 x float>, <2 x float> } %ld21398}1399 1400declare { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2.v2f32.p0(ptr)1401 1402 1403define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2(ptr %A, ptr %ptr) {1404; CHECK-SD-LABEL: test_v2f64_post_imm_ld2:1405; CHECK-SD: ; %bb.0:1406; CHECK-SD-NEXT: ld2.2d { v0, v1 }, [x0], #321407; CHECK-SD-NEXT: str x0, [x1]1408; CHECK-SD-NEXT: ret1409;1410; CHECK-GI-LABEL: test_v2f64_post_imm_ld2:1411; CHECK-GI: ; %bb.0:1412; CHECK-GI-NEXT: ld2.2d { v0, v1 }, [x0]1413; CHECK-GI-NEXT: add x8, x0, #321414; CHECK-GI-NEXT: str x8, [x1]1415; CHECK-GI-NEXT: ret1416 %ld2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2.v2f64.p0(ptr %A)1417 %tmp = getelementptr double, ptr %A, i32 41418 store ptr %tmp, ptr %ptr1419 ret { <2 x double>, <2 x double> } %ld21420}1421 1422define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {1423; CHECK-SD-LABEL: test_v2f64_post_reg_ld2:1424; CHECK-SD: ; %bb.0:1425; CHECK-SD-NEXT: lsl x8, x2, #31426; CHECK-SD-NEXT: ld2.2d { v0, v1 }, [x0], x81427; CHECK-SD-NEXT: str x0, [x1]1428; CHECK-SD-NEXT: ret1429;1430; CHECK-GI-LABEL: test_v2f64_post_reg_ld2:1431; CHECK-GI: ; %bb.0:1432; CHECK-GI-NEXT: ld2.2d { v0, v1 }, [x0]1433; CHECK-GI-NEXT: add x8, x0, x2, lsl #31434; CHECK-GI-NEXT: str x8, [x1]1435; CHECK-GI-NEXT: ret1436 %ld2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2.v2f64.p0(ptr %A)1437 %tmp = getelementptr double, ptr %A, i64 %inc1438 store ptr %tmp, ptr %ptr1439 ret { <2 x double>, <2 x double> } %ld21440}1441 1442declare { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2.v2f64.p0(ptr)1443 1444 1445define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2(ptr %A, ptr %ptr) {1446; CHECK-SD-LABEL: test_v1f64_post_imm_ld2:1447; CHECK-SD: ; %bb.0:1448; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], #161449; CHECK-SD-NEXT: str x0, [x1]1450; CHECK-SD-NEXT: ret1451;1452; CHECK-GI-LABEL: test_v1f64_post_imm_ld2:1453; CHECK-GI: ; %bb.0:1454; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0]1455; CHECK-GI-NEXT: add x8, x0, #161456; CHECK-GI-NEXT: str x8, [x1]1457; CHECK-GI-NEXT: ret1458 %ld2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2.v1f64.p0(ptr %A)1459 %tmp = getelementptr double, ptr %A, i32 21460 store ptr %tmp, ptr %ptr1461 ret { <1 x double>, <1 x double> } %ld21462}1463 1464define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {1465; CHECK-SD-LABEL: test_v1f64_post_reg_ld2:1466; CHECK-SD: ; %bb.0:1467; CHECK-SD-NEXT: lsl x8, x2, #31468; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], x81469; CHECK-SD-NEXT: str x0, [x1]1470; CHECK-SD-NEXT: ret1471;1472; CHECK-GI-LABEL: test_v1f64_post_reg_ld2:1473; CHECK-GI: ; %bb.0:1474; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0]1475; CHECK-GI-NEXT: add x8, x0, x2, lsl #31476; CHECK-GI-NEXT: str x8, [x1]1477; CHECK-GI-NEXT: ret1478 %ld2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2.v1f64.p0(ptr %A)1479 %tmp = getelementptr double, ptr %A, i64 %inc1480 store ptr %tmp, ptr %ptr1481 ret { <1 x double>, <1 x double> } %ld21482}1483 1484declare { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2.v1f64.p0(ptr)1485 1486 1487define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3(ptr %A, ptr %ptr) {1488; CHECK-SD-LABEL: test_v16i8_post_imm_ld3:1489; CHECK-SD: ; %bb.0:1490; CHECK-SD-NEXT: ld3.16b { v0, v1, v2 }, [x0], #481491; CHECK-SD-NEXT: str x0, [x1]1492; CHECK-SD-NEXT: ret1493;1494; CHECK-GI-LABEL: test_v16i8_post_imm_ld3:1495; CHECK-GI: ; %bb.0:1496; CHECK-GI-NEXT: ld3.16b { v0, v1, v2 }, [x0]1497; CHECK-GI-NEXT: add x8, x0, #481498; CHECK-GI-NEXT: str x8, [x1]1499; CHECK-GI-NEXT: ret1500 %ld3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr %A)1501 %tmp = getelementptr i8, ptr %A, i32 481502 store ptr %tmp, ptr %ptr1503 ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld31504}1505 1506define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {1507; CHECK-SD-LABEL: test_v16i8_post_reg_ld3:1508; CHECK-SD: ; %bb.0:1509; CHECK-SD-NEXT: ld3.16b { v0, v1, v2 }, [x0], x21510; CHECK-SD-NEXT: str x0, [x1]1511; CHECK-SD-NEXT: ret1512;1513; CHECK-GI-LABEL: test_v16i8_post_reg_ld3:1514; CHECK-GI: ; %bb.0:1515; CHECK-GI-NEXT: ld3.16b { v0, v1, v2 }, [x0]1516; CHECK-GI-NEXT: add x8, x0, x21517; CHECK-GI-NEXT: str x8, [x1]1518; CHECK-GI-NEXT: ret1519 %ld3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr %A)1520 %tmp = getelementptr i8, ptr %A, i64 %inc1521 store ptr %tmp, ptr %ptr1522 ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld31523}1524 1525declare { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr)1526 1527 1528define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3(ptr %A, ptr %ptr) {1529; CHECK-SD-LABEL: test_v8i8_post_imm_ld3:1530; CHECK-SD: ; %bb.0:1531; CHECK-SD-NEXT: ld3.8b { v0, v1, v2 }, [x0], #241532; CHECK-SD-NEXT: str x0, [x1]1533; CHECK-SD-NEXT: ret1534;1535; CHECK-GI-LABEL: test_v8i8_post_imm_ld3:1536; CHECK-GI: ; %bb.0:1537; CHECK-GI-NEXT: ld3.8b { v0, v1, v2 }, [x0]1538; CHECK-GI-NEXT: add x8, x0, #241539; CHECK-GI-NEXT: str x8, [x1]1540; CHECK-GI-NEXT: ret1541 %ld3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr %A)1542 %tmp = getelementptr i8, ptr %A, i32 241543 store ptr %tmp, ptr %ptr1544 ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld31545}1546 1547define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {1548; CHECK-SD-LABEL: test_v8i8_post_reg_ld3:1549; CHECK-SD: ; %bb.0:1550; CHECK-SD-NEXT: ld3.8b { v0, v1, v2 }, [x0], x21551; CHECK-SD-NEXT: str x0, [x1]1552; CHECK-SD-NEXT: ret1553;1554; CHECK-GI-LABEL: test_v8i8_post_reg_ld3:1555; CHECK-GI: ; %bb.0:1556; CHECK-GI-NEXT: ld3.8b { v0, v1, v2 }, [x0]1557; CHECK-GI-NEXT: add x8, x0, x21558; CHECK-GI-NEXT: str x8, [x1]1559; CHECK-GI-NEXT: ret1560 %ld3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr %A)1561 %tmp = getelementptr i8, ptr %A, i64 %inc1562 store ptr %tmp, ptr %ptr1563 ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld31564}1565 1566declare { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr)1567 1568 1569define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3(ptr %A, ptr %ptr) {1570; CHECK-SD-LABEL: test_v8i16_post_imm_ld3:1571; CHECK-SD: ; %bb.0:1572; CHECK-SD-NEXT: ld3.8h { v0, v1, v2 }, [x0], #481573; CHECK-SD-NEXT: str x0, [x1]1574; CHECK-SD-NEXT: ret1575;1576; CHECK-GI-LABEL: test_v8i16_post_imm_ld3:1577; CHECK-GI: ; %bb.0:1578; CHECK-GI-NEXT: ld3.8h { v0, v1, v2 }, [x0]1579; CHECK-GI-NEXT: add x8, x0, #481580; CHECK-GI-NEXT: str x8, [x1]1581; CHECK-GI-NEXT: ret1582 %ld3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr %A)1583 %tmp = getelementptr i16, ptr %A, i32 241584 store ptr %tmp, ptr %ptr1585 ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld31586}1587 1588define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {1589; CHECK-SD-LABEL: test_v8i16_post_reg_ld3:1590; CHECK-SD: ; %bb.0:1591; CHECK-SD-NEXT: lsl x8, x2, #11592; CHECK-SD-NEXT: ld3.8h { v0, v1, v2 }, [x0], x81593; CHECK-SD-NEXT: str x0, [x1]1594; CHECK-SD-NEXT: ret1595;1596; CHECK-GI-LABEL: test_v8i16_post_reg_ld3:1597; CHECK-GI: ; %bb.0:1598; CHECK-GI-NEXT: ld3.8h { v0, v1, v2 }, [x0]1599; CHECK-GI-NEXT: add x8, x0, x2, lsl #11600; CHECK-GI-NEXT: str x8, [x1]1601; CHECK-GI-NEXT: ret1602 %ld3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr %A)1603 %tmp = getelementptr i16, ptr %A, i64 %inc1604 store ptr %tmp, ptr %ptr1605 ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld31606}1607 1608declare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr)1609 1610 1611define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3(ptr %A, ptr %ptr) {1612; CHECK-SD-LABEL: test_v4i16_post_imm_ld3:1613; CHECK-SD: ; %bb.0:1614; CHECK-SD-NEXT: ld3.4h { v0, v1, v2 }, [x0], #241615; CHECK-SD-NEXT: str x0, [x1]1616; CHECK-SD-NEXT: ret1617;1618; CHECK-GI-LABEL: test_v4i16_post_imm_ld3:1619; CHECK-GI: ; %bb.0:1620; CHECK-GI-NEXT: ld3.4h { v0, v1, v2 }, [x0]1621; CHECK-GI-NEXT: add x8, x0, #241622; CHECK-GI-NEXT: str x8, [x1]1623; CHECK-GI-NEXT: ret1624 %ld3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr %A)1625 %tmp = getelementptr i16, ptr %A, i32 121626 store ptr %tmp, ptr %ptr1627 ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld31628}1629 1630define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {1631; CHECK-SD-LABEL: test_v4i16_post_reg_ld3:1632; CHECK-SD: ; %bb.0:1633; CHECK-SD-NEXT: lsl x8, x2, #11634; CHECK-SD-NEXT: ld3.4h { v0, v1, v2 }, [x0], x81635; CHECK-SD-NEXT: str x0, [x1]1636; CHECK-SD-NEXT: ret1637;1638; CHECK-GI-LABEL: test_v4i16_post_reg_ld3:1639; CHECK-GI: ; %bb.0:1640; CHECK-GI-NEXT: ld3.4h { v0, v1, v2 }, [x0]1641; CHECK-GI-NEXT: add x8, x0, x2, lsl #11642; CHECK-GI-NEXT: str x8, [x1]1643; CHECK-GI-NEXT: ret1644 %ld3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr %A)1645 %tmp = getelementptr i16, ptr %A, i64 %inc1646 store ptr %tmp, ptr %ptr1647 ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld31648}1649 1650declare { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr)1651 1652 1653define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3(ptr %A, ptr %ptr) {1654; CHECK-SD-LABEL: test_v4i32_post_imm_ld3:1655; CHECK-SD: ; %bb.0:1656; CHECK-SD-NEXT: ld3.4s { v0, v1, v2 }, [x0], #481657; CHECK-SD-NEXT: str x0, [x1]1658; CHECK-SD-NEXT: ret1659;1660; CHECK-GI-LABEL: test_v4i32_post_imm_ld3:1661; CHECK-GI: ; %bb.0:1662; CHECK-GI-NEXT: ld3.4s { v0, v1, v2 }, [x0]1663; CHECK-GI-NEXT: add x8, x0, #481664; CHECK-GI-NEXT: str x8, [x1]1665; CHECK-GI-NEXT: ret1666 %ld3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr %A)1667 %tmp = getelementptr i32, ptr %A, i32 121668 store ptr %tmp, ptr %ptr1669 ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld31670}1671 1672define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {1673; CHECK-SD-LABEL: test_v4i32_post_reg_ld3:1674; CHECK-SD: ; %bb.0:1675; CHECK-SD-NEXT: lsl x8, x2, #21676; CHECK-SD-NEXT: ld3.4s { v0, v1, v2 }, [x0], x81677; CHECK-SD-NEXT: str x0, [x1]1678; CHECK-SD-NEXT: ret1679;1680; CHECK-GI-LABEL: test_v4i32_post_reg_ld3:1681; CHECK-GI: ; %bb.0:1682; CHECK-GI-NEXT: ld3.4s { v0, v1, v2 }, [x0]1683; CHECK-GI-NEXT: add x8, x0, x2, lsl #21684; CHECK-GI-NEXT: str x8, [x1]1685; CHECK-GI-NEXT: ret1686 %ld3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr %A)1687 %tmp = getelementptr i32, ptr %A, i64 %inc1688 store ptr %tmp, ptr %ptr1689 ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld31690}1691 1692declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr)1693 1694 1695define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3(ptr %A, ptr %ptr) {1696; CHECK-SD-LABEL: test_v2i32_post_imm_ld3:1697; CHECK-SD: ; %bb.0:1698; CHECK-SD-NEXT: ld3.2s { v0, v1, v2 }, [x0], #241699; CHECK-SD-NEXT: str x0, [x1]1700; CHECK-SD-NEXT: ret1701;1702; CHECK-GI-LABEL: test_v2i32_post_imm_ld3:1703; CHECK-GI: ; %bb.0:1704; CHECK-GI-NEXT: ld3.2s { v0, v1, v2 }, [x0]1705; CHECK-GI-NEXT: add x8, x0, #241706; CHECK-GI-NEXT: str x8, [x1]1707; CHECK-GI-NEXT: ret1708 %ld3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr %A)1709 %tmp = getelementptr i32, ptr %A, i32 61710 store ptr %tmp, ptr %ptr1711 ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld31712}1713 1714define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {1715; CHECK-SD-LABEL: test_v2i32_post_reg_ld3:1716; CHECK-SD: ; %bb.0:1717; CHECK-SD-NEXT: lsl x8, x2, #21718; CHECK-SD-NEXT: ld3.2s { v0, v1, v2 }, [x0], x81719; CHECK-SD-NEXT: str x0, [x1]1720; CHECK-SD-NEXT: ret1721;1722; CHECK-GI-LABEL: test_v2i32_post_reg_ld3:1723; CHECK-GI: ; %bb.0:1724; CHECK-GI-NEXT: ld3.2s { v0, v1, v2 }, [x0]1725; CHECK-GI-NEXT: add x8, x0, x2, lsl #21726; CHECK-GI-NEXT: str x8, [x1]1727; CHECK-GI-NEXT: ret1728 %ld3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr %A)1729 %tmp = getelementptr i32, ptr %A, i64 %inc1730 store ptr %tmp, ptr %ptr1731 ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld31732}1733 1734declare { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr)1735 1736 1737define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3(ptr %A, ptr %ptr) {1738; CHECK-SD-LABEL: test_v2i64_post_imm_ld3:1739; CHECK-SD: ; %bb.0:1740; CHECK-SD-NEXT: ld3.2d { v0, v1, v2 }, [x0], #481741; CHECK-SD-NEXT: str x0, [x1]1742; CHECK-SD-NEXT: ret1743;1744; CHECK-GI-LABEL: test_v2i64_post_imm_ld3:1745; CHECK-GI: ; %bb.0:1746; CHECK-GI-NEXT: ld3.2d { v0, v1, v2 }, [x0]1747; CHECK-GI-NEXT: add x8, x0, #481748; CHECK-GI-NEXT: str x8, [x1]1749; CHECK-GI-NEXT: ret1750 %ld3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr %A)1751 %tmp = getelementptr i64, ptr %A, i32 61752 store ptr %tmp, ptr %ptr1753 ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld31754}1755 1756define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {1757; CHECK-SD-LABEL: test_v2i64_post_reg_ld3:1758; CHECK-SD: ; %bb.0:1759; CHECK-SD-NEXT: lsl x8, x2, #31760; CHECK-SD-NEXT: ld3.2d { v0, v1, v2 }, [x0], x81761; CHECK-SD-NEXT: str x0, [x1]1762; CHECK-SD-NEXT: ret1763;1764; CHECK-GI-LABEL: test_v2i64_post_reg_ld3:1765; CHECK-GI: ; %bb.0:1766; CHECK-GI-NEXT: ld3.2d { v0, v1, v2 }, [x0]1767; CHECK-GI-NEXT: add x8, x0, x2, lsl #31768; CHECK-GI-NEXT: str x8, [x1]1769; CHECK-GI-NEXT: ret1770 %ld3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr %A)1771 %tmp = getelementptr i64, ptr %A, i64 %inc1772 store ptr %tmp, ptr %ptr1773 ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld31774}1775 1776declare { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr)1777 1778 1779define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3(ptr %A, ptr %ptr) {1780; CHECK-SD-LABEL: test_v1i64_post_imm_ld3:1781; CHECK-SD: ; %bb.0:1782; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], #241783; CHECK-SD-NEXT: str x0, [x1]1784; CHECK-SD-NEXT: ret1785;1786; CHECK-GI-LABEL: test_v1i64_post_imm_ld3:1787; CHECK-GI: ; %bb.0:1788; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0]1789; CHECK-GI-NEXT: add x8, x0, #241790; CHECK-GI-NEXT: str x8, [x1]1791; CHECK-GI-NEXT: ret1792 %ld3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr %A)1793 %tmp = getelementptr i64, ptr %A, i32 31794 store ptr %tmp, ptr %ptr1795 ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld31796}1797 1798define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {1799; CHECK-SD-LABEL: test_v1i64_post_reg_ld3:1800; CHECK-SD: ; %bb.0:1801; CHECK-SD-NEXT: lsl x8, x2, #31802; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], x81803; CHECK-SD-NEXT: str x0, [x1]1804; CHECK-SD-NEXT: ret1805;1806; CHECK-GI-LABEL: test_v1i64_post_reg_ld3:1807; CHECK-GI: ; %bb.0:1808; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0]1809; CHECK-GI-NEXT: add x8, x0, x2, lsl #31810; CHECK-GI-NEXT: str x8, [x1]1811; CHECK-GI-NEXT: ret1812 %ld3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr %A)1813 %tmp = getelementptr i64, ptr %A, i64 %inc1814 store ptr %tmp, ptr %ptr1815 ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld31816}1817 1818declare { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr)1819 1820 1821define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3(ptr %A, ptr %ptr) {1822; CHECK-SD-LABEL: test_v4f32_post_imm_ld3:1823; CHECK-SD: ; %bb.0:1824; CHECK-SD-NEXT: ld3.4s { v0, v1, v2 }, [x0], #481825; CHECK-SD-NEXT: str x0, [x1]1826; CHECK-SD-NEXT: ret1827;1828; CHECK-GI-LABEL: test_v4f32_post_imm_ld3:1829; CHECK-GI: ; %bb.0:1830; CHECK-GI-NEXT: ld3.4s { v0, v1, v2 }, [x0]1831; CHECK-GI-NEXT: add x8, x0, #481832; CHECK-GI-NEXT: str x8, [x1]1833; CHECK-GI-NEXT: ret1834 %ld3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p0(ptr %A)1835 %tmp = getelementptr float, ptr %A, i32 121836 store ptr %tmp, ptr %ptr1837 ret { <4 x float>, <4 x float>, <4 x float> } %ld31838}1839 1840define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {1841; CHECK-SD-LABEL: test_v4f32_post_reg_ld3:1842; CHECK-SD: ; %bb.0:1843; CHECK-SD-NEXT: lsl x8, x2, #21844; CHECK-SD-NEXT: ld3.4s { v0, v1, v2 }, [x0], x81845; CHECK-SD-NEXT: str x0, [x1]1846; CHECK-SD-NEXT: ret1847;1848; CHECK-GI-LABEL: test_v4f32_post_reg_ld3:1849; CHECK-GI: ; %bb.0:1850; CHECK-GI-NEXT: ld3.4s { v0, v1, v2 }, [x0]1851; CHECK-GI-NEXT: add x8, x0, x2, lsl #21852; CHECK-GI-NEXT: str x8, [x1]1853; CHECK-GI-NEXT: ret1854 %ld3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p0(ptr %A)1855 %tmp = getelementptr float, ptr %A, i64 %inc1856 store ptr %tmp, ptr %ptr1857 ret { <4 x float>, <4 x float>, <4 x float> } %ld31858}1859 1860declare { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p0(ptr)1861 1862 1863define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3(ptr %A, ptr %ptr) {1864; CHECK-SD-LABEL: test_v2f32_post_imm_ld3:1865; CHECK-SD: ; %bb.0:1866; CHECK-SD-NEXT: ld3.2s { v0, v1, v2 }, [x0], #241867; CHECK-SD-NEXT: str x0, [x1]1868; CHECK-SD-NEXT: ret1869;1870; CHECK-GI-LABEL: test_v2f32_post_imm_ld3:1871; CHECK-GI: ; %bb.0:1872; CHECK-GI-NEXT: ld3.2s { v0, v1, v2 }, [x0]1873; CHECK-GI-NEXT: add x8, x0, #241874; CHECK-GI-NEXT: str x8, [x1]1875; CHECK-GI-NEXT: ret1876 %ld3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3.v2f32.p0(ptr %A)1877 %tmp = getelementptr float, ptr %A, i32 61878 store ptr %tmp, ptr %ptr1879 ret { <2 x float>, <2 x float>, <2 x float> } %ld31880}1881 1882define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {1883; CHECK-SD-LABEL: test_v2f32_post_reg_ld3:1884; CHECK-SD: ; %bb.0:1885; CHECK-SD-NEXT: lsl x8, x2, #21886; CHECK-SD-NEXT: ld3.2s { v0, v1, v2 }, [x0], x81887; CHECK-SD-NEXT: str x0, [x1]1888; CHECK-SD-NEXT: ret1889;1890; CHECK-GI-LABEL: test_v2f32_post_reg_ld3:1891; CHECK-GI: ; %bb.0:1892; CHECK-GI-NEXT: ld3.2s { v0, v1, v2 }, [x0]1893; CHECK-GI-NEXT: add x8, x0, x2, lsl #21894; CHECK-GI-NEXT: str x8, [x1]1895; CHECK-GI-NEXT: ret1896 %ld3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3.v2f32.p0(ptr %A)1897 %tmp = getelementptr float, ptr %A, i64 %inc1898 store ptr %tmp, ptr %ptr1899 ret { <2 x float>, <2 x float>, <2 x float> } %ld31900}1901 1902declare { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3.v2f32.p0(ptr)1903 1904 1905define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3(ptr %A, ptr %ptr) {1906; CHECK-SD-LABEL: test_v2f64_post_imm_ld3:1907; CHECK-SD: ; %bb.0:1908; CHECK-SD-NEXT: ld3.2d { v0, v1, v2 }, [x0], #481909; CHECK-SD-NEXT: str x0, [x1]1910; CHECK-SD-NEXT: ret1911;1912; CHECK-GI-LABEL: test_v2f64_post_imm_ld3:1913; CHECK-GI: ; %bb.0:1914; CHECK-GI-NEXT: ld3.2d { v0, v1, v2 }, [x0]1915; CHECK-GI-NEXT: add x8, x0, #481916; CHECK-GI-NEXT: str x8, [x1]1917; CHECK-GI-NEXT: ret1918 %ld3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3.v2f64.p0(ptr %A)1919 %tmp = getelementptr double, ptr %A, i32 61920 store ptr %tmp, ptr %ptr1921 ret { <2 x double>, <2 x double>, <2 x double> } %ld31922}1923 1924define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {1925; CHECK-SD-LABEL: test_v2f64_post_reg_ld3:1926; CHECK-SD: ; %bb.0:1927; CHECK-SD-NEXT: lsl x8, x2, #31928; CHECK-SD-NEXT: ld3.2d { v0, v1, v2 }, [x0], x81929; CHECK-SD-NEXT: str x0, [x1]1930; CHECK-SD-NEXT: ret1931;1932; CHECK-GI-LABEL: test_v2f64_post_reg_ld3:1933; CHECK-GI: ; %bb.0:1934; CHECK-GI-NEXT: ld3.2d { v0, v1, v2 }, [x0]1935; CHECK-GI-NEXT: add x8, x0, x2, lsl #31936; CHECK-GI-NEXT: str x8, [x1]1937; CHECK-GI-NEXT: ret1938 %ld3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3.v2f64.p0(ptr %A)1939 %tmp = getelementptr double, ptr %A, i64 %inc1940 store ptr %tmp, ptr %ptr1941 ret { <2 x double>, <2 x double>, <2 x double> } %ld31942}1943 1944declare { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3.v2f64.p0(ptr)1945 1946 1947define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3(ptr %A, ptr %ptr) {1948; CHECK-SD-LABEL: test_v1f64_post_imm_ld3:1949; CHECK-SD: ; %bb.0:1950; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], #241951; CHECK-SD-NEXT: str x0, [x1]1952; CHECK-SD-NEXT: ret1953;1954; CHECK-GI-LABEL: test_v1f64_post_imm_ld3:1955; CHECK-GI: ; %bb.0:1956; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0]1957; CHECK-GI-NEXT: add x8, x0, #241958; CHECK-GI-NEXT: str x8, [x1]1959; CHECK-GI-NEXT: ret1960 %ld3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3.v1f64.p0(ptr %A)1961 %tmp = getelementptr double, ptr %A, i32 31962 store ptr %tmp, ptr %ptr1963 ret { <1 x double>, <1 x double>, <1 x double> } %ld31964}1965 1966define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {1967; CHECK-SD-LABEL: test_v1f64_post_reg_ld3:1968; CHECK-SD: ; %bb.0:1969; CHECK-SD-NEXT: lsl x8, x2, #31970; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], x81971; CHECK-SD-NEXT: str x0, [x1]1972; CHECK-SD-NEXT: ret1973;1974; CHECK-GI-LABEL: test_v1f64_post_reg_ld3:1975; CHECK-GI: ; %bb.0:1976; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0]1977; CHECK-GI-NEXT: add x8, x0, x2, lsl #31978; CHECK-GI-NEXT: str x8, [x1]1979; CHECK-GI-NEXT: ret1980 %ld3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3.v1f64.p0(ptr %A)1981 %tmp = getelementptr double, ptr %A, i64 %inc1982 store ptr %tmp, ptr %ptr1983 ret { <1 x double>, <1 x double>, <1 x double> } %ld31984}1985 1986declare { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3.v1f64.p0(ptr)1987 1988 1989define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4(ptr %A, ptr %ptr) {1990; CHECK-SD-LABEL: test_v16i8_post_imm_ld4:1991; CHECK-SD: ; %bb.0:1992; CHECK-SD-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0], #641993; CHECK-SD-NEXT: str x0, [x1]1994; CHECK-SD-NEXT: ret1995;1996; CHECK-GI-LABEL: test_v16i8_post_imm_ld4:1997; CHECK-GI: ; %bb.0:1998; CHECK-GI-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0]1999; CHECK-GI-NEXT: add x8, x0, #642000; CHECK-GI-NEXT: str x8, [x1]2001; CHECK-GI-NEXT: ret2002 %ld4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr %A)2003 %tmp = getelementptr i8, ptr %A, i32 642004 store ptr %tmp, ptr %ptr2005 ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld42006}2007 2008define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {2009; CHECK-SD-LABEL: test_v16i8_post_reg_ld4:2010; CHECK-SD: ; %bb.0:2011; CHECK-SD-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0], x22012; CHECK-SD-NEXT: str x0, [x1]2013; CHECK-SD-NEXT: ret2014;2015; CHECK-GI-LABEL: test_v16i8_post_reg_ld4:2016; CHECK-GI: ; %bb.0:2017; CHECK-GI-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0]2018; CHECK-GI-NEXT: add x8, x0, x22019; CHECK-GI-NEXT: str x8, [x1]2020; CHECK-GI-NEXT: ret2021 %ld4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr %A)2022 %tmp = getelementptr i8, ptr %A, i64 %inc2023 store ptr %tmp, ptr %ptr2024 ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld42025}2026 2027declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr)2028 2029 2030define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4(ptr %A, ptr %ptr) {2031; CHECK-SD-LABEL: test_v8i8_post_imm_ld4:2032; CHECK-SD: ; %bb.0:2033; CHECK-SD-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0], #322034; CHECK-SD-NEXT: str x0, [x1]2035; CHECK-SD-NEXT: ret2036;2037; CHECK-GI-LABEL: test_v8i8_post_imm_ld4:2038; CHECK-GI: ; %bb.0:2039; CHECK-GI-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0]2040; CHECK-GI-NEXT: add x8, x0, #322041; CHECK-GI-NEXT: str x8, [x1]2042; CHECK-GI-NEXT: ret2043 %ld4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr %A)2044 %tmp = getelementptr i8, ptr %A, i32 322045 store ptr %tmp, ptr %ptr2046 ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld42047}2048 2049define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {2050; CHECK-SD-LABEL: test_v8i8_post_reg_ld4:2051; CHECK-SD: ; %bb.0:2052; CHECK-SD-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0], x22053; CHECK-SD-NEXT: str x0, [x1]2054; CHECK-SD-NEXT: ret2055;2056; CHECK-GI-LABEL: test_v8i8_post_reg_ld4:2057; CHECK-GI: ; %bb.0:2058; CHECK-GI-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0]2059; CHECK-GI-NEXT: add x8, x0, x22060; CHECK-GI-NEXT: str x8, [x1]2061; CHECK-GI-NEXT: ret2062 %ld4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr %A)2063 %tmp = getelementptr i8, ptr %A, i64 %inc2064 store ptr %tmp, ptr %ptr2065 ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld42066}2067 2068declare { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr)2069 2070 2071define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4(ptr %A, ptr %ptr) {2072; CHECK-SD-LABEL: test_v8i16_post_imm_ld4:2073; CHECK-SD: ; %bb.0:2074; CHECK-SD-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0], #642075; CHECK-SD-NEXT: str x0, [x1]2076; CHECK-SD-NEXT: ret2077;2078; CHECK-GI-LABEL: test_v8i16_post_imm_ld4:2079; CHECK-GI: ; %bb.0:2080; CHECK-GI-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0]2081; CHECK-GI-NEXT: add x8, x0, #642082; CHECK-GI-NEXT: str x8, [x1]2083; CHECK-GI-NEXT: ret2084 %ld4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr %A)2085 %tmp = getelementptr i16, ptr %A, i32 322086 store ptr %tmp, ptr %ptr2087 ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld42088}2089 2090define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {2091; CHECK-SD-LABEL: test_v8i16_post_reg_ld4:2092; CHECK-SD: ; %bb.0:2093; CHECK-SD-NEXT: lsl x8, x2, #12094; CHECK-SD-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0], x82095; CHECK-SD-NEXT: str x0, [x1]2096; CHECK-SD-NEXT: ret2097;2098; CHECK-GI-LABEL: test_v8i16_post_reg_ld4:2099; CHECK-GI: ; %bb.0:2100; CHECK-GI-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0]2101; CHECK-GI-NEXT: add x8, x0, x2, lsl #12102; CHECK-GI-NEXT: str x8, [x1]2103; CHECK-GI-NEXT: ret2104 %ld4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr %A)2105 %tmp = getelementptr i16, ptr %A, i64 %inc2106 store ptr %tmp, ptr %ptr2107 ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld42108}2109 2110declare { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr)2111 2112 2113define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4(ptr %A, ptr %ptr) {2114; CHECK-SD-LABEL: test_v4i16_post_imm_ld4:2115; CHECK-SD: ; %bb.0:2116; CHECK-SD-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0], #322117; CHECK-SD-NEXT: str x0, [x1]2118; CHECK-SD-NEXT: ret2119;2120; CHECK-GI-LABEL: test_v4i16_post_imm_ld4:2121; CHECK-GI: ; %bb.0:2122; CHECK-GI-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0]2123; CHECK-GI-NEXT: add x8, x0, #322124; CHECK-GI-NEXT: str x8, [x1]2125; CHECK-GI-NEXT: ret2126 %ld4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr %A)2127 %tmp = getelementptr i16, ptr %A, i32 162128 store ptr %tmp, ptr %ptr2129 ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld42130}2131 2132define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {2133; CHECK-SD-LABEL: test_v4i16_post_reg_ld4:2134; CHECK-SD: ; %bb.0:2135; CHECK-SD-NEXT: lsl x8, x2, #12136; CHECK-SD-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0], x82137; CHECK-SD-NEXT: str x0, [x1]2138; CHECK-SD-NEXT: ret2139;2140; CHECK-GI-LABEL: test_v4i16_post_reg_ld4:2141; CHECK-GI: ; %bb.0:2142; CHECK-GI-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0]2143; CHECK-GI-NEXT: add x8, x0, x2, lsl #12144; CHECK-GI-NEXT: str x8, [x1]2145; CHECK-GI-NEXT: ret2146 %ld4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr %A)2147 %tmp = getelementptr i16, ptr %A, i64 %inc2148 store ptr %tmp, ptr %ptr2149 ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld42150}2151 2152declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr)2153 2154 2155define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4(ptr %A, ptr %ptr) {2156; CHECK-SD-LABEL: test_v4i32_post_imm_ld4:2157; CHECK-SD: ; %bb.0:2158; CHECK-SD-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], #642159; CHECK-SD-NEXT: str x0, [x1]2160; CHECK-SD-NEXT: ret2161;2162; CHECK-GI-LABEL: test_v4i32_post_imm_ld4:2163; CHECK-GI: ; %bb.0:2164; CHECK-GI-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0]2165; CHECK-GI-NEXT: add x8, x0, #642166; CHECK-GI-NEXT: str x8, [x1]2167; CHECK-GI-NEXT: ret2168 %ld4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0(ptr %A)2169 %tmp = getelementptr i32, ptr %A, i32 162170 store ptr %tmp, ptr %ptr2171 ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld42172}2173 2174define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {2175; CHECK-SD-LABEL: test_v4i32_post_reg_ld4:2176; CHECK-SD: ; %bb.0:2177; CHECK-SD-NEXT: lsl x8, x2, #22178; CHECK-SD-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], x82179; CHECK-SD-NEXT: str x0, [x1]2180; CHECK-SD-NEXT: ret2181;2182; CHECK-GI-LABEL: test_v4i32_post_reg_ld4:2183; CHECK-GI: ; %bb.0:2184; CHECK-GI-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0]2185; CHECK-GI-NEXT: add x8, x0, x2, lsl #22186; CHECK-GI-NEXT: str x8, [x1]2187; CHECK-GI-NEXT: ret2188 %ld4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0(ptr %A)2189 %tmp = getelementptr i32, ptr %A, i64 %inc2190 store ptr %tmp, ptr %ptr2191 ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld42192}2193 2194declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0(ptr)2195 2196 2197define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4(ptr %A, ptr %ptr) {2198; CHECK-SD-LABEL: test_v2i32_post_imm_ld4:2199; CHECK-SD: ; %bb.0:2200; CHECK-SD-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], #322201; CHECK-SD-NEXT: str x0, [x1]2202; CHECK-SD-NEXT: ret2203;2204; CHECK-GI-LABEL: test_v2i32_post_imm_ld4:2205; CHECK-GI: ; %bb.0:2206; CHECK-GI-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0]2207; CHECK-GI-NEXT: add x8, x0, #322208; CHECK-GI-NEXT: str x8, [x1]2209; CHECK-GI-NEXT: ret2210 %ld4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0(ptr %A)2211 %tmp = getelementptr i32, ptr %A, i32 82212 store ptr %tmp, ptr %ptr2213 ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld42214}2215 2216define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {2217; CHECK-SD-LABEL: test_v2i32_post_reg_ld4:2218; CHECK-SD: ; %bb.0:2219; CHECK-SD-NEXT: lsl x8, x2, #22220; CHECK-SD-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], x82221; CHECK-SD-NEXT: str x0, [x1]2222; CHECK-SD-NEXT: ret2223;2224; CHECK-GI-LABEL: test_v2i32_post_reg_ld4:2225; CHECK-GI: ; %bb.0:2226; CHECK-GI-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0]2227; CHECK-GI-NEXT: add x8, x0, x2, lsl #22228; CHECK-GI-NEXT: str x8, [x1]2229; CHECK-GI-NEXT: ret2230 %ld4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0(ptr %A)2231 %tmp = getelementptr i32, ptr %A, i64 %inc2232 store ptr %tmp, ptr %ptr2233 ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld42234}2235 2236declare { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0(ptr)2237 2238 2239define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4(ptr %A, ptr %ptr) {2240; CHECK-SD-LABEL: test_v2i64_post_imm_ld4:2241; CHECK-SD: ; %bb.0:2242; CHECK-SD-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], #642243; CHECK-SD-NEXT: str x0, [x1]2244; CHECK-SD-NEXT: ret2245;2246; CHECK-GI-LABEL: test_v2i64_post_imm_ld4:2247; CHECK-GI: ; %bb.0:2248; CHECK-GI-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0]2249; CHECK-GI-NEXT: add x8, x0, #642250; CHECK-GI-NEXT: str x8, [x1]2251; CHECK-GI-NEXT: ret2252 %ld4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr %A)2253 %tmp = getelementptr i64, ptr %A, i32 82254 store ptr %tmp, ptr %ptr2255 ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld42256}2257 2258define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {2259; CHECK-SD-LABEL: test_v2i64_post_reg_ld4:2260; CHECK-SD: ; %bb.0:2261; CHECK-SD-NEXT: lsl x8, x2, #32262; CHECK-SD-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], x82263; CHECK-SD-NEXT: str x0, [x1]2264; CHECK-SD-NEXT: ret2265;2266; CHECK-GI-LABEL: test_v2i64_post_reg_ld4:2267; CHECK-GI: ; %bb.0:2268; CHECK-GI-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0]2269; CHECK-GI-NEXT: add x8, x0, x2, lsl #32270; CHECK-GI-NEXT: str x8, [x1]2271; CHECK-GI-NEXT: ret2272 %ld4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr %A)2273 %tmp = getelementptr i64, ptr %A, i64 %inc2274 store ptr %tmp, ptr %ptr2275 ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld42276}2277 2278declare { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr)2279 2280 2281define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4(ptr %A, ptr %ptr) {2282; CHECK-SD-LABEL: test_v1i64_post_imm_ld4:2283; CHECK-SD: ; %bb.0:2284; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #322285; CHECK-SD-NEXT: str x0, [x1]2286; CHECK-SD-NEXT: ret2287;2288; CHECK-GI-LABEL: test_v1i64_post_imm_ld4:2289; CHECK-GI: ; %bb.0:2290; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]2291; CHECK-GI-NEXT: add x8, x0, #322292; CHECK-GI-NEXT: str x8, [x1]2293; CHECK-GI-NEXT: ret2294 %ld4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr %A)2295 %tmp = getelementptr i64, ptr %A, i32 42296 store ptr %tmp, ptr %ptr2297 ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld42298}2299 2300define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {2301; CHECK-SD-LABEL: test_v1i64_post_reg_ld4:2302; CHECK-SD: ; %bb.0:2303; CHECK-SD-NEXT: lsl x8, x2, #32304; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x82305; CHECK-SD-NEXT: str x0, [x1]2306; CHECK-SD-NEXT: ret2307;2308; CHECK-GI-LABEL: test_v1i64_post_reg_ld4:2309; CHECK-GI: ; %bb.0:2310; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]2311; CHECK-GI-NEXT: add x8, x0, x2, lsl #32312; CHECK-GI-NEXT: str x8, [x1]2313; CHECK-GI-NEXT: ret2314 %ld4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr %A)2315 %tmp = getelementptr i64, ptr %A, i64 %inc2316 store ptr %tmp, ptr %ptr2317 ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld42318}2319 2320declare { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr)2321 2322 2323define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld4(ptr %A, ptr %ptr) {2324; CHECK-SD-LABEL: test_v4f32_post_imm_ld4:2325; CHECK-SD: ; %bb.0:2326; CHECK-SD-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], #642327; CHECK-SD-NEXT: str x0, [x1]2328; CHECK-SD-NEXT: ret2329;2330; CHECK-GI-LABEL: test_v4f32_post_imm_ld4:2331; CHECK-GI: ; %bb.0:2332; CHECK-GI-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0]2333; CHECK-GI-NEXT: add x8, x0, #642334; CHECK-GI-NEXT: str x8, [x1]2335; CHECK-GI-NEXT: ret2336 %ld4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4.v4f32.p0(ptr %A)2337 %tmp = getelementptr float, ptr %A, i32 162338 store ptr %tmp, ptr %ptr2339 ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld42340}2341 2342define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {2343; CHECK-SD-LABEL: test_v4f32_post_reg_ld4:2344; CHECK-SD: ; %bb.0:2345; CHECK-SD-NEXT: lsl x8, x2, #22346; CHECK-SD-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], x82347; CHECK-SD-NEXT: str x0, [x1]2348; CHECK-SD-NEXT: ret2349;2350; CHECK-GI-LABEL: test_v4f32_post_reg_ld4:2351; CHECK-GI: ; %bb.0:2352; CHECK-GI-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0]2353; CHECK-GI-NEXT: add x8, x0, x2, lsl #22354; CHECK-GI-NEXT: str x8, [x1]2355; CHECK-GI-NEXT: ret2356 %ld4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4.v4f32.p0(ptr %A)2357 %tmp = getelementptr float, ptr %A, i64 %inc2358 store ptr %tmp, ptr %ptr2359 ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld42360}2361 2362declare { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4.v4f32.p0(ptr)2363 2364 2365define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld4(ptr %A, ptr %ptr) {2366; CHECK-SD-LABEL: test_v2f32_post_imm_ld4:2367; CHECK-SD: ; %bb.0:2368; CHECK-SD-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], #322369; CHECK-SD-NEXT: str x0, [x1]2370; CHECK-SD-NEXT: ret2371;2372; CHECK-GI-LABEL: test_v2f32_post_imm_ld4:2373; CHECK-GI: ; %bb.0:2374; CHECK-GI-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0]2375; CHECK-GI-NEXT: add x8, x0, #322376; CHECK-GI-NEXT: str x8, [x1]2377; CHECK-GI-NEXT: ret2378 %ld4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4.v2f32.p0(ptr %A)2379 %tmp = getelementptr float, ptr %A, i32 82380 store ptr %tmp, ptr %ptr2381 ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld42382}2383 2384define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {2385; CHECK-SD-LABEL: test_v2f32_post_reg_ld4:2386; CHECK-SD: ; %bb.0:2387; CHECK-SD-NEXT: lsl x8, x2, #22388; CHECK-SD-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], x82389; CHECK-SD-NEXT: str x0, [x1]2390; CHECK-SD-NEXT: ret2391;2392; CHECK-GI-LABEL: test_v2f32_post_reg_ld4:2393; CHECK-GI: ; %bb.0:2394; CHECK-GI-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0]2395; CHECK-GI-NEXT: add x8, x0, x2, lsl #22396; CHECK-GI-NEXT: str x8, [x1]2397; CHECK-GI-NEXT: ret2398 %ld4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4.v2f32.p0(ptr %A)2399 %tmp = getelementptr float, ptr %A, i64 %inc2400 store ptr %tmp, ptr %ptr2401 ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld42402}2403 2404declare { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4.v2f32.p0(ptr)2405 2406 2407define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld4(ptr %A, ptr %ptr) {2408; CHECK-SD-LABEL: test_v2f64_post_imm_ld4:2409; CHECK-SD: ; %bb.0:2410; CHECK-SD-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], #642411; CHECK-SD-NEXT: str x0, [x1]2412; CHECK-SD-NEXT: ret2413;2414; CHECK-GI-LABEL: test_v2f64_post_imm_ld4:2415; CHECK-GI: ; %bb.0:2416; CHECK-GI-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0]2417; CHECK-GI-NEXT: add x8, x0, #642418; CHECK-GI-NEXT: str x8, [x1]2419; CHECK-GI-NEXT: ret2420 %ld4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4.v2f64.p0(ptr %A)2421 %tmp = getelementptr double, ptr %A, i32 82422 store ptr %tmp, ptr %ptr2423 ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld42424}2425 2426define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {2427; CHECK-SD-LABEL: test_v2f64_post_reg_ld4:2428; CHECK-SD: ; %bb.0:2429; CHECK-SD-NEXT: lsl x8, x2, #32430; CHECK-SD-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], x82431; CHECK-SD-NEXT: str x0, [x1]2432; CHECK-SD-NEXT: ret2433;2434; CHECK-GI-LABEL: test_v2f64_post_reg_ld4:2435; CHECK-GI: ; %bb.0:2436; CHECK-GI-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0]2437; CHECK-GI-NEXT: add x8, x0, x2, lsl #32438; CHECK-GI-NEXT: str x8, [x1]2439; CHECK-GI-NEXT: ret2440 %ld4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4.v2f64.p0(ptr %A)2441 %tmp = getelementptr double, ptr %A, i64 %inc2442 store ptr %tmp, ptr %ptr2443 ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld42444}2445 2446declare { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4.v2f64.p0(ptr)2447 2448 2449define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld4(ptr %A, ptr %ptr) {2450; CHECK-SD-LABEL: test_v1f64_post_imm_ld4:2451; CHECK-SD: ; %bb.0:2452; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #322453; CHECK-SD-NEXT: str x0, [x1]2454; CHECK-SD-NEXT: ret2455;2456; CHECK-GI-LABEL: test_v1f64_post_imm_ld4:2457; CHECK-GI: ; %bb.0:2458; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]2459; CHECK-GI-NEXT: add x8, x0, #322460; CHECK-GI-NEXT: str x8, [x1]2461; CHECK-GI-NEXT: ret2462 %ld4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4.v1f64.p0(ptr %A)2463 %tmp = getelementptr double, ptr %A, i32 42464 store ptr %tmp, ptr %ptr2465 ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld42466}2467 2468define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {2469; CHECK-SD-LABEL: test_v1f64_post_reg_ld4:2470; CHECK-SD: ; %bb.0:2471; CHECK-SD-NEXT: lsl x8, x2, #32472; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x82473; CHECK-SD-NEXT: str x0, [x1]2474; CHECK-SD-NEXT: ret2475;2476; CHECK-GI-LABEL: test_v1f64_post_reg_ld4:2477; CHECK-GI: ; %bb.0:2478; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]2479; CHECK-GI-NEXT: add x8, x0, x2, lsl #32480; CHECK-GI-NEXT: str x8, [x1]2481; CHECK-GI-NEXT: ret2482 %ld4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4.v1f64.p0(ptr %A)2483 %tmp = getelementptr double, ptr %A, i64 %inc2484 store ptr %tmp, ptr %ptr2485 ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld42486}2487 2488declare { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4.v1f64.p0(ptr)2489 2490define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x2(ptr %A, ptr %ptr) {2491; CHECK-SD-LABEL: test_v16i8_post_imm_ld1x2:2492; CHECK-SD: ; %bb.0:2493; CHECK-SD-NEXT: ld1.16b { v0, v1 }, [x0], #322494; CHECK-SD-NEXT: str x0, [x1]2495; CHECK-SD-NEXT: ret2496;2497; CHECK-GI-LABEL: test_v16i8_post_imm_ld1x2:2498; CHECK-GI: ; %bb.0:2499; CHECK-GI-NEXT: ld1.16b { v0, v1 }, [x0]2500; CHECK-GI-NEXT: add x8, x0, #322501; CHECK-GI-NEXT: str x8, [x1]2502; CHECK-GI-NEXT: ret2503 %ld1x2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x2.v16i8.p0(ptr %A)2504 %tmp = getelementptr i8, ptr %A, i32 322505 store ptr %tmp, ptr %ptr2506 ret { <16 x i8>, <16 x i8> } %ld1x22507}2508 2509define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {2510; CHECK-SD-LABEL: test_v16i8_post_reg_ld1x2:2511; CHECK-SD: ; %bb.0:2512; CHECK-SD-NEXT: ld1.16b { v0, v1 }, [x0], x22513; CHECK-SD-NEXT: str x0, [x1]2514; CHECK-SD-NEXT: ret2515;2516; CHECK-GI-LABEL: test_v16i8_post_reg_ld1x2:2517; CHECK-GI: ; %bb.0:2518; CHECK-GI-NEXT: ld1.16b { v0, v1 }, [x0]2519; CHECK-GI-NEXT: add x8, x0, x22520; CHECK-GI-NEXT: str x8, [x1]2521; CHECK-GI-NEXT: ret2522 %ld1x2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x2.v16i8.p0(ptr %A)2523 %tmp = getelementptr i8, ptr %A, i64 %inc2524 store ptr %tmp, ptr %ptr2525 ret { <16 x i8>, <16 x i8> } %ld1x22526}2527 2528declare { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x2.v16i8.p0(ptr)2529 2530 2531define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x2(ptr %A, ptr %ptr) {2532; CHECK-SD-LABEL: test_v8i8_post_imm_ld1x2:2533; CHECK-SD: ; %bb.0:2534; CHECK-SD-NEXT: ld1.8b { v0, v1 }, [x0], #162535; CHECK-SD-NEXT: str x0, [x1]2536; CHECK-SD-NEXT: ret2537;2538; CHECK-GI-LABEL: test_v8i8_post_imm_ld1x2:2539; CHECK-GI: ; %bb.0:2540; CHECK-GI-NEXT: ld1.8b { v0, v1 }, [x0]2541; CHECK-GI-NEXT: add x8, x0, #162542; CHECK-GI-NEXT: str x8, [x1]2543; CHECK-GI-NEXT: ret2544 %ld1x2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x2.v8i8.p0(ptr %A)2545 %tmp = getelementptr i8, ptr %A, i32 162546 store ptr %tmp, ptr %ptr2547 ret { <8 x i8>, <8 x i8> } %ld1x22548}2549 2550define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {2551; CHECK-SD-LABEL: test_v8i8_post_reg_ld1x2:2552; CHECK-SD: ; %bb.0:2553; CHECK-SD-NEXT: ld1.8b { v0, v1 }, [x0], x22554; CHECK-SD-NEXT: str x0, [x1]2555; CHECK-SD-NEXT: ret2556;2557; CHECK-GI-LABEL: test_v8i8_post_reg_ld1x2:2558; CHECK-GI: ; %bb.0:2559; CHECK-GI-NEXT: ld1.8b { v0, v1 }, [x0]2560; CHECK-GI-NEXT: add x8, x0, x22561; CHECK-GI-NEXT: str x8, [x1]2562; CHECK-GI-NEXT: ret2563 %ld1x2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x2.v8i8.p0(ptr %A)2564 %tmp = getelementptr i8, ptr %A, i64 %inc2565 store ptr %tmp, ptr %ptr2566 ret { <8 x i8>, <8 x i8> } %ld1x22567}2568 2569declare { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x2.v8i8.p0(ptr)2570 2571 2572define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x2(ptr %A, ptr %ptr) {2573; CHECK-SD-LABEL: test_v8i16_post_imm_ld1x2:2574; CHECK-SD: ; %bb.0:2575; CHECK-SD-NEXT: ld1.8h { v0, v1 }, [x0], #322576; CHECK-SD-NEXT: str x0, [x1]2577; CHECK-SD-NEXT: ret2578;2579; CHECK-GI-LABEL: test_v8i16_post_imm_ld1x2:2580; CHECK-GI: ; %bb.0:2581; CHECK-GI-NEXT: ld1.8h { v0, v1 }, [x0]2582; CHECK-GI-NEXT: add x8, x0, #322583; CHECK-GI-NEXT: str x8, [x1]2584; CHECK-GI-NEXT: ret2585 %ld1x2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x2.v8i16.p0(ptr %A)2586 %tmp = getelementptr i16, ptr %A, i32 162587 store ptr %tmp, ptr %ptr2588 ret { <8 x i16>, <8 x i16> } %ld1x22589}2590 2591define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {2592; CHECK-SD-LABEL: test_v8i16_post_reg_ld1x2:2593; CHECK-SD: ; %bb.0:2594; CHECK-SD-NEXT: lsl x8, x2, #12595; CHECK-SD-NEXT: ld1.8h { v0, v1 }, [x0], x82596; CHECK-SD-NEXT: str x0, [x1]2597; CHECK-SD-NEXT: ret2598;2599; CHECK-GI-LABEL: test_v8i16_post_reg_ld1x2:2600; CHECK-GI: ; %bb.0:2601; CHECK-GI-NEXT: ld1.8h { v0, v1 }, [x0]2602; CHECK-GI-NEXT: add x8, x0, x2, lsl #12603; CHECK-GI-NEXT: str x8, [x1]2604; CHECK-GI-NEXT: ret2605 %ld1x2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x2.v8i16.p0(ptr %A)2606 %tmp = getelementptr i16, ptr %A, i64 %inc2607 store ptr %tmp, ptr %ptr2608 ret { <8 x i16>, <8 x i16> } %ld1x22609}2610 2611declare { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x2.v8i16.p0(ptr)2612 2613 2614define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x2(ptr %A, ptr %ptr) {2615; CHECK-SD-LABEL: test_v4i16_post_imm_ld1x2:2616; CHECK-SD: ; %bb.0:2617; CHECK-SD-NEXT: ld1.4h { v0, v1 }, [x0], #162618; CHECK-SD-NEXT: str x0, [x1]2619; CHECK-SD-NEXT: ret2620;2621; CHECK-GI-LABEL: test_v4i16_post_imm_ld1x2:2622; CHECK-GI: ; %bb.0:2623; CHECK-GI-NEXT: ld1.4h { v0, v1 }, [x0]2624; CHECK-GI-NEXT: add x8, x0, #162625; CHECK-GI-NEXT: str x8, [x1]2626; CHECK-GI-NEXT: ret2627 %ld1x2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x2.v4i16.p0(ptr %A)2628 %tmp = getelementptr i16, ptr %A, i32 82629 store ptr %tmp, ptr %ptr2630 ret { <4 x i16>, <4 x i16> } %ld1x22631}2632 2633define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {2634; CHECK-SD-LABEL: test_v4i16_post_reg_ld1x2:2635; CHECK-SD: ; %bb.0:2636; CHECK-SD-NEXT: lsl x8, x2, #12637; CHECK-SD-NEXT: ld1.4h { v0, v1 }, [x0], x82638; CHECK-SD-NEXT: str x0, [x1]2639; CHECK-SD-NEXT: ret2640;2641; CHECK-GI-LABEL: test_v4i16_post_reg_ld1x2:2642; CHECK-GI: ; %bb.0:2643; CHECK-GI-NEXT: ld1.4h { v0, v1 }, [x0]2644; CHECK-GI-NEXT: add x8, x0, x2, lsl #12645; CHECK-GI-NEXT: str x8, [x1]2646; CHECK-GI-NEXT: ret2647 %ld1x2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x2.v4i16.p0(ptr %A)2648 %tmp = getelementptr i16, ptr %A, i64 %inc2649 store ptr %tmp, ptr %ptr2650 ret { <4 x i16>, <4 x i16> } %ld1x22651}2652 2653declare { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x2.v4i16.p0(ptr)2654 2655 2656define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x2(ptr %A, ptr %ptr) {2657; CHECK-SD-LABEL: test_v4i32_post_imm_ld1x2:2658; CHECK-SD: ; %bb.0:2659; CHECK-SD-NEXT: ld1.4s { v0, v1 }, [x0], #322660; CHECK-SD-NEXT: str x0, [x1]2661; CHECK-SD-NEXT: ret2662;2663; CHECK-GI-LABEL: test_v4i32_post_imm_ld1x2:2664; CHECK-GI: ; %bb.0:2665; CHECK-GI-NEXT: ld1.4s { v0, v1 }, [x0]2666; CHECK-GI-NEXT: add x8, x0, #322667; CHECK-GI-NEXT: str x8, [x1]2668; CHECK-GI-NEXT: ret2669 %ld1x2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x2.v4i32.p0(ptr %A)2670 %tmp = getelementptr i32, ptr %A, i32 82671 store ptr %tmp, ptr %ptr2672 ret { <4 x i32>, <4 x i32> } %ld1x22673}2674 2675define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {2676; CHECK-SD-LABEL: test_v4i32_post_reg_ld1x2:2677; CHECK-SD: ; %bb.0:2678; CHECK-SD-NEXT: lsl x8, x2, #22679; CHECK-SD-NEXT: ld1.4s { v0, v1 }, [x0], x82680; CHECK-SD-NEXT: str x0, [x1]2681; CHECK-SD-NEXT: ret2682;2683; CHECK-GI-LABEL: test_v4i32_post_reg_ld1x2:2684; CHECK-GI: ; %bb.0:2685; CHECK-GI-NEXT: ld1.4s { v0, v1 }, [x0]2686; CHECK-GI-NEXT: add x8, x0, x2, lsl #22687; CHECK-GI-NEXT: str x8, [x1]2688; CHECK-GI-NEXT: ret2689 %ld1x2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x2.v4i32.p0(ptr %A)2690 %tmp = getelementptr i32, ptr %A, i64 %inc2691 store ptr %tmp, ptr %ptr2692 ret { <4 x i32>, <4 x i32> } %ld1x22693}2694 2695declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x2.v4i32.p0(ptr)2696 2697 2698define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x2(ptr %A, ptr %ptr) {2699; CHECK-SD-LABEL: test_v2i32_post_imm_ld1x2:2700; CHECK-SD: ; %bb.0:2701; CHECK-SD-NEXT: ld1.2s { v0, v1 }, [x0], #162702; CHECK-SD-NEXT: str x0, [x1]2703; CHECK-SD-NEXT: ret2704;2705; CHECK-GI-LABEL: test_v2i32_post_imm_ld1x2:2706; CHECK-GI: ; %bb.0:2707; CHECK-GI-NEXT: ld1.2s { v0, v1 }, [x0]2708; CHECK-GI-NEXT: add x8, x0, #162709; CHECK-GI-NEXT: str x8, [x1]2710; CHECK-GI-NEXT: ret2711 %ld1x2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x2.v2i32.p0(ptr %A)2712 %tmp = getelementptr i32, ptr %A, i32 42713 store ptr %tmp, ptr %ptr2714 ret { <2 x i32>, <2 x i32> } %ld1x22715}2716 2717define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {2718; CHECK-SD-LABEL: test_v2i32_post_reg_ld1x2:2719; CHECK-SD: ; %bb.0:2720; CHECK-SD-NEXT: lsl x8, x2, #22721; CHECK-SD-NEXT: ld1.2s { v0, v1 }, [x0], x82722; CHECK-SD-NEXT: str x0, [x1]2723; CHECK-SD-NEXT: ret2724;2725; CHECK-GI-LABEL: test_v2i32_post_reg_ld1x2:2726; CHECK-GI: ; %bb.0:2727; CHECK-GI-NEXT: ld1.2s { v0, v1 }, [x0]2728; CHECK-GI-NEXT: add x8, x0, x2, lsl #22729; CHECK-GI-NEXT: str x8, [x1]2730; CHECK-GI-NEXT: ret2731 %ld1x2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x2.v2i32.p0(ptr %A)2732 %tmp = getelementptr i32, ptr %A, i64 %inc2733 store ptr %tmp, ptr %ptr2734 ret { <2 x i32>, <2 x i32> } %ld1x22735}2736 2737declare { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x2.v2i32.p0(ptr)2738 2739 2740define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x2(ptr %A, ptr %ptr) {2741; CHECK-SD-LABEL: test_v2i64_post_imm_ld1x2:2742; CHECK-SD: ; %bb.0:2743; CHECK-SD-NEXT: ld1.2d { v0, v1 }, [x0], #322744; CHECK-SD-NEXT: str x0, [x1]2745; CHECK-SD-NEXT: ret2746;2747; CHECK-GI-LABEL: test_v2i64_post_imm_ld1x2:2748; CHECK-GI: ; %bb.0:2749; CHECK-GI-NEXT: ld1.2d { v0, v1 }, [x0]2750; CHECK-GI-NEXT: add x8, x0, #322751; CHECK-GI-NEXT: str x8, [x1]2752; CHECK-GI-NEXT: ret2753 %ld1x2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x2.v2i64.p0(ptr %A)2754 %tmp = getelementptr i64, ptr %A, i32 42755 store ptr %tmp, ptr %ptr2756 ret { <2 x i64>, <2 x i64> } %ld1x22757}2758 2759define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {2760; CHECK-SD-LABEL: test_v2i64_post_reg_ld1x2:2761; CHECK-SD: ; %bb.0:2762; CHECK-SD-NEXT: lsl x8, x2, #32763; CHECK-SD-NEXT: ld1.2d { v0, v1 }, [x0], x82764; CHECK-SD-NEXT: str x0, [x1]2765; CHECK-SD-NEXT: ret2766;2767; CHECK-GI-LABEL: test_v2i64_post_reg_ld1x2:2768; CHECK-GI: ; %bb.0:2769; CHECK-GI-NEXT: ld1.2d { v0, v1 }, [x0]2770; CHECK-GI-NEXT: add x8, x0, x2, lsl #32771; CHECK-GI-NEXT: str x8, [x1]2772; CHECK-GI-NEXT: ret2773 %ld1x2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x2.v2i64.p0(ptr %A)2774 %tmp = getelementptr i64, ptr %A, i64 %inc2775 store ptr %tmp, ptr %ptr2776 ret { <2 x i64>, <2 x i64> } %ld1x22777}2778 2779declare { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x2.v2i64.p0(ptr)2780 2781 2782define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x2(ptr %A, ptr %ptr) {2783; CHECK-SD-LABEL: test_v1i64_post_imm_ld1x2:2784; CHECK-SD: ; %bb.0:2785; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], #162786; CHECK-SD-NEXT: str x0, [x1]2787; CHECK-SD-NEXT: ret2788;2789; CHECK-GI-LABEL: test_v1i64_post_imm_ld1x2:2790; CHECK-GI: ; %bb.0:2791; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0]2792; CHECK-GI-NEXT: add x8, x0, #162793; CHECK-GI-NEXT: str x8, [x1]2794; CHECK-GI-NEXT: ret2795 %ld1x2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x2.v1i64.p0(ptr %A)2796 %tmp = getelementptr i64, ptr %A, i32 22797 store ptr %tmp, ptr %ptr2798 ret { <1 x i64>, <1 x i64> } %ld1x22799}2800 2801define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {2802; CHECK-SD-LABEL: test_v1i64_post_reg_ld1x2:2803; CHECK-SD: ; %bb.0:2804; CHECK-SD-NEXT: lsl x8, x2, #32805; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], x82806; CHECK-SD-NEXT: str x0, [x1]2807; CHECK-SD-NEXT: ret2808;2809; CHECK-GI-LABEL: test_v1i64_post_reg_ld1x2:2810; CHECK-GI: ; %bb.0:2811; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0]2812; CHECK-GI-NEXT: add x8, x0, x2, lsl #32813; CHECK-GI-NEXT: str x8, [x1]2814; CHECK-GI-NEXT: ret2815 %ld1x2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x2.v1i64.p0(ptr %A)2816 %tmp = getelementptr i64, ptr %A, i64 %inc2817 store ptr %tmp, ptr %ptr2818 ret { <1 x i64>, <1 x i64> } %ld1x22819}2820 2821declare { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x2.v1i64.p0(ptr)2822 2823 2824define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x2(ptr %A, ptr %ptr) {2825; CHECK-SD-LABEL: test_v4f32_post_imm_ld1x2:2826; CHECK-SD: ; %bb.0:2827; CHECK-SD-NEXT: ld1.4s { v0, v1 }, [x0], #322828; CHECK-SD-NEXT: str x0, [x1]2829; CHECK-SD-NEXT: ret2830;2831; CHECK-GI-LABEL: test_v4f32_post_imm_ld1x2:2832; CHECK-GI: ; %bb.0:2833; CHECK-GI-NEXT: ld1.4s { v0, v1 }, [x0]2834; CHECK-GI-NEXT: add x8, x0, #322835; CHECK-GI-NEXT: str x8, [x1]2836; CHECK-GI-NEXT: ret2837 %ld1x2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x2.v4f32.p0(ptr %A)2838 %tmp = getelementptr float, ptr %A, i32 82839 store ptr %tmp, ptr %ptr2840 ret { <4 x float>, <4 x float> } %ld1x22841}2842 2843define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {2844; CHECK-SD-LABEL: test_v4f32_post_reg_ld1x2:2845; CHECK-SD: ; %bb.0:2846; CHECK-SD-NEXT: lsl x8, x2, #22847; CHECK-SD-NEXT: ld1.4s { v0, v1 }, [x0], x82848; CHECK-SD-NEXT: str x0, [x1]2849; CHECK-SD-NEXT: ret2850;2851; CHECK-GI-LABEL: test_v4f32_post_reg_ld1x2:2852; CHECK-GI: ; %bb.0:2853; CHECK-GI-NEXT: ld1.4s { v0, v1 }, [x0]2854; CHECK-GI-NEXT: add x8, x0, x2, lsl #22855; CHECK-GI-NEXT: str x8, [x1]2856; CHECK-GI-NEXT: ret2857 %ld1x2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x2.v4f32.p0(ptr %A)2858 %tmp = getelementptr float, ptr %A, i64 %inc2859 store ptr %tmp, ptr %ptr2860 ret { <4 x float>, <4 x float> } %ld1x22861}2862 2863declare { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x2.v4f32.p0(ptr)2864 2865 2866define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x2(ptr %A, ptr %ptr) {2867; CHECK-SD-LABEL: test_v2f32_post_imm_ld1x2:2868; CHECK-SD: ; %bb.0:2869; CHECK-SD-NEXT: ld1.2s { v0, v1 }, [x0], #162870; CHECK-SD-NEXT: str x0, [x1]2871; CHECK-SD-NEXT: ret2872;2873; CHECK-GI-LABEL: test_v2f32_post_imm_ld1x2:2874; CHECK-GI: ; %bb.0:2875; CHECK-GI-NEXT: ld1.2s { v0, v1 }, [x0]2876; CHECK-GI-NEXT: add x8, x0, #162877; CHECK-GI-NEXT: str x8, [x1]2878; CHECK-GI-NEXT: ret2879 %ld1x2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x2.v2f32.p0(ptr %A)2880 %tmp = getelementptr float, ptr %A, i32 42881 store ptr %tmp, ptr %ptr2882 ret { <2 x float>, <2 x float> } %ld1x22883}2884 2885define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {2886; CHECK-SD-LABEL: test_v2f32_post_reg_ld1x2:2887; CHECK-SD: ; %bb.0:2888; CHECK-SD-NEXT: lsl x8, x2, #22889; CHECK-SD-NEXT: ld1.2s { v0, v1 }, [x0], x82890; CHECK-SD-NEXT: str x0, [x1]2891; CHECK-SD-NEXT: ret2892;2893; CHECK-GI-LABEL: test_v2f32_post_reg_ld1x2:2894; CHECK-GI: ; %bb.0:2895; CHECK-GI-NEXT: ld1.2s { v0, v1 }, [x0]2896; CHECK-GI-NEXT: add x8, x0, x2, lsl #22897; CHECK-GI-NEXT: str x8, [x1]2898; CHECK-GI-NEXT: ret2899 %ld1x2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x2.v2f32.p0(ptr %A)2900 %tmp = getelementptr float, ptr %A, i64 %inc2901 store ptr %tmp, ptr %ptr2902 ret { <2 x float>, <2 x float> } %ld1x22903}2904 2905declare { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x2.v2f32.p0(ptr)2906 2907 2908define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x2(ptr %A, ptr %ptr) {2909; CHECK-SD-LABEL: test_v2f64_post_imm_ld1x2:2910; CHECK-SD: ; %bb.0:2911; CHECK-SD-NEXT: ld1.2d { v0, v1 }, [x0], #322912; CHECK-SD-NEXT: str x0, [x1]2913; CHECK-SD-NEXT: ret2914;2915; CHECK-GI-LABEL: test_v2f64_post_imm_ld1x2:2916; CHECK-GI: ; %bb.0:2917; CHECK-GI-NEXT: ld1.2d { v0, v1 }, [x0]2918; CHECK-GI-NEXT: add x8, x0, #322919; CHECK-GI-NEXT: str x8, [x1]2920; CHECK-GI-NEXT: ret2921 %ld1x2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x2.v2f64.p0(ptr %A)2922 %tmp = getelementptr double, ptr %A, i32 42923 store ptr %tmp, ptr %ptr2924 ret { <2 x double>, <2 x double> } %ld1x22925}2926 2927define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {2928; CHECK-SD-LABEL: test_v2f64_post_reg_ld1x2:2929; CHECK-SD: ; %bb.0:2930; CHECK-SD-NEXT: lsl x8, x2, #32931; CHECK-SD-NEXT: ld1.2d { v0, v1 }, [x0], x82932; CHECK-SD-NEXT: str x0, [x1]2933; CHECK-SD-NEXT: ret2934;2935; CHECK-GI-LABEL: test_v2f64_post_reg_ld1x2:2936; CHECK-GI: ; %bb.0:2937; CHECK-GI-NEXT: ld1.2d { v0, v1 }, [x0]2938; CHECK-GI-NEXT: add x8, x0, x2, lsl #32939; CHECK-GI-NEXT: str x8, [x1]2940; CHECK-GI-NEXT: ret2941 %ld1x2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x2.v2f64.p0(ptr %A)2942 %tmp = getelementptr double, ptr %A, i64 %inc2943 store ptr %tmp, ptr %ptr2944 ret { <2 x double>, <2 x double> } %ld1x22945}2946 2947declare { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x2.v2f64.p0(ptr)2948 2949 2950define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x2(ptr %A, ptr %ptr) {2951; CHECK-SD-LABEL: test_v1f64_post_imm_ld1x2:2952; CHECK-SD: ; %bb.0:2953; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], #162954; CHECK-SD-NEXT: str x0, [x1]2955; CHECK-SD-NEXT: ret2956;2957; CHECK-GI-LABEL: test_v1f64_post_imm_ld1x2:2958; CHECK-GI: ; %bb.0:2959; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0]2960; CHECK-GI-NEXT: add x8, x0, #162961; CHECK-GI-NEXT: str x8, [x1]2962; CHECK-GI-NEXT: ret2963 %ld1x2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x2.v1f64.p0(ptr %A)2964 %tmp = getelementptr double, ptr %A, i32 22965 store ptr %tmp, ptr %ptr2966 ret { <1 x double>, <1 x double> } %ld1x22967}2968 2969define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {2970; CHECK-SD-LABEL: test_v1f64_post_reg_ld1x2:2971; CHECK-SD: ; %bb.0:2972; CHECK-SD-NEXT: lsl x8, x2, #32973; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], x82974; CHECK-SD-NEXT: str x0, [x1]2975; CHECK-SD-NEXT: ret2976;2977; CHECK-GI-LABEL: test_v1f64_post_reg_ld1x2:2978; CHECK-GI: ; %bb.0:2979; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0]2980; CHECK-GI-NEXT: add x8, x0, x2, lsl #32981; CHECK-GI-NEXT: str x8, [x1]2982; CHECK-GI-NEXT: ret2983 %ld1x2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x2.v1f64.p0(ptr %A)2984 %tmp = getelementptr double, ptr %A, i64 %inc2985 store ptr %tmp, ptr %ptr2986 ret { <1 x double>, <1 x double> } %ld1x22987}2988 2989declare { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x2.v1f64.p0(ptr)2990 2991 2992define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x3(ptr %A, ptr %ptr) {2993; CHECK-SD-LABEL: test_v16i8_post_imm_ld1x3:2994; CHECK-SD: ; %bb.0:2995; CHECK-SD-NEXT: ld1.16b { v0, v1, v2 }, [x0], #482996; CHECK-SD-NEXT: str x0, [x1]2997; CHECK-SD-NEXT: ret2998;2999; CHECK-GI-LABEL: test_v16i8_post_imm_ld1x3:3000; CHECK-GI: ; %bb.0:3001; CHECK-GI-NEXT: ld1.16b { v0, v1, v2 }, [x0]3002; CHECK-GI-NEXT: add x8, x0, #483003; CHECK-GI-NEXT: str x8, [x1]3004; CHECK-GI-NEXT: ret3005 %ld1x3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x3.v16i8.p0(ptr %A)3006 %tmp = getelementptr i8, ptr %A, i32 483007 store ptr %tmp, ptr %ptr3008 ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld1x33009}3010 3011define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {3012; CHECK-SD-LABEL: test_v16i8_post_reg_ld1x3:3013; CHECK-SD: ; %bb.0:3014; CHECK-SD-NEXT: ld1.16b { v0, v1, v2 }, [x0], x23015; CHECK-SD-NEXT: str x0, [x1]3016; CHECK-SD-NEXT: ret3017;3018; CHECK-GI-LABEL: test_v16i8_post_reg_ld1x3:3019; CHECK-GI: ; %bb.0:3020; CHECK-GI-NEXT: ld1.16b { v0, v1, v2 }, [x0]3021; CHECK-GI-NEXT: add x8, x0, x23022; CHECK-GI-NEXT: str x8, [x1]3023; CHECK-GI-NEXT: ret3024 %ld1x3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x3.v16i8.p0(ptr %A)3025 %tmp = getelementptr i8, ptr %A, i64 %inc3026 store ptr %tmp, ptr %ptr3027 ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld1x33028}3029 3030declare { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x3.v16i8.p0(ptr)3031 3032 3033define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x3(ptr %A, ptr %ptr) {3034; CHECK-SD-LABEL: test_v8i8_post_imm_ld1x3:3035; CHECK-SD: ; %bb.0:3036; CHECK-SD-NEXT: ld1.8b { v0, v1, v2 }, [x0], #243037; CHECK-SD-NEXT: str x0, [x1]3038; CHECK-SD-NEXT: ret3039;3040; CHECK-GI-LABEL: test_v8i8_post_imm_ld1x3:3041; CHECK-GI: ; %bb.0:3042; CHECK-GI-NEXT: ld1.8b { v0, v1, v2 }, [x0]3043; CHECK-GI-NEXT: add x8, x0, #243044; CHECK-GI-NEXT: str x8, [x1]3045; CHECK-GI-NEXT: ret3046 %ld1x3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x3.v8i8.p0(ptr %A)3047 %tmp = getelementptr i8, ptr %A, i32 243048 store ptr %tmp, ptr %ptr3049 ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld1x33050}3051 3052define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {3053; CHECK-SD-LABEL: test_v8i8_post_reg_ld1x3:3054; CHECK-SD: ; %bb.0:3055; CHECK-SD-NEXT: ld1.8b { v0, v1, v2 }, [x0], x23056; CHECK-SD-NEXT: str x0, [x1]3057; CHECK-SD-NEXT: ret3058;3059; CHECK-GI-LABEL: test_v8i8_post_reg_ld1x3:3060; CHECK-GI: ; %bb.0:3061; CHECK-GI-NEXT: ld1.8b { v0, v1, v2 }, [x0]3062; CHECK-GI-NEXT: add x8, x0, x23063; CHECK-GI-NEXT: str x8, [x1]3064; CHECK-GI-NEXT: ret3065 %ld1x3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x3.v8i8.p0(ptr %A)3066 %tmp = getelementptr i8, ptr %A, i64 %inc3067 store ptr %tmp, ptr %ptr3068 ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld1x33069}3070 3071declare { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x3.v8i8.p0(ptr)3072 3073 3074define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x3(ptr %A, ptr %ptr) {3075; CHECK-SD-LABEL: test_v8i16_post_imm_ld1x3:3076; CHECK-SD: ; %bb.0:3077; CHECK-SD-NEXT: ld1.8h { v0, v1, v2 }, [x0], #483078; CHECK-SD-NEXT: str x0, [x1]3079; CHECK-SD-NEXT: ret3080;3081; CHECK-GI-LABEL: test_v8i16_post_imm_ld1x3:3082; CHECK-GI: ; %bb.0:3083; CHECK-GI-NEXT: ld1.8h { v0, v1, v2 }, [x0]3084; CHECK-GI-NEXT: add x8, x0, #483085; CHECK-GI-NEXT: str x8, [x1]3086; CHECK-GI-NEXT: ret3087 %ld1x3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x3.v8i16.p0(ptr %A)3088 %tmp = getelementptr i16, ptr %A, i32 243089 store ptr %tmp, ptr %ptr3090 ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld1x33091}3092 3093define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {3094; CHECK-SD-LABEL: test_v8i16_post_reg_ld1x3:3095; CHECK-SD: ; %bb.0:3096; CHECK-SD-NEXT: lsl x8, x2, #13097; CHECK-SD-NEXT: ld1.8h { v0, v1, v2 }, [x0], x83098; CHECK-SD-NEXT: str x0, [x1]3099; CHECK-SD-NEXT: ret3100;3101; CHECK-GI-LABEL: test_v8i16_post_reg_ld1x3:3102; CHECK-GI: ; %bb.0:3103; CHECK-GI-NEXT: ld1.8h { v0, v1, v2 }, [x0]3104; CHECK-GI-NEXT: add x8, x0, x2, lsl #13105; CHECK-GI-NEXT: str x8, [x1]3106; CHECK-GI-NEXT: ret3107 %ld1x3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x3.v8i16.p0(ptr %A)3108 %tmp = getelementptr i16, ptr %A, i64 %inc3109 store ptr %tmp, ptr %ptr3110 ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld1x33111}3112 3113declare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x3.v8i16.p0(ptr)3114 3115 3116define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x3(ptr %A, ptr %ptr) {3117; CHECK-SD-LABEL: test_v4i16_post_imm_ld1x3:3118; CHECK-SD: ; %bb.0:3119; CHECK-SD-NEXT: ld1.4h { v0, v1, v2 }, [x0], #243120; CHECK-SD-NEXT: str x0, [x1]3121; CHECK-SD-NEXT: ret3122;3123; CHECK-GI-LABEL: test_v4i16_post_imm_ld1x3:3124; CHECK-GI: ; %bb.0:3125; CHECK-GI-NEXT: ld1.4h { v0, v1, v2 }, [x0]3126; CHECK-GI-NEXT: add x8, x0, #243127; CHECK-GI-NEXT: str x8, [x1]3128; CHECK-GI-NEXT: ret3129 %ld1x3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x3.v4i16.p0(ptr %A)3130 %tmp = getelementptr i16, ptr %A, i32 123131 store ptr %tmp, ptr %ptr3132 ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld1x33133}3134 3135define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {3136; CHECK-SD-LABEL: test_v4i16_post_reg_ld1x3:3137; CHECK-SD: ; %bb.0:3138; CHECK-SD-NEXT: lsl x8, x2, #13139; CHECK-SD-NEXT: ld1.4h { v0, v1, v2 }, [x0], x83140; CHECK-SD-NEXT: str x0, [x1]3141; CHECK-SD-NEXT: ret3142;3143; CHECK-GI-LABEL: test_v4i16_post_reg_ld1x3:3144; CHECK-GI: ; %bb.0:3145; CHECK-GI-NEXT: ld1.4h { v0, v1, v2 }, [x0]3146; CHECK-GI-NEXT: add x8, x0, x2, lsl #13147; CHECK-GI-NEXT: str x8, [x1]3148; CHECK-GI-NEXT: ret3149 %ld1x3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x3.v4i16.p0(ptr %A)3150 %tmp = getelementptr i16, ptr %A, i64 %inc3151 store ptr %tmp, ptr %ptr3152 ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld1x33153}3154 3155declare { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x3.v4i16.p0(ptr)3156 3157 3158define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x3(ptr %A, ptr %ptr) {3159; CHECK-SD-LABEL: test_v4i32_post_imm_ld1x3:3160; CHECK-SD: ; %bb.0:3161; CHECK-SD-NEXT: ld1.4s { v0, v1, v2 }, [x0], #483162; CHECK-SD-NEXT: str x0, [x1]3163; CHECK-SD-NEXT: ret3164;3165; CHECK-GI-LABEL: test_v4i32_post_imm_ld1x3:3166; CHECK-GI: ; %bb.0:3167; CHECK-GI-NEXT: ld1.4s { v0, v1, v2 }, [x0]3168; CHECK-GI-NEXT: add x8, x0, #483169; CHECK-GI-NEXT: str x8, [x1]3170; CHECK-GI-NEXT: ret3171 %ld1x3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x3.v4i32.p0(ptr %A)3172 %tmp = getelementptr i32, ptr %A, i32 123173 store ptr %tmp, ptr %ptr3174 ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld1x33175}3176 3177define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {3178; CHECK-SD-LABEL: test_v4i32_post_reg_ld1x3:3179; CHECK-SD: ; %bb.0:3180; CHECK-SD-NEXT: lsl x8, x2, #23181; CHECK-SD-NEXT: ld1.4s { v0, v1, v2 }, [x0], x83182; CHECK-SD-NEXT: str x0, [x1]3183; CHECK-SD-NEXT: ret3184;3185; CHECK-GI-LABEL: test_v4i32_post_reg_ld1x3:3186; CHECK-GI: ; %bb.0:3187; CHECK-GI-NEXT: ld1.4s { v0, v1, v2 }, [x0]3188; CHECK-GI-NEXT: add x8, x0, x2, lsl #23189; CHECK-GI-NEXT: str x8, [x1]3190; CHECK-GI-NEXT: ret3191 %ld1x3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x3.v4i32.p0(ptr %A)3192 %tmp = getelementptr i32, ptr %A, i64 %inc3193 store ptr %tmp, ptr %ptr3194 ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld1x33195}3196 3197declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x3.v4i32.p0(ptr)3198 3199 3200define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x3(ptr %A, ptr %ptr) {3201; CHECK-SD-LABEL: test_v2i32_post_imm_ld1x3:3202; CHECK-SD: ; %bb.0:3203; CHECK-SD-NEXT: ld1.2s { v0, v1, v2 }, [x0], #243204; CHECK-SD-NEXT: str x0, [x1]3205; CHECK-SD-NEXT: ret3206;3207; CHECK-GI-LABEL: test_v2i32_post_imm_ld1x3:3208; CHECK-GI: ; %bb.0:3209; CHECK-GI-NEXT: ld1.2s { v0, v1, v2 }, [x0]3210; CHECK-GI-NEXT: add x8, x0, #243211; CHECK-GI-NEXT: str x8, [x1]3212; CHECK-GI-NEXT: ret3213 %ld1x3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x3.v2i32.p0(ptr %A)3214 %tmp = getelementptr i32, ptr %A, i32 63215 store ptr %tmp, ptr %ptr3216 ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld1x33217}3218 3219define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {3220; CHECK-SD-LABEL: test_v2i32_post_reg_ld1x3:3221; CHECK-SD: ; %bb.0:3222; CHECK-SD-NEXT: lsl x8, x2, #23223; CHECK-SD-NEXT: ld1.2s { v0, v1, v2 }, [x0], x83224; CHECK-SD-NEXT: str x0, [x1]3225; CHECK-SD-NEXT: ret3226;3227; CHECK-GI-LABEL: test_v2i32_post_reg_ld1x3:3228; CHECK-GI: ; %bb.0:3229; CHECK-GI-NEXT: ld1.2s { v0, v1, v2 }, [x0]3230; CHECK-GI-NEXT: add x8, x0, x2, lsl #23231; CHECK-GI-NEXT: str x8, [x1]3232; CHECK-GI-NEXT: ret3233 %ld1x3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x3.v2i32.p0(ptr %A)3234 %tmp = getelementptr i32, ptr %A, i64 %inc3235 store ptr %tmp, ptr %ptr3236 ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld1x33237}3238 3239declare { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x3.v2i32.p0(ptr)3240 3241 3242define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x3(ptr %A, ptr %ptr) {3243; CHECK-SD-LABEL: test_v2i64_post_imm_ld1x3:3244; CHECK-SD: ; %bb.0:3245; CHECK-SD-NEXT: ld1.2d { v0, v1, v2 }, [x0], #483246; CHECK-SD-NEXT: str x0, [x1]3247; CHECK-SD-NEXT: ret3248;3249; CHECK-GI-LABEL: test_v2i64_post_imm_ld1x3:3250; CHECK-GI: ; %bb.0:3251; CHECK-GI-NEXT: ld1.2d { v0, v1, v2 }, [x0]3252; CHECK-GI-NEXT: add x8, x0, #483253; CHECK-GI-NEXT: str x8, [x1]3254; CHECK-GI-NEXT: ret3255 %ld1x3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x3.v2i64.p0(ptr %A)3256 %tmp = getelementptr i64, ptr %A, i32 63257 store ptr %tmp, ptr %ptr3258 ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld1x33259}3260 3261define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {3262; CHECK-SD-LABEL: test_v2i64_post_reg_ld1x3:3263; CHECK-SD: ; %bb.0:3264; CHECK-SD-NEXT: lsl x8, x2, #33265; CHECK-SD-NEXT: ld1.2d { v0, v1, v2 }, [x0], x83266; CHECK-SD-NEXT: str x0, [x1]3267; CHECK-SD-NEXT: ret3268;3269; CHECK-GI-LABEL: test_v2i64_post_reg_ld1x3:3270; CHECK-GI: ; %bb.0:3271; CHECK-GI-NEXT: ld1.2d { v0, v1, v2 }, [x0]3272; CHECK-GI-NEXT: add x8, x0, x2, lsl #33273; CHECK-GI-NEXT: str x8, [x1]3274; CHECK-GI-NEXT: ret3275 %ld1x3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x3.v2i64.p0(ptr %A)3276 %tmp = getelementptr i64, ptr %A, i64 %inc3277 store ptr %tmp, ptr %ptr3278 ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld1x33279}3280 3281declare { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x3.v2i64.p0(ptr)3282 3283 3284define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x3(ptr %A, ptr %ptr) {3285; CHECK-SD-LABEL: test_v1i64_post_imm_ld1x3:3286; CHECK-SD: ; %bb.0:3287; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], #243288; CHECK-SD-NEXT: str x0, [x1]3289; CHECK-SD-NEXT: ret3290;3291; CHECK-GI-LABEL: test_v1i64_post_imm_ld1x3:3292; CHECK-GI: ; %bb.0:3293; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0]3294; CHECK-GI-NEXT: add x8, x0, #243295; CHECK-GI-NEXT: str x8, [x1]3296; CHECK-GI-NEXT: ret3297 %ld1x3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x3.v1i64.p0(ptr %A)3298 %tmp = getelementptr i64, ptr %A, i32 33299 store ptr %tmp, ptr %ptr3300 ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld1x33301}3302 3303define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {3304; CHECK-SD-LABEL: test_v1i64_post_reg_ld1x3:3305; CHECK-SD: ; %bb.0:3306; CHECK-SD-NEXT: lsl x8, x2, #33307; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], x83308; CHECK-SD-NEXT: str x0, [x1]3309; CHECK-SD-NEXT: ret3310;3311; CHECK-GI-LABEL: test_v1i64_post_reg_ld1x3:3312; CHECK-GI: ; %bb.0:3313; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0]3314; CHECK-GI-NEXT: add x8, x0, x2, lsl #33315; CHECK-GI-NEXT: str x8, [x1]3316; CHECK-GI-NEXT: ret3317 %ld1x3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x3.v1i64.p0(ptr %A)3318 %tmp = getelementptr i64, ptr %A, i64 %inc3319 store ptr %tmp, ptr %ptr3320 ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld1x33321}3322 3323declare { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x3.v1i64.p0(ptr)3324 3325 3326define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x3(ptr %A, ptr %ptr) {3327; CHECK-SD-LABEL: test_v4f32_post_imm_ld1x3:3328; CHECK-SD: ; %bb.0:3329; CHECK-SD-NEXT: ld1.4s { v0, v1, v2 }, [x0], #483330; CHECK-SD-NEXT: str x0, [x1]3331; CHECK-SD-NEXT: ret3332;3333; CHECK-GI-LABEL: test_v4f32_post_imm_ld1x3:3334; CHECK-GI: ; %bb.0:3335; CHECK-GI-NEXT: ld1.4s { v0, v1, v2 }, [x0]3336; CHECK-GI-NEXT: add x8, x0, #483337; CHECK-GI-NEXT: str x8, [x1]3338; CHECK-GI-NEXT: ret3339 %ld1x3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x3.v4f32.p0(ptr %A)3340 %tmp = getelementptr float, ptr %A, i32 123341 store ptr %tmp, ptr %ptr3342 ret { <4 x float>, <4 x float>, <4 x float> } %ld1x33343}3344 3345define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {3346; CHECK-SD-LABEL: test_v4f32_post_reg_ld1x3:3347; CHECK-SD: ; %bb.0:3348; CHECK-SD-NEXT: lsl x8, x2, #23349; CHECK-SD-NEXT: ld1.4s { v0, v1, v2 }, [x0], x83350; CHECK-SD-NEXT: str x0, [x1]3351; CHECK-SD-NEXT: ret3352;3353; CHECK-GI-LABEL: test_v4f32_post_reg_ld1x3:3354; CHECK-GI: ; %bb.0:3355; CHECK-GI-NEXT: ld1.4s { v0, v1, v2 }, [x0]3356; CHECK-GI-NEXT: add x8, x0, x2, lsl #23357; CHECK-GI-NEXT: str x8, [x1]3358; CHECK-GI-NEXT: ret3359 %ld1x3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x3.v4f32.p0(ptr %A)3360 %tmp = getelementptr float, ptr %A, i64 %inc3361 store ptr %tmp, ptr %ptr3362 ret { <4 x float>, <4 x float>, <4 x float> } %ld1x33363}3364 3365declare { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x3.v4f32.p0(ptr)3366 3367 3368define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x3(ptr %A, ptr %ptr) {3369; CHECK-SD-LABEL: test_v2f32_post_imm_ld1x3:3370; CHECK-SD: ; %bb.0:3371; CHECK-SD-NEXT: ld1.2s { v0, v1, v2 }, [x0], #243372; CHECK-SD-NEXT: str x0, [x1]3373; CHECK-SD-NEXT: ret3374;3375; CHECK-GI-LABEL: test_v2f32_post_imm_ld1x3:3376; CHECK-GI: ; %bb.0:3377; CHECK-GI-NEXT: ld1.2s { v0, v1, v2 }, [x0]3378; CHECK-GI-NEXT: add x8, x0, #243379; CHECK-GI-NEXT: str x8, [x1]3380; CHECK-GI-NEXT: ret3381 %ld1x3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x3.v2f32.p0(ptr %A)3382 %tmp = getelementptr float, ptr %A, i32 63383 store ptr %tmp, ptr %ptr3384 ret { <2 x float>, <2 x float>, <2 x float> } %ld1x33385}3386 3387define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {3388; CHECK-SD-LABEL: test_v2f32_post_reg_ld1x3:3389; CHECK-SD: ; %bb.0:3390; CHECK-SD-NEXT: lsl x8, x2, #23391; CHECK-SD-NEXT: ld1.2s { v0, v1, v2 }, [x0], x83392; CHECK-SD-NEXT: str x0, [x1]3393; CHECK-SD-NEXT: ret3394;3395; CHECK-GI-LABEL: test_v2f32_post_reg_ld1x3:3396; CHECK-GI: ; %bb.0:3397; CHECK-GI-NEXT: ld1.2s { v0, v1, v2 }, [x0]3398; CHECK-GI-NEXT: add x8, x0, x2, lsl #23399; CHECK-GI-NEXT: str x8, [x1]3400; CHECK-GI-NEXT: ret3401 %ld1x3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x3.v2f32.p0(ptr %A)3402 %tmp = getelementptr float, ptr %A, i64 %inc3403 store ptr %tmp, ptr %ptr3404 ret { <2 x float>, <2 x float>, <2 x float> } %ld1x33405}3406 3407declare { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x3.v2f32.p0(ptr)3408 3409 3410define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x3(ptr %A, ptr %ptr) {3411; CHECK-SD-LABEL: test_v2f64_post_imm_ld1x3:3412; CHECK-SD: ; %bb.0:3413; CHECK-SD-NEXT: ld1.2d { v0, v1, v2 }, [x0], #483414; CHECK-SD-NEXT: str x0, [x1]3415; CHECK-SD-NEXT: ret3416;3417; CHECK-GI-LABEL: test_v2f64_post_imm_ld1x3:3418; CHECK-GI: ; %bb.0:3419; CHECK-GI-NEXT: ld1.2d { v0, v1, v2 }, [x0]3420; CHECK-GI-NEXT: add x8, x0, #483421; CHECK-GI-NEXT: str x8, [x1]3422; CHECK-GI-NEXT: ret3423 %ld1x3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x3.v2f64.p0(ptr %A)3424 %tmp = getelementptr double, ptr %A, i32 63425 store ptr %tmp, ptr %ptr3426 ret { <2 x double>, <2 x double>, <2 x double> } %ld1x33427}3428 3429define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {3430; CHECK-SD-LABEL: test_v2f64_post_reg_ld1x3:3431; CHECK-SD: ; %bb.0:3432; CHECK-SD-NEXT: lsl x8, x2, #33433; CHECK-SD-NEXT: ld1.2d { v0, v1, v2 }, [x0], x83434; CHECK-SD-NEXT: str x0, [x1]3435; CHECK-SD-NEXT: ret3436;3437; CHECK-GI-LABEL: test_v2f64_post_reg_ld1x3:3438; CHECK-GI: ; %bb.0:3439; CHECK-GI-NEXT: ld1.2d { v0, v1, v2 }, [x0]3440; CHECK-GI-NEXT: add x8, x0, x2, lsl #33441; CHECK-GI-NEXT: str x8, [x1]3442; CHECK-GI-NEXT: ret3443 %ld1x3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x3.v2f64.p0(ptr %A)3444 %tmp = getelementptr double, ptr %A, i64 %inc3445 store ptr %tmp, ptr %ptr3446 ret { <2 x double>, <2 x double>, <2 x double> } %ld1x33447}3448 3449declare { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x3.v2f64.p0(ptr)3450 3451 3452define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x3(ptr %A, ptr %ptr) {3453; CHECK-SD-LABEL: test_v1f64_post_imm_ld1x3:3454; CHECK-SD: ; %bb.0:3455; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], #243456; CHECK-SD-NEXT: str x0, [x1]3457; CHECK-SD-NEXT: ret3458;3459; CHECK-GI-LABEL: test_v1f64_post_imm_ld1x3:3460; CHECK-GI: ; %bb.0:3461; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0]3462; CHECK-GI-NEXT: add x8, x0, #243463; CHECK-GI-NEXT: str x8, [x1]3464; CHECK-GI-NEXT: ret3465 %ld1x3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x3.v1f64.p0(ptr %A)3466 %tmp = getelementptr double, ptr %A, i32 33467 store ptr %tmp, ptr %ptr3468 ret { <1 x double>, <1 x double>, <1 x double> } %ld1x33469}3470 3471define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {3472; CHECK-SD-LABEL: test_v1f64_post_reg_ld1x3:3473; CHECK-SD: ; %bb.0:3474; CHECK-SD-NEXT: lsl x8, x2, #33475; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], x83476; CHECK-SD-NEXT: str x0, [x1]3477; CHECK-SD-NEXT: ret3478;3479; CHECK-GI-LABEL: test_v1f64_post_reg_ld1x3:3480; CHECK-GI: ; %bb.0:3481; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0]3482; CHECK-GI-NEXT: add x8, x0, x2, lsl #33483; CHECK-GI-NEXT: str x8, [x1]3484; CHECK-GI-NEXT: ret3485 %ld1x3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x3.v1f64.p0(ptr %A)3486 %tmp = getelementptr double, ptr %A, i64 %inc3487 store ptr %tmp, ptr %ptr3488 ret { <1 x double>, <1 x double>, <1 x double> } %ld1x33489}3490 3491declare { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x3.v1f64.p0(ptr)3492 3493 3494define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x4(ptr %A, ptr %ptr) {3495; CHECK-SD-LABEL: test_v16i8_post_imm_ld1x4:3496; CHECK-SD: ; %bb.0:3497; CHECK-SD-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0], #643498; CHECK-SD-NEXT: str x0, [x1]3499; CHECK-SD-NEXT: ret3500;3501; CHECK-GI-LABEL: test_v16i8_post_imm_ld1x4:3502; CHECK-GI: ; %bb.0:3503; CHECK-GI-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0]3504; CHECK-GI-NEXT: add x8, x0, #643505; CHECK-GI-NEXT: str x8, [x1]3506; CHECK-GI-NEXT: ret3507 %ld1x4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x4.v16i8.p0(ptr %A)3508 %tmp = getelementptr i8, ptr %A, i32 643509 store ptr %tmp, ptr %ptr3510 ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld1x43511}3512 3513define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {3514; CHECK-SD-LABEL: test_v16i8_post_reg_ld1x4:3515; CHECK-SD: ; %bb.0:3516; CHECK-SD-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0], x23517; CHECK-SD-NEXT: str x0, [x1]3518; CHECK-SD-NEXT: ret3519;3520; CHECK-GI-LABEL: test_v16i8_post_reg_ld1x4:3521; CHECK-GI: ; %bb.0:3522; CHECK-GI-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0]3523; CHECK-GI-NEXT: add x8, x0, x23524; CHECK-GI-NEXT: str x8, [x1]3525; CHECK-GI-NEXT: ret3526 %ld1x4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x4.v16i8.p0(ptr %A)3527 %tmp = getelementptr i8, ptr %A, i64 %inc3528 store ptr %tmp, ptr %ptr3529 ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld1x43530}3531 3532declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x4.v16i8.p0(ptr)3533 3534 3535define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x4(ptr %A, ptr %ptr) {3536; CHECK-SD-LABEL: test_v8i8_post_imm_ld1x4:3537; CHECK-SD: ; %bb.0:3538; CHECK-SD-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0], #323539; CHECK-SD-NEXT: str x0, [x1]3540; CHECK-SD-NEXT: ret3541;3542; CHECK-GI-LABEL: test_v8i8_post_imm_ld1x4:3543; CHECK-GI: ; %bb.0:3544; CHECK-GI-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0]3545; CHECK-GI-NEXT: add x8, x0, #323546; CHECK-GI-NEXT: str x8, [x1]3547; CHECK-GI-NEXT: ret3548 %ld1x4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x4.v8i8.p0(ptr %A)3549 %tmp = getelementptr i8, ptr %A, i32 323550 store ptr %tmp, ptr %ptr3551 ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld1x43552}3553 3554define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {3555; CHECK-SD-LABEL: test_v8i8_post_reg_ld1x4:3556; CHECK-SD: ; %bb.0:3557; CHECK-SD-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0], x23558; CHECK-SD-NEXT: str x0, [x1]3559; CHECK-SD-NEXT: ret3560;3561; CHECK-GI-LABEL: test_v8i8_post_reg_ld1x4:3562; CHECK-GI: ; %bb.0:3563; CHECK-GI-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0]3564; CHECK-GI-NEXT: add x8, x0, x23565; CHECK-GI-NEXT: str x8, [x1]3566; CHECK-GI-NEXT: ret3567 %ld1x4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x4.v8i8.p0(ptr %A)3568 %tmp = getelementptr i8, ptr %A, i64 %inc3569 store ptr %tmp, ptr %ptr3570 ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld1x43571}3572 3573declare { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x4.v8i8.p0(ptr)3574 3575 3576define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x4(ptr %A, ptr %ptr) {3577; CHECK-SD-LABEL: test_v8i16_post_imm_ld1x4:3578; CHECK-SD: ; %bb.0:3579; CHECK-SD-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0], #643580; CHECK-SD-NEXT: str x0, [x1]3581; CHECK-SD-NEXT: ret3582;3583; CHECK-GI-LABEL: test_v8i16_post_imm_ld1x4:3584; CHECK-GI: ; %bb.0:3585; CHECK-GI-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0]3586; CHECK-GI-NEXT: add x8, x0, #643587; CHECK-GI-NEXT: str x8, [x1]3588; CHECK-GI-NEXT: ret3589 %ld1x4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x4.v8i16.p0(ptr %A)3590 %tmp = getelementptr i16, ptr %A, i32 323591 store ptr %tmp, ptr %ptr3592 ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld1x43593}3594 3595define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {3596; CHECK-SD-LABEL: test_v8i16_post_reg_ld1x4:3597; CHECK-SD: ; %bb.0:3598; CHECK-SD-NEXT: lsl x8, x2, #13599; CHECK-SD-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0], x83600; CHECK-SD-NEXT: str x0, [x1]3601; CHECK-SD-NEXT: ret3602;3603; CHECK-GI-LABEL: test_v8i16_post_reg_ld1x4:3604; CHECK-GI: ; %bb.0:3605; CHECK-GI-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0]3606; CHECK-GI-NEXT: add x8, x0, x2, lsl #13607; CHECK-GI-NEXT: str x8, [x1]3608; CHECK-GI-NEXT: ret3609 %ld1x4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x4.v8i16.p0(ptr %A)3610 %tmp = getelementptr i16, ptr %A, i64 %inc3611 store ptr %tmp, ptr %ptr3612 ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld1x43613}3614 3615declare { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x4.v8i16.p0(ptr)3616 3617 3618define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x4(ptr %A, ptr %ptr) {3619; CHECK-SD-LABEL: test_v4i16_post_imm_ld1x4:3620; CHECK-SD: ; %bb.0:3621; CHECK-SD-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0], #323622; CHECK-SD-NEXT: str x0, [x1]3623; CHECK-SD-NEXT: ret3624;3625; CHECK-GI-LABEL: test_v4i16_post_imm_ld1x4:3626; CHECK-GI: ; %bb.0:3627; CHECK-GI-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0]3628; CHECK-GI-NEXT: add x8, x0, #323629; CHECK-GI-NEXT: str x8, [x1]3630; CHECK-GI-NEXT: ret3631 %ld1x4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x4.v4i16.p0(ptr %A)3632 %tmp = getelementptr i16, ptr %A, i32 163633 store ptr %tmp, ptr %ptr3634 ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld1x43635}3636 3637define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {3638; CHECK-SD-LABEL: test_v4i16_post_reg_ld1x4:3639; CHECK-SD: ; %bb.0:3640; CHECK-SD-NEXT: lsl x8, x2, #13641; CHECK-SD-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0], x83642; CHECK-SD-NEXT: str x0, [x1]3643; CHECK-SD-NEXT: ret3644;3645; CHECK-GI-LABEL: test_v4i16_post_reg_ld1x4:3646; CHECK-GI: ; %bb.0:3647; CHECK-GI-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0]3648; CHECK-GI-NEXT: add x8, x0, x2, lsl #13649; CHECK-GI-NEXT: str x8, [x1]3650; CHECK-GI-NEXT: ret3651 %ld1x4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x4.v4i16.p0(ptr %A)3652 %tmp = getelementptr i16, ptr %A, i64 %inc3653 store ptr %tmp, ptr %ptr3654 ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld1x43655}3656 3657declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x4.v4i16.p0(ptr)3658 3659 3660define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x4(ptr %A, ptr %ptr) {3661; CHECK-SD-LABEL: test_v4i32_post_imm_ld1x4:3662; CHECK-SD: ; %bb.0:3663; CHECK-SD-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], #643664; CHECK-SD-NEXT: str x0, [x1]3665; CHECK-SD-NEXT: ret3666;3667; CHECK-GI-LABEL: test_v4i32_post_imm_ld1x4:3668; CHECK-GI: ; %bb.0:3669; CHECK-GI-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0]3670; CHECK-GI-NEXT: add x8, x0, #643671; CHECK-GI-NEXT: str x8, [x1]3672; CHECK-GI-NEXT: ret3673 %ld1x4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x4.v4i32.p0(ptr %A)3674 %tmp = getelementptr i32, ptr %A, i32 163675 store ptr %tmp, ptr %ptr3676 ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld1x43677}3678 3679define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {3680; CHECK-SD-LABEL: test_v4i32_post_reg_ld1x4:3681; CHECK-SD: ; %bb.0:3682; CHECK-SD-NEXT: lsl x8, x2, #23683; CHECK-SD-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], x83684; CHECK-SD-NEXT: str x0, [x1]3685; CHECK-SD-NEXT: ret3686;3687; CHECK-GI-LABEL: test_v4i32_post_reg_ld1x4:3688; CHECK-GI: ; %bb.0:3689; CHECK-GI-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0]3690; CHECK-GI-NEXT: add x8, x0, x2, lsl #23691; CHECK-GI-NEXT: str x8, [x1]3692; CHECK-GI-NEXT: ret3693 %ld1x4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x4.v4i32.p0(ptr %A)3694 %tmp = getelementptr i32, ptr %A, i64 %inc3695 store ptr %tmp, ptr %ptr3696 ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld1x43697}3698 3699declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x4.v4i32.p0(ptr)3700 3701 3702define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x4(ptr %A, ptr %ptr) {3703; CHECK-SD-LABEL: test_v2i32_post_imm_ld1x4:3704; CHECK-SD: ; %bb.0:3705; CHECK-SD-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], #323706; CHECK-SD-NEXT: str x0, [x1]3707; CHECK-SD-NEXT: ret3708;3709; CHECK-GI-LABEL: test_v2i32_post_imm_ld1x4:3710; CHECK-GI: ; %bb.0:3711; CHECK-GI-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0]3712; CHECK-GI-NEXT: add x8, x0, #323713; CHECK-GI-NEXT: str x8, [x1]3714; CHECK-GI-NEXT: ret3715 %ld1x4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x4.v2i32.p0(ptr %A)3716 %tmp = getelementptr i32, ptr %A, i32 83717 store ptr %tmp, ptr %ptr3718 ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld1x43719}3720 3721define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {3722; CHECK-SD-LABEL: test_v2i32_post_reg_ld1x4:3723; CHECK-SD: ; %bb.0:3724; CHECK-SD-NEXT: lsl x8, x2, #23725; CHECK-SD-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], x83726; CHECK-SD-NEXT: str x0, [x1]3727; CHECK-SD-NEXT: ret3728;3729; CHECK-GI-LABEL: test_v2i32_post_reg_ld1x4:3730; CHECK-GI: ; %bb.0:3731; CHECK-GI-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0]3732; CHECK-GI-NEXT: add x8, x0, x2, lsl #23733; CHECK-GI-NEXT: str x8, [x1]3734; CHECK-GI-NEXT: ret3735 %ld1x4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x4.v2i32.p0(ptr %A)3736 %tmp = getelementptr i32, ptr %A, i64 %inc3737 store ptr %tmp, ptr %ptr3738 ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld1x43739}3740 3741declare { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x4.v2i32.p0(ptr)3742 3743 3744define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x4(ptr %A, ptr %ptr) {3745; CHECK-SD-LABEL: test_v2i64_post_imm_ld1x4:3746; CHECK-SD: ; %bb.0:3747; CHECK-SD-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], #643748; CHECK-SD-NEXT: str x0, [x1]3749; CHECK-SD-NEXT: ret3750;3751; CHECK-GI-LABEL: test_v2i64_post_imm_ld1x4:3752; CHECK-GI: ; %bb.0:3753; CHECK-GI-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0]3754; CHECK-GI-NEXT: add x8, x0, #643755; CHECK-GI-NEXT: str x8, [x1]3756; CHECK-GI-NEXT: ret3757 %ld1x4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x4.v2i64.p0(ptr %A)3758 %tmp = getelementptr i64, ptr %A, i32 83759 store ptr %tmp, ptr %ptr3760 ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld1x43761}3762 3763define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {3764; CHECK-SD-LABEL: test_v2i64_post_reg_ld1x4:3765; CHECK-SD: ; %bb.0:3766; CHECK-SD-NEXT: lsl x8, x2, #33767; CHECK-SD-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], x83768; CHECK-SD-NEXT: str x0, [x1]3769; CHECK-SD-NEXT: ret3770;3771; CHECK-GI-LABEL: test_v2i64_post_reg_ld1x4:3772; CHECK-GI: ; %bb.0:3773; CHECK-GI-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0]3774; CHECK-GI-NEXT: add x8, x0, x2, lsl #33775; CHECK-GI-NEXT: str x8, [x1]3776; CHECK-GI-NEXT: ret3777 %ld1x4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x4.v2i64.p0(ptr %A)3778 %tmp = getelementptr i64, ptr %A, i64 %inc3779 store ptr %tmp, ptr %ptr3780 ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld1x43781}3782 3783declare { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x4.v2i64.p0(ptr)3784 3785 3786define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x4(ptr %A, ptr %ptr) {3787; CHECK-SD-LABEL: test_v1i64_post_imm_ld1x4:3788; CHECK-SD: ; %bb.0:3789; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #323790; CHECK-SD-NEXT: str x0, [x1]3791; CHECK-SD-NEXT: ret3792;3793; CHECK-GI-LABEL: test_v1i64_post_imm_ld1x4:3794; CHECK-GI: ; %bb.0:3795; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]3796; CHECK-GI-NEXT: add x8, x0, #323797; CHECK-GI-NEXT: str x8, [x1]3798; CHECK-GI-NEXT: ret3799 %ld1x4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x4.v1i64.p0(ptr %A)3800 %tmp = getelementptr i64, ptr %A, i32 43801 store ptr %tmp, ptr %ptr3802 ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld1x43803}3804 3805define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {3806; CHECK-SD-LABEL: test_v1i64_post_reg_ld1x4:3807; CHECK-SD: ; %bb.0:3808; CHECK-SD-NEXT: lsl x8, x2, #33809; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x83810; CHECK-SD-NEXT: str x0, [x1]3811; CHECK-SD-NEXT: ret3812;3813; CHECK-GI-LABEL: test_v1i64_post_reg_ld1x4:3814; CHECK-GI: ; %bb.0:3815; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]3816; CHECK-GI-NEXT: add x8, x0, x2, lsl #33817; CHECK-GI-NEXT: str x8, [x1]3818; CHECK-GI-NEXT: ret3819 %ld1x4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x4.v1i64.p0(ptr %A)3820 %tmp = getelementptr i64, ptr %A, i64 %inc3821 store ptr %tmp, ptr %ptr3822 ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld1x43823}3824 3825declare { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x4.v1i64.p0(ptr)3826 3827 3828define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x4(ptr %A, ptr %ptr) {3829; CHECK-SD-LABEL: test_v4f32_post_imm_ld1x4:3830; CHECK-SD: ; %bb.0:3831; CHECK-SD-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], #643832; CHECK-SD-NEXT: str x0, [x1]3833; CHECK-SD-NEXT: ret3834;3835; CHECK-GI-LABEL: test_v4f32_post_imm_ld1x4:3836; CHECK-GI: ; %bb.0:3837; CHECK-GI-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0]3838; CHECK-GI-NEXT: add x8, x0, #643839; CHECK-GI-NEXT: str x8, [x1]3840; CHECK-GI-NEXT: ret3841 %ld1x4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x4.v4f32.p0(ptr %A)3842 %tmp = getelementptr float, ptr %A, i32 163843 store ptr %tmp, ptr %ptr3844 ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld1x43845}3846 3847define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {3848; CHECK-SD-LABEL: test_v4f32_post_reg_ld1x4:3849; CHECK-SD: ; %bb.0:3850; CHECK-SD-NEXT: lsl x8, x2, #23851; CHECK-SD-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], x83852; CHECK-SD-NEXT: str x0, [x1]3853; CHECK-SD-NEXT: ret3854;3855; CHECK-GI-LABEL: test_v4f32_post_reg_ld1x4:3856; CHECK-GI: ; %bb.0:3857; CHECK-GI-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0]3858; CHECK-GI-NEXT: add x8, x0, x2, lsl #23859; CHECK-GI-NEXT: str x8, [x1]3860; CHECK-GI-NEXT: ret3861 %ld1x4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x4.v4f32.p0(ptr %A)3862 %tmp = getelementptr float, ptr %A, i64 %inc3863 store ptr %tmp, ptr %ptr3864 ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld1x43865}3866 3867declare { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x4.v4f32.p0(ptr)3868 3869 3870define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x4(ptr %A, ptr %ptr) {3871; CHECK-SD-LABEL: test_v2f32_post_imm_ld1x4:3872; CHECK-SD: ; %bb.0:3873; CHECK-SD-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], #323874; CHECK-SD-NEXT: str x0, [x1]3875; CHECK-SD-NEXT: ret3876;3877; CHECK-GI-LABEL: test_v2f32_post_imm_ld1x4:3878; CHECK-GI: ; %bb.0:3879; CHECK-GI-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0]3880; CHECK-GI-NEXT: add x8, x0, #323881; CHECK-GI-NEXT: str x8, [x1]3882; CHECK-GI-NEXT: ret3883 %ld1x4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x4.v2f32.p0(ptr %A)3884 %tmp = getelementptr float, ptr %A, i32 83885 store ptr %tmp, ptr %ptr3886 ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld1x43887}3888 3889define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {3890; CHECK-SD-LABEL: test_v2f32_post_reg_ld1x4:3891; CHECK-SD: ; %bb.0:3892; CHECK-SD-NEXT: lsl x8, x2, #23893; CHECK-SD-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], x83894; CHECK-SD-NEXT: str x0, [x1]3895; CHECK-SD-NEXT: ret3896;3897; CHECK-GI-LABEL: test_v2f32_post_reg_ld1x4:3898; CHECK-GI: ; %bb.0:3899; CHECK-GI-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0]3900; CHECK-GI-NEXT: add x8, x0, x2, lsl #23901; CHECK-GI-NEXT: str x8, [x1]3902; CHECK-GI-NEXT: ret3903 %ld1x4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x4.v2f32.p0(ptr %A)3904 %tmp = getelementptr float, ptr %A, i64 %inc3905 store ptr %tmp, ptr %ptr3906 ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld1x43907}3908 3909declare { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x4.v2f32.p0(ptr)3910 3911 3912define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x4(ptr %A, ptr %ptr) {3913; CHECK-SD-LABEL: test_v2f64_post_imm_ld1x4:3914; CHECK-SD: ; %bb.0:3915; CHECK-SD-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], #643916; CHECK-SD-NEXT: str x0, [x1]3917; CHECK-SD-NEXT: ret3918;3919; CHECK-GI-LABEL: test_v2f64_post_imm_ld1x4:3920; CHECK-GI: ; %bb.0:3921; CHECK-GI-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0]3922; CHECK-GI-NEXT: add x8, x0, #643923; CHECK-GI-NEXT: str x8, [x1]3924; CHECK-GI-NEXT: ret3925 %ld1x4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x4.v2f64.p0(ptr %A)3926 %tmp = getelementptr double, ptr %A, i32 83927 store ptr %tmp, ptr %ptr3928 ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld1x43929}3930 3931define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {3932; CHECK-SD-LABEL: test_v2f64_post_reg_ld1x4:3933; CHECK-SD: ; %bb.0:3934; CHECK-SD-NEXT: lsl x8, x2, #33935; CHECK-SD-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], x83936; CHECK-SD-NEXT: str x0, [x1]3937; CHECK-SD-NEXT: ret3938;3939; CHECK-GI-LABEL: test_v2f64_post_reg_ld1x4:3940; CHECK-GI: ; %bb.0:3941; CHECK-GI-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0]3942; CHECK-GI-NEXT: add x8, x0, x2, lsl #33943; CHECK-GI-NEXT: str x8, [x1]3944; CHECK-GI-NEXT: ret3945 %ld1x4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x4.v2f64.p0(ptr %A)3946 %tmp = getelementptr double, ptr %A, i64 %inc3947 store ptr %tmp, ptr %ptr3948 ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld1x43949}3950 3951declare { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x4.v2f64.p0(ptr)3952 3953 3954define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x4(ptr %A, ptr %ptr) {3955; CHECK-SD-LABEL: test_v1f64_post_imm_ld1x4:3956; CHECK-SD: ; %bb.0:3957; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #323958; CHECK-SD-NEXT: str x0, [x1]3959; CHECK-SD-NEXT: ret3960;3961; CHECK-GI-LABEL: test_v1f64_post_imm_ld1x4:3962; CHECK-GI: ; %bb.0:3963; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]3964; CHECK-GI-NEXT: add x8, x0, #323965; CHECK-GI-NEXT: str x8, [x1]3966; CHECK-GI-NEXT: ret3967 %ld1x4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x4.v1f64.p0(ptr %A)3968 %tmp = getelementptr double, ptr %A, i32 43969 store ptr %tmp, ptr %ptr3970 ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld1x43971}3972 3973define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {3974; CHECK-SD-LABEL: test_v1f64_post_reg_ld1x4:3975; CHECK-SD: ; %bb.0:3976; CHECK-SD-NEXT: lsl x8, x2, #33977; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x83978; CHECK-SD-NEXT: str x0, [x1]3979; CHECK-SD-NEXT: ret3980;3981; CHECK-GI-LABEL: test_v1f64_post_reg_ld1x4:3982; CHECK-GI: ; %bb.0:3983; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0]3984; CHECK-GI-NEXT: add x8, x0, x2, lsl #33985; CHECK-GI-NEXT: str x8, [x1]3986; CHECK-GI-NEXT: ret3987 %ld1x4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x4.v1f64.p0(ptr %A)3988 %tmp = getelementptr double, ptr %A, i64 %inc3989 store ptr %tmp, ptr %ptr3990 ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld1x43991}3992 3993declare { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x4.v1f64.p0(ptr)3994 3995 3996define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {3997; CHECK-SD-LABEL: test_v16i8_post_imm_ld2r:3998; CHECK-SD: ; %bb.0:3999; CHECK-SD-NEXT: ld2r.16b { v0, v1 }, [x0], #24000; CHECK-SD-NEXT: str x0, [x1]4001; CHECK-SD-NEXT: ret4002;4003; CHECK-GI-LABEL: test_v16i8_post_imm_ld2r:4004; CHECK-GI: ; %bb.0:4005; CHECK-GI-NEXT: ld2r.16b { v0, v1 }, [x0]4006; CHECK-GI-NEXT: add x8, x0, #24007; CHECK-GI-NEXT: str x8, [x1]4008; CHECK-GI-NEXT: ret4009 %ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0(ptr %A)4010 %tmp = getelementptr i8, ptr %A, i32 24011 store ptr %tmp, ptr %ptr4012 ret { <16 x i8>, <16 x i8> } %ld24013}4014 4015define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {4016; CHECK-SD-LABEL: test_v16i8_post_reg_ld2r:4017; CHECK-SD: ; %bb.0:4018; CHECK-SD-NEXT: ld2r.16b { v0, v1 }, [x0], x24019; CHECK-SD-NEXT: str x0, [x1]4020; CHECK-SD-NEXT: ret4021;4022; CHECK-GI-LABEL: test_v16i8_post_reg_ld2r:4023; CHECK-GI: ; %bb.0:4024; CHECK-GI-NEXT: ld2r.16b { v0, v1 }, [x0]4025; CHECK-GI-NEXT: add x8, x0, x24026; CHECK-GI-NEXT: str x8, [x1]4027; CHECK-GI-NEXT: ret4028 %ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0(ptr %A)4029 %tmp = getelementptr i8, ptr %A, i64 %inc4030 store ptr %tmp, ptr %ptr4031 ret { <16 x i8>, <16 x i8> } %ld24032}4033 4034declare { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0(ptr) nounwind readonly4035 4036 4037define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {4038; CHECK-SD-LABEL: test_v8i8_post_imm_ld2r:4039; CHECK-SD: ; %bb.0:4040; CHECK-SD-NEXT: ld2r.8b { v0, v1 }, [x0], #24041; CHECK-SD-NEXT: str x0, [x1]4042; CHECK-SD-NEXT: ret4043;4044; CHECK-GI-LABEL: test_v8i8_post_imm_ld2r:4045; CHECK-GI: ; %bb.0:4046; CHECK-GI-NEXT: ld2r.8b { v0, v1 }, [x0]4047; CHECK-GI-NEXT: add x8, x0, #24048; CHECK-GI-NEXT: str x8, [x1]4049; CHECK-GI-NEXT: ret4050 %ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2r.v8i8.p0(ptr %A)4051 %tmp = getelementptr i8, ptr %A, i32 24052 store ptr %tmp, ptr %ptr4053 ret { <8 x i8>, <8 x i8> } %ld24054}4055 4056define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {4057; CHECK-SD-LABEL: test_v8i8_post_reg_ld2r:4058; CHECK-SD: ; %bb.0:4059; CHECK-SD-NEXT: ld2r.8b { v0, v1 }, [x0], x24060; CHECK-SD-NEXT: str x0, [x1]4061; CHECK-SD-NEXT: ret4062;4063; CHECK-GI-LABEL: test_v8i8_post_reg_ld2r:4064; CHECK-GI: ; %bb.0:4065; CHECK-GI-NEXT: ld2r.8b { v0, v1 }, [x0]4066; CHECK-GI-NEXT: add x8, x0, x24067; CHECK-GI-NEXT: str x8, [x1]4068; CHECK-GI-NEXT: ret4069 %ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2r.v8i8.p0(ptr %A)4070 %tmp = getelementptr i8, ptr %A, i64 %inc4071 store ptr %tmp, ptr %ptr4072 ret { <8 x i8>, <8 x i8> } %ld24073}4074 4075declare { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2r.v8i8.p0(ptr) nounwind readonly4076 4077 4078define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {4079; CHECK-SD-LABEL: test_v8i16_post_imm_ld2r:4080; CHECK-SD: ; %bb.0:4081; CHECK-SD-NEXT: ld2r.8h { v0, v1 }, [x0], #44082; CHECK-SD-NEXT: str x0, [x1]4083; CHECK-SD-NEXT: ret4084;4085; CHECK-GI-LABEL: test_v8i16_post_imm_ld2r:4086; CHECK-GI: ; %bb.0:4087; CHECK-GI-NEXT: ld2r.8h { v0, v1 }, [x0]4088; CHECK-GI-NEXT: add x8, x0, #44089; CHECK-GI-NEXT: str x8, [x1]4090; CHECK-GI-NEXT: ret4091 %ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2r.v8i16.p0(ptr %A)4092 %tmp = getelementptr i16, ptr %A, i32 24093 store ptr %tmp, ptr %ptr4094 ret { <8 x i16>, <8 x i16> } %ld24095}4096 4097define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {4098; CHECK-SD-LABEL: test_v8i16_post_reg_ld2r:4099; CHECK-SD: ; %bb.0:4100; CHECK-SD-NEXT: lsl x8, x2, #14101; CHECK-SD-NEXT: ld2r.8h { v0, v1 }, [x0], x84102; CHECK-SD-NEXT: str x0, [x1]4103; CHECK-SD-NEXT: ret4104;4105; CHECK-GI-LABEL: test_v8i16_post_reg_ld2r:4106; CHECK-GI: ; %bb.0:4107; CHECK-GI-NEXT: ld2r.8h { v0, v1 }, [x0]4108; CHECK-GI-NEXT: add x8, x0, x2, lsl #14109; CHECK-GI-NEXT: str x8, [x1]4110; CHECK-GI-NEXT: ret4111 %ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2r.v8i16.p0(ptr %A)4112 %tmp = getelementptr i16, ptr %A, i64 %inc4113 store ptr %tmp, ptr %ptr4114 ret { <8 x i16>, <8 x i16> } %ld24115}4116 4117declare { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2r.v8i16.p0(ptr) nounwind readonly4118 4119 4120define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {4121; CHECK-SD-LABEL: test_v4i16_post_imm_ld2r:4122; CHECK-SD: ; %bb.0:4123; CHECK-SD-NEXT: ld2r.4h { v0, v1 }, [x0], #44124; CHECK-SD-NEXT: str x0, [x1]4125; CHECK-SD-NEXT: ret4126;4127; CHECK-GI-LABEL: test_v4i16_post_imm_ld2r:4128; CHECK-GI: ; %bb.0:4129; CHECK-GI-NEXT: ld2r.4h { v0, v1 }, [x0]4130; CHECK-GI-NEXT: add x8, x0, #44131; CHECK-GI-NEXT: str x8, [x1]4132; CHECK-GI-NEXT: ret4133 %ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2r.v4i16.p0(ptr %A)4134 %tmp = getelementptr i16, ptr %A, i32 24135 store ptr %tmp, ptr %ptr4136 ret { <4 x i16>, <4 x i16> } %ld24137}4138 4139define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {4140; CHECK-SD-LABEL: test_v4i16_post_reg_ld2r:4141; CHECK-SD: ; %bb.0:4142; CHECK-SD-NEXT: lsl x8, x2, #14143; CHECK-SD-NEXT: ld2r.4h { v0, v1 }, [x0], x84144; CHECK-SD-NEXT: str x0, [x1]4145; CHECK-SD-NEXT: ret4146;4147; CHECK-GI-LABEL: test_v4i16_post_reg_ld2r:4148; CHECK-GI: ; %bb.0:4149; CHECK-GI-NEXT: ld2r.4h { v0, v1 }, [x0]4150; CHECK-GI-NEXT: add x8, x0, x2, lsl #14151; CHECK-GI-NEXT: str x8, [x1]4152; CHECK-GI-NEXT: ret4153 %ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2r.v4i16.p0(ptr %A)4154 %tmp = getelementptr i16, ptr %A, i64 %inc4155 store ptr %tmp, ptr %ptr4156 ret { <4 x i16>, <4 x i16> } %ld24157}4158 4159declare { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2r.v4i16.p0(ptr) nounwind readonly4160 4161 4162define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {4163; CHECK-SD-LABEL: test_v4i32_post_imm_ld2r:4164; CHECK-SD: ; %bb.0:4165; CHECK-SD-NEXT: ld2r.4s { v0, v1 }, [x0], #84166; CHECK-SD-NEXT: str x0, [x1]4167; CHECK-SD-NEXT: ret4168;4169; CHECK-GI-LABEL: test_v4i32_post_imm_ld2r:4170; CHECK-GI: ; %bb.0:4171; CHECK-GI-NEXT: ld2r.4s { v0, v1 }, [x0]4172; CHECK-GI-NEXT: add x8, x0, #84173; CHECK-GI-NEXT: str x8, [x1]4174; CHECK-GI-NEXT: ret4175 %ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2r.v4i32.p0(ptr %A)4176 %tmp = getelementptr i32, ptr %A, i32 24177 store ptr %tmp, ptr %ptr4178 ret { <4 x i32>, <4 x i32> } %ld24179}4180 4181define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {4182; CHECK-SD-LABEL: test_v4i32_post_reg_ld2r:4183; CHECK-SD: ; %bb.0:4184; CHECK-SD-NEXT: lsl x8, x2, #24185; CHECK-SD-NEXT: ld2r.4s { v0, v1 }, [x0], x84186; CHECK-SD-NEXT: str x0, [x1]4187; CHECK-SD-NEXT: ret4188;4189; CHECK-GI-LABEL: test_v4i32_post_reg_ld2r:4190; CHECK-GI: ; %bb.0:4191; CHECK-GI-NEXT: ld2r.4s { v0, v1 }, [x0]4192; CHECK-GI-NEXT: add x8, x0, x2, lsl #24193; CHECK-GI-NEXT: str x8, [x1]4194; CHECK-GI-NEXT: ret4195 %ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2r.v4i32.p0(ptr %A)4196 %tmp = getelementptr i32, ptr %A, i64 %inc4197 store ptr %tmp, ptr %ptr4198 ret { <4 x i32>, <4 x i32> } %ld24199}4200 4201declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2r.v4i32.p0(ptr) nounwind readonly4202 4203define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {4204; CHECK-SD-LABEL: test_v2i32_post_imm_ld2r:4205; CHECK-SD: ; %bb.0:4206; CHECK-SD-NEXT: ld2r.2s { v0, v1 }, [x0], #84207; CHECK-SD-NEXT: str x0, [x1]4208; CHECK-SD-NEXT: ret4209;4210; CHECK-GI-LABEL: test_v2i32_post_imm_ld2r:4211; CHECK-GI: ; %bb.0:4212; CHECK-GI-NEXT: ld2r.2s { v0, v1 }, [x0]4213; CHECK-GI-NEXT: add x8, x0, #84214; CHECK-GI-NEXT: str x8, [x1]4215; CHECK-GI-NEXT: ret4216 %ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2r.v2i32.p0(ptr %A)4217 %tmp = getelementptr i32, ptr %A, i32 24218 store ptr %tmp, ptr %ptr4219 ret { <2 x i32>, <2 x i32> } %ld24220}4221 4222define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {4223; CHECK-SD-LABEL: test_v2i32_post_reg_ld2r:4224; CHECK-SD: ; %bb.0:4225; CHECK-SD-NEXT: lsl x8, x2, #24226; CHECK-SD-NEXT: ld2r.2s { v0, v1 }, [x0], x84227; CHECK-SD-NEXT: str x0, [x1]4228; CHECK-SD-NEXT: ret4229;4230; CHECK-GI-LABEL: test_v2i32_post_reg_ld2r:4231; CHECK-GI: ; %bb.0:4232; CHECK-GI-NEXT: ld2r.2s { v0, v1 }, [x0]4233; CHECK-GI-NEXT: add x8, x0, x2, lsl #24234; CHECK-GI-NEXT: str x8, [x1]4235; CHECK-GI-NEXT: ret4236 %ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2r.v2i32.p0(ptr %A)4237 %tmp = getelementptr i32, ptr %A, i64 %inc4238 store ptr %tmp, ptr %ptr4239 ret { <2 x i32>, <2 x i32> } %ld24240}4241 4242declare { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2r.v2i32.p0(ptr) nounwind readonly4243 4244 4245define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {4246; CHECK-SD-LABEL: test_v2i64_post_imm_ld2r:4247; CHECK-SD: ; %bb.0:4248; CHECK-SD-NEXT: ld2r.2d { v0, v1 }, [x0], #164249; CHECK-SD-NEXT: str x0, [x1]4250; CHECK-SD-NEXT: ret4251;4252; CHECK-GI-LABEL: test_v2i64_post_imm_ld2r:4253; CHECK-GI: ; %bb.0:4254; CHECK-GI-NEXT: ld2r.2d { v0, v1 }, [x0]4255; CHECK-GI-NEXT: add x8, x0, #164256; CHECK-GI-NEXT: str x8, [x1]4257; CHECK-GI-NEXT: ret4258 %ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr %A)4259 %tmp = getelementptr i64, ptr %A, i32 24260 store ptr %tmp, ptr %ptr4261 ret { <2 x i64>, <2 x i64> } %ld24262}4263 4264define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {4265; CHECK-SD-LABEL: test_v2i64_post_reg_ld2r:4266; CHECK-SD: ; %bb.0:4267; CHECK-SD-NEXT: lsl x8, x2, #34268; CHECK-SD-NEXT: ld2r.2d { v0, v1 }, [x0], x84269; CHECK-SD-NEXT: str x0, [x1]4270; CHECK-SD-NEXT: ret4271;4272; CHECK-GI-LABEL: test_v2i64_post_reg_ld2r:4273; CHECK-GI: ; %bb.0:4274; CHECK-GI-NEXT: ld2r.2d { v0, v1 }, [x0]4275; CHECK-GI-NEXT: add x8, x0, x2, lsl #34276; CHECK-GI-NEXT: str x8, [x1]4277; CHECK-GI-NEXT: ret4278 %ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr %A)4279 %tmp = getelementptr i64, ptr %A, i64 %inc4280 store ptr %tmp, ptr %ptr4281 ret { <2 x i64>, <2 x i64> } %ld24282}4283 4284declare { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr) nounwind readonly4285 4286define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {4287; CHECK-SD-LABEL: test_v1i64_post_imm_ld2r:4288; CHECK-SD: ; %bb.0:4289; CHECK-SD-NEXT: ld2r.1d { v0, v1 }, [x0], #164290; CHECK-SD-NEXT: str x0, [x1]4291; CHECK-SD-NEXT: ret4292;4293; CHECK-GI-LABEL: test_v1i64_post_imm_ld2r:4294; CHECK-GI: ; %bb.0:4295; CHECK-GI-NEXT: ld2r.1d { v0, v1 }, [x0]4296; CHECK-GI-NEXT: add x8, x0, #164297; CHECK-GI-NEXT: str x8, [x1]4298; CHECK-GI-NEXT: ret4299 %ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0(ptr %A)4300 %tmp = getelementptr i64, ptr %A, i32 24301 store ptr %tmp, ptr %ptr4302 ret { <1 x i64>, <1 x i64> } %ld24303}4304 4305define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {4306; CHECK-SD-LABEL: test_v1i64_post_reg_ld2r:4307; CHECK-SD: ; %bb.0:4308; CHECK-SD-NEXT: lsl x8, x2, #34309; CHECK-SD-NEXT: ld2r.1d { v0, v1 }, [x0], x84310; CHECK-SD-NEXT: str x0, [x1]4311; CHECK-SD-NEXT: ret4312;4313; CHECK-GI-LABEL: test_v1i64_post_reg_ld2r:4314; CHECK-GI: ; %bb.0:4315; CHECK-GI-NEXT: ld2r.1d { v0, v1 }, [x0]4316; CHECK-GI-NEXT: add x8, x0, x2, lsl #34317; CHECK-GI-NEXT: str x8, [x1]4318; CHECK-GI-NEXT: ret4319 %ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0(ptr %A)4320 %tmp = getelementptr i64, ptr %A, i64 %inc4321 store ptr %tmp, ptr %ptr4322 ret { <1 x i64>, <1 x i64> } %ld24323}4324 4325declare { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0(ptr) nounwind readonly4326 4327 4328define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {4329; CHECK-SD-LABEL: test_v4f32_post_imm_ld2r:4330; CHECK-SD: ; %bb.0:4331; CHECK-SD-NEXT: ld2r.4s { v0, v1 }, [x0], #84332; CHECK-SD-NEXT: str x0, [x1]4333; CHECK-SD-NEXT: ret4334;4335; CHECK-GI-LABEL: test_v4f32_post_imm_ld2r:4336; CHECK-GI: ; %bb.0:4337; CHECK-GI-NEXT: ld2r.4s { v0, v1 }, [x0]4338; CHECK-GI-NEXT: add x8, x0, #84339; CHECK-GI-NEXT: str x8, [x1]4340; CHECK-GI-NEXT: ret4341 %ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2r.v4f32.p0(ptr %A)4342 %tmp = getelementptr float, ptr %A, i32 24343 store ptr %tmp, ptr %ptr4344 ret { <4 x float>, <4 x float> } %ld24345}4346 4347define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {4348; CHECK-SD-LABEL: test_v4f32_post_reg_ld2r:4349; CHECK-SD: ; %bb.0:4350; CHECK-SD-NEXT: lsl x8, x2, #24351; CHECK-SD-NEXT: ld2r.4s { v0, v1 }, [x0], x84352; CHECK-SD-NEXT: str x0, [x1]4353; CHECK-SD-NEXT: ret4354;4355; CHECK-GI-LABEL: test_v4f32_post_reg_ld2r:4356; CHECK-GI: ; %bb.0:4357; CHECK-GI-NEXT: ld2r.4s { v0, v1 }, [x0]4358; CHECK-GI-NEXT: add x8, x0, x2, lsl #24359; CHECK-GI-NEXT: str x8, [x1]4360; CHECK-GI-NEXT: ret4361 %ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2r.v4f32.p0(ptr %A)4362 %tmp = getelementptr float, ptr %A, i64 %inc4363 store ptr %tmp, ptr %ptr4364 ret { <4 x float>, <4 x float> } %ld24365}4366 4367declare { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2r.v4f32.p0(ptr) nounwind readonly4368 4369define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {4370; CHECK-SD-LABEL: test_v2f32_post_imm_ld2r:4371; CHECK-SD: ; %bb.0:4372; CHECK-SD-NEXT: ld2r.2s { v0, v1 }, [x0], #84373; CHECK-SD-NEXT: str x0, [x1]4374; CHECK-SD-NEXT: ret4375;4376; CHECK-GI-LABEL: test_v2f32_post_imm_ld2r:4377; CHECK-GI: ; %bb.0:4378; CHECK-GI-NEXT: ld2r.2s { v0, v1 }, [x0]4379; CHECK-GI-NEXT: add x8, x0, #84380; CHECK-GI-NEXT: str x8, [x1]4381; CHECK-GI-NEXT: ret4382 %ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2r.v2f32.p0(ptr %A)4383 %tmp = getelementptr float, ptr %A, i32 24384 store ptr %tmp, ptr %ptr4385 ret { <2 x float>, <2 x float> } %ld24386}4387 4388define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {4389; CHECK-SD-LABEL: test_v2f32_post_reg_ld2r:4390; CHECK-SD: ; %bb.0:4391; CHECK-SD-NEXT: lsl x8, x2, #24392; CHECK-SD-NEXT: ld2r.2s { v0, v1 }, [x0], x84393; CHECK-SD-NEXT: str x0, [x1]4394; CHECK-SD-NEXT: ret4395;4396; CHECK-GI-LABEL: test_v2f32_post_reg_ld2r:4397; CHECK-GI: ; %bb.0:4398; CHECK-GI-NEXT: ld2r.2s { v0, v1 }, [x0]4399; CHECK-GI-NEXT: add x8, x0, x2, lsl #24400; CHECK-GI-NEXT: str x8, [x1]4401; CHECK-GI-NEXT: ret4402 %ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2r.v2f32.p0(ptr %A)4403 %tmp = getelementptr float, ptr %A, i64 %inc4404 store ptr %tmp, ptr %ptr4405 ret { <2 x float>, <2 x float> } %ld24406}4407 4408declare { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2r.v2f32.p0(ptr) nounwind readonly4409 4410 4411define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {4412; CHECK-SD-LABEL: test_v2f64_post_imm_ld2r:4413; CHECK-SD: ; %bb.0:4414; CHECK-SD-NEXT: ld2r.2d { v0, v1 }, [x0], #164415; CHECK-SD-NEXT: str x0, [x1]4416; CHECK-SD-NEXT: ret4417;4418; CHECK-GI-LABEL: test_v2f64_post_imm_ld2r:4419; CHECK-GI: ; %bb.0:4420; CHECK-GI-NEXT: ld2r.2d { v0, v1 }, [x0]4421; CHECK-GI-NEXT: add x8, x0, #164422; CHECK-GI-NEXT: str x8, [x1]4423; CHECK-GI-NEXT: ret4424 %ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0(ptr %A)4425 %tmp = getelementptr double, ptr %A, i32 24426 store ptr %tmp, ptr %ptr4427 ret { <2 x double>, <2 x double> } %ld24428}4429 4430define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {4431; CHECK-SD-LABEL: test_v2f64_post_reg_ld2r:4432; CHECK-SD: ; %bb.0:4433; CHECK-SD-NEXT: lsl x8, x2, #34434; CHECK-SD-NEXT: ld2r.2d { v0, v1 }, [x0], x84435; CHECK-SD-NEXT: str x0, [x1]4436; CHECK-SD-NEXT: ret4437;4438; CHECK-GI-LABEL: test_v2f64_post_reg_ld2r:4439; CHECK-GI: ; %bb.0:4440; CHECK-GI-NEXT: ld2r.2d { v0, v1 }, [x0]4441; CHECK-GI-NEXT: add x8, x0, x2, lsl #34442; CHECK-GI-NEXT: str x8, [x1]4443; CHECK-GI-NEXT: ret4444 %ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0(ptr %A)4445 %tmp = getelementptr double, ptr %A, i64 %inc4446 store ptr %tmp, ptr %ptr4447 ret { <2 x double>, <2 x double> } %ld24448}4449 4450declare { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0(ptr) nounwind readonly4451 4452define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {4453; CHECK-SD-LABEL: test_v1f64_post_imm_ld2r:4454; CHECK-SD: ; %bb.0:4455; CHECK-SD-NEXT: ld2r.1d { v0, v1 }, [x0], #164456; CHECK-SD-NEXT: str x0, [x1]4457; CHECK-SD-NEXT: ret4458;4459; CHECK-GI-LABEL: test_v1f64_post_imm_ld2r:4460; CHECK-GI: ; %bb.0:4461; CHECK-GI-NEXT: ld2r.1d { v0, v1 }, [x0]4462; CHECK-GI-NEXT: add x8, x0, #164463; CHECK-GI-NEXT: str x8, [x1]4464; CHECK-GI-NEXT: ret4465 %ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0(ptr %A)4466 %tmp = getelementptr double, ptr %A, i32 24467 store ptr %tmp, ptr %ptr4468 ret { <1 x double>, <1 x double> } %ld24469}4470 4471define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {4472; CHECK-SD-LABEL: test_v1f64_post_reg_ld2r:4473; CHECK-SD: ; %bb.0:4474; CHECK-SD-NEXT: lsl x8, x2, #34475; CHECK-SD-NEXT: ld2r.1d { v0, v1 }, [x0], x84476; CHECK-SD-NEXT: str x0, [x1]4477; CHECK-SD-NEXT: ret4478;4479; CHECK-GI-LABEL: test_v1f64_post_reg_ld2r:4480; CHECK-GI: ; %bb.0:4481; CHECK-GI-NEXT: ld2r.1d { v0, v1 }, [x0]4482; CHECK-GI-NEXT: add x8, x0, x2, lsl #34483; CHECK-GI-NEXT: str x8, [x1]4484; CHECK-GI-NEXT: ret4485 %ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0(ptr %A)4486 %tmp = getelementptr double, ptr %A, i64 %inc4487 store ptr %tmp, ptr %ptr4488 ret { <1 x double>, <1 x double> } %ld24489}4490 4491declare { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0(ptr) nounwind readonly4492 4493 4494define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {4495; CHECK-SD-LABEL: test_v16i8_post_imm_ld3r:4496; CHECK-SD: ; %bb.0:4497; CHECK-SD-NEXT: ld3r.16b { v0, v1, v2 }, [x0], #34498; CHECK-SD-NEXT: str x0, [x1]4499; CHECK-SD-NEXT: ret4500;4501; CHECK-GI-LABEL: test_v16i8_post_imm_ld3r:4502; CHECK-GI: ; %bb.0:4503; CHECK-GI-NEXT: ld3r.16b { v0, v1, v2 }, [x0]4504; CHECK-GI-NEXT: add x8, x0, #34505; CHECK-GI-NEXT: str x8, [x1]4506; CHECK-GI-NEXT: ret4507 %ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3r.v16i8.p0(ptr %A)4508 %tmp = getelementptr i8, ptr %A, i32 34509 store ptr %tmp, ptr %ptr4510 ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld34511}4512 4513define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {4514; CHECK-SD-LABEL: test_v16i8_post_reg_ld3r:4515; CHECK-SD: ; %bb.0:4516; CHECK-SD-NEXT: ld3r.16b { v0, v1, v2 }, [x0], x24517; CHECK-SD-NEXT: str x0, [x1]4518; CHECK-SD-NEXT: ret4519;4520; CHECK-GI-LABEL: test_v16i8_post_reg_ld3r:4521; CHECK-GI: ; %bb.0:4522; CHECK-GI-NEXT: ld3r.16b { v0, v1, v2 }, [x0]4523; CHECK-GI-NEXT: add x8, x0, x24524; CHECK-GI-NEXT: str x8, [x1]4525; CHECK-GI-NEXT: ret4526 %ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3r.v16i8.p0(ptr %A)4527 %tmp = getelementptr i8, ptr %A, i64 %inc4528 store ptr %tmp, ptr %ptr4529 ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld34530}4531 4532declare { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3r.v16i8.p0(ptr) nounwind readonly4533 4534 4535define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {4536; CHECK-SD-LABEL: test_v8i8_post_imm_ld3r:4537; CHECK-SD: ; %bb.0:4538; CHECK-SD-NEXT: ld3r.8b { v0, v1, v2 }, [x0], #34539; CHECK-SD-NEXT: str x0, [x1]4540; CHECK-SD-NEXT: ret4541;4542; CHECK-GI-LABEL: test_v8i8_post_imm_ld3r:4543; CHECK-GI: ; %bb.0:4544; CHECK-GI-NEXT: ld3r.8b { v0, v1, v2 }, [x0]4545; CHECK-GI-NEXT: add x8, x0, #34546; CHECK-GI-NEXT: str x8, [x1]4547; CHECK-GI-NEXT: ret4548 %ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3r.v8i8.p0(ptr %A)4549 %tmp = getelementptr i8, ptr %A, i32 34550 store ptr %tmp, ptr %ptr4551 ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld34552}4553 4554define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {4555; CHECK-SD-LABEL: test_v8i8_post_reg_ld3r:4556; CHECK-SD: ; %bb.0:4557; CHECK-SD-NEXT: ld3r.8b { v0, v1, v2 }, [x0], x24558; CHECK-SD-NEXT: str x0, [x1]4559; CHECK-SD-NEXT: ret4560;4561; CHECK-GI-LABEL: test_v8i8_post_reg_ld3r:4562; CHECK-GI: ; %bb.0:4563; CHECK-GI-NEXT: ld3r.8b { v0, v1, v2 }, [x0]4564; CHECK-GI-NEXT: add x8, x0, x24565; CHECK-GI-NEXT: str x8, [x1]4566; CHECK-GI-NEXT: ret4567 %ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3r.v8i8.p0(ptr %A)4568 %tmp = getelementptr i8, ptr %A, i64 %inc4569 store ptr %tmp, ptr %ptr4570 ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld34571}4572 4573declare { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3r.v8i8.p0(ptr) nounwind readonly4574 4575 4576define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {4577; CHECK-SD-LABEL: test_v8i16_post_imm_ld3r:4578; CHECK-SD: ; %bb.0:4579; CHECK-SD-NEXT: ld3r.8h { v0, v1, v2 }, [x0], #64580; CHECK-SD-NEXT: str x0, [x1]4581; CHECK-SD-NEXT: ret4582;4583; CHECK-GI-LABEL: test_v8i16_post_imm_ld3r:4584; CHECK-GI: ; %bb.0:4585; CHECK-GI-NEXT: ld3r.8h { v0, v1, v2 }, [x0]4586; CHECK-GI-NEXT: add x8, x0, #64587; CHECK-GI-NEXT: str x8, [x1]4588; CHECK-GI-NEXT: ret4589 %ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3r.v8i16.p0(ptr %A)4590 %tmp = getelementptr i16, ptr %A, i32 34591 store ptr %tmp, ptr %ptr4592 ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld34593}4594 4595define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {4596; CHECK-SD-LABEL: test_v8i16_post_reg_ld3r:4597; CHECK-SD: ; %bb.0:4598; CHECK-SD-NEXT: lsl x8, x2, #14599; CHECK-SD-NEXT: ld3r.8h { v0, v1, v2 }, [x0], x84600; CHECK-SD-NEXT: str x0, [x1]4601; CHECK-SD-NEXT: ret4602;4603; CHECK-GI-LABEL: test_v8i16_post_reg_ld3r:4604; CHECK-GI: ; %bb.0:4605; CHECK-GI-NEXT: ld3r.8h { v0, v1, v2 }, [x0]4606; CHECK-GI-NEXT: add x8, x0, x2, lsl #14607; CHECK-GI-NEXT: str x8, [x1]4608; CHECK-GI-NEXT: ret4609 %ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3r.v8i16.p0(ptr %A)4610 %tmp = getelementptr i16, ptr %A, i64 %inc4611 store ptr %tmp, ptr %ptr4612 ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld34613}4614 4615declare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3r.v8i16.p0(ptr) nounwind readonly4616 4617 4618define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {4619; CHECK-SD-LABEL: test_v4i16_post_imm_ld3r:4620; CHECK-SD: ; %bb.0:4621; CHECK-SD-NEXT: ld3r.4h { v0, v1, v2 }, [x0], #64622; CHECK-SD-NEXT: str x0, [x1]4623; CHECK-SD-NEXT: ret4624;4625; CHECK-GI-LABEL: test_v4i16_post_imm_ld3r:4626; CHECK-GI: ; %bb.0:4627; CHECK-GI-NEXT: ld3r.4h { v0, v1, v2 }, [x0]4628; CHECK-GI-NEXT: add x8, x0, #64629; CHECK-GI-NEXT: str x8, [x1]4630; CHECK-GI-NEXT: ret4631 %ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3r.v4i16.p0(ptr %A)4632 %tmp = getelementptr i16, ptr %A, i32 34633 store ptr %tmp, ptr %ptr4634 ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld34635}4636 4637define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {4638; CHECK-SD-LABEL: test_v4i16_post_reg_ld3r:4639; CHECK-SD: ; %bb.0:4640; CHECK-SD-NEXT: lsl x8, x2, #14641; CHECK-SD-NEXT: ld3r.4h { v0, v1, v2 }, [x0], x84642; CHECK-SD-NEXT: str x0, [x1]4643; CHECK-SD-NEXT: ret4644;4645; CHECK-GI-LABEL: test_v4i16_post_reg_ld3r:4646; CHECK-GI: ; %bb.0:4647; CHECK-GI-NEXT: ld3r.4h { v0, v1, v2 }, [x0]4648; CHECK-GI-NEXT: add x8, x0, x2, lsl #14649; CHECK-GI-NEXT: str x8, [x1]4650; CHECK-GI-NEXT: ret4651 %ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3r.v4i16.p0(ptr %A)4652 %tmp = getelementptr i16, ptr %A, i64 %inc4653 store ptr %tmp, ptr %ptr4654 ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld34655}4656 4657declare { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3r.v4i16.p0(ptr) nounwind readonly4658 4659 4660define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {4661; CHECK-SD-LABEL: test_v4i32_post_imm_ld3r:4662; CHECK-SD: ; %bb.0:4663; CHECK-SD-NEXT: ld3r.4s { v0, v1, v2 }, [x0], #124664; CHECK-SD-NEXT: str x0, [x1]4665; CHECK-SD-NEXT: ret4666;4667; CHECK-GI-LABEL: test_v4i32_post_imm_ld3r:4668; CHECK-GI: ; %bb.0:4669; CHECK-GI-NEXT: ld3r.4s { v0, v1, v2 }, [x0]4670; CHECK-GI-NEXT: add x8, x0, #124671; CHECK-GI-NEXT: str x8, [x1]4672; CHECK-GI-NEXT: ret4673 %ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3r.v4i32.p0(ptr %A)4674 %tmp = getelementptr i32, ptr %A, i32 34675 store ptr %tmp, ptr %ptr4676 ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld34677}4678 4679define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {4680; CHECK-SD-LABEL: test_v4i32_post_reg_ld3r:4681; CHECK-SD: ; %bb.0:4682; CHECK-SD-NEXT: lsl x8, x2, #24683; CHECK-SD-NEXT: ld3r.4s { v0, v1, v2 }, [x0], x84684; CHECK-SD-NEXT: str x0, [x1]4685; CHECK-SD-NEXT: ret4686;4687; CHECK-GI-LABEL: test_v4i32_post_reg_ld3r:4688; CHECK-GI: ; %bb.0:4689; CHECK-GI-NEXT: ld3r.4s { v0, v1, v2 }, [x0]4690; CHECK-GI-NEXT: add x8, x0, x2, lsl #24691; CHECK-GI-NEXT: str x8, [x1]4692; CHECK-GI-NEXT: ret4693 %ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3r.v4i32.p0(ptr %A)4694 %tmp = getelementptr i32, ptr %A, i64 %inc4695 store ptr %tmp, ptr %ptr4696 ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld34697}4698 4699declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3r.v4i32.p0(ptr) nounwind readonly4700 4701define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {4702; CHECK-SD-LABEL: test_v2i32_post_imm_ld3r:4703; CHECK-SD: ; %bb.0:4704; CHECK-SD-NEXT: ld3r.2s { v0, v1, v2 }, [x0], #124705; CHECK-SD-NEXT: str x0, [x1]4706; CHECK-SD-NEXT: ret4707;4708; CHECK-GI-LABEL: test_v2i32_post_imm_ld3r:4709; CHECK-GI: ; %bb.0:4710; CHECK-GI-NEXT: ld3r.2s { v0, v1, v2 }, [x0]4711; CHECK-GI-NEXT: add x8, x0, #124712; CHECK-GI-NEXT: str x8, [x1]4713; CHECK-GI-NEXT: ret4714 %ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3r.v2i32.p0(ptr %A)4715 %tmp = getelementptr i32, ptr %A, i32 34716 store ptr %tmp, ptr %ptr4717 ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld34718}4719 4720define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {4721; CHECK-SD-LABEL: test_v2i32_post_reg_ld3r:4722; CHECK-SD: ; %bb.0:4723; CHECK-SD-NEXT: lsl x8, x2, #24724; CHECK-SD-NEXT: ld3r.2s { v0, v1, v2 }, [x0], x84725; CHECK-SD-NEXT: str x0, [x1]4726; CHECK-SD-NEXT: ret4727;4728; CHECK-GI-LABEL: test_v2i32_post_reg_ld3r:4729; CHECK-GI: ; %bb.0:4730; CHECK-GI-NEXT: ld3r.2s { v0, v1, v2 }, [x0]4731; CHECK-GI-NEXT: add x8, x0, x2, lsl #24732; CHECK-GI-NEXT: str x8, [x1]4733; CHECK-GI-NEXT: ret4734 %ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3r.v2i32.p0(ptr %A)4735 %tmp = getelementptr i32, ptr %A, i64 %inc4736 store ptr %tmp, ptr %ptr4737 ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld34738}4739 4740declare { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3r.v2i32.p0(ptr) nounwind readonly4741 4742 4743define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {4744; CHECK-SD-LABEL: test_v2i64_post_imm_ld3r:4745; CHECK-SD: ; %bb.0:4746; CHECK-SD-NEXT: ld3r.2d { v0, v1, v2 }, [x0], #244747; CHECK-SD-NEXT: str x0, [x1]4748; CHECK-SD-NEXT: ret4749;4750; CHECK-GI-LABEL: test_v2i64_post_imm_ld3r:4751; CHECK-GI: ; %bb.0:4752; CHECK-GI-NEXT: ld3r.2d { v0, v1, v2 }, [x0]4753; CHECK-GI-NEXT: add x8, x0, #244754; CHECK-GI-NEXT: str x8, [x1]4755; CHECK-GI-NEXT: ret4756 %ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr %A)4757 %tmp = getelementptr i64, ptr %A, i32 34758 store ptr %tmp, ptr %ptr4759 ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld34760}4761 4762define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {4763; CHECK-SD-LABEL: test_v2i64_post_reg_ld3r:4764; CHECK-SD: ; %bb.0:4765; CHECK-SD-NEXT: lsl x8, x2, #34766; CHECK-SD-NEXT: ld3r.2d { v0, v1, v2 }, [x0], x84767; CHECK-SD-NEXT: str x0, [x1]4768; CHECK-SD-NEXT: ret4769;4770; CHECK-GI-LABEL: test_v2i64_post_reg_ld3r:4771; CHECK-GI: ; %bb.0:4772; CHECK-GI-NEXT: ld3r.2d { v0, v1, v2 }, [x0]4773; CHECK-GI-NEXT: add x8, x0, x2, lsl #34774; CHECK-GI-NEXT: str x8, [x1]4775; CHECK-GI-NEXT: ret4776 %ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr %A)4777 %tmp = getelementptr i64, ptr %A, i64 %inc4778 store ptr %tmp, ptr %ptr4779 ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld34780}4781 4782declare { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr) nounwind readonly4783 4784define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {4785; CHECK-SD-LABEL: test_v1i64_post_imm_ld3r:4786; CHECK-SD: ; %bb.0:4787; CHECK-SD-NEXT: ld3r.1d { v0, v1, v2 }, [x0], #244788; CHECK-SD-NEXT: str x0, [x1]4789; CHECK-SD-NEXT: ret4790;4791; CHECK-GI-LABEL: test_v1i64_post_imm_ld3r:4792; CHECK-GI: ; %bb.0:4793; CHECK-GI-NEXT: ld3r.1d { v0, v1, v2 }, [x0]4794; CHECK-GI-NEXT: add x8, x0, #244795; CHECK-GI-NEXT: str x8, [x1]4796; CHECK-GI-NEXT: ret4797 %ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0(ptr %A)4798 %tmp = getelementptr i64, ptr %A, i32 34799 store ptr %tmp, ptr %ptr4800 ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld34801}4802 4803define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {4804; CHECK-SD-LABEL: test_v1i64_post_reg_ld3r:4805; CHECK-SD: ; %bb.0:4806; CHECK-SD-NEXT: lsl x8, x2, #34807; CHECK-SD-NEXT: ld3r.1d { v0, v1, v2 }, [x0], x84808; CHECK-SD-NEXT: str x0, [x1]4809; CHECK-SD-NEXT: ret4810;4811; CHECK-GI-LABEL: test_v1i64_post_reg_ld3r:4812; CHECK-GI: ; %bb.0:4813; CHECK-GI-NEXT: ld3r.1d { v0, v1, v2 }, [x0]4814; CHECK-GI-NEXT: add x8, x0, x2, lsl #34815; CHECK-GI-NEXT: str x8, [x1]4816; CHECK-GI-NEXT: ret4817 %ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0(ptr %A)4818 %tmp = getelementptr i64, ptr %A, i64 %inc4819 store ptr %tmp, ptr %ptr4820 ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld34821}4822 4823declare { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0(ptr) nounwind readonly4824 4825 4826define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {4827; CHECK-SD-LABEL: test_v4f32_post_imm_ld3r:4828; CHECK-SD: ; %bb.0:4829; CHECK-SD-NEXT: ld3r.4s { v0, v1, v2 }, [x0], #124830; CHECK-SD-NEXT: str x0, [x1]4831; CHECK-SD-NEXT: ret4832;4833; CHECK-GI-LABEL: test_v4f32_post_imm_ld3r:4834; CHECK-GI: ; %bb.0:4835; CHECK-GI-NEXT: ld3r.4s { v0, v1, v2 }, [x0]4836; CHECK-GI-NEXT: add x8, x0, #124837; CHECK-GI-NEXT: str x8, [x1]4838; CHECK-GI-NEXT: ret4839 %ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3r.v4f32.p0(ptr %A)4840 %tmp = getelementptr float, ptr %A, i32 34841 store ptr %tmp, ptr %ptr4842 ret { <4 x float>, <4 x float>, <4 x float> } %ld34843}4844 4845define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {4846; CHECK-SD-LABEL: test_v4f32_post_reg_ld3r:4847; CHECK-SD: ; %bb.0:4848; CHECK-SD-NEXT: lsl x8, x2, #24849; CHECK-SD-NEXT: ld3r.4s { v0, v1, v2 }, [x0], x84850; CHECK-SD-NEXT: str x0, [x1]4851; CHECK-SD-NEXT: ret4852;4853; CHECK-GI-LABEL: test_v4f32_post_reg_ld3r:4854; CHECK-GI: ; %bb.0:4855; CHECK-GI-NEXT: ld3r.4s { v0, v1, v2 }, [x0]4856; CHECK-GI-NEXT: add x8, x0, x2, lsl #24857; CHECK-GI-NEXT: str x8, [x1]4858; CHECK-GI-NEXT: ret4859 %ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3r.v4f32.p0(ptr %A)4860 %tmp = getelementptr float, ptr %A, i64 %inc4861 store ptr %tmp, ptr %ptr4862 ret { <4 x float>, <4 x float>, <4 x float> } %ld34863}4864 4865declare { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3r.v4f32.p0(ptr) nounwind readonly4866 4867define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {4868; CHECK-SD-LABEL: test_v2f32_post_imm_ld3r:4869; CHECK-SD: ; %bb.0:4870; CHECK-SD-NEXT: ld3r.2s { v0, v1, v2 }, [x0], #124871; CHECK-SD-NEXT: str x0, [x1]4872; CHECK-SD-NEXT: ret4873;4874; CHECK-GI-LABEL: test_v2f32_post_imm_ld3r:4875; CHECK-GI: ; %bb.0:4876; CHECK-GI-NEXT: ld3r.2s { v0, v1, v2 }, [x0]4877; CHECK-GI-NEXT: add x8, x0, #124878; CHECK-GI-NEXT: str x8, [x1]4879; CHECK-GI-NEXT: ret4880 %ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3r.v2f32.p0(ptr %A)4881 %tmp = getelementptr float, ptr %A, i32 34882 store ptr %tmp, ptr %ptr4883 ret { <2 x float>, <2 x float>, <2 x float> } %ld34884}4885 4886define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {4887; CHECK-SD-LABEL: test_v2f32_post_reg_ld3r:4888; CHECK-SD: ; %bb.0:4889; CHECK-SD-NEXT: lsl x8, x2, #24890; CHECK-SD-NEXT: ld3r.2s { v0, v1, v2 }, [x0], x84891; CHECK-SD-NEXT: str x0, [x1]4892; CHECK-SD-NEXT: ret4893;4894; CHECK-GI-LABEL: test_v2f32_post_reg_ld3r:4895; CHECK-GI: ; %bb.0:4896; CHECK-GI-NEXT: ld3r.2s { v0, v1, v2 }, [x0]4897; CHECK-GI-NEXT: add x8, x0, x2, lsl #24898; CHECK-GI-NEXT: str x8, [x1]4899; CHECK-GI-NEXT: ret4900 %ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3r.v2f32.p0(ptr %A)4901 %tmp = getelementptr float, ptr %A, i64 %inc4902 store ptr %tmp, ptr %ptr4903 ret { <2 x float>, <2 x float>, <2 x float> } %ld34904}4905 4906declare { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3r.v2f32.p0(ptr) nounwind readonly4907 4908 4909define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {4910; CHECK-SD-LABEL: test_v2f64_post_imm_ld3r:4911; CHECK-SD: ; %bb.0:4912; CHECK-SD-NEXT: ld3r.2d { v0, v1, v2 }, [x0], #244913; CHECK-SD-NEXT: str x0, [x1]4914; CHECK-SD-NEXT: ret4915;4916; CHECK-GI-LABEL: test_v2f64_post_imm_ld3r:4917; CHECK-GI: ; %bb.0:4918; CHECK-GI-NEXT: ld3r.2d { v0, v1, v2 }, [x0]4919; CHECK-GI-NEXT: add x8, x0, #244920; CHECK-GI-NEXT: str x8, [x1]4921; CHECK-GI-NEXT: ret4922 %ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0(ptr %A)4923 %tmp = getelementptr double, ptr %A, i32 34924 store ptr %tmp, ptr %ptr4925 ret { <2 x double>, <2 x double>, <2 x double> } %ld34926}4927 4928define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {4929; CHECK-SD-LABEL: test_v2f64_post_reg_ld3r:4930; CHECK-SD: ; %bb.0:4931; CHECK-SD-NEXT: lsl x8, x2, #34932; CHECK-SD-NEXT: ld3r.2d { v0, v1, v2 }, [x0], x84933; CHECK-SD-NEXT: str x0, [x1]4934; CHECK-SD-NEXT: ret4935;4936; CHECK-GI-LABEL: test_v2f64_post_reg_ld3r:4937; CHECK-GI: ; %bb.0:4938; CHECK-GI-NEXT: ld3r.2d { v0, v1, v2 }, [x0]4939; CHECK-GI-NEXT: add x8, x0, x2, lsl #34940; CHECK-GI-NEXT: str x8, [x1]4941; CHECK-GI-NEXT: ret4942 %ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0(ptr %A)4943 %tmp = getelementptr double, ptr %A, i64 %inc4944 store ptr %tmp, ptr %ptr4945 ret { <2 x double>, <2 x double>, <2 x double> } %ld34946}4947 4948declare { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0(ptr) nounwind readonly4949 4950define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {4951; CHECK-SD-LABEL: test_v1f64_post_imm_ld3r:4952; CHECK-SD: ; %bb.0:4953; CHECK-SD-NEXT: ld3r.1d { v0, v1, v2 }, [x0], #244954; CHECK-SD-NEXT: str x0, [x1]4955; CHECK-SD-NEXT: ret4956;4957; CHECK-GI-LABEL: test_v1f64_post_imm_ld3r:4958; CHECK-GI: ; %bb.0:4959; CHECK-GI-NEXT: ld3r.1d { v0, v1, v2 }, [x0]4960; CHECK-GI-NEXT: add x8, x0, #244961; CHECK-GI-NEXT: str x8, [x1]4962; CHECK-GI-NEXT: ret4963 %ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f64.p0(ptr %A)4964 %tmp = getelementptr double, ptr %A, i32 34965 store ptr %tmp, ptr %ptr4966 ret { <1 x double>, <1 x double>, <1 x double> } %ld34967}4968 4969define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {4970; CHECK-SD-LABEL: test_v1f64_post_reg_ld3r:4971; CHECK-SD: ; %bb.0:4972; CHECK-SD-NEXT: lsl x8, x2, #34973; CHECK-SD-NEXT: ld3r.1d { v0, v1, v2 }, [x0], x84974; CHECK-SD-NEXT: str x0, [x1]4975; CHECK-SD-NEXT: ret4976;4977; CHECK-GI-LABEL: test_v1f64_post_reg_ld3r:4978; CHECK-GI: ; %bb.0:4979; CHECK-GI-NEXT: ld3r.1d { v0, v1, v2 }, [x0]4980; CHECK-GI-NEXT: add x8, x0, x2, lsl #34981; CHECK-GI-NEXT: str x8, [x1]4982; CHECK-GI-NEXT: ret4983 %ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f64.p0(ptr %A)4984 %tmp = getelementptr double, ptr %A, i64 %inc4985 store ptr %tmp, ptr %ptr4986 ret { <1 x double>, <1 x double>, <1 x double> } %ld34987}4988 4989declare { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f64.p0(ptr) nounwind readonly4990 4991 4992define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {4993; CHECK-SD-LABEL: test_v16i8_post_imm_ld4r:4994; CHECK-SD: ; %bb.0:4995; CHECK-SD-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0], #44996; CHECK-SD-NEXT: str x0, [x1]4997; CHECK-SD-NEXT: ret4998;4999; CHECK-GI-LABEL: test_v16i8_post_imm_ld4r:5000; CHECK-GI: ; %bb.0:5001; CHECK-GI-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0]5002; CHECK-GI-NEXT: add x8, x0, #45003; CHECK-GI-NEXT: str x8, [x1]5004; CHECK-GI-NEXT: ret5005 %ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4r.v16i8.p0(ptr %A)5006 %tmp = getelementptr i8, ptr %A, i32 45007 store ptr %tmp, ptr %ptr5008 ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld45009}5010 5011define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {5012; CHECK-SD-LABEL: test_v16i8_post_reg_ld4r:5013; CHECK-SD: ; %bb.0:5014; CHECK-SD-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0], x25015; CHECK-SD-NEXT: str x0, [x1]5016; CHECK-SD-NEXT: ret5017;5018; CHECK-GI-LABEL: test_v16i8_post_reg_ld4r:5019; CHECK-GI: ; %bb.0:5020; CHECK-GI-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0]5021; CHECK-GI-NEXT: add x8, x0, x25022; CHECK-GI-NEXT: str x8, [x1]5023; CHECK-GI-NEXT: ret5024 %ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4r.v16i8.p0(ptr %A)5025 %tmp = getelementptr i8, ptr %A, i64 %inc5026 store ptr %tmp, ptr %ptr5027 ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld45028}5029 5030declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4r.v16i8.p0(ptr) nounwind readonly5031 5032 5033define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {5034; CHECK-SD-LABEL: test_v8i8_post_imm_ld4r:5035; CHECK-SD: ; %bb.0:5036; CHECK-SD-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0], #45037; CHECK-SD-NEXT: str x0, [x1]5038; CHECK-SD-NEXT: ret5039;5040; CHECK-GI-LABEL: test_v8i8_post_imm_ld4r:5041; CHECK-GI: ; %bb.0:5042; CHECK-GI-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0]5043; CHECK-GI-NEXT: add x8, x0, #45044; CHECK-GI-NEXT: str x8, [x1]5045; CHECK-GI-NEXT: ret5046 %ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4r.v8i8.p0(ptr %A)5047 %tmp = getelementptr i8, ptr %A, i32 45048 store ptr %tmp, ptr %ptr5049 ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld45050}5051 5052define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {5053; CHECK-SD-LABEL: test_v8i8_post_reg_ld4r:5054; CHECK-SD: ; %bb.0:5055; CHECK-SD-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0], x25056; CHECK-SD-NEXT: str x0, [x1]5057; CHECK-SD-NEXT: ret5058;5059; CHECK-GI-LABEL: test_v8i8_post_reg_ld4r:5060; CHECK-GI: ; %bb.0:5061; CHECK-GI-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0]5062; CHECK-GI-NEXT: add x8, x0, x25063; CHECK-GI-NEXT: str x8, [x1]5064; CHECK-GI-NEXT: ret5065 %ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4r.v8i8.p0(ptr %A)5066 %tmp = getelementptr i8, ptr %A, i64 %inc5067 store ptr %tmp, ptr %ptr5068 ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld45069}5070 5071declare { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4r.v8i8.p0(ptr) nounwind readonly5072 5073 5074define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {5075; CHECK-SD-LABEL: test_v8i16_post_imm_ld4r:5076; CHECK-SD: ; %bb.0:5077; CHECK-SD-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0], #85078; CHECK-SD-NEXT: str x0, [x1]5079; CHECK-SD-NEXT: ret5080;5081; CHECK-GI-LABEL: test_v8i16_post_imm_ld4r:5082; CHECK-GI: ; %bb.0:5083; CHECK-GI-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0]5084; CHECK-GI-NEXT: add x8, x0, #85085; CHECK-GI-NEXT: str x8, [x1]5086; CHECK-GI-NEXT: ret5087 %ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4r.v8i16.p0(ptr %A)5088 %tmp = getelementptr i16, ptr %A, i32 45089 store ptr %tmp, ptr %ptr5090 ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld45091}5092 5093define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {5094; CHECK-SD-LABEL: test_v8i16_post_reg_ld4r:5095; CHECK-SD: ; %bb.0:5096; CHECK-SD-NEXT: lsl x8, x2, #15097; CHECK-SD-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0], x85098; CHECK-SD-NEXT: str x0, [x1]5099; CHECK-SD-NEXT: ret5100;5101; CHECK-GI-LABEL: test_v8i16_post_reg_ld4r:5102; CHECK-GI: ; %bb.0:5103; CHECK-GI-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0]5104; CHECK-GI-NEXT: add x8, x0, x2, lsl #15105; CHECK-GI-NEXT: str x8, [x1]5106; CHECK-GI-NEXT: ret5107 %ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4r.v8i16.p0(ptr %A)5108 %tmp = getelementptr i16, ptr %A, i64 %inc5109 store ptr %tmp, ptr %ptr5110 ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld45111}5112 5113declare { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4r.v8i16.p0(ptr) nounwind readonly5114 5115 5116define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {5117; CHECK-SD-LABEL: test_v4i16_post_imm_ld4r:5118; CHECK-SD: ; %bb.0:5119; CHECK-SD-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0], #85120; CHECK-SD-NEXT: str x0, [x1]5121; CHECK-SD-NEXT: ret5122;5123; CHECK-GI-LABEL: test_v4i16_post_imm_ld4r:5124; CHECK-GI: ; %bb.0:5125; CHECK-GI-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0]5126; CHECK-GI-NEXT: add x8, x0, #85127; CHECK-GI-NEXT: str x8, [x1]5128; CHECK-GI-NEXT: ret5129 %ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4r.v4i16.p0(ptr %A)5130 %tmp = getelementptr i16, ptr %A, i32 45131 store ptr %tmp, ptr %ptr5132 ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld45133}5134 5135define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {5136; CHECK-SD-LABEL: test_v4i16_post_reg_ld4r:5137; CHECK-SD: ; %bb.0:5138; CHECK-SD-NEXT: lsl x8, x2, #15139; CHECK-SD-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0], x85140; CHECK-SD-NEXT: str x0, [x1]5141; CHECK-SD-NEXT: ret5142;5143; CHECK-GI-LABEL: test_v4i16_post_reg_ld4r:5144; CHECK-GI: ; %bb.0:5145; CHECK-GI-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0]5146; CHECK-GI-NEXT: add x8, x0, x2, lsl #15147; CHECK-GI-NEXT: str x8, [x1]5148; CHECK-GI-NEXT: ret5149 %ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4r.v4i16.p0(ptr %A)5150 %tmp = getelementptr i16, ptr %A, i64 %inc5151 store ptr %tmp, ptr %ptr5152 ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld45153}5154 5155declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4r.v4i16.p0(ptr) nounwind readonly5156 5157 5158define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {5159; CHECK-SD-LABEL: test_v4i32_post_imm_ld4r:5160; CHECK-SD: ; %bb.0:5161; CHECK-SD-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], #165162; CHECK-SD-NEXT: str x0, [x1]5163; CHECK-SD-NEXT: ret5164;5165; CHECK-GI-LABEL: test_v4i32_post_imm_ld4r:5166; CHECK-GI: ; %bb.0:5167; CHECK-GI-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0]5168; CHECK-GI-NEXT: add x8, x0, #165169; CHECK-GI-NEXT: str x8, [x1]5170; CHECK-GI-NEXT: ret5171 %ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4r.v4i32.p0(ptr %A)5172 %tmp = getelementptr i32, ptr %A, i32 45173 store ptr %tmp, ptr %ptr5174 ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld45175}5176 5177define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {5178; CHECK-SD-LABEL: test_v4i32_post_reg_ld4r:5179; CHECK-SD: ; %bb.0:5180; CHECK-SD-NEXT: lsl x8, x2, #25181; CHECK-SD-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], x85182; CHECK-SD-NEXT: str x0, [x1]5183; CHECK-SD-NEXT: ret5184;5185; CHECK-GI-LABEL: test_v4i32_post_reg_ld4r:5186; CHECK-GI: ; %bb.0:5187; CHECK-GI-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0]5188; CHECK-GI-NEXT: add x8, x0, x2, lsl #25189; CHECK-GI-NEXT: str x8, [x1]5190; CHECK-GI-NEXT: ret5191 %ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4r.v4i32.p0(ptr %A)5192 %tmp = getelementptr i32, ptr %A, i64 %inc5193 store ptr %tmp, ptr %ptr5194 ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld45195}5196 5197declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4r.v4i32.p0(ptr) nounwind readonly5198 5199define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {5200; CHECK-SD-LABEL: test_v2i32_post_imm_ld4r:5201; CHECK-SD: ; %bb.0:5202; CHECK-SD-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], #165203; CHECK-SD-NEXT: str x0, [x1]5204; CHECK-SD-NEXT: ret5205;5206; CHECK-GI-LABEL: test_v2i32_post_imm_ld4r:5207; CHECK-GI: ; %bb.0:5208; CHECK-GI-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0]5209; CHECK-GI-NEXT: add x8, x0, #165210; CHECK-GI-NEXT: str x8, [x1]5211; CHECK-GI-NEXT: ret5212 %ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4r.v2i32.p0(ptr %A)5213 %tmp = getelementptr i32, ptr %A, i32 45214 store ptr %tmp, ptr %ptr5215 ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld45216}5217 5218define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {5219; CHECK-SD-LABEL: test_v2i32_post_reg_ld4r:5220; CHECK-SD: ; %bb.0:5221; CHECK-SD-NEXT: lsl x8, x2, #25222; CHECK-SD-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], x85223; CHECK-SD-NEXT: str x0, [x1]5224; CHECK-SD-NEXT: ret5225;5226; CHECK-GI-LABEL: test_v2i32_post_reg_ld4r:5227; CHECK-GI: ; %bb.0:5228; CHECK-GI-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0]5229; CHECK-GI-NEXT: add x8, x0, x2, lsl #25230; CHECK-GI-NEXT: str x8, [x1]5231; CHECK-GI-NEXT: ret5232 %ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4r.v2i32.p0(ptr %A)5233 %tmp = getelementptr i32, ptr %A, i64 %inc5234 store ptr %tmp, ptr %ptr5235 ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld45236}5237 5238declare { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4r.v2i32.p0(ptr) nounwind readonly5239 5240 5241define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {5242; CHECK-SD-LABEL: test_v2i64_post_imm_ld4r:5243; CHECK-SD: ; %bb.0:5244; CHECK-SD-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], #325245; CHECK-SD-NEXT: str x0, [x1]5246; CHECK-SD-NEXT: ret5247;5248; CHECK-GI-LABEL: test_v2i64_post_imm_ld4r:5249; CHECK-GI: ; %bb.0:5250; CHECK-GI-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0]5251; CHECK-GI-NEXT: add x8, x0, #325252; CHECK-GI-NEXT: str x8, [x1]5253; CHECK-GI-NEXT: ret5254 %ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr %A)5255 %tmp = getelementptr i64, ptr %A, i32 45256 store ptr %tmp, ptr %ptr5257 ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld45258}5259 5260define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {5261; CHECK-SD-LABEL: test_v2i64_post_reg_ld4r:5262; CHECK-SD: ; %bb.0:5263; CHECK-SD-NEXT: lsl x8, x2, #35264; CHECK-SD-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], x85265; CHECK-SD-NEXT: str x0, [x1]5266; CHECK-SD-NEXT: ret5267;5268; CHECK-GI-LABEL: test_v2i64_post_reg_ld4r:5269; CHECK-GI: ; %bb.0:5270; CHECK-GI-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0]5271; CHECK-GI-NEXT: add x8, x0, x2, lsl #35272; CHECK-GI-NEXT: str x8, [x1]5273; CHECK-GI-NEXT: ret5274 %ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr %A)5275 %tmp = getelementptr i64, ptr %A, i64 %inc5276 store ptr %tmp, ptr %ptr5277 ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld45278}5279 5280declare { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr) nounwind readonly5281 5282define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {5283; CHECK-SD-LABEL: test_v1i64_post_imm_ld4r:5284; CHECK-SD: ; %bb.0:5285; CHECK-SD-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], #325286; CHECK-SD-NEXT: str x0, [x1]5287; CHECK-SD-NEXT: ret5288;5289; CHECK-GI-LABEL: test_v1i64_post_imm_ld4r:5290; CHECK-GI: ; %bb.0:5291; CHECK-GI-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0]5292; CHECK-GI-NEXT: add x8, x0, #325293; CHECK-GI-NEXT: str x8, [x1]5294; CHECK-GI-NEXT: ret5295 %ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v1i64.p0(ptr %A)5296 %tmp = getelementptr i64, ptr %A, i32 45297 store ptr %tmp, ptr %ptr5298 ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld45299}5300 5301define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {5302; CHECK-SD-LABEL: test_v1i64_post_reg_ld4r:5303; CHECK-SD: ; %bb.0:5304; CHECK-SD-NEXT: lsl x8, x2, #35305; CHECK-SD-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], x85306; CHECK-SD-NEXT: str x0, [x1]5307; CHECK-SD-NEXT: ret5308;5309; CHECK-GI-LABEL: test_v1i64_post_reg_ld4r:5310; CHECK-GI: ; %bb.0:5311; CHECK-GI-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0]5312; CHECK-GI-NEXT: add x8, x0, x2, lsl #35313; CHECK-GI-NEXT: str x8, [x1]5314; CHECK-GI-NEXT: ret5315 %ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v1i64.p0(ptr %A)5316 %tmp = getelementptr i64, ptr %A, i64 %inc5317 store ptr %tmp, ptr %ptr5318 ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld45319}5320 5321declare { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v1i64.p0(ptr) nounwind readonly5322 5323 5324define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {5325; CHECK-SD-LABEL: test_v4f32_post_imm_ld4r:5326; CHECK-SD: ; %bb.0:5327; CHECK-SD-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], #165328; CHECK-SD-NEXT: str x0, [x1]5329; CHECK-SD-NEXT: ret5330;5331; CHECK-GI-LABEL: test_v4f32_post_imm_ld4r:5332; CHECK-GI: ; %bb.0:5333; CHECK-GI-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0]5334; CHECK-GI-NEXT: add x8, x0, #165335; CHECK-GI-NEXT: str x8, [x1]5336; CHECK-GI-NEXT: ret5337 %ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4r.v4f32.p0(ptr %A)5338 %tmp = getelementptr float, ptr %A, i32 45339 store ptr %tmp, ptr %ptr5340 ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld45341}5342 5343define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {5344; CHECK-SD-LABEL: test_v4f32_post_reg_ld4r:5345; CHECK-SD: ; %bb.0:5346; CHECK-SD-NEXT: lsl x8, x2, #25347; CHECK-SD-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], x85348; CHECK-SD-NEXT: str x0, [x1]5349; CHECK-SD-NEXT: ret5350;5351; CHECK-GI-LABEL: test_v4f32_post_reg_ld4r:5352; CHECK-GI: ; %bb.0:5353; CHECK-GI-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0]5354; CHECK-GI-NEXT: add x8, x0, x2, lsl #25355; CHECK-GI-NEXT: str x8, [x1]5356; CHECK-GI-NEXT: ret5357 %ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4r.v4f32.p0(ptr %A)5358 %tmp = getelementptr float, ptr %A, i64 %inc5359 store ptr %tmp, ptr %ptr5360 ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld45361}5362 5363declare { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4r.v4f32.p0(ptr) nounwind readonly5364 5365define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {5366; CHECK-SD-LABEL: test_v2f32_post_imm_ld4r:5367; CHECK-SD: ; %bb.0:5368; CHECK-SD-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], #165369; CHECK-SD-NEXT: str x0, [x1]5370; CHECK-SD-NEXT: ret5371;5372; CHECK-GI-LABEL: test_v2f32_post_imm_ld4r:5373; CHECK-GI: ; %bb.0:5374; CHECK-GI-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0]5375; CHECK-GI-NEXT: add x8, x0, #165376; CHECK-GI-NEXT: str x8, [x1]5377; CHECK-GI-NEXT: ret5378 %ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4r.v2f32.p0(ptr %A)5379 %tmp = getelementptr float, ptr %A, i32 45380 store ptr %tmp, ptr %ptr5381 ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld45382}5383 5384define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {5385; CHECK-SD-LABEL: test_v2f32_post_reg_ld4r:5386; CHECK-SD: ; %bb.0:5387; CHECK-SD-NEXT: lsl x8, x2, #25388; CHECK-SD-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], x85389; CHECK-SD-NEXT: str x0, [x1]5390; CHECK-SD-NEXT: ret5391;5392; CHECK-GI-LABEL: test_v2f32_post_reg_ld4r:5393; CHECK-GI: ; %bb.0:5394; CHECK-GI-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0]5395; CHECK-GI-NEXT: add x8, x0, x2, lsl #25396; CHECK-GI-NEXT: str x8, [x1]5397; CHECK-GI-NEXT: ret5398 %ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4r.v2f32.p0(ptr %A)5399 %tmp = getelementptr float, ptr %A, i64 %inc5400 store ptr %tmp, ptr %ptr5401 ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld45402}5403 5404declare { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4r.v2f32.p0(ptr) nounwind readonly5405 5406 5407define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {5408; CHECK-SD-LABEL: test_v2f64_post_imm_ld4r:5409; CHECK-SD: ; %bb.0:5410; CHECK-SD-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], #325411; CHECK-SD-NEXT: str x0, [x1]5412; CHECK-SD-NEXT: ret5413;5414; CHECK-GI-LABEL: test_v2f64_post_imm_ld4r:5415; CHECK-GI: ; %bb.0:5416; CHECK-GI-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0]5417; CHECK-GI-NEXT: add x8, x0, #325418; CHECK-GI-NEXT: str x8, [x1]5419; CHECK-GI-NEXT: ret5420 %ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0(ptr %A)5421 %tmp = getelementptr double, ptr %A, i32 45422 store ptr %tmp, ptr %ptr5423 ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld45424}5425 5426define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {5427; CHECK-SD-LABEL: test_v2f64_post_reg_ld4r:5428; CHECK-SD: ; %bb.0:5429; CHECK-SD-NEXT: lsl x8, x2, #35430; CHECK-SD-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], x85431; CHECK-SD-NEXT: str x0, [x1]5432; CHECK-SD-NEXT: ret5433;5434; CHECK-GI-LABEL: test_v2f64_post_reg_ld4r:5435; CHECK-GI: ; %bb.0:5436; CHECK-GI-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0]5437; CHECK-GI-NEXT: add x8, x0, x2, lsl #35438; CHECK-GI-NEXT: str x8, [x1]5439; CHECK-GI-NEXT: ret5440 %ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0(ptr %A)5441 %tmp = getelementptr double, ptr %A, i64 %inc5442 store ptr %tmp, ptr %ptr5443 ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld45444}5445 5446declare { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0(ptr) nounwind readonly5447 5448define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {5449; CHECK-SD-LABEL: test_v1f64_post_imm_ld4r:5450; CHECK-SD: ; %bb.0:5451; CHECK-SD-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], #325452; CHECK-SD-NEXT: str x0, [x1]5453; CHECK-SD-NEXT: ret5454;5455; CHECK-GI-LABEL: test_v1f64_post_imm_ld4r:5456; CHECK-GI: ; %bb.0:5457; CHECK-GI-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0]5458; CHECK-GI-NEXT: add x8, x0, #325459; CHECK-GI-NEXT: str x8, [x1]5460; CHECK-GI-NEXT: ret5461 %ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4r.v1f64.p0(ptr %A)5462 %tmp = getelementptr double, ptr %A, i32 45463 store ptr %tmp, ptr %ptr5464 ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld45465}5466 5467define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {5468; CHECK-SD-LABEL: test_v1f64_post_reg_ld4r:5469; CHECK-SD: ; %bb.0:5470; CHECK-SD-NEXT: lsl x8, x2, #35471; CHECK-SD-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], x85472; CHECK-SD-NEXT: str x0, [x1]5473; CHECK-SD-NEXT: ret5474;5475; CHECK-GI-LABEL: test_v1f64_post_reg_ld4r:5476; CHECK-GI: ; %bb.0:5477; CHECK-GI-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0]5478; CHECK-GI-NEXT: add x8, x0, x2, lsl #35479; CHECK-GI-NEXT: str x8, [x1]5480; CHECK-GI-NEXT: ret5481 %ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4r.v1f64.p0(ptr %A)5482 %tmp = getelementptr double, ptr %A, i64 %inc5483 store ptr %tmp, ptr %ptr5484 ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld45485}5486 5487declare { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4r.v1f64.p0(ptr) nounwind readonly5488 5489 5490define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C) nounwind {5491; CHECK-SD-LABEL: test_v16i8_post_imm_ld2lane:5492; CHECK-SD: ; %bb.0:5493; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15494; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15495; CHECK-SD-NEXT: ld2.b { v0, v1 }[0], [x0], #25496; CHECK-SD-NEXT: str x0, [x1]5497; CHECK-SD-NEXT: ret5498;5499; CHECK-GI-LABEL: test_v16i8_post_imm_ld2lane:5500; CHECK-GI: ; %bb.0:5501; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15502; CHECK-GI-NEXT: add x8, x0, #25503; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15504; CHECK-GI-NEXT: ld2.b { v0, v1 }[0], [x0]5505; CHECK-GI-NEXT: str x8, [x1]5506; CHECK-GI-NEXT: ret5507 %ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, i64 0, ptr %A)5508 %tmp = getelementptr i8, ptr %A, i32 25509 store ptr %tmp, ptr %ptr5510 ret { <16 x i8>, <16 x i8> } %ld25511}5512 5513define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <16 x i8> %B, <16 x i8> %C) nounwind {5514; CHECK-SD-LABEL: test_v16i8_post_reg_ld2lane:5515; CHECK-SD: ; %bb.0:5516; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15517; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15518; CHECK-SD-NEXT: ld2.b { v0, v1 }[0], [x0], x25519; CHECK-SD-NEXT: str x0, [x1]5520; CHECK-SD-NEXT: ret5521;5522; CHECK-GI-LABEL: test_v16i8_post_reg_ld2lane:5523; CHECK-GI: ; %bb.0:5524; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15525; CHECK-GI-NEXT: add x8, x0, x25526; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15527; CHECK-GI-NEXT: ld2.b { v0, v1 }[0], [x0]5528; CHECK-GI-NEXT: str x8, [x1]5529; CHECK-GI-NEXT: ret5530 %ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, i64 0, ptr %A)5531 %tmp = getelementptr i8, ptr %A, i64 %inc5532 store ptr %tmp, ptr %ptr5533 ret { <16 x i8>, <16 x i8> } %ld25534}5535 5536declare { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8>, <16 x i8>, i64, ptr) nounwind readonly5537 5538 5539define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C) nounwind {5540; CHECK-SD-LABEL: test_v8i8_post_imm_ld2lane:5541; CHECK-SD: ; %bb.0:5542; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15543; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15544; CHECK-SD-NEXT: ld2.b { v0, v1 }[0], [x0], #25545; CHECK-SD-NEXT: str x0, [x1]5546; CHECK-SD-NEXT: ret5547;5548; CHECK-GI-LABEL: test_v8i8_post_imm_ld2lane:5549; CHECK-GI: ; %bb.0:5550; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15551; CHECK-GI-NEXT: add x8, x0, #25552; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15553; CHECK-GI-NEXT: ld2.b { v0, v1 }[0], [x0]5554; CHECK-GI-NEXT: str x8, [x1]5555; CHECK-GI-NEXT: ret5556 %ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, i64 0, ptr %A)5557 %tmp = getelementptr i8, ptr %A, i32 25558 store ptr %tmp, ptr %ptr5559 ret { <8 x i8>, <8 x i8> } %ld25560}5561 5562define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <8 x i8> %B, <8 x i8> %C) nounwind {5563; CHECK-SD-LABEL: test_v8i8_post_reg_ld2lane:5564; CHECK-SD: ; %bb.0:5565; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15566; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15567; CHECK-SD-NEXT: ld2.b { v0, v1 }[0], [x0], x25568; CHECK-SD-NEXT: str x0, [x1]5569; CHECK-SD-NEXT: ret5570;5571; CHECK-GI-LABEL: test_v8i8_post_reg_ld2lane:5572; CHECK-GI: ; %bb.0:5573; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15574; CHECK-GI-NEXT: add x8, x0, x25575; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15576; CHECK-GI-NEXT: ld2.b { v0, v1 }[0], [x0]5577; CHECK-GI-NEXT: str x8, [x1]5578; CHECK-GI-NEXT: ret5579 %ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, i64 0, ptr %A)5580 %tmp = getelementptr i8, ptr %A, i64 %inc5581 store ptr %tmp, ptr %ptr5582 ret { <8 x i8>, <8 x i8> } %ld25583}5584 5585declare { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8>, <8 x i8>, i64, ptr) nounwind readonly5586 5587 5588define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C) nounwind {5589; CHECK-SD-LABEL: test_v8i16_post_imm_ld2lane:5590; CHECK-SD: ; %bb.0:5591; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15592; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15593; CHECK-SD-NEXT: ld2.h { v0, v1 }[0], [x0], #45594; CHECK-SD-NEXT: str x0, [x1]5595; CHECK-SD-NEXT: ret5596;5597; CHECK-GI-LABEL: test_v8i16_post_imm_ld2lane:5598; CHECK-GI: ; %bb.0:5599; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15600; CHECK-GI-NEXT: add x8, x0, #45601; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15602; CHECK-GI-NEXT: ld2.h { v0, v1 }[0], [x0]5603; CHECK-GI-NEXT: str x8, [x1]5604; CHECK-GI-NEXT: ret5605 %ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, i64 0, ptr %A)5606 %tmp = getelementptr i16, ptr %A, i32 25607 store ptr %tmp, ptr %ptr5608 ret { <8 x i16>, <8 x i16> } %ld25609}5610 5611define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <8 x i16> %B, <8 x i16> %C) nounwind {5612; CHECK-SD-LABEL: test_v8i16_post_reg_ld2lane:5613; CHECK-SD: ; %bb.0:5614; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15615; CHECK-SD-NEXT: lsl x8, x2, #15616; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15617; CHECK-SD-NEXT: ld2.h { v0, v1 }[0], [x0], x85618; CHECK-SD-NEXT: str x0, [x1]5619; CHECK-SD-NEXT: ret5620;5621; CHECK-GI-LABEL: test_v8i16_post_reg_ld2lane:5622; CHECK-GI: ; %bb.0:5623; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15624; CHECK-GI-NEXT: add x8, x0, x2, lsl #15625; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15626; CHECK-GI-NEXT: ld2.h { v0, v1 }[0], [x0]5627; CHECK-GI-NEXT: str x8, [x1]5628; CHECK-GI-NEXT: ret5629 %ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, i64 0, ptr %A)5630 %tmp = getelementptr i16, ptr %A, i64 %inc5631 store ptr %tmp, ptr %ptr5632 ret { <8 x i16>, <8 x i16> } %ld25633}5634 5635declare { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16>, <8 x i16>, i64, ptr) nounwind readonly5636 5637 5638define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C) nounwind {5639; CHECK-SD-LABEL: test_v4i16_post_imm_ld2lane:5640; CHECK-SD: ; %bb.0:5641; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15642; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15643; CHECK-SD-NEXT: ld2.h { v0, v1 }[0], [x0], #45644; CHECK-SD-NEXT: str x0, [x1]5645; CHECK-SD-NEXT: ret5646;5647; CHECK-GI-LABEL: test_v4i16_post_imm_ld2lane:5648; CHECK-GI: ; %bb.0:5649; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15650; CHECK-GI-NEXT: add x8, x0, #45651; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15652; CHECK-GI-NEXT: ld2.h { v0, v1 }[0], [x0]5653; CHECK-GI-NEXT: str x8, [x1]5654; CHECK-GI-NEXT: ret5655 %ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, i64 0, ptr %A)5656 %tmp = getelementptr i16, ptr %A, i32 25657 store ptr %tmp, ptr %ptr5658 ret { <4 x i16>, <4 x i16> } %ld25659}5660 5661define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <4 x i16> %B, <4 x i16> %C) nounwind {5662; CHECK-SD-LABEL: test_v4i16_post_reg_ld2lane:5663; CHECK-SD: ; %bb.0:5664; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15665; CHECK-SD-NEXT: lsl x8, x2, #15666; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15667; CHECK-SD-NEXT: ld2.h { v0, v1 }[0], [x0], x85668; CHECK-SD-NEXT: str x0, [x1]5669; CHECK-SD-NEXT: ret5670;5671; CHECK-GI-LABEL: test_v4i16_post_reg_ld2lane:5672; CHECK-GI: ; %bb.0:5673; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15674; CHECK-GI-NEXT: add x8, x0, x2, lsl #15675; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15676; CHECK-GI-NEXT: ld2.h { v0, v1 }[0], [x0]5677; CHECK-GI-NEXT: str x8, [x1]5678; CHECK-GI-NEXT: ret5679 %ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, i64 0, ptr %A)5680 %tmp = getelementptr i16, ptr %A, i64 %inc5681 store ptr %tmp, ptr %ptr5682 ret { <4 x i16>, <4 x i16> } %ld25683}5684 5685declare { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16>, <4 x i16>, i64, ptr) nounwind readonly5686 5687 5688define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C) nounwind {5689; CHECK-SD-LABEL: test_v4i32_post_imm_ld2lane:5690; CHECK-SD: ; %bb.0:5691; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15692; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15693; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], #85694; CHECK-SD-NEXT: str x0, [x1]5695; CHECK-SD-NEXT: ret5696;5697; CHECK-GI-LABEL: test_v4i32_post_imm_ld2lane:5698; CHECK-GI: ; %bb.0:5699; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15700; CHECK-GI-NEXT: add x8, x0, #85701; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15702; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0]5703; CHECK-GI-NEXT: str x8, [x1]5704; CHECK-GI-NEXT: ret5705 %ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, i64 0, ptr %A)5706 %tmp = getelementptr i32, ptr %A, i32 25707 store ptr %tmp, ptr %ptr5708 ret { <4 x i32>, <4 x i32> } %ld25709}5710 5711define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <4 x i32> %B, <4 x i32> %C) nounwind {5712; CHECK-SD-LABEL: test_v4i32_post_reg_ld2lane:5713; CHECK-SD: ; %bb.0:5714; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15715; CHECK-SD-NEXT: lsl x8, x2, #25716; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15717; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], x85718; CHECK-SD-NEXT: str x0, [x1]5719; CHECK-SD-NEXT: ret5720;5721; CHECK-GI-LABEL: test_v4i32_post_reg_ld2lane:5722; CHECK-GI: ; %bb.0:5723; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15724; CHECK-GI-NEXT: add x8, x0, x2, lsl #25725; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15726; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0]5727; CHECK-GI-NEXT: str x8, [x1]5728; CHECK-GI-NEXT: ret5729 %ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, i64 0, ptr %A)5730 %tmp = getelementptr i32, ptr %A, i64 %inc5731 store ptr %tmp, ptr %ptr5732 ret { <4 x i32>, <4 x i32> } %ld25733}5734 5735declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32>, <4 x i32>, i64, ptr) nounwind readonly5736 5737 5738define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C) nounwind {5739; CHECK-SD-LABEL: test_v2i32_post_imm_ld2lane:5740; CHECK-SD: ; %bb.0:5741; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15742; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15743; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], #85744; CHECK-SD-NEXT: str x0, [x1]5745; CHECK-SD-NEXT: ret5746;5747; CHECK-GI-LABEL: test_v2i32_post_imm_ld2lane:5748; CHECK-GI: ; %bb.0:5749; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15750; CHECK-GI-NEXT: add x8, x0, #85751; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15752; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0]5753; CHECK-GI-NEXT: str x8, [x1]5754; CHECK-GI-NEXT: ret5755 %ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, i64 0, ptr %A)5756 %tmp = getelementptr i32, ptr %A, i32 25757 store ptr %tmp, ptr %ptr5758 ret { <2 x i32>, <2 x i32> } %ld25759}5760 5761define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <2 x i32> %B, <2 x i32> %C) nounwind {5762; CHECK-SD-LABEL: test_v2i32_post_reg_ld2lane:5763; CHECK-SD: ; %bb.0:5764; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15765; CHECK-SD-NEXT: lsl x8, x2, #25766; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15767; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], x85768; CHECK-SD-NEXT: str x0, [x1]5769; CHECK-SD-NEXT: ret5770;5771; CHECK-GI-LABEL: test_v2i32_post_reg_ld2lane:5772; CHECK-GI: ; %bb.0:5773; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15774; CHECK-GI-NEXT: add x8, x0, x2, lsl #25775; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15776; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0]5777; CHECK-GI-NEXT: str x8, [x1]5778; CHECK-GI-NEXT: ret5779 %ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, i64 0, ptr %A)5780 %tmp = getelementptr i32, ptr %A, i64 %inc5781 store ptr %tmp, ptr %ptr5782 ret { <2 x i32>, <2 x i32> } %ld25783}5784 5785declare { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32>, <2 x i32>, i64, ptr) nounwind readonly5786 5787 5788define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C) nounwind {5789; CHECK-SD-LABEL: test_v2i64_post_imm_ld2lane:5790; CHECK-SD: ; %bb.0:5791; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15792; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15793; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], #165794; CHECK-SD-NEXT: str x0, [x1]5795; CHECK-SD-NEXT: ret5796;5797; CHECK-GI-LABEL: test_v2i64_post_imm_ld2lane:5798; CHECK-GI: ; %bb.0:5799; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15800; CHECK-GI-NEXT: add x8, x0, #165801; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15802; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0]5803; CHECK-GI-NEXT: str x8, [x1]5804; CHECK-GI-NEXT: ret5805 %ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, i64 0, ptr %A)5806 %tmp = getelementptr i64, ptr %A, i32 25807 store ptr %tmp, ptr %ptr5808 ret { <2 x i64>, <2 x i64> } %ld25809}5810 5811define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <2 x i64> %B, <2 x i64> %C) nounwind {5812; CHECK-SD-LABEL: test_v2i64_post_reg_ld2lane:5813; CHECK-SD: ; %bb.0:5814; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15815; CHECK-SD-NEXT: lsl x8, x2, #35816; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15817; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], x85818; CHECK-SD-NEXT: str x0, [x1]5819; CHECK-SD-NEXT: ret5820;5821; CHECK-GI-LABEL: test_v2i64_post_reg_ld2lane:5822; CHECK-GI: ; %bb.0:5823; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15824; CHECK-GI-NEXT: add x8, x0, x2, lsl #35825; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15826; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0]5827; CHECK-GI-NEXT: str x8, [x1]5828; CHECK-GI-NEXT: ret5829 %ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, i64 0, ptr %A)5830 %tmp = getelementptr i64, ptr %A, i64 %inc5831 store ptr %tmp, ptr %ptr5832 ret { <2 x i64>, <2 x i64> } %ld25833}5834 5835declare { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64>, <2 x i64>, i64, ptr) nounwind readonly5836 5837 5838define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C) nounwind {5839; CHECK-SD-LABEL: test_v1i64_post_imm_ld2lane:5840; CHECK-SD: ; %bb.0:5841; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15842; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15843; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], #165844; CHECK-SD-NEXT: str x0, [x1]5845; CHECK-SD-NEXT: ret5846;5847; CHECK-GI-LABEL: test_v1i64_post_imm_ld2lane:5848; CHECK-GI: ; %bb.0:5849; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15850; CHECK-GI-NEXT: add x8, x0, #165851; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15852; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0]5853; CHECK-GI-NEXT: str x8, [x1]5854; CHECK-GI-NEXT: ret5855 %ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, i64 0, ptr %A)5856 %tmp = getelementptr i64, ptr %A, i32 25857 store ptr %tmp, ptr %ptr5858 ret { <1 x i64>, <1 x i64> } %ld25859}5860 5861define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <1 x i64> %B, <1 x i64> %C) nounwind {5862; CHECK-SD-LABEL: test_v1i64_post_reg_ld2lane:5863; CHECK-SD: ; %bb.0:5864; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15865; CHECK-SD-NEXT: lsl x8, x2, #35866; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15867; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], x85868; CHECK-SD-NEXT: str x0, [x1]5869; CHECK-SD-NEXT: ret5870;5871; CHECK-GI-LABEL: test_v1i64_post_reg_ld2lane:5872; CHECK-GI: ; %bb.0:5873; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15874; CHECK-GI-NEXT: add x8, x0, x2, lsl #35875; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15876; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0]5877; CHECK-GI-NEXT: str x8, [x1]5878; CHECK-GI-NEXT: ret5879 %ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, i64 0, ptr %A)5880 %tmp = getelementptr i64, ptr %A, i64 %inc5881 store ptr %tmp, ptr %ptr5882 ret { <1 x i64>, <1 x i64> } %ld25883}5884 5885declare { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64>, <1 x i64>, i64, ptr) nounwind readonly5886 5887 5888define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C) nounwind {5889; CHECK-SD-LABEL: test_v4f32_post_imm_ld2lane:5890; CHECK-SD: ; %bb.0:5891; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15892; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15893; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], #85894; CHECK-SD-NEXT: str x0, [x1]5895; CHECK-SD-NEXT: ret5896;5897; CHECK-GI-LABEL: test_v4f32_post_imm_ld2lane:5898; CHECK-GI: ; %bb.0:5899; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15900; CHECK-GI-NEXT: add x8, x0, #85901; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15902; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0]5903; CHECK-GI-NEXT: str x8, [x1]5904; CHECK-GI-NEXT: ret5905 %ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0(<4 x float> %B, <4 x float> %C, i64 0, ptr %A)5906 %tmp = getelementptr float, ptr %A, i32 25907 store ptr %tmp, ptr %ptr5908 ret { <4 x float>, <4 x float> } %ld25909}5910 5911define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <4 x float> %B, <4 x float> %C) nounwind {5912; CHECK-SD-LABEL: test_v4f32_post_reg_ld2lane:5913; CHECK-SD: ; %bb.0:5914; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15915; CHECK-SD-NEXT: lsl x8, x2, #25916; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15917; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], x85918; CHECK-SD-NEXT: str x0, [x1]5919; CHECK-SD-NEXT: ret5920;5921; CHECK-GI-LABEL: test_v4f32_post_reg_ld2lane:5922; CHECK-GI: ; %bb.0:5923; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15924; CHECK-GI-NEXT: add x8, x0, x2, lsl #25925; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15926; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0]5927; CHECK-GI-NEXT: str x8, [x1]5928; CHECK-GI-NEXT: ret5929 %ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0(<4 x float> %B, <4 x float> %C, i64 0, ptr %A)5930 %tmp = getelementptr float, ptr %A, i64 %inc5931 store ptr %tmp, ptr %ptr5932 ret { <4 x float>, <4 x float> } %ld25933}5934 5935declare { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0(<4 x float>, <4 x float>, i64, ptr) nounwind readonly5936 5937 5938define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C) nounwind {5939; CHECK-SD-LABEL: test_v2f32_post_imm_ld2lane:5940; CHECK-SD: ; %bb.0:5941; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15942; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15943; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], #85944; CHECK-SD-NEXT: str x0, [x1]5945; CHECK-SD-NEXT: ret5946;5947; CHECK-GI-LABEL: test_v2f32_post_imm_ld2lane:5948; CHECK-GI: ; %bb.0:5949; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15950; CHECK-GI-NEXT: add x8, x0, #85951; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15952; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0]5953; CHECK-GI-NEXT: str x8, [x1]5954; CHECK-GI-NEXT: ret5955 %ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0(<2 x float> %B, <2 x float> %C, i64 0, ptr %A)5956 %tmp = getelementptr float, ptr %A, i32 25957 store ptr %tmp, ptr %ptr5958 ret { <2 x float>, <2 x float> } %ld25959}5960 5961define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <2 x float> %B, <2 x float> %C) nounwind {5962; CHECK-SD-LABEL: test_v2f32_post_reg_ld2lane:5963; CHECK-SD: ; %bb.0:5964; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15965; CHECK-SD-NEXT: lsl x8, x2, #25966; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15967; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], x85968; CHECK-SD-NEXT: str x0, [x1]5969; CHECK-SD-NEXT: ret5970;5971; CHECK-GI-LABEL: test_v2f32_post_reg_ld2lane:5972; CHECK-GI: ; %bb.0:5973; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q15974; CHECK-GI-NEXT: add x8, x0, x2, lsl #25975; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q15976; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0]5977; CHECK-GI-NEXT: str x8, [x1]5978; CHECK-GI-NEXT: ret5979 %ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0(<2 x float> %B, <2 x float> %C, i64 0, ptr %A)5980 %tmp = getelementptr float, ptr %A, i64 %inc5981 store ptr %tmp, ptr %ptr5982 ret { <2 x float>, <2 x float> } %ld25983}5984 5985declare { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0(<2 x float>, <2 x float>, i64, ptr) nounwind readonly5986 5987 5988define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C) nounwind {5989; CHECK-SD-LABEL: test_v2f64_post_imm_ld2lane:5990; CHECK-SD: ; %bb.0:5991; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q15992; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q15993; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], #165994; CHECK-SD-NEXT: str x0, [x1]5995; CHECK-SD-NEXT: ret5996;5997; CHECK-GI-LABEL: test_v2f64_post_imm_ld2lane:5998; CHECK-GI: ; %bb.0:5999; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q16000; CHECK-GI-NEXT: add x8, x0, #166001; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q16002; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0]6003; CHECK-GI-NEXT: str x8, [x1]6004; CHECK-GI-NEXT: ret6005 %ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0(<2 x double> %B, <2 x double> %C, i64 0, ptr %A)6006 %tmp = getelementptr double, ptr %A, i32 26007 store ptr %tmp, ptr %ptr6008 ret { <2 x double>, <2 x double> } %ld26009}6010 6011define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <2 x double> %B, <2 x double> %C) nounwind {6012; CHECK-SD-LABEL: test_v2f64_post_reg_ld2lane:6013; CHECK-SD: ; %bb.0:6014; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q16015; CHECK-SD-NEXT: lsl x8, x2, #36016; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q16017; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], x86018; CHECK-SD-NEXT: str x0, [x1]6019; CHECK-SD-NEXT: ret6020;6021; CHECK-GI-LABEL: test_v2f64_post_reg_ld2lane:6022; CHECK-GI: ; %bb.0:6023; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q16024; CHECK-GI-NEXT: add x8, x0, x2, lsl #36025; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q16026; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0]6027; CHECK-GI-NEXT: str x8, [x1]6028; CHECK-GI-NEXT: ret6029 %ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0(<2 x double> %B, <2 x double> %C, i64 0, ptr %A)6030 %tmp = getelementptr double, ptr %A, i64 %inc6031 store ptr %tmp, ptr %ptr6032 ret { <2 x double>, <2 x double> } %ld26033}6034 6035declare { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0(<2 x double>, <2 x double>, i64, ptr) nounwind readonly6036 6037 6038define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C) nounwind {6039; CHECK-SD-LABEL: test_v1f64_post_imm_ld2lane:6040; CHECK-SD: ; %bb.0:6041; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q16042; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q16043; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], #166044; CHECK-SD-NEXT: str x0, [x1]6045; CHECK-SD-NEXT: ret6046;6047; CHECK-GI-LABEL: test_v1f64_post_imm_ld2lane:6048; CHECK-GI: ; %bb.0:6049; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q16050; CHECK-GI-NEXT: add x8, x0, #166051; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q16052; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0]6053; CHECK-GI-NEXT: str x8, [x1]6054; CHECK-GI-NEXT: ret6055 %ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0(<1 x double> %B, <1 x double> %C, i64 0, ptr %A)6056 %tmp = getelementptr double, ptr %A, i32 26057 store ptr %tmp, ptr %ptr6058 ret { <1 x double>, <1 x double> } %ld26059}6060 6061define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <1 x double> %B, <1 x double> %C) nounwind {6062; CHECK-SD-LABEL: test_v1f64_post_reg_ld2lane:6063; CHECK-SD: ; %bb.0:6064; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q16065; CHECK-SD-NEXT: lsl x8, x2, #36066; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q16067; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], x86068; CHECK-SD-NEXT: str x0, [x1]6069; CHECK-SD-NEXT: ret6070;6071; CHECK-GI-LABEL: test_v1f64_post_reg_ld2lane:6072; CHECK-GI: ; %bb.0:6073; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q16074; CHECK-GI-NEXT: add x8, x0, x2, lsl #36075; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q16076; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0]6077; CHECK-GI-NEXT: str x8, [x1]6078; CHECK-GI-NEXT: ret6079 %ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0(<1 x double> %B, <1 x double> %C, i64 0, ptr %A)6080 %tmp = getelementptr double, ptr %A, i64 %inc6081 store ptr %tmp, ptr %ptr6082 ret { <1 x double>, <1 x double> } %ld26083}6084 6085declare { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0(<1 x double>, <1 x double>, i64, ptr) nounwind readonly6086 6087 6088define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind {6089; CHECK-SD-LABEL: test_v16i8_post_imm_ld3lane:6090; CHECK-SD: ; %bb.0:6091; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26092; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26093; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26094; CHECK-SD-NEXT: ld3.b { v0, v1, v2 }[0], [x0], #36095; CHECK-SD-NEXT: str x0, [x1]6096; CHECK-SD-NEXT: ret6097;6098; CHECK-GI-LABEL: test_v16i8_post_imm_ld3lane:6099; CHECK-GI: ; %bb.0:6100; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26101; CHECK-GI-NEXT: add x8, x0, #36102; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26103; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26104; CHECK-GI-NEXT: ld3.b { v0, v1, v2 }[0], [x0]6105; CHECK-GI-NEXT: str x8, [x1]6106; CHECK-GI-NEXT: ret6107 %ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, ptr %A)6108 %tmp = getelementptr i8, ptr %A, i32 36109 store ptr %tmp, ptr %ptr6110 ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld36111}6112 6113define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind {6114; CHECK-SD-LABEL: test_v16i8_post_reg_ld3lane:6115; CHECK-SD: ; %bb.0:6116; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26117; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26118; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26119; CHECK-SD-NEXT: ld3.b { v0, v1, v2 }[0], [x0], x26120; CHECK-SD-NEXT: str x0, [x1]6121; CHECK-SD-NEXT: ret6122;6123; CHECK-GI-LABEL: test_v16i8_post_reg_ld3lane:6124; CHECK-GI: ; %bb.0:6125; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26126; CHECK-GI-NEXT: add x8, x0, x26127; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26128; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26129; CHECK-GI-NEXT: ld3.b { v0, v1, v2 }[0], [x0]6130; CHECK-GI-NEXT: str x8, [x1]6131; CHECK-GI-NEXT: ret6132 %ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, ptr %A)6133 %tmp = getelementptr i8, ptr %A, i64 %inc6134 store ptr %tmp, ptr %ptr6135 ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld36136}6137 6138declare { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>, i64, ptr) nounwind readonly6139 6140 6141define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind {6142; CHECK-SD-LABEL: test_v8i8_post_imm_ld3lane:6143; CHECK-SD: ; %bb.0:6144; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26145; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26146; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26147; CHECK-SD-NEXT: ld3.b { v0, v1, v2 }[0], [x0], #36148; CHECK-SD-NEXT: str x0, [x1]6149; CHECK-SD-NEXT: ret6150;6151; CHECK-GI-LABEL: test_v8i8_post_imm_ld3lane:6152; CHECK-GI: ; %bb.0:6153; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26154; CHECK-GI-NEXT: add x8, x0, #36155; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26156; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26157; CHECK-GI-NEXT: ld3.b { v0, v1, v2 }[0], [x0]6158; CHECK-GI-NEXT: str x8, [x1]6159; CHECK-GI-NEXT: ret6160 %ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, ptr %A)6161 %tmp = getelementptr i8, ptr %A, i32 36162 store ptr %tmp, ptr %ptr6163 ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld36164}6165 6166define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind {6167; CHECK-SD-LABEL: test_v8i8_post_reg_ld3lane:6168; CHECK-SD: ; %bb.0:6169; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26170; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26171; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26172; CHECK-SD-NEXT: ld3.b { v0, v1, v2 }[0], [x0], x26173; CHECK-SD-NEXT: str x0, [x1]6174; CHECK-SD-NEXT: ret6175;6176; CHECK-GI-LABEL: test_v8i8_post_reg_ld3lane:6177; CHECK-GI: ; %bb.0:6178; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26179; CHECK-GI-NEXT: add x8, x0, x26180; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26181; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26182; CHECK-GI-NEXT: ld3.b { v0, v1, v2 }[0], [x0]6183; CHECK-GI-NEXT: str x8, [x1]6184; CHECK-GI-NEXT: ret6185 %ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, ptr %A)6186 %tmp = getelementptr i8, ptr %A, i64 %inc6187 store ptr %tmp, ptr %ptr6188 ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld36189}6190 6191declare { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, i64, ptr) nounwind readonly6192 6193 6194define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind {6195; CHECK-SD-LABEL: test_v8i16_post_imm_ld3lane:6196; CHECK-SD: ; %bb.0:6197; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26198; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26199; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26200; CHECK-SD-NEXT: ld3.h { v0, v1, v2 }[0], [x0], #66201; CHECK-SD-NEXT: str x0, [x1]6202; CHECK-SD-NEXT: ret6203;6204; CHECK-GI-LABEL: test_v8i16_post_imm_ld3lane:6205; CHECK-GI: ; %bb.0:6206; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26207; CHECK-GI-NEXT: add x8, x0, #66208; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26209; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26210; CHECK-GI-NEXT: ld3.h { v0, v1, v2 }[0], [x0]6211; CHECK-GI-NEXT: str x8, [x1]6212; CHECK-GI-NEXT: ret6213 %ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, ptr %A)6214 %tmp = getelementptr i16, ptr %A, i32 36215 store ptr %tmp, ptr %ptr6216 ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld36217}6218 6219define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind {6220; CHECK-SD-LABEL: test_v8i16_post_reg_ld3lane:6221; CHECK-SD: ; %bb.0:6222; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26223; CHECK-SD-NEXT: lsl x8, x2, #16224; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26225; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26226; CHECK-SD-NEXT: ld3.h { v0, v1, v2 }[0], [x0], x86227; CHECK-SD-NEXT: str x0, [x1]6228; CHECK-SD-NEXT: ret6229;6230; CHECK-GI-LABEL: test_v8i16_post_reg_ld3lane:6231; CHECK-GI: ; %bb.0:6232; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26233; CHECK-GI-NEXT: add x8, x0, x2, lsl #16234; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26235; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26236; CHECK-GI-NEXT: ld3.h { v0, v1, v2 }[0], [x0]6237; CHECK-GI-NEXT: str x8, [x1]6238; CHECK-GI-NEXT: ret6239 %ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, ptr %A)6240 %tmp = getelementptr i16, ptr %A, i64 %inc6241 store ptr %tmp, ptr %ptr6242 ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld36243}6244 6245declare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>, i64, ptr) nounwind readonly6246 6247 6248define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind {6249; CHECK-SD-LABEL: test_v4i16_post_imm_ld3lane:6250; CHECK-SD: ; %bb.0:6251; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26252; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26253; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26254; CHECK-SD-NEXT: ld3.h { v0, v1, v2 }[0], [x0], #66255; CHECK-SD-NEXT: str x0, [x1]6256; CHECK-SD-NEXT: ret6257;6258; CHECK-GI-LABEL: test_v4i16_post_imm_ld3lane:6259; CHECK-GI: ; %bb.0:6260; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26261; CHECK-GI-NEXT: add x8, x0, #66262; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26263; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26264; CHECK-GI-NEXT: ld3.h { v0, v1, v2 }[0], [x0]6265; CHECK-GI-NEXT: str x8, [x1]6266; CHECK-GI-NEXT: ret6267 %ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, ptr %A)6268 %tmp = getelementptr i16, ptr %A, i32 36269 store ptr %tmp, ptr %ptr6270 ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld36271}6272 6273define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind {6274; CHECK-SD-LABEL: test_v4i16_post_reg_ld3lane:6275; CHECK-SD: ; %bb.0:6276; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26277; CHECK-SD-NEXT: lsl x8, x2, #16278; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26279; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26280; CHECK-SD-NEXT: ld3.h { v0, v1, v2 }[0], [x0], x86281; CHECK-SD-NEXT: str x0, [x1]6282; CHECK-SD-NEXT: ret6283;6284; CHECK-GI-LABEL: test_v4i16_post_reg_ld3lane:6285; CHECK-GI: ; %bb.0:6286; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26287; CHECK-GI-NEXT: add x8, x0, x2, lsl #16288; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26289; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26290; CHECK-GI-NEXT: ld3.h { v0, v1, v2 }[0], [x0]6291; CHECK-GI-NEXT: str x8, [x1]6292; CHECK-GI-NEXT: ret6293 %ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, ptr %A)6294 %tmp = getelementptr i16, ptr %A, i64 %inc6295 store ptr %tmp, ptr %ptr6296 ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld36297}6298 6299declare { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>, i64, ptr) nounwind readonly6300 6301 6302define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind {6303; CHECK-SD-LABEL: test_v4i32_post_imm_ld3lane:6304; CHECK-SD: ; %bb.0:6305; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26306; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26307; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26308; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #126309; CHECK-SD-NEXT: str x0, [x1]6310; CHECK-SD-NEXT: ret6311;6312; CHECK-GI-LABEL: test_v4i32_post_imm_ld3lane:6313; CHECK-GI: ; %bb.0:6314; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26315; CHECK-GI-NEXT: add x8, x0, #126316; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26317; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26318; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0]6319; CHECK-GI-NEXT: str x8, [x1]6320; CHECK-GI-NEXT: ret6321 %ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, ptr %A)6322 %tmp = getelementptr i32, ptr %A, i32 36323 store ptr %tmp, ptr %ptr6324 ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld36325}6326 6327define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind {6328; CHECK-SD-LABEL: test_v4i32_post_reg_ld3lane:6329; CHECK-SD: ; %bb.0:6330; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26331; CHECK-SD-NEXT: lsl x8, x2, #26332; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26333; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26334; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x86335; CHECK-SD-NEXT: str x0, [x1]6336; CHECK-SD-NEXT: ret6337;6338; CHECK-GI-LABEL: test_v4i32_post_reg_ld3lane:6339; CHECK-GI: ; %bb.0:6340; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26341; CHECK-GI-NEXT: add x8, x0, x2, lsl #26342; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26343; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26344; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0]6345; CHECK-GI-NEXT: str x8, [x1]6346; CHECK-GI-NEXT: ret6347 %ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, ptr %A)6348 %tmp = getelementptr i32, ptr %A, i64 %inc6349 store ptr %tmp, ptr %ptr6350 ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld36351}6352 6353declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>, i64, ptr) nounwind readonly6354 6355 6356define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind {6357; CHECK-SD-LABEL: test_v2i32_post_imm_ld3lane:6358; CHECK-SD: ; %bb.0:6359; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26360; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26361; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26362; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #126363; CHECK-SD-NEXT: str x0, [x1]6364; CHECK-SD-NEXT: ret6365;6366; CHECK-GI-LABEL: test_v2i32_post_imm_ld3lane:6367; CHECK-GI: ; %bb.0:6368; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26369; CHECK-GI-NEXT: add x8, x0, #126370; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26371; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26372; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0]6373; CHECK-GI-NEXT: str x8, [x1]6374; CHECK-GI-NEXT: ret6375 %ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, ptr %A)6376 %tmp = getelementptr i32, ptr %A, i32 36377 store ptr %tmp, ptr %ptr6378 ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld36379}6380 6381define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind {6382; CHECK-SD-LABEL: test_v2i32_post_reg_ld3lane:6383; CHECK-SD: ; %bb.0:6384; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26385; CHECK-SD-NEXT: lsl x8, x2, #26386; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26387; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26388; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x86389; CHECK-SD-NEXT: str x0, [x1]6390; CHECK-SD-NEXT: ret6391;6392; CHECK-GI-LABEL: test_v2i32_post_reg_ld3lane:6393; CHECK-GI: ; %bb.0:6394; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26395; CHECK-GI-NEXT: add x8, x0, x2, lsl #26396; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26397; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26398; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0]6399; CHECK-GI-NEXT: str x8, [x1]6400; CHECK-GI-NEXT: ret6401 %ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, ptr %A)6402 %tmp = getelementptr i32, ptr %A, i64 %inc6403 store ptr %tmp, ptr %ptr6404 ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld36405}6406 6407declare { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>, i64, ptr) nounwind readonly6408 6409 6410define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind {6411; CHECK-SD-LABEL: test_v2i64_post_imm_ld3lane:6412; CHECK-SD: ; %bb.0:6413; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26414; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26415; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26416; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #246417; CHECK-SD-NEXT: str x0, [x1]6418; CHECK-SD-NEXT: ret6419;6420; CHECK-GI-LABEL: test_v2i64_post_imm_ld3lane:6421; CHECK-GI: ; %bb.0:6422; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26423; CHECK-GI-NEXT: add x8, x0, #246424; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26425; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26426; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0]6427; CHECK-GI-NEXT: str x8, [x1]6428; CHECK-GI-NEXT: ret6429 %ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, ptr %A)6430 %tmp = getelementptr i64, ptr %A, i32 36431 store ptr %tmp, ptr %ptr6432 ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld36433}6434 6435define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind {6436; CHECK-SD-LABEL: test_v2i64_post_reg_ld3lane:6437; CHECK-SD: ; %bb.0:6438; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26439; CHECK-SD-NEXT: lsl x8, x2, #36440; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26441; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26442; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x86443; CHECK-SD-NEXT: str x0, [x1]6444; CHECK-SD-NEXT: ret6445;6446; CHECK-GI-LABEL: test_v2i64_post_reg_ld3lane:6447; CHECK-GI: ; %bb.0:6448; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26449; CHECK-GI-NEXT: add x8, x0, x2, lsl #36450; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26451; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26452; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0]6453; CHECK-GI-NEXT: str x8, [x1]6454; CHECK-GI-NEXT: ret6455 %ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, ptr %A)6456 %tmp = getelementptr i64, ptr %A, i64 %inc6457 store ptr %tmp, ptr %ptr6458 ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld36459}6460 6461declare { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>, i64, ptr) nounwind readonly6462 6463 6464define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind {6465; CHECK-SD-LABEL: test_v1i64_post_imm_ld3lane:6466; CHECK-SD: ; %bb.0:6467; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26468; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26469; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26470; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #246471; CHECK-SD-NEXT: str x0, [x1]6472; CHECK-SD-NEXT: ret6473;6474; CHECK-GI-LABEL: test_v1i64_post_imm_ld3lane:6475; CHECK-GI: ; %bb.0:6476; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26477; CHECK-GI-NEXT: add x8, x0, #246478; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26479; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26480; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0]6481; CHECK-GI-NEXT: str x8, [x1]6482; CHECK-GI-NEXT: ret6483 %ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, ptr %A)6484 %tmp = getelementptr i64, ptr %A, i32 36485 store ptr %tmp, ptr %ptr6486 ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld36487}6488 6489define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind {6490; CHECK-SD-LABEL: test_v1i64_post_reg_ld3lane:6491; CHECK-SD: ; %bb.0:6492; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26493; CHECK-SD-NEXT: lsl x8, x2, #36494; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26495; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26496; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x86497; CHECK-SD-NEXT: str x0, [x1]6498; CHECK-SD-NEXT: ret6499;6500; CHECK-GI-LABEL: test_v1i64_post_reg_ld3lane:6501; CHECK-GI: ; %bb.0:6502; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26503; CHECK-GI-NEXT: add x8, x0, x2, lsl #36504; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26505; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26506; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0]6507; CHECK-GI-NEXT: str x8, [x1]6508; CHECK-GI-NEXT: ret6509 %ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, ptr %A)6510 %tmp = getelementptr i64, ptr %A, i64 %inc6511 store ptr %tmp, ptr %ptr6512 ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld36513}6514 6515declare { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>, i64, ptr) nounwind readonly6516 6517 6518define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind {6519; CHECK-SD-LABEL: test_v4f32_post_imm_ld3lane:6520; CHECK-SD: ; %bb.0:6521; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26522; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26523; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26524; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #126525; CHECK-SD-NEXT: str x0, [x1]6526; CHECK-SD-NEXT: ret6527;6528; CHECK-GI-LABEL: test_v4f32_post_imm_ld3lane:6529; CHECK-GI: ; %bb.0:6530; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26531; CHECK-GI-NEXT: add x8, x0, #126532; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26533; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26534; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0]6535; CHECK-GI-NEXT: str x8, [x1]6536; CHECK-GI-NEXT: ret6537 %ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, ptr %A)6538 %tmp = getelementptr float, ptr %A, i32 36539 store ptr %tmp, ptr %ptr6540 ret { <4 x float>, <4 x float>, <4 x float> } %ld36541}6542 6543define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind {6544; CHECK-SD-LABEL: test_v4f32_post_reg_ld3lane:6545; CHECK-SD: ; %bb.0:6546; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26547; CHECK-SD-NEXT: lsl x8, x2, #26548; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26549; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26550; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x86551; CHECK-SD-NEXT: str x0, [x1]6552; CHECK-SD-NEXT: ret6553;6554; CHECK-GI-LABEL: test_v4f32_post_reg_ld3lane:6555; CHECK-GI: ; %bb.0:6556; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26557; CHECK-GI-NEXT: add x8, x0, x2, lsl #26558; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26559; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26560; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0]6561; CHECK-GI-NEXT: str x8, [x1]6562; CHECK-GI-NEXT: ret6563 %ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, ptr %A)6564 %tmp = getelementptr float, ptr %A, i64 %inc6565 store ptr %tmp, ptr %ptr6566 ret { <4 x float>, <4 x float>, <4 x float> } %ld36567}6568 6569declare { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f32.p0(<4 x float>, <4 x float>, <4 x float>, i64, ptr) nounwind readonly6570 6571 6572define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind {6573; CHECK-SD-LABEL: test_v2f32_post_imm_ld3lane:6574; CHECK-SD: ; %bb.0:6575; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26576; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26577; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26578; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #126579; CHECK-SD-NEXT: str x0, [x1]6580; CHECK-SD-NEXT: ret6581;6582; CHECK-GI-LABEL: test_v2f32_post_imm_ld3lane:6583; CHECK-GI: ; %bb.0:6584; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26585; CHECK-GI-NEXT: add x8, x0, #126586; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26587; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26588; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0]6589; CHECK-GI-NEXT: str x8, [x1]6590; CHECK-GI-NEXT: ret6591 %ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, ptr %A)6592 %tmp = getelementptr float, ptr %A, i32 36593 store ptr %tmp, ptr %ptr6594 ret { <2 x float>, <2 x float>, <2 x float> } %ld36595}6596 6597define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind {6598; CHECK-SD-LABEL: test_v2f32_post_reg_ld3lane:6599; CHECK-SD: ; %bb.0:6600; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26601; CHECK-SD-NEXT: lsl x8, x2, #26602; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26603; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26604; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x86605; CHECK-SD-NEXT: str x0, [x1]6606; CHECK-SD-NEXT: ret6607;6608; CHECK-GI-LABEL: test_v2f32_post_reg_ld3lane:6609; CHECK-GI: ; %bb.0:6610; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26611; CHECK-GI-NEXT: add x8, x0, x2, lsl #26612; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26613; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26614; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0]6615; CHECK-GI-NEXT: str x8, [x1]6616; CHECK-GI-NEXT: ret6617 %ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, ptr %A)6618 %tmp = getelementptr float, ptr %A, i64 %inc6619 store ptr %tmp, ptr %ptr6620 ret { <2 x float>, <2 x float>, <2 x float> } %ld36621}6622 6623declare { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f32.p0(<2 x float>, <2 x float>, <2 x float>, i64, ptr) nounwind readonly6624 6625 6626define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind {6627; CHECK-SD-LABEL: test_v2f64_post_imm_ld3lane:6628; CHECK-SD: ; %bb.0:6629; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26630; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26631; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26632; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #246633; CHECK-SD-NEXT: str x0, [x1]6634; CHECK-SD-NEXT: ret6635;6636; CHECK-GI-LABEL: test_v2f64_post_imm_ld3lane:6637; CHECK-GI: ; %bb.0:6638; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26639; CHECK-GI-NEXT: add x8, x0, #246640; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26641; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26642; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0]6643; CHECK-GI-NEXT: str x8, [x1]6644; CHECK-GI-NEXT: ret6645 %ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, ptr %A)6646 %tmp = getelementptr double, ptr %A, i32 36647 store ptr %tmp, ptr %ptr6648 ret { <2 x double>, <2 x double>, <2 x double> } %ld36649}6650 6651define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind {6652; CHECK-SD-LABEL: test_v2f64_post_reg_ld3lane:6653; CHECK-SD: ; %bb.0:6654; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26655; CHECK-SD-NEXT: lsl x8, x2, #36656; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26657; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26658; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x86659; CHECK-SD-NEXT: str x0, [x1]6660; CHECK-SD-NEXT: ret6661;6662; CHECK-GI-LABEL: test_v2f64_post_reg_ld3lane:6663; CHECK-GI: ; %bb.0:6664; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q26665; CHECK-GI-NEXT: add x8, x0, x2, lsl #36666; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q26667; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q26668; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0]6669; CHECK-GI-NEXT: str x8, [x1]6670; CHECK-GI-NEXT: ret6671 %ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, ptr %A)6672 %tmp = getelementptr double, ptr %A, i64 %inc6673 store ptr %tmp, ptr %ptr6674 ret { <2 x double>, <2 x double>, <2 x double> } %ld36675}6676 6677declare { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane.v2f64.p0(<2 x double>, <2 x double>, <2 x double>, i64, ptr) nounwind readonly6678 6679 6680define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind {6681; CHECK-SD-LABEL: test_v1f64_post_imm_ld3lane:6682; CHECK-SD: ; %bb.0:6683; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26684; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26685; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26686; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #246687; CHECK-SD-NEXT: str x0, [x1]6688; CHECK-SD-NEXT: ret6689;6690; CHECK-GI-LABEL: test_v1f64_post_imm_ld3lane:6691; CHECK-GI: ; %bb.0:6692; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26693; CHECK-GI-NEXT: add x8, x0, #246694; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26695; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26696; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0]6697; CHECK-GI-NEXT: str x8, [x1]6698; CHECK-GI-NEXT: ret6699 %ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, ptr %A)6700 %tmp = getelementptr double, ptr %A, i32 36701 store ptr %tmp, ptr %ptr6702 ret { <1 x double>, <1 x double>, <1 x double> } %ld36703}6704 6705define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind {6706; CHECK-SD-LABEL: test_v1f64_post_reg_ld3lane:6707; CHECK-SD: ; %bb.0:6708; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26709; CHECK-SD-NEXT: lsl x8, x2, #36710; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26711; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26712; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x86713; CHECK-SD-NEXT: str x0, [x1]6714; CHECK-SD-NEXT: ret6715;6716; CHECK-GI-LABEL: test_v1f64_post_reg_ld3lane:6717; CHECK-GI: ; %bb.0:6718; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q26719; CHECK-GI-NEXT: add x8, x0, x2, lsl #36720; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q26721; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q26722; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0]6723; CHECK-GI-NEXT: str x8, [x1]6724; CHECK-GI-NEXT: ret6725 %ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, ptr %A)6726 %tmp = getelementptr double, ptr %A, i64 %inc6727 store ptr %tmp, ptr %ptr6728 ret { <1 x double>, <1 x double>, <1 x double> } %ld36729}6730 6731declare { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane.v1f64.p0(<1 x double>, <1 x double>, <1 x double>, i64, ptr) nounwind readonly6732 6733 6734define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind {6735; CHECK-SD-LABEL: test_v16i8_post_imm_ld4lane:6736; CHECK-SD: ; %bb.0:6737; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36738; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36739; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36740; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36741; CHECK-SD-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], #46742; CHECK-SD-NEXT: str x0, [x1]6743; CHECK-SD-NEXT: ret6744;6745; CHECK-GI-LABEL: test_v16i8_post_imm_ld4lane:6746; CHECK-GI: ; %bb.0:6747; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36748; CHECK-GI-NEXT: add x8, x0, #46749; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36750; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36751; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36752; CHECK-GI-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0]6753; CHECK-GI-NEXT: str x8, [x1]6754; CHECK-GI-NEXT: ret6755 %ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, ptr %A)6756 %tmp = getelementptr i8, ptr %A, i32 46757 store ptr %tmp, ptr %ptr6758 ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld46759}6760 6761define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind {6762; CHECK-SD-LABEL: test_v16i8_post_reg_ld4lane:6763; CHECK-SD: ; %bb.0:6764; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36765; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36766; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36767; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36768; CHECK-SD-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], x26769; CHECK-SD-NEXT: str x0, [x1]6770; CHECK-SD-NEXT: ret6771;6772; CHECK-GI-LABEL: test_v16i8_post_reg_ld4lane:6773; CHECK-GI: ; %bb.0:6774; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36775; CHECK-GI-NEXT: add x8, x0, x26776; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36777; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36778; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36779; CHECK-GI-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0]6780; CHECK-GI-NEXT: str x8, [x1]6781; CHECK-GI-NEXT: ret6782 %ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, ptr %A)6783 %tmp = getelementptr i8, ptr %A, i64 %inc6784 store ptr %tmp, ptr %ptr6785 ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld46786}6787 6788declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, i64, ptr) nounwind readonly6789 6790 6791define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind {6792; CHECK-SD-LABEL: test_v8i8_post_imm_ld4lane:6793; CHECK-SD: ; %bb.0:6794; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36795; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36796; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36797; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36798; CHECK-SD-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], #46799; CHECK-SD-NEXT: str x0, [x1]6800; CHECK-SD-NEXT: ret6801;6802; CHECK-GI-LABEL: test_v8i8_post_imm_ld4lane:6803; CHECK-GI: ; %bb.0:6804; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36805; CHECK-GI-NEXT: add x8, x0, #46806; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36807; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36808; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36809; CHECK-GI-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0]6810; CHECK-GI-NEXT: str x8, [x1]6811; CHECK-GI-NEXT: ret6812 %ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, ptr %A)6813 %tmp = getelementptr i8, ptr %A, i32 46814 store ptr %tmp, ptr %ptr6815 ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld46816}6817 6818define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind {6819; CHECK-SD-LABEL: test_v8i8_post_reg_ld4lane:6820; CHECK-SD: ; %bb.0:6821; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36822; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36823; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36824; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36825; CHECK-SD-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], x26826; CHECK-SD-NEXT: str x0, [x1]6827; CHECK-SD-NEXT: ret6828;6829; CHECK-GI-LABEL: test_v8i8_post_reg_ld4lane:6830; CHECK-GI: ; %bb.0:6831; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36832; CHECK-GI-NEXT: add x8, x0, x26833; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36834; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36835; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36836; CHECK-GI-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0]6837; CHECK-GI-NEXT: str x8, [x1]6838; CHECK-GI-NEXT: ret6839 %ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, ptr %A)6840 %tmp = getelementptr i8, ptr %A, i64 %inc6841 store ptr %tmp, ptr %ptr6842 ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld46843}6844 6845declare { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i64, ptr) nounwind readonly6846 6847 6848define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind {6849; CHECK-SD-LABEL: test_v8i16_post_imm_ld4lane:6850; CHECK-SD: ; %bb.0:6851; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36852; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36853; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36854; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36855; CHECK-SD-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], #86856; CHECK-SD-NEXT: str x0, [x1]6857; CHECK-SD-NEXT: ret6858;6859; CHECK-GI-LABEL: test_v8i16_post_imm_ld4lane:6860; CHECK-GI: ; %bb.0:6861; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36862; CHECK-GI-NEXT: add x8, x0, #86863; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36864; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36865; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36866; CHECK-GI-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0]6867; CHECK-GI-NEXT: str x8, [x1]6868; CHECK-GI-NEXT: ret6869 %ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, ptr %A)6870 %tmp = getelementptr i16, ptr %A, i32 46871 store ptr %tmp, ptr %ptr6872 ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld46873}6874 6875define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind {6876; CHECK-SD-LABEL: test_v8i16_post_reg_ld4lane:6877; CHECK-SD: ; %bb.0:6878; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36879; CHECK-SD-NEXT: lsl x8, x2, #16880; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36881; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36882; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36883; CHECK-SD-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], x86884; CHECK-SD-NEXT: str x0, [x1]6885; CHECK-SD-NEXT: ret6886;6887; CHECK-GI-LABEL: test_v8i16_post_reg_ld4lane:6888; CHECK-GI: ; %bb.0:6889; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36890; CHECK-GI-NEXT: add x8, x0, x2, lsl #16891; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36892; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36893; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36894; CHECK-GI-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0]6895; CHECK-GI-NEXT: str x8, [x1]6896; CHECK-GI-NEXT: ret6897 %ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, ptr %A)6898 %tmp = getelementptr i16, ptr %A, i64 %inc6899 store ptr %tmp, ptr %ptr6900 ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld46901}6902 6903declare { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i64, ptr) nounwind readonly6904 6905 6906define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind {6907; CHECK-SD-LABEL: test_v4i16_post_imm_ld4lane:6908; CHECK-SD: ; %bb.0:6909; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36910; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36911; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36912; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36913; CHECK-SD-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], #86914; CHECK-SD-NEXT: str x0, [x1]6915; CHECK-SD-NEXT: ret6916;6917; CHECK-GI-LABEL: test_v4i16_post_imm_ld4lane:6918; CHECK-GI: ; %bb.0:6919; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36920; CHECK-GI-NEXT: add x8, x0, #86921; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36922; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36923; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36924; CHECK-GI-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0]6925; CHECK-GI-NEXT: str x8, [x1]6926; CHECK-GI-NEXT: ret6927 %ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, ptr %A)6928 %tmp = getelementptr i16, ptr %A, i32 46929 store ptr %tmp, ptr %ptr6930 ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld46931}6932 6933define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind {6934; CHECK-SD-LABEL: test_v4i16_post_reg_ld4lane:6935; CHECK-SD: ; %bb.0:6936; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36937; CHECK-SD-NEXT: lsl x8, x2, #16938; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36939; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36940; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36941; CHECK-SD-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], x86942; CHECK-SD-NEXT: str x0, [x1]6943; CHECK-SD-NEXT: ret6944;6945; CHECK-GI-LABEL: test_v4i16_post_reg_ld4lane:6946; CHECK-GI: ; %bb.0:6947; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36948; CHECK-GI-NEXT: add x8, x0, x2, lsl #16949; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36950; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36951; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36952; CHECK-GI-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0]6953; CHECK-GI-NEXT: str x8, [x1]6954; CHECK-GI-NEXT: ret6955 %ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, ptr %A)6956 %tmp = getelementptr i16, ptr %A, i64 %inc6957 store ptr %tmp, ptr %ptr6958 ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld46959}6960 6961declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i64, ptr) nounwind readonly6962 6963 6964define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind {6965; CHECK-SD-LABEL: test_v4i32_post_imm_ld4lane:6966; CHECK-SD: ; %bb.0:6967; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36968; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36969; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36970; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36971; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #166972; CHECK-SD-NEXT: str x0, [x1]6973; CHECK-SD-NEXT: ret6974;6975; CHECK-GI-LABEL: test_v4i32_post_imm_ld4lane:6976; CHECK-GI: ; %bb.0:6977; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36978; CHECK-GI-NEXT: add x8, x0, #166979; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36980; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36981; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36982; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]6983; CHECK-GI-NEXT: str x8, [x1]6984; CHECK-GI-NEXT: ret6985 %ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, ptr %A)6986 %tmp = getelementptr i32, ptr %A, i32 46987 store ptr %tmp, ptr %ptr6988 ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld46989}6990 6991define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind {6992; CHECK-SD-LABEL: test_v4i32_post_reg_ld4lane:6993; CHECK-SD: ; %bb.0:6994; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q36995; CHECK-SD-NEXT: lsl x8, x2, #26996; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q36997; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q36998; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q36999; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x87000; CHECK-SD-NEXT: str x0, [x1]7001; CHECK-SD-NEXT: ret7002;7003; CHECK-GI-LABEL: test_v4i32_post_reg_ld4lane:7004; CHECK-GI: ; %bb.0:7005; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37006; CHECK-GI-NEXT: add x8, x0, x2, lsl #27007; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37008; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37009; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37010; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]7011; CHECK-GI-NEXT: str x8, [x1]7012; CHECK-GI-NEXT: ret7013 %ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, ptr %A)7014 %tmp = getelementptr i32, ptr %A, i64 %inc7015 store ptr %tmp, ptr %ptr7016 ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld47017}7018 7019declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i64, ptr) nounwind readonly7020 7021 7022define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind {7023; CHECK-SD-LABEL: test_v2i32_post_imm_ld4lane:7024; CHECK-SD: ; %bb.0:7025; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37026; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37027; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37028; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37029; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #167030; CHECK-SD-NEXT: str x0, [x1]7031; CHECK-SD-NEXT: ret7032;7033; CHECK-GI-LABEL: test_v2i32_post_imm_ld4lane:7034; CHECK-GI: ; %bb.0:7035; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37036; CHECK-GI-NEXT: add x8, x0, #167037; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37038; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37039; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37040; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]7041; CHECK-GI-NEXT: str x8, [x1]7042; CHECK-GI-NEXT: ret7043 %ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, ptr %A)7044 %tmp = getelementptr i32, ptr %A, i32 47045 store ptr %tmp, ptr %ptr7046 ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld47047}7048 7049define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind {7050; CHECK-SD-LABEL: test_v2i32_post_reg_ld4lane:7051; CHECK-SD: ; %bb.0:7052; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37053; CHECK-SD-NEXT: lsl x8, x2, #27054; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37055; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37056; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37057; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x87058; CHECK-SD-NEXT: str x0, [x1]7059; CHECK-SD-NEXT: ret7060;7061; CHECK-GI-LABEL: test_v2i32_post_reg_ld4lane:7062; CHECK-GI: ; %bb.0:7063; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37064; CHECK-GI-NEXT: add x8, x0, x2, lsl #27065; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37066; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37067; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37068; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]7069; CHECK-GI-NEXT: str x8, [x1]7070; CHECK-GI-NEXT: ret7071 %ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, ptr %A)7072 %tmp = getelementptr i32, ptr %A, i64 %inc7073 store ptr %tmp, ptr %ptr7074 ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld47075}7076 7077declare { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i64, ptr) nounwind readonly7078 7079 7080define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind {7081; CHECK-SD-LABEL: test_v2i64_post_imm_ld4lane:7082; CHECK-SD: ; %bb.0:7083; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37084; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37085; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37086; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37087; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #327088; CHECK-SD-NEXT: str x0, [x1]7089; CHECK-SD-NEXT: ret7090;7091; CHECK-GI-LABEL: test_v2i64_post_imm_ld4lane:7092; CHECK-GI: ; %bb.0:7093; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37094; CHECK-GI-NEXT: add x8, x0, #327095; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37096; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37097; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37098; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]7099; CHECK-GI-NEXT: str x8, [x1]7100; CHECK-GI-NEXT: ret7101 %ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, ptr %A)7102 %tmp = getelementptr i64, ptr %A, i32 47103 store ptr %tmp, ptr %ptr7104 ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld47105}7106 7107define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind {7108; CHECK-SD-LABEL: test_v2i64_post_reg_ld4lane:7109; CHECK-SD: ; %bb.0:7110; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37111; CHECK-SD-NEXT: lsl x8, x2, #37112; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37113; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37114; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37115; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x87116; CHECK-SD-NEXT: str x0, [x1]7117; CHECK-SD-NEXT: ret7118;7119; CHECK-GI-LABEL: test_v2i64_post_reg_ld4lane:7120; CHECK-GI: ; %bb.0:7121; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37122; CHECK-GI-NEXT: add x8, x0, x2, lsl #37123; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37124; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37125; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37126; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]7127; CHECK-GI-NEXT: str x8, [x1]7128; CHECK-GI-NEXT: ret7129 %ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, ptr %A)7130 %tmp = getelementptr i64, ptr %A, i64 %inc7131 store ptr %tmp, ptr %ptr7132 ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld47133}7134 7135declare { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, i64, ptr) nounwind readonly7136 7137 7138define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind {7139; CHECK-SD-LABEL: test_v1i64_post_imm_ld4lane:7140; CHECK-SD: ; %bb.0:7141; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37142; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37143; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37144; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37145; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #327146; CHECK-SD-NEXT: str x0, [x1]7147; CHECK-SD-NEXT: ret7148;7149; CHECK-GI-LABEL: test_v1i64_post_imm_ld4lane:7150; CHECK-GI: ; %bb.0:7151; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37152; CHECK-GI-NEXT: add x8, x0, #327153; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37154; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37155; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37156; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]7157; CHECK-GI-NEXT: str x8, [x1]7158; CHECK-GI-NEXT: ret7159 %ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, ptr %A)7160 %tmp = getelementptr i64, ptr %A, i32 47161 store ptr %tmp, ptr %ptr7162 ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld47163}7164 7165define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind {7166; CHECK-SD-LABEL: test_v1i64_post_reg_ld4lane:7167; CHECK-SD: ; %bb.0:7168; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37169; CHECK-SD-NEXT: lsl x8, x2, #37170; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37171; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37172; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37173; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x87174; CHECK-SD-NEXT: str x0, [x1]7175; CHECK-SD-NEXT: ret7176;7177; CHECK-GI-LABEL: test_v1i64_post_reg_ld4lane:7178; CHECK-GI: ; %bb.0:7179; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37180; CHECK-GI-NEXT: add x8, x0, x2, lsl #37181; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37182; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37183; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37184; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]7185; CHECK-GI-NEXT: str x8, [x1]7186; CHECK-GI-NEXT: ret7187 %ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, ptr %A)7188 %tmp = getelementptr i64, ptr %A, i64 %inc7189 store ptr %tmp, ptr %ptr7190 ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld47191}7192 7193declare { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>, i64, ptr) nounwind readonly7194 7195 7196define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld4lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind {7197; CHECK-SD-LABEL: test_v4f32_post_imm_ld4lane:7198; CHECK-SD: ; %bb.0:7199; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37200; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37201; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37202; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37203; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #167204; CHECK-SD-NEXT: str x0, [x1]7205; CHECK-SD-NEXT: ret7206;7207; CHECK-GI-LABEL: test_v4f32_post_imm_ld4lane:7208; CHECK-GI: ; %bb.0:7209; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37210; CHECK-GI-NEXT: add x8, x0, #167211; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37212; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37213; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37214; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]7215; CHECK-GI-NEXT: str x8, [x1]7216; CHECK-GI-NEXT: ret7217 %ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, ptr %A)7218 %tmp = getelementptr float, ptr %A, i32 47219 store ptr %tmp, ptr %ptr7220 ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld47221}7222 7223define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind {7224; CHECK-SD-LABEL: test_v4f32_post_reg_ld4lane:7225; CHECK-SD: ; %bb.0:7226; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37227; CHECK-SD-NEXT: lsl x8, x2, #27228; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37229; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37230; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37231; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x87232; CHECK-SD-NEXT: str x0, [x1]7233; CHECK-SD-NEXT: ret7234;7235; CHECK-GI-LABEL: test_v4f32_post_reg_ld4lane:7236; CHECK-GI: ; %bb.0:7237; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37238; CHECK-GI-NEXT: add x8, x0, x2, lsl #27239; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37240; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37241; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37242; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]7243; CHECK-GI-NEXT: str x8, [x1]7244; CHECK-GI-NEXT: ret7245 %ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, ptr %A)7246 %tmp = getelementptr float, ptr %A, i64 %inc7247 store ptr %tmp, ptr %ptr7248 ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld47249}7250 7251declare { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4lane.v4f32.p0(<4 x float>, <4 x float>, <4 x float>, <4 x float>, i64, ptr) nounwind readonly7252 7253 7254define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld4lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind {7255; CHECK-SD-LABEL: test_v2f32_post_imm_ld4lane:7256; CHECK-SD: ; %bb.0:7257; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37258; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37259; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37260; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37261; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #167262; CHECK-SD-NEXT: str x0, [x1]7263; CHECK-SD-NEXT: ret7264;7265; CHECK-GI-LABEL: test_v2f32_post_imm_ld4lane:7266; CHECK-GI: ; %bb.0:7267; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37268; CHECK-GI-NEXT: add x8, x0, #167269; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37270; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37271; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37272; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]7273; CHECK-GI-NEXT: str x8, [x1]7274; CHECK-GI-NEXT: ret7275 %ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, ptr %A)7276 %tmp = getelementptr float, ptr %A, i32 47277 store ptr %tmp, ptr %ptr7278 ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld47279}7280 7281define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind {7282; CHECK-SD-LABEL: test_v2f32_post_reg_ld4lane:7283; CHECK-SD: ; %bb.0:7284; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37285; CHECK-SD-NEXT: lsl x8, x2, #27286; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37287; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37288; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37289; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x87290; CHECK-SD-NEXT: str x0, [x1]7291; CHECK-SD-NEXT: ret7292;7293; CHECK-GI-LABEL: test_v2f32_post_reg_ld4lane:7294; CHECK-GI: ; %bb.0:7295; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37296; CHECK-GI-NEXT: add x8, x0, x2, lsl #27297; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37298; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37299; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37300; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0]7301; CHECK-GI-NEXT: str x8, [x1]7302; CHECK-GI-NEXT: ret7303 %ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, ptr %A)7304 %tmp = getelementptr float, ptr %A, i64 %inc7305 store ptr %tmp, ptr %ptr7306 ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld47307}7308 7309declare { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4lane.v2f32.p0(<2 x float>, <2 x float>, <2 x float>, <2 x float>, i64, ptr) nounwind readonly7310 7311 7312define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld4lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind {7313; CHECK-SD-LABEL: test_v2f64_post_imm_ld4lane:7314; CHECK-SD: ; %bb.0:7315; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37316; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37317; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37318; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37319; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #327320; CHECK-SD-NEXT: str x0, [x1]7321; CHECK-SD-NEXT: ret7322;7323; CHECK-GI-LABEL: test_v2f64_post_imm_ld4lane:7324; CHECK-GI: ; %bb.0:7325; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37326; CHECK-GI-NEXT: add x8, x0, #327327; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37328; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37329; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37330; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]7331; CHECK-GI-NEXT: str x8, [x1]7332; CHECK-GI-NEXT: ret7333 %ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, ptr %A)7334 %tmp = getelementptr double, ptr %A, i32 47335 store ptr %tmp, ptr %ptr7336 ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld47337}7338 7339define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind {7340; CHECK-SD-LABEL: test_v2f64_post_reg_ld4lane:7341; CHECK-SD: ; %bb.0:7342; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37343; CHECK-SD-NEXT: lsl x8, x2, #37344; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37345; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37346; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37347; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x87348; CHECK-SD-NEXT: str x0, [x1]7349; CHECK-SD-NEXT: ret7350;7351; CHECK-GI-LABEL: test_v2f64_post_reg_ld4lane:7352; CHECK-GI: ; %bb.0:7353; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37354; CHECK-GI-NEXT: add x8, x0, x2, lsl #37355; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37356; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37357; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37358; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]7359; CHECK-GI-NEXT: str x8, [x1]7360; CHECK-GI-NEXT: ret7361 %ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, ptr %A)7362 %tmp = getelementptr double, ptr %A, i64 %inc7363 store ptr %tmp, ptr %ptr7364 ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld47365}7366 7367declare { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4lane.v2f64.p0(<2 x double>, <2 x double>, <2 x double>, <2 x double>, i64, ptr) nounwind readonly7368 7369 7370define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld4lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind {7371; CHECK-SD-LABEL: test_v1f64_post_imm_ld4lane:7372; CHECK-SD: ; %bb.0:7373; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37374; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37375; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37376; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37377; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #327378; CHECK-SD-NEXT: str x0, [x1]7379; CHECK-SD-NEXT: ret7380;7381; CHECK-GI-LABEL: test_v1f64_post_imm_ld4lane:7382; CHECK-GI: ; %bb.0:7383; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37384; CHECK-GI-NEXT: add x8, x0, #327385; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37386; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37387; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37388; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]7389; CHECK-GI-NEXT: str x8, [x1]7390; CHECK-GI-NEXT: ret7391 %ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, ptr %A)7392 %tmp = getelementptr double, ptr %A, i32 47393 store ptr %tmp, ptr %ptr7394 ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld47395}7396 7397define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind {7398; CHECK-SD-LABEL: test_v1f64_post_reg_ld4lane:7399; CHECK-SD: ; %bb.0:7400; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37401; CHECK-SD-NEXT: lsl x8, x2, #37402; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37403; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37404; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37405; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x87406; CHECK-SD-NEXT: str x0, [x1]7407; CHECK-SD-NEXT: ret7408;7409; CHECK-GI-LABEL: test_v1f64_post_reg_ld4lane:7410; CHECK-GI: ; %bb.0:7411; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q37412; CHECK-GI-NEXT: add x8, x0, x2, lsl #37413; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q37414; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q37415; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q37416; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0]7417; CHECK-GI-NEXT: str x8, [x1]7418; CHECK-GI-NEXT: ret7419 %ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, ptr %A)7420 %tmp = getelementptr double, ptr %A, i64 %inc7421 store ptr %tmp, ptr %ptr7422 ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld47423}7424 7425declare { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4lane.v1f64.p0(<1 x double>, <1 x double>, <1 x double>, <1 x double>, i64, ptr) nounwind readonly7426 7427 7428define ptr @test_v16i8_post_imm_st2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C) nounwind {7429; CHECK-SD-LABEL: test_v16i8_post_imm_st2:7430; CHECK-SD: ; %bb.0:7431; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17432; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17433; CHECK-SD-NEXT: st2.16b { v0, v1 }, [x0], #327434; CHECK-SD-NEXT: ret7435;7436; CHECK-GI-LABEL: test_v16i8_post_imm_st2:7437; CHECK-GI: ; %bb.0:7438; CHECK-GI-NEXT: mov x8, x07439; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17440; CHECK-GI-NEXT: add x0, x0, #327441; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17442; CHECK-GI-NEXT: st2.16b { v0, v1 }, [x8]7443; CHECK-GI-NEXT: ret7444 call void @llvm.aarch64.neon.st2.v16i8.p0(<16 x i8> %B, <16 x i8> %C, ptr %A)7445 %tmp = getelementptr i8, ptr %A, i32 327446 ret ptr %tmp7447}7448 7449define ptr @test_v16i8_post_reg_st2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, i64 %inc) nounwind {7450; CHECK-SD-LABEL: test_v16i8_post_reg_st2:7451; CHECK-SD: ; %bb.0:7452; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17453; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17454; CHECK-SD-NEXT: st2.16b { v0, v1 }, [x0], x27455; CHECK-SD-NEXT: ret7456;7457; CHECK-GI-LABEL: test_v16i8_post_reg_st2:7458; CHECK-GI: ; %bb.0:7459; CHECK-GI-NEXT: mov x8, x07460; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17461; CHECK-GI-NEXT: add x0, x0, x27462; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17463; CHECK-GI-NEXT: st2.16b { v0, v1 }, [x8]7464; CHECK-GI-NEXT: ret7465 call void @llvm.aarch64.neon.st2.v16i8.p0(<16 x i8> %B, <16 x i8> %C, ptr %A)7466 %tmp = getelementptr i8, ptr %A, i64 %inc7467 ret ptr %tmp7468}7469 7470declare void @llvm.aarch64.neon.st2.v16i8.p0(<16 x i8>, <16 x i8>, ptr)7471 7472 7473define ptr @test_v8i8_post_imm_st2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C) nounwind {7474; CHECK-SD-LABEL: test_v8i8_post_imm_st2:7475; CHECK-SD: ; %bb.0:7476; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17477; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17478; CHECK-SD-NEXT: st2.8b { v0, v1 }, [x0], #167479; CHECK-SD-NEXT: ret7480;7481; CHECK-GI-LABEL: test_v8i8_post_imm_st2:7482; CHECK-GI: ; %bb.0:7483; CHECK-GI-NEXT: mov x8, x07484; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17485; CHECK-GI-NEXT: add x0, x0, #167486; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17487; CHECK-GI-NEXT: st2.8b { v0, v1 }, [x8]7488; CHECK-GI-NEXT: ret7489 call void @llvm.aarch64.neon.st2.v8i8.p0(<8 x i8> %B, <8 x i8> %C, ptr %A)7490 %tmp = getelementptr i8, ptr %A, i32 167491 ret ptr %tmp7492}7493 7494define ptr @test_v8i8_post_reg_st2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, i64 %inc) nounwind {7495; CHECK-SD-LABEL: test_v8i8_post_reg_st2:7496; CHECK-SD: ; %bb.0:7497; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17498; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17499; CHECK-SD-NEXT: st2.8b { v0, v1 }, [x0], x27500; CHECK-SD-NEXT: ret7501;7502; CHECK-GI-LABEL: test_v8i8_post_reg_st2:7503; CHECK-GI: ; %bb.0:7504; CHECK-GI-NEXT: mov x8, x07505; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17506; CHECK-GI-NEXT: add x0, x0, x27507; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17508; CHECK-GI-NEXT: st2.8b { v0, v1 }, [x8]7509; CHECK-GI-NEXT: ret7510 call void @llvm.aarch64.neon.st2.v8i8.p0(<8 x i8> %B, <8 x i8> %C, ptr %A)7511 %tmp = getelementptr i8, ptr %A, i64 %inc7512 ret ptr %tmp7513}7514 7515declare void @llvm.aarch64.neon.st2.v8i8.p0(<8 x i8>, <8 x i8>, ptr)7516 7517 7518define ptr @test_v8i16_post_imm_st2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C) nounwind {7519; CHECK-SD-LABEL: test_v8i16_post_imm_st2:7520; CHECK-SD: ; %bb.0:7521; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17522; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17523; CHECK-SD-NEXT: st2.8h { v0, v1 }, [x0], #327524; CHECK-SD-NEXT: ret7525;7526; CHECK-GI-LABEL: test_v8i16_post_imm_st2:7527; CHECK-GI: ; %bb.0:7528; CHECK-GI-NEXT: mov x8, x07529; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17530; CHECK-GI-NEXT: add x0, x0, #327531; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17532; CHECK-GI-NEXT: st2.8h { v0, v1 }, [x8]7533; CHECK-GI-NEXT: ret7534 call void @llvm.aarch64.neon.st2.v8i16.p0(<8 x i16> %B, <8 x i16> %C, ptr %A)7535 %tmp = getelementptr i16, ptr %A, i32 167536 ret ptr %tmp7537}7538 7539define ptr @test_v8i16_post_reg_st2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, i64 %inc) nounwind {7540; CHECK-SD-LABEL: test_v8i16_post_reg_st2:7541; CHECK-SD: ; %bb.0:7542; CHECK-SD-NEXT: lsl x8, x2, #17543; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17544; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17545; CHECK-SD-NEXT: st2.8h { v0, v1 }, [x0], x87546; CHECK-SD-NEXT: ret7547;7548; CHECK-GI-LABEL: test_v8i16_post_reg_st2:7549; CHECK-GI: ; %bb.0:7550; CHECK-GI-NEXT: mov x8, x07551; CHECK-GI-NEXT: add x0, x0, x2, lsl #17552; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17553; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17554; CHECK-GI-NEXT: st2.8h { v0, v1 }, [x8]7555; CHECK-GI-NEXT: ret7556 call void @llvm.aarch64.neon.st2.v8i16.p0(<8 x i16> %B, <8 x i16> %C, ptr %A)7557 %tmp = getelementptr i16, ptr %A, i64 %inc7558 ret ptr %tmp7559}7560 7561declare void @llvm.aarch64.neon.st2.v8i16.p0(<8 x i16>, <8 x i16>, ptr)7562 7563 7564define ptr @test_v4i16_post_imm_st2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C) nounwind {7565; CHECK-SD-LABEL: test_v4i16_post_imm_st2:7566; CHECK-SD: ; %bb.0:7567; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17568; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17569; CHECK-SD-NEXT: st2.4h { v0, v1 }, [x0], #167570; CHECK-SD-NEXT: ret7571;7572; CHECK-GI-LABEL: test_v4i16_post_imm_st2:7573; CHECK-GI: ; %bb.0:7574; CHECK-GI-NEXT: mov x8, x07575; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17576; CHECK-GI-NEXT: add x0, x0, #167577; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17578; CHECK-GI-NEXT: st2.4h { v0, v1 }, [x8]7579; CHECK-GI-NEXT: ret7580 call void @llvm.aarch64.neon.st2.v4i16.p0(<4 x i16> %B, <4 x i16> %C, ptr %A)7581 %tmp = getelementptr i16, ptr %A, i32 87582 ret ptr %tmp7583}7584 7585define ptr @test_v4i16_post_reg_st2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, i64 %inc) nounwind {7586; CHECK-SD-LABEL: test_v4i16_post_reg_st2:7587; CHECK-SD: ; %bb.0:7588; CHECK-SD-NEXT: lsl x8, x2, #17589; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17590; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17591; CHECK-SD-NEXT: st2.4h { v0, v1 }, [x0], x87592; CHECK-SD-NEXT: ret7593;7594; CHECK-GI-LABEL: test_v4i16_post_reg_st2:7595; CHECK-GI: ; %bb.0:7596; CHECK-GI-NEXT: mov x8, x07597; CHECK-GI-NEXT: add x0, x0, x2, lsl #17598; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17599; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17600; CHECK-GI-NEXT: st2.4h { v0, v1 }, [x8]7601; CHECK-GI-NEXT: ret7602 call void @llvm.aarch64.neon.st2.v4i16.p0(<4 x i16> %B, <4 x i16> %C, ptr %A)7603 %tmp = getelementptr i16, ptr %A, i64 %inc7604 ret ptr %tmp7605}7606 7607declare void @llvm.aarch64.neon.st2.v4i16.p0(<4 x i16>, <4 x i16>, ptr)7608 7609 7610define ptr @test_v4i32_post_imm_st2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C) nounwind {7611; CHECK-SD-LABEL: test_v4i32_post_imm_st2:7612; CHECK-SD: ; %bb.0:7613; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17614; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17615; CHECK-SD-NEXT: st2.4s { v0, v1 }, [x0], #327616; CHECK-SD-NEXT: ret7617;7618; CHECK-GI-LABEL: test_v4i32_post_imm_st2:7619; CHECK-GI: ; %bb.0:7620; CHECK-GI-NEXT: mov x8, x07621; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17622; CHECK-GI-NEXT: add x0, x0, #327623; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17624; CHECK-GI-NEXT: st2.4s { v0, v1 }, [x8]7625; CHECK-GI-NEXT: ret7626 call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %B, <4 x i32> %C, ptr %A)7627 %tmp = getelementptr i32, ptr %A, i32 87628 ret ptr %tmp7629}7630 7631define ptr @test_v4i32_post_reg_st2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, i64 %inc) nounwind {7632; CHECK-SD-LABEL: test_v4i32_post_reg_st2:7633; CHECK-SD: ; %bb.0:7634; CHECK-SD-NEXT: lsl x8, x2, #27635; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17636; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17637; CHECK-SD-NEXT: st2.4s { v0, v1 }, [x0], x87638; CHECK-SD-NEXT: ret7639;7640; CHECK-GI-LABEL: test_v4i32_post_reg_st2:7641; CHECK-GI: ; %bb.0:7642; CHECK-GI-NEXT: mov x8, x07643; CHECK-GI-NEXT: add x0, x0, x2, lsl #27644; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17645; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17646; CHECK-GI-NEXT: st2.4s { v0, v1 }, [x8]7647; CHECK-GI-NEXT: ret7648 call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %B, <4 x i32> %C, ptr %A)7649 %tmp = getelementptr i32, ptr %A, i64 %inc7650 ret ptr %tmp7651}7652 7653declare void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32>, <4 x i32>, ptr)7654 7655 7656define ptr @test_v2i32_post_imm_st2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C) nounwind {7657; CHECK-SD-LABEL: test_v2i32_post_imm_st2:7658; CHECK-SD: ; %bb.0:7659; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17660; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17661; CHECK-SD-NEXT: st2.2s { v0, v1 }, [x0], #167662; CHECK-SD-NEXT: ret7663;7664; CHECK-GI-LABEL: test_v2i32_post_imm_st2:7665; CHECK-GI: ; %bb.0:7666; CHECK-GI-NEXT: mov x8, x07667; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17668; CHECK-GI-NEXT: add x0, x0, #167669; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17670; CHECK-GI-NEXT: st2.2s { v0, v1 }, [x8]7671; CHECK-GI-NEXT: ret7672 call void @llvm.aarch64.neon.st2.v2i32.p0(<2 x i32> %B, <2 x i32> %C, ptr %A)7673 %tmp = getelementptr i32, ptr %A, i32 47674 ret ptr %tmp7675}7676 7677define ptr @test_v2i32_post_reg_st2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, i64 %inc) nounwind {7678; CHECK-SD-LABEL: test_v2i32_post_reg_st2:7679; CHECK-SD: ; %bb.0:7680; CHECK-SD-NEXT: lsl x8, x2, #27681; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17682; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17683; CHECK-SD-NEXT: st2.2s { v0, v1 }, [x0], x87684; CHECK-SD-NEXT: ret7685;7686; CHECK-GI-LABEL: test_v2i32_post_reg_st2:7687; CHECK-GI: ; %bb.0:7688; CHECK-GI-NEXT: mov x8, x07689; CHECK-GI-NEXT: add x0, x0, x2, lsl #27690; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17691; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17692; CHECK-GI-NEXT: st2.2s { v0, v1 }, [x8]7693; CHECK-GI-NEXT: ret7694 call void @llvm.aarch64.neon.st2.v2i32.p0(<2 x i32> %B, <2 x i32> %C, ptr %A)7695 %tmp = getelementptr i32, ptr %A, i64 %inc7696 ret ptr %tmp7697}7698 7699declare void @llvm.aarch64.neon.st2.v2i32.p0(<2 x i32>, <2 x i32>, ptr)7700 7701 7702define ptr @test_v2i64_post_imm_st2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C) nounwind {7703; CHECK-SD-LABEL: test_v2i64_post_imm_st2:7704; CHECK-SD: ; %bb.0:7705; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17706; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17707; CHECK-SD-NEXT: st2.2d { v0, v1 }, [x0], #327708; CHECK-SD-NEXT: ret7709;7710; CHECK-GI-LABEL: test_v2i64_post_imm_st2:7711; CHECK-GI: ; %bb.0:7712; CHECK-GI-NEXT: mov x8, x07713; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17714; CHECK-GI-NEXT: add x0, x0, #327715; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17716; CHECK-GI-NEXT: st2.2d { v0, v1 }, [x8]7717; CHECK-GI-NEXT: ret7718 call void @llvm.aarch64.neon.st2.v2i64.p0(<2 x i64> %B, <2 x i64> %C, ptr %A)7719 %tmp = getelementptr i64, ptr %A, i64 47720 ret ptr %tmp7721}7722 7723define ptr @test_v2i64_post_reg_st2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, i64 %inc) nounwind {7724; CHECK-SD-LABEL: test_v2i64_post_reg_st2:7725; CHECK-SD: ; %bb.0:7726; CHECK-SD-NEXT: lsl x8, x2, #37727; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17728; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17729; CHECK-SD-NEXT: st2.2d { v0, v1 }, [x0], x87730; CHECK-SD-NEXT: ret7731;7732; CHECK-GI-LABEL: test_v2i64_post_reg_st2:7733; CHECK-GI: ; %bb.0:7734; CHECK-GI-NEXT: mov x8, x07735; CHECK-GI-NEXT: add x0, x0, x2, lsl #37736; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17737; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17738; CHECK-GI-NEXT: st2.2d { v0, v1 }, [x8]7739; CHECK-GI-NEXT: ret7740 call void @llvm.aarch64.neon.st2.v2i64.p0(<2 x i64> %B, <2 x i64> %C, ptr %A)7741 %tmp = getelementptr i64, ptr %A, i64 %inc7742 ret ptr %tmp7743}7744 7745declare void @llvm.aarch64.neon.st2.v2i64.p0(<2 x i64>, <2 x i64>, ptr)7746 7747 7748define ptr @test_v1i64_post_imm_st2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C) nounwind {7749; CHECK-SD-LABEL: test_v1i64_post_imm_st2:7750; CHECK-SD: ; %bb.0:7751; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17752; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17753; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], #167754; CHECK-SD-NEXT: ret7755;7756; CHECK-GI-LABEL: test_v1i64_post_imm_st2:7757; CHECK-GI: ; %bb.0:7758; CHECK-GI-NEXT: mov x8, x07759; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17760; CHECK-GI-NEXT: add x0, x0, #167761; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17762; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8]7763; CHECK-GI-NEXT: ret7764 call void @llvm.aarch64.neon.st2.v1i64.p0(<1 x i64> %B, <1 x i64> %C, ptr %A)7765 %tmp = getelementptr i64, ptr %A, i64 27766 ret ptr %tmp7767}7768 7769define ptr @test_v1i64_post_reg_st2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, i64 %inc) nounwind {7770; CHECK-SD-LABEL: test_v1i64_post_reg_st2:7771; CHECK-SD: ; %bb.0:7772; CHECK-SD-NEXT: lsl x8, x2, #37773; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17774; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17775; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], x87776; CHECK-SD-NEXT: ret7777;7778; CHECK-GI-LABEL: test_v1i64_post_reg_st2:7779; CHECK-GI: ; %bb.0:7780; CHECK-GI-NEXT: mov x8, x07781; CHECK-GI-NEXT: add x0, x0, x2, lsl #37782; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17783; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17784; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8]7785; CHECK-GI-NEXT: ret7786 call void @llvm.aarch64.neon.st2.v1i64.p0(<1 x i64> %B, <1 x i64> %C, ptr %A)7787 %tmp = getelementptr i64, ptr %A, i64 %inc7788 ret ptr %tmp7789}7790 7791declare void @llvm.aarch64.neon.st2.v1i64.p0(<1 x i64>, <1 x i64>, ptr)7792 7793 7794define ptr @test_v4f32_post_imm_st2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C) nounwind {7795; CHECK-SD-LABEL: test_v4f32_post_imm_st2:7796; CHECK-SD: ; %bb.0:7797; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17798; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17799; CHECK-SD-NEXT: st2.4s { v0, v1 }, [x0], #327800; CHECK-SD-NEXT: ret7801;7802; CHECK-GI-LABEL: test_v4f32_post_imm_st2:7803; CHECK-GI: ; %bb.0:7804; CHECK-GI-NEXT: mov x8, x07805; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17806; CHECK-GI-NEXT: add x0, x0, #327807; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17808; CHECK-GI-NEXT: st2.4s { v0, v1 }, [x8]7809; CHECK-GI-NEXT: ret7810 call void @llvm.aarch64.neon.st2.v4f32.p0(<4 x float> %B, <4 x float> %C, ptr %A)7811 %tmp = getelementptr float, ptr %A, i32 87812 ret ptr %tmp7813}7814 7815define ptr @test_v4f32_post_reg_st2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, i64 %inc) nounwind {7816; CHECK-SD-LABEL: test_v4f32_post_reg_st2:7817; CHECK-SD: ; %bb.0:7818; CHECK-SD-NEXT: lsl x8, x2, #27819; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17820; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17821; CHECK-SD-NEXT: st2.4s { v0, v1 }, [x0], x87822; CHECK-SD-NEXT: ret7823;7824; CHECK-GI-LABEL: test_v4f32_post_reg_st2:7825; CHECK-GI: ; %bb.0:7826; CHECK-GI-NEXT: mov x8, x07827; CHECK-GI-NEXT: add x0, x0, x2, lsl #27828; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17829; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17830; CHECK-GI-NEXT: st2.4s { v0, v1 }, [x8]7831; CHECK-GI-NEXT: ret7832 call void @llvm.aarch64.neon.st2.v4f32.p0(<4 x float> %B, <4 x float> %C, ptr %A)7833 %tmp = getelementptr float, ptr %A, i64 %inc7834 ret ptr %tmp7835}7836 7837declare void @llvm.aarch64.neon.st2.v4f32.p0(<4 x float>, <4 x float>, ptr)7838 7839 7840define ptr @test_v2f32_post_imm_st2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C) nounwind {7841; CHECK-SD-LABEL: test_v2f32_post_imm_st2:7842; CHECK-SD: ; %bb.0:7843; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17844; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17845; CHECK-SD-NEXT: st2.2s { v0, v1 }, [x0], #167846; CHECK-SD-NEXT: ret7847;7848; CHECK-GI-LABEL: test_v2f32_post_imm_st2:7849; CHECK-GI: ; %bb.0:7850; CHECK-GI-NEXT: mov x8, x07851; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17852; CHECK-GI-NEXT: add x0, x0, #167853; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17854; CHECK-GI-NEXT: st2.2s { v0, v1 }, [x8]7855; CHECK-GI-NEXT: ret7856 call void @llvm.aarch64.neon.st2.v2f32.p0(<2 x float> %B, <2 x float> %C, ptr %A)7857 %tmp = getelementptr float, ptr %A, i32 47858 ret ptr %tmp7859}7860 7861define ptr @test_v2f32_post_reg_st2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, i64 %inc) nounwind {7862; CHECK-SD-LABEL: test_v2f32_post_reg_st2:7863; CHECK-SD: ; %bb.0:7864; CHECK-SD-NEXT: lsl x8, x2, #27865; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17866; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17867; CHECK-SD-NEXT: st2.2s { v0, v1 }, [x0], x87868; CHECK-SD-NEXT: ret7869;7870; CHECK-GI-LABEL: test_v2f32_post_reg_st2:7871; CHECK-GI: ; %bb.0:7872; CHECK-GI-NEXT: mov x8, x07873; CHECK-GI-NEXT: add x0, x0, x2, lsl #27874; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17875; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17876; CHECK-GI-NEXT: st2.2s { v0, v1 }, [x8]7877; CHECK-GI-NEXT: ret7878 call void @llvm.aarch64.neon.st2.v2f32.p0(<2 x float> %B, <2 x float> %C, ptr %A)7879 %tmp = getelementptr float, ptr %A, i64 %inc7880 ret ptr %tmp7881}7882 7883declare void @llvm.aarch64.neon.st2.v2f32.p0(<2 x float>, <2 x float>, ptr)7884 7885 7886define ptr @test_v2f64_post_imm_st2(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C) nounwind {7887; CHECK-SD-LABEL: test_v2f64_post_imm_st2:7888; CHECK-SD: ; %bb.0:7889; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17890; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17891; CHECK-SD-NEXT: st2.2d { v0, v1 }, [x0], #327892; CHECK-SD-NEXT: ret7893;7894; CHECK-GI-LABEL: test_v2f64_post_imm_st2:7895; CHECK-GI: ; %bb.0:7896; CHECK-GI-NEXT: mov x8, x07897; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17898; CHECK-GI-NEXT: add x0, x0, #327899; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17900; CHECK-GI-NEXT: st2.2d { v0, v1 }, [x8]7901; CHECK-GI-NEXT: ret7902 call void @llvm.aarch64.neon.st2.v2f64.p0(<2 x double> %B, <2 x double> %C, ptr %A)7903 %tmp = getelementptr double, ptr %A, i64 47904 ret ptr %tmp7905}7906 7907define ptr @test_v2f64_post_reg_st2(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, i64 %inc) nounwind {7908; CHECK-SD-LABEL: test_v2f64_post_reg_st2:7909; CHECK-SD: ; %bb.0:7910; CHECK-SD-NEXT: lsl x8, x2, #37911; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17912; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17913; CHECK-SD-NEXT: st2.2d { v0, v1 }, [x0], x87914; CHECK-SD-NEXT: ret7915;7916; CHECK-GI-LABEL: test_v2f64_post_reg_st2:7917; CHECK-GI: ; %bb.0:7918; CHECK-GI-NEXT: mov x8, x07919; CHECK-GI-NEXT: add x0, x0, x2, lsl #37920; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q17921; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q17922; CHECK-GI-NEXT: st2.2d { v0, v1 }, [x8]7923; CHECK-GI-NEXT: ret7924 call void @llvm.aarch64.neon.st2.v2f64.p0(<2 x double> %B, <2 x double> %C, ptr %A)7925 %tmp = getelementptr double, ptr %A, i64 %inc7926 ret ptr %tmp7927}7928 7929declare void @llvm.aarch64.neon.st2.v2f64.p0(<2 x double>, <2 x double>, ptr)7930 7931 7932define ptr @test_v1f64_post_imm_st2(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C) nounwind {7933; CHECK-SD-LABEL: test_v1f64_post_imm_st2:7934; CHECK-SD: ; %bb.0:7935; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17936; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17937; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], #167938; CHECK-SD-NEXT: ret7939;7940; CHECK-GI-LABEL: test_v1f64_post_imm_st2:7941; CHECK-GI: ; %bb.0:7942; CHECK-GI-NEXT: mov x8, x07943; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17944; CHECK-GI-NEXT: add x0, x0, #167945; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17946; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8]7947; CHECK-GI-NEXT: ret7948 call void @llvm.aarch64.neon.st2.v1f64.p0(<1 x double> %B, <1 x double> %C, ptr %A)7949 %tmp = getelementptr double, ptr %A, i64 27950 ret ptr %tmp7951}7952 7953define ptr @test_v1f64_post_reg_st2(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, i64 %inc) nounwind {7954; CHECK-SD-LABEL: test_v1f64_post_reg_st2:7955; CHECK-SD: ; %bb.0:7956; CHECK-SD-NEXT: lsl x8, x2, #37957; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17958; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17959; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], x87960; CHECK-SD-NEXT: ret7961;7962; CHECK-GI-LABEL: test_v1f64_post_reg_st2:7963; CHECK-GI: ; %bb.0:7964; CHECK-GI-NEXT: mov x8, x07965; CHECK-GI-NEXT: add x0, x0, x2, lsl #37966; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d17967; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d17968; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8]7969; CHECK-GI-NEXT: ret7970 call void @llvm.aarch64.neon.st2.v1f64.p0(<1 x double> %B, <1 x double> %C, ptr %A)7971 %tmp = getelementptr double, ptr %A, i64 %inc7972 ret ptr %tmp7973}7974 7975declare void @llvm.aarch64.neon.st2.v1f64.p0(<1 x double>, <1 x double>, ptr)7976 7977 7978define ptr @test_v16i8_post_imm_st3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind {7979; CHECK-SD-LABEL: test_v16i8_post_imm_st3:7980; CHECK-SD: ; %bb.0:7981; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q27982; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q27983; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q27984; CHECK-SD-NEXT: st3.16b { v0, v1, v2 }, [x0], #487985; CHECK-SD-NEXT: ret7986;7987; CHECK-GI-LABEL: test_v16i8_post_imm_st3:7988; CHECK-GI: ; %bb.0:7989; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q27990; CHECK-GI-NEXT: mov x8, x07991; CHECK-GI-NEXT: add x0, x0, #487992; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q27993; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q27994; CHECK-GI-NEXT: st3.16b { v0, v1, v2 }, [x8]7995; CHECK-GI-NEXT: ret7996 call void @llvm.aarch64.neon.st3.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, ptr %A)7997 %tmp = getelementptr i8, ptr %A, i32 487998 ret ptr %tmp7999}8000 8001define ptr @test_v16i8_post_reg_st3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 %inc) nounwind {8002; CHECK-SD-LABEL: test_v16i8_post_reg_st3:8003; CHECK-SD: ; %bb.0:8004; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28005; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28006; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28007; CHECK-SD-NEXT: st3.16b { v0, v1, v2 }, [x0], x28008; CHECK-SD-NEXT: ret8009;8010; CHECK-GI-LABEL: test_v16i8_post_reg_st3:8011; CHECK-GI: ; %bb.0:8012; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28013; CHECK-GI-NEXT: mov x8, x08014; CHECK-GI-NEXT: add x0, x0, x28015; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28016; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28017; CHECK-GI-NEXT: st3.16b { v0, v1, v2 }, [x8]8018; CHECK-GI-NEXT: ret8019 call void @llvm.aarch64.neon.st3.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, ptr %A)8020 %tmp = getelementptr i8, ptr %A, i64 %inc8021 ret ptr %tmp8022}8023 8024declare void @llvm.aarch64.neon.st3.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>, ptr)8025 8026 8027define ptr @test_v8i8_post_imm_st3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind {8028; CHECK-SD-LABEL: test_v8i8_post_imm_st3:8029; CHECK-SD: ; %bb.0:8030; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28031; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28032; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28033; CHECK-SD-NEXT: st3.8b { v0, v1, v2 }, [x0], #248034; CHECK-SD-NEXT: ret8035;8036; CHECK-GI-LABEL: test_v8i8_post_imm_st3:8037; CHECK-GI: ; %bb.0:8038; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28039; CHECK-GI-NEXT: mov x8, x08040; CHECK-GI-NEXT: add x0, x0, #248041; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28042; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28043; CHECK-GI-NEXT: st3.8b { v0, v1, v2 }, [x8]8044; CHECK-GI-NEXT: ret8045 call void @llvm.aarch64.neon.st3.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, ptr %A)8046 %tmp = getelementptr i8, ptr %A, i32 248047 ret ptr %tmp8048}8049 8050define ptr @test_v8i8_post_reg_st3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 %inc) nounwind {8051; CHECK-SD-LABEL: test_v8i8_post_reg_st3:8052; CHECK-SD: ; %bb.0:8053; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28054; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28055; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28056; CHECK-SD-NEXT: st3.8b { v0, v1, v2 }, [x0], x28057; CHECK-SD-NEXT: ret8058;8059; CHECK-GI-LABEL: test_v8i8_post_reg_st3:8060; CHECK-GI: ; %bb.0:8061; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28062; CHECK-GI-NEXT: mov x8, x08063; CHECK-GI-NEXT: add x0, x0, x28064; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28065; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28066; CHECK-GI-NEXT: st3.8b { v0, v1, v2 }, [x8]8067; CHECK-GI-NEXT: ret8068 call void @llvm.aarch64.neon.st3.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, ptr %A)8069 %tmp = getelementptr i8, ptr %A, i64 %inc8070 ret ptr %tmp8071}8072 8073declare void @llvm.aarch64.neon.st3.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, ptr)8074 8075 8076define ptr @test_v8i16_post_imm_st3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind {8077; CHECK-SD-LABEL: test_v8i16_post_imm_st3:8078; CHECK-SD: ; %bb.0:8079; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28080; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28081; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28082; CHECK-SD-NEXT: st3.8h { v0, v1, v2 }, [x0], #488083; CHECK-SD-NEXT: ret8084;8085; CHECK-GI-LABEL: test_v8i16_post_imm_st3:8086; CHECK-GI: ; %bb.0:8087; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28088; CHECK-GI-NEXT: mov x8, x08089; CHECK-GI-NEXT: add x0, x0, #488090; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28091; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28092; CHECK-GI-NEXT: st3.8h { v0, v1, v2 }, [x8]8093; CHECK-GI-NEXT: ret8094 call void @llvm.aarch64.neon.st3.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, ptr %A)8095 %tmp = getelementptr i16, ptr %A, i32 248096 ret ptr %tmp8097}8098 8099define ptr @test_v8i16_post_reg_st3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 %inc) nounwind {8100; CHECK-SD-LABEL: test_v8i16_post_reg_st3:8101; CHECK-SD: ; %bb.0:8102; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28103; CHECK-SD-NEXT: lsl x8, x2, #18104; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28105; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28106; CHECK-SD-NEXT: st3.8h { v0, v1, v2 }, [x0], x88107; CHECK-SD-NEXT: ret8108;8109; CHECK-GI-LABEL: test_v8i16_post_reg_st3:8110; CHECK-GI: ; %bb.0:8111; CHECK-GI-NEXT: mov x8, x08112; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28113; CHECK-GI-NEXT: add x0, x0, x2, lsl #18114; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28115; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28116; CHECK-GI-NEXT: st3.8h { v0, v1, v2 }, [x8]8117; CHECK-GI-NEXT: ret8118 call void @llvm.aarch64.neon.st3.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, ptr %A)8119 %tmp = getelementptr i16, ptr %A, i64 %inc8120 ret ptr %tmp8121}8122 8123declare void @llvm.aarch64.neon.st3.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>, ptr)8124 8125 8126define ptr @test_v4i16_post_imm_st3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind {8127; CHECK-SD-LABEL: test_v4i16_post_imm_st3:8128; CHECK-SD: ; %bb.0:8129; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28130; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28131; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28132; CHECK-SD-NEXT: st3.4h { v0, v1, v2 }, [x0], #248133; CHECK-SD-NEXT: ret8134;8135; CHECK-GI-LABEL: test_v4i16_post_imm_st3:8136; CHECK-GI: ; %bb.0:8137; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28138; CHECK-GI-NEXT: mov x8, x08139; CHECK-GI-NEXT: add x0, x0, #248140; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28141; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28142; CHECK-GI-NEXT: st3.4h { v0, v1, v2 }, [x8]8143; CHECK-GI-NEXT: ret8144 call void @llvm.aarch64.neon.st3.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, ptr %A)8145 %tmp = getelementptr i16, ptr %A, i32 128146 ret ptr %tmp8147}8148 8149define ptr @test_v4i16_post_reg_st3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 %inc) nounwind {8150; CHECK-SD-LABEL: test_v4i16_post_reg_st3:8151; CHECK-SD: ; %bb.0:8152; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28153; CHECK-SD-NEXT: lsl x8, x2, #18154; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28155; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28156; CHECK-SD-NEXT: st3.4h { v0, v1, v2 }, [x0], x88157; CHECK-SD-NEXT: ret8158;8159; CHECK-GI-LABEL: test_v4i16_post_reg_st3:8160; CHECK-GI: ; %bb.0:8161; CHECK-GI-NEXT: mov x8, x08162; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28163; CHECK-GI-NEXT: add x0, x0, x2, lsl #18164; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28165; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28166; CHECK-GI-NEXT: st3.4h { v0, v1, v2 }, [x8]8167; CHECK-GI-NEXT: ret8168 call void @llvm.aarch64.neon.st3.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, ptr %A)8169 %tmp = getelementptr i16, ptr %A, i64 %inc8170 ret ptr %tmp8171}8172 8173declare void @llvm.aarch64.neon.st3.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>, ptr)8174 8175 8176define ptr @test_v4i32_post_imm_st3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind {8177; CHECK-SD-LABEL: test_v4i32_post_imm_st3:8178; CHECK-SD: ; %bb.0:8179; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28180; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28181; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28182; CHECK-SD-NEXT: st3.4s { v0, v1, v2 }, [x0], #488183; CHECK-SD-NEXT: ret8184;8185; CHECK-GI-LABEL: test_v4i32_post_imm_st3:8186; CHECK-GI: ; %bb.0:8187; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28188; CHECK-GI-NEXT: mov x8, x08189; CHECK-GI-NEXT: add x0, x0, #488190; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28191; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28192; CHECK-GI-NEXT: st3.4s { v0, v1, v2 }, [x8]8193; CHECK-GI-NEXT: ret8194 call void @llvm.aarch64.neon.st3.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, ptr %A)8195 %tmp = getelementptr i32, ptr %A, i32 128196 ret ptr %tmp8197}8198 8199define ptr @test_v4i32_post_reg_st3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 %inc) nounwind {8200; CHECK-SD-LABEL: test_v4i32_post_reg_st3:8201; CHECK-SD: ; %bb.0:8202; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28203; CHECK-SD-NEXT: lsl x8, x2, #28204; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28205; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28206; CHECK-SD-NEXT: st3.4s { v0, v1, v2 }, [x0], x88207; CHECK-SD-NEXT: ret8208;8209; CHECK-GI-LABEL: test_v4i32_post_reg_st3:8210; CHECK-GI: ; %bb.0:8211; CHECK-GI-NEXT: mov x8, x08212; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28213; CHECK-GI-NEXT: add x0, x0, x2, lsl #28214; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28215; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28216; CHECK-GI-NEXT: st3.4s { v0, v1, v2 }, [x8]8217; CHECK-GI-NEXT: ret8218 call void @llvm.aarch64.neon.st3.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, ptr %A)8219 %tmp = getelementptr i32, ptr %A, i64 %inc8220 ret ptr %tmp8221}8222 8223declare void @llvm.aarch64.neon.st3.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>, ptr)8224 8225 8226define ptr @test_v2i32_post_imm_st3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind {8227; CHECK-SD-LABEL: test_v2i32_post_imm_st3:8228; CHECK-SD: ; %bb.0:8229; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28230; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28231; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28232; CHECK-SD-NEXT: st3.2s { v0, v1, v2 }, [x0], #248233; CHECK-SD-NEXT: ret8234;8235; CHECK-GI-LABEL: test_v2i32_post_imm_st3:8236; CHECK-GI: ; %bb.0:8237; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28238; CHECK-GI-NEXT: mov x8, x08239; CHECK-GI-NEXT: add x0, x0, #248240; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28241; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28242; CHECK-GI-NEXT: st3.2s { v0, v1, v2 }, [x8]8243; CHECK-GI-NEXT: ret8244 call void @llvm.aarch64.neon.st3.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, ptr %A)8245 %tmp = getelementptr i32, ptr %A, i32 68246 ret ptr %tmp8247}8248 8249define ptr @test_v2i32_post_reg_st3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 %inc) nounwind {8250; CHECK-SD-LABEL: test_v2i32_post_reg_st3:8251; CHECK-SD: ; %bb.0:8252; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28253; CHECK-SD-NEXT: lsl x8, x2, #28254; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28255; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28256; CHECK-SD-NEXT: st3.2s { v0, v1, v2 }, [x0], x88257; CHECK-SD-NEXT: ret8258;8259; CHECK-GI-LABEL: test_v2i32_post_reg_st3:8260; CHECK-GI: ; %bb.0:8261; CHECK-GI-NEXT: mov x8, x08262; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28263; CHECK-GI-NEXT: add x0, x0, x2, lsl #28264; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28265; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28266; CHECK-GI-NEXT: st3.2s { v0, v1, v2 }, [x8]8267; CHECK-GI-NEXT: ret8268 call void @llvm.aarch64.neon.st3.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, ptr %A)8269 %tmp = getelementptr i32, ptr %A, i64 %inc8270 ret ptr %tmp8271}8272 8273declare void @llvm.aarch64.neon.st3.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>, ptr)8274 8275 8276define ptr @test_v2i64_post_imm_st3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind {8277; CHECK-SD-LABEL: test_v2i64_post_imm_st3:8278; CHECK-SD: ; %bb.0:8279; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28280; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28281; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28282; CHECK-SD-NEXT: st3.2d { v0, v1, v2 }, [x0], #488283; CHECK-SD-NEXT: ret8284;8285; CHECK-GI-LABEL: test_v2i64_post_imm_st3:8286; CHECK-GI: ; %bb.0:8287; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28288; CHECK-GI-NEXT: mov x8, x08289; CHECK-GI-NEXT: add x0, x0, #488290; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28291; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28292; CHECK-GI-NEXT: st3.2d { v0, v1, v2 }, [x8]8293; CHECK-GI-NEXT: ret8294 call void @llvm.aarch64.neon.st3.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, ptr %A)8295 %tmp = getelementptr i64, ptr %A, i64 68296 ret ptr %tmp8297}8298 8299define ptr @test_v2i64_post_reg_st3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 %inc) nounwind {8300; CHECK-SD-LABEL: test_v2i64_post_reg_st3:8301; CHECK-SD: ; %bb.0:8302; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28303; CHECK-SD-NEXT: lsl x8, x2, #38304; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28305; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28306; CHECK-SD-NEXT: st3.2d { v0, v1, v2 }, [x0], x88307; CHECK-SD-NEXT: ret8308;8309; CHECK-GI-LABEL: test_v2i64_post_reg_st3:8310; CHECK-GI: ; %bb.0:8311; CHECK-GI-NEXT: mov x8, x08312; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28313; CHECK-GI-NEXT: add x0, x0, x2, lsl #38314; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28315; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28316; CHECK-GI-NEXT: st3.2d { v0, v1, v2 }, [x8]8317; CHECK-GI-NEXT: ret8318 call void @llvm.aarch64.neon.st3.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, ptr %A)8319 %tmp = getelementptr i64, ptr %A, i64 %inc8320 ret ptr %tmp8321}8322 8323declare void @llvm.aarch64.neon.st3.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>, ptr)8324 8325 8326define ptr @test_v1i64_post_imm_st3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind {8327; CHECK-SD-LABEL: test_v1i64_post_imm_st3:8328; CHECK-SD: ; %bb.0:8329; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28330; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28331; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28332; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], #248333; CHECK-SD-NEXT: ret8334;8335; CHECK-GI-LABEL: test_v1i64_post_imm_st3:8336; CHECK-GI: ; %bb.0:8337; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28338; CHECK-GI-NEXT: mov x8, x08339; CHECK-GI-NEXT: add x0, x0, #248340; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28341; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28342; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8]8343; CHECK-GI-NEXT: ret8344 call void @llvm.aarch64.neon.st3.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, ptr %A)8345 %tmp = getelementptr i64, ptr %A, i64 38346 ret ptr %tmp8347}8348 8349define ptr @test_v1i64_post_reg_st3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 %inc) nounwind {8350; CHECK-SD-LABEL: test_v1i64_post_reg_st3:8351; CHECK-SD: ; %bb.0:8352; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28353; CHECK-SD-NEXT: lsl x8, x2, #38354; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28355; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28356; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], x88357; CHECK-SD-NEXT: ret8358;8359; CHECK-GI-LABEL: test_v1i64_post_reg_st3:8360; CHECK-GI: ; %bb.0:8361; CHECK-GI-NEXT: mov x8, x08362; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28363; CHECK-GI-NEXT: add x0, x0, x2, lsl #38364; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28365; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28366; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8]8367; CHECK-GI-NEXT: ret8368 call void @llvm.aarch64.neon.st3.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, ptr %A)8369 %tmp = getelementptr i64, ptr %A, i64 %inc8370 ret ptr %tmp8371}8372 8373declare void @llvm.aarch64.neon.st3.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>, ptr)8374 8375 8376define ptr @test_v4f32_post_imm_st3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind {8377; CHECK-SD-LABEL: test_v4f32_post_imm_st3:8378; CHECK-SD: ; %bb.0:8379; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28380; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28381; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28382; CHECK-SD-NEXT: st3.4s { v0, v1, v2 }, [x0], #488383; CHECK-SD-NEXT: ret8384;8385; CHECK-GI-LABEL: test_v4f32_post_imm_st3:8386; CHECK-GI: ; %bb.0:8387; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28388; CHECK-GI-NEXT: mov x8, x08389; CHECK-GI-NEXT: add x0, x0, #488390; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28391; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28392; CHECK-GI-NEXT: st3.4s { v0, v1, v2 }, [x8]8393; CHECK-GI-NEXT: ret8394 call void @llvm.aarch64.neon.st3.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, ptr %A)8395 %tmp = getelementptr float, ptr %A, i32 128396 ret ptr %tmp8397}8398 8399define ptr @test_v4f32_post_reg_st3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, i64 %inc) nounwind {8400; CHECK-SD-LABEL: test_v4f32_post_reg_st3:8401; CHECK-SD: ; %bb.0:8402; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28403; CHECK-SD-NEXT: lsl x8, x2, #28404; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28405; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28406; CHECK-SD-NEXT: st3.4s { v0, v1, v2 }, [x0], x88407; CHECK-SD-NEXT: ret8408;8409; CHECK-GI-LABEL: test_v4f32_post_reg_st3:8410; CHECK-GI: ; %bb.0:8411; CHECK-GI-NEXT: mov x8, x08412; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28413; CHECK-GI-NEXT: add x0, x0, x2, lsl #28414; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28415; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28416; CHECK-GI-NEXT: st3.4s { v0, v1, v2 }, [x8]8417; CHECK-GI-NEXT: ret8418 call void @llvm.aarch64.neon.st3.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, ptr %A)8419 %tmp = getelementptr float, ptr %A, i64 %inc8420 ret ptr %tmp8421}8422 8423declare void @llvm.aarch64.neon.st3.v4f32.p0(<4 x float>, <4 x float>, <4 x float>, ptr)8424 8425 8426define ptr @test_v2f32_post_imm_st3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind {8427; CHECK-SD-LABEL: test_v2f32_post_imm_st3:8428; CHECK-SD: ; %bb.0:8429; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28430; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28431; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28432; CHECK-SD-NEXT: st3.2s { v0, v1, v2 }, [x0], #248433; CHECK-SD-NEXT: ret8434;8435; CHECK-GI-LABEL: test_v2f32_post_imm_st3:8436; CHECK-GI: ; %bb.0:8437; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28438; CHECK-GI-NEXT: mov x8, x08439; CHECK-GI-NEXT: add x0, x0, #248440; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28441; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28442; CHECK-GI-NEXT: st3.2s { v0, v1, v2 }, [x8]8443; CHECK-GI-NEXT: ret8444 call void @llvm.aarch64.neon.st3.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, ptr %A)8445 %tmp = getelementptr float, ptr %A, i32 68446 ret ptr %tmp8447}8448 8449define ptr @test_v2f32_post_reg_st3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, i64 %inc) nounwind {8450; CHECK-SD-LABEL: test_v2f32_post_reg_st3:8451; CHECK-SD: ; %bb.0:8452; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28453; CHECK-SD-NEXT: lsl x8, x2, #28454; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28455; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28456; CHECK-SD-NEXT: st3.2s { v0, v1, v2 }, [x0], x88457; CHECK-SD-NEXT: ret8458;8459; CHECK-GI-LABEL: test_v2f32_post_reg_st3:8460; CHECK-GI: ; %bb.0:8461; CHECK-GI-NEXT: mov x8, x08462; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28463; CHECK-GI-NEXT: add x0, x0, x2, lsl #28464; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28465; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28466; CHECK-GI-NEXT: st3.2s { v0, v1, v2 }, [x8]8467; CHECK-GI-NEXT: ret8468 call void @llvm.aarch64.neon.st3.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, ptr %A)8469 %tmp = getelementptr float, ptr %A, i64 %inc8470 ret ptr %tmp8471}8472 8473declare void @llvm.aarch64.neon.st3.v2f32.p0(<2 x float>, <2 x float>, <2 x float>, ptr)8474 8475 8476define ptr @test_v2f64_post_imm_st3(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind {8477; CHECK-SD-LABEL: test_v2f64_post_imm_st3:8478; CHECK-SD: ; %bb.0:8479; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28480; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28481; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28482; CHECK-SD-NEXT: st3.2d { v0, v1, v2 }, [x0], #488483; CHECK-SD-NEXT: ret8484;8485; CHECK-GI-LABEL: test_v2f64_post_imm_st3:8486; CHECK-GI: ; %bb.0:8487; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28488; CHECK-GI-NEXT: mov x8, x08489; CHECK-GI-NEXT: add x0, x0, #488490; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28491; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28492; CHECK-GI-NEXT: st3.2d { v0, v1, v2 }, [x8]8493; CHECK-GI-NEXT: ret8494 call void @llvm.aarch64.neon.st3.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, ptr %A)8495 %tmp = getelementptr double, ptr %A, i64 68496 ret ptr %tmp8497}8498 8499define ptr @test_v2f64_post_reg_st3(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, i64 %inc) nounwind {8500; CHECK-SD-LABEL: test_v2f64_post_reg_st3:8501; CHECK-SD: ; %bb.0:8502; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28503; CHECK-SD-NEXT: lsl x8, x2, #38504; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28505; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28506; CHECK-SD-NEXT: st3.2d { v0, v1, v2 }, [x0], x88507; CHECK-SD-NEXT: ret8508;8509; CHECK-GI-LABEL: test_v2f64_post_reg_st3:8510; CHECK-GI: ; %bb.0:8511; CHECK-GI-NEXT: mov x8, x08512; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q28513; CHECK-GI-NEXT: add x0, x0, x2, lsl #38514; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q28515; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q28516; CHECK-GI-NEXT: st3.2d { v0, v1, v2 }, [x8]8517; CHECK-GI-NEXT: ret8518 call void @llvm.aarch64.neon.st3.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, ptr %A)8519 %tmp = getelementptr double, ptr %A, i64 %inc8520 ret ptr %tmp8521}8522 8523declare void @llvm.aarch64.neon.st3.v2f64.p0(<2 x double>, <2 x double>, <2 x double>, ptr)8524 8525 8526define ptr @test_v1f64_post_imm_st3(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind {8527; CHECK-SD-LABEL: test_v1f64_post_imm_st3:8528; CHECK-SD: ; %bb.0:8529; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28530; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28531; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28532; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], #248533; CHECK-SD-NEXT: ret8534;8535; CHECK-GI-LABEL: test_v1f64_post_imm_st3:8536; CHECK-GI: ; %bb.0:8537; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28538; CHECK-GI-NEXT: mov x8, x08539; CHECK-GI-NEXT: add x0, x0, #248540; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28541; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28542; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8]8543; CHECK-GI-NEXT: ret8544 call void @llvm.aarch64.neon.st3.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, ptr %A)8545 %tmp = getelementptr double, ptr %A, i64 38546 ret ptr %tmp8547}8548 8549define ptr @test_v1f64_post_reg_st3(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, i64 %inc) nounwind {8550; CHECK-SD-LABEL: test_v1f64_post_reg_st3:8551; CHECK-SD: ; %bb.0:8552; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28553; CHECK-SD-NEXT: lsl x8, x2, #38554; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28555; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28556; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], x88557; CHECK-SD-NEXT: ret8558;8559; CHECK-GI-LABEL: test_v1f64_post_reg_st3:8560; CHECK-GI: ; %bb.0:8561; CHECK-GI-NEXT: mov x8, x08562; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d28563; CHECK-GI-NEXT: add x0, x0, x2, lsl #38564; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d28565; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d28566; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8]8567; CHECK-GI-NEXT: ret8568 call void @llvm.aarch64.neon.st3.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, ptr %A)8569 %tmp = getelementptr double, ptr %A, i64 %inc8570 ret ptr %tmp8571}8572 8573declare void @llvm.aarch64.neon.st3.v1f64.p0(<1 x double>, <1 x double>, <1 x double>, ptr)8574 8575 8576define ptr @test_v16i8_post_imm_st4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind {8577; CHECK-SD-LABEL: test_v16i8_post_imm_st4:8578; CHECK-SD: ; %bb.0:8579; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38580; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38581; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38582; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38583; CHECK-SD-NEXT: st4.16b { v0, v1, v2, v3 }, [x0], #648584; CHECK-SD-NEXT: ret8585;8586; CHECK-GI-LABEL: test_v16i8_post_imm_st4:8587; CHECK-GI: ; %bb.0:8588; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38589; CHECK-GI-NEXT: mov x8, x08590; CHECK-GI-NEXT: add x0, x0, #648591; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38592; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38593; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38594; CHECK-GI-NEXT: st4.16b { v0, v1, v2, v3 }, [x8]8595; CHECK-GI-NEXT: ret8596 call void @llvm.aarch64.neon.st4.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, ptr %A)8597 %tmp = getelementptr i8, ptr %A, i32 648598 ret ptr %tmp8599}8600 8601define ptr @test_v16i8_post_reg_st4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 %inc) nounwind {8602; CHECK-SD-LABEL: test_v16i8_post_reg_st4:8603; CHECK-SD: ; %bb.0:8604; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38605; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38606; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38607; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38608; CHECK-SD-NEXT: st4.16b { v0, v1, v2, v3 }, [x0], x28609; CHECK-SD-NEXT: ret8610;8611; CHECK-GI-LABEL: test_v16i8_post_reg_st4:8612; CHECK-GI: ; %bb.0:8613; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38614; CHECK-GI-NEXT: mov x8, x08615; CHECK-GI-NEXT: add x0, x0, x28616; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38617; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38618; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38619; CHECK-GI-NEXT: st4.16b { v0, v1, v2, v3 }, [x8]8620; CHECK-GI-NEXT: ret8621 call void @llvm.aarch64.neon.st4.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, ptr %A)8622 %tmp = getelementptr i8, ptr %A, i64 %inc8623 ret ptr %tmp8624}8625 8626declare void @llvm.aarch64.neon.st4.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, ptr)8627 8628 8629define ptr @test_v8i8_post_imm_st4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind {8630; CHECK-SD-LABEL: test_v8i8_post_imm_st4:8631; CHECK-SD: ; %bb.0:8632; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38633; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38634; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38635; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38636; CHECK-SD-NEXT: st4.8b { v0, v1, v2, v3 }, [x0], #328637; CHECK-SD-NEXT: ret8638;8639; CHECK-GI-LABEL: test_v8i8_post_imm_st4:8640; CHECK-GI: ; %bb.0:8641; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38642; CHECK-GI-NEXT: mov x8, x08643; CHECK-GI-NEXT: add x0, x0, #328644; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38645; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38646; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38647; CHECK-GI-NEXT: st4.8b { v0, v1, v2, v3 }, [x8]8648; CHECK-GI-NEXT: ret8649 call void @llvm.aarch64.neon.st4.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, ptr %A)8650 %tmp = getelementptr i8, ptr %A, i32 328651 ret ptr %tmp8652}8653 8654define ptr @test_v8i8_post_reg_st4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 %inc) nounwind {8655; CHECK-SD-LABEL: test_v8i8_post_reg_st4:8656; CHECK-SD: ; %bb.0:8657; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38658; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38659; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38660; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38661; CHECK-SD-NEXT: st4.8b { v0, v1, v2, v3 }, [x0], x28662; CHECK-SD-NEXT: ret8663;8664; CHECK-GI-LABEL: test_v8i8_post_reg_st4:8665; CHECK-GI: ; %bb.0:8666; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38667; CHECK-GI-NEXT: mov x8, x08668; CHECK-GI-NEXT: add x0, x0, x28669; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38670; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38671; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38672; CHECK-GI-NEXT: st4.8b { v0, v1, v2, v3 }, [x8]8673; CHECK-GI-NEXT: ret8674 call void @llvm.aarch64.neon.st4.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, ptr %A)8675 %tmp = getelementptr i8, ptr %A, i64 %inc8676 ret ptr %tmp8677}8678 8679declare void @llvm.aarch64.neon.st4.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, ptr)8680 8681 8682define ptr @test_v8i16_post_imm_st4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind {8683; CHECK-SD-LABEL: test_v8i16_post_imm_st4:8684; CHECK-SD: ; %bb.0:8685; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38686; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38687; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38688; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38689; CHECK-SD-NEXT: st4.8h { v0, v1, v2, v3 }, [x0], #648690; CHECK-SD-NEXT: ret8691;8692; CHECK-GI-LABEL: test_v8i16_post_imm_st4:8693; CHECK-GI: ; %bb.0:8694; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38695; CHECK-GI-NEXT: mov x8, x08696; CHECK-GI-NEXT: add x0, x0, #648697; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38698; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38699; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38700; CHECK-GI-NEXT: st4.8h { v0, v1, v2, v3 }, [x8]8701; CHECK-GI-NEXT: ret8702 call void @llvm.aarch64.neon.st4.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, ptr %A)8703 %tmp = getelementptr i16, ptr %A, i32 328704 ret ptr %tmp8705}8706 8707define ptr @test_v8i16_post_reg_st4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 %inc) nounwind {8708; CHECK-SD-LABEL: test_v8i16_post_reg_st4:8709; CHECK-SD: ; %bb.0:8710; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38711; CHECK-SD-NEXT: lsl x8, x2, #18712; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38713; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38714; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38715; CHECK-SD-NEXT: st4.8h { v0, v1, v2, v3 }, [x0], x88716; CHECK-SD-NEXT: ret8717;8718; CHECK-GI-LABEL: test_v8i16_post_reg_st4:8719; CHECK-GI: ; %bb.0:8720; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38721; CHECK-GI-NEXT: mov x8, x08722; CHECK-GI-NEXT: add x0, x0, x2, lsl #18723; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38724; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38725; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38726; CHECK-GI-NEXT: st4.8h { v0, v1, v2, v3 }, [x8]8727; CHECK-GI-NEXT: ret8728 call void @llvm.aarch64.neon.st4.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, ptr %A)8729 %tmp = getelementptr i16, ptr %A, i64 %inc8730 ret ptr %tmp8731}8732 8733declare void @llvm.aarch64.neon.st4.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, ptr)8734 8735 8736define ptr @test_v4i16_post_imm_st4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind {8737; CHECK-SD-LABEL: test_v4i16_post_imm_st4:8738; CHECK-SD: ; %bb.0:8739; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38740; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38741; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38742; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38743; CHECK-SD-NEXT: st4.4h { v0, v1, v2, v3 }, [x0], #328744; CHECK-SD-NEXT: ret8745;8746; CHECK-GI-LABEL: test_v4i16_post_imm_st4:8747; CHECK-GI: ; %bb.0:8748; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38749; CHECK-GI-NEXT: mov x8, x08750; CHECK-GI-NEXT: add x0, x0, #328751; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38752; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38753; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38754; CHECK-GI-NEXT: st4.4h { v0, v1, v2, v3 }, [x8]8755; CHECK-GI-NEXT: ret8756 call void @llvm.aarch64.neon.st4.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, ptr %A)8757 %tmp = getelementptr i16, ptr %A, i32 168758 ret ptr %tmp8759}8760 8761define ptr @test_v4i16_post_reg_st4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 %inc) nounwind {8762; CHECK-SD-LABEL: test_v4i16_post_reg_st4:8763; CHECK-SD: ; %bb.0:8764; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38765; CHECK-SD-NEXT: lsl x8, x2, #18766; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38767; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38768; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38769; CHECK-SD-NEXT: st4.4h { v0, v1, v2, v3 }, [x0], x88770; CHECK-SD-NEXT: ret8771;8772; CHECK-GI-LABEL: test_v4i16_post_reg_st4:8773; CHECK-GI: ; %bb.0:8774; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38775; CHECK-GI-NEXT: mov x8, x08776; CHECK-GI-NEXT: add x0, x0, x2, lsl #18777; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38778; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38779; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38780; CHECK-GI-NEXT: st4.4h { v0, v1, v2, v3 }, [x8]8781; CHECK-GI-NEXT: ret8782 call void @llvm.aarch64.neon.st4.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, ptr %A)8783 %tmp = getelementptr i16, ptr %A, i64 %inc8784 ret ptr %tmp8785}8786 8787declare void @llvm.aarch64.neon.st4.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>,<4 x i16>, ptr)8788 8789 8790define ptr @test_v4i32_post_imm_st4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind {8791; CHECK-SD-LABEL: test_v4i32_post_imm_st4:8792; CHECK-SD: ; %bb.0:8793; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38794; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38795; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38796; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38797; CHECK-SD-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], #648798; CHECK-SD-NEXT: ret8799;8800; CHECK-GI-LABEL: test_v4i32_post_imm_st4:8801; CHECK-GI: ; %bb.0:8802; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38803; CHECK-GI-NEXT: mov x8, x08804; CHECK-GI-NEXT: add x0, x0, #648805; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38806; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38807; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38808; CHECK-GI-NEXT: st4.4s { v0, v1, v2, v3 }, [x8]8809; CHECK-GI-NEXT: ret8810 call void @llvm.aarch64.neon.st4.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, ptr %A)8811 %tmp = getelementptr i32, ptr %A, i32 168812 ret ptr %tmp8813}8814 8815define ptr @test_v4i32_post_reg_st4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 %inc) nounwind {8816; CHECK-SD-LABEL: test_v4i32_post_reg_st4:8817; CHECK-SD: ; %bb.0:8818; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38819; CHECK-SD-NEXT: lsl x8, x2, #28820; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38821; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38822; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38823; CHECK-SD-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], x88824; CHECK-SD-NEXT: ret8825;8826; CHECK-GI-LABEL: test_v4i32_post_reg_st4:8827; CHECK-GI: ; %bb.0:8828; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38829; CHECK-GI-NEXT: mov x8, x08830; CHECK-GI-NEXT: add x0, x0, x2, lsl #28831; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38832; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38833; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38834; CHECK-GI-NEXT: st4.4s { v0, v1, v2, v3 }, [x8]8835; CHECK-GI-NEXT: ret8836 call void @llvm.aarch64.neon.st4.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, ptr %A)8837 %tmp = getelementptr i32, ptr %A, i64 %inc8838 ret ptr %tmp8839}8840 8841declare void @llvm.aarch64.neon.st4.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>,<4 x i32>, ptr)8842 8843 8844define ptr @test_v2i32_post_imm_st4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind {8845; CHECK-SD-LABEL: test_v2i32_post_imm_st4:8846; CHECK-SD: ; %bb.0:8847; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38848; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38849; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38850; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38851; CHECK-SD-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], #328852; CHECK-SD-NEXT: ret8853;8854; CHECK-GI-LABEL: test_v2i32_post_imm_st4:8855; CHECK-GI: ; %bb.0:8856; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38857; CHECK-GI-NEXT: mov x8, x08858; CHECK-GI-NEXT: add x0, x0, #328859; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38860; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38861; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38862; CHECK-GI-NEXT: st4.2s { v0, v1, v2, v3 }, [x8]8863; CHECK-GI-NEXT: ret8864 call void @llvm.aarch64.neon.st4.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, ptr %A)8865 %tmp = getelementptr i32, ptr %A, i32 88866 ret ptr %tmp8867}8868 8869define ptr @test_v2i32_post_reg_st4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 %inc) nounwind {8870; CHECK-SD-LABEL: test_v2i32_post_reg_st4:8871; CHECK-SD: ; %bb.0:8872; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38873; CHECK-SD-NEXT: lsl x8, x2, #28874; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38875; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38876; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38877; CHECK-SD-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], x88878; CHECK-SD-NEXT: ret8879;8880; CHECK-GI-LABEL: test_v2i32_post_reg_st4:8881; CHECK-GI: ; %bb.0:8882; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38883; CHECK-GI-NEXT: mov x8, x08884; CHECK-GI-NEXT: add x0, x0, x2, lsl #28885; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38886; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38887; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38888; CHECK-GI-NEXT: st4.2s { v0, v1, v2, v3 }, [x8]8889; CHECK-GI-NEXT: ret8890 call void @llvm.aarch64.neon.st4.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, ptr %A)8891 %tmp = getelementptr i32, ptr %A, i64 %inc8892 ret ptr %tmp8893}8894 8895declare void @llvm.aarch64.neon.st4.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, ptr)8896 8897 8898define ptr @test_v2i64_post_imm_st4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind {8899; CHECK-SD-LABEL: test_v2i64_post_imm_st4:8900; CHECK-SD: ; %bb.0:8901; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38902; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38903; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38904; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38905; CHECK-SD-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], #648906; CHECK-SD-NEXT: ret8907;8908; CHECK-GI-LABEL: test_v2i64_post_imm_st4:8909; CHECK-GI: ; %bb.0:8910; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38911; CHECK-GI-NEXT: mov x8, x08912; CHECK-GI-NEXT: add x0, x0, #648913; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38914; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38915; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38916; CHECK-GI-NEXT: st4.2d { v0, v1, v2, v3 }, [x8]8917; CHECK-GI-NEXT: ret8918 call void @llvm.aarch64.neon.st4.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, ptr %A)8919 %tmp = getelementptr i64, ptr %A, i64 88920 ret ptr %tmp8921}8922 8923define ptr @test_v2i64_post_reg_st4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 %inc) nounwind {8924; CHECK-SD-LABEL: test_v2i64_post_reg_st4:8925; CHECK-SD: ; %bb.0:8926; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38927; CHECK-SD-NEXT: lsl x8, x2, #38928; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38929; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38930; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38931; CHECK-SD-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], x88932; CHECK-SD-NEXT: ret8933;8934; CHECK-GI-LABEL: test_v2i64_post_reg_st4:8935; CHECK-GI: ; %bb.0:8936; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q38937; CHECK-GI-NEXT: mov x8, x08938; CHECK-GI-NEXT: add x0, x0, x2, lsl #38939; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q38940; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q38941; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q38942; CHECK-GI-NEXT: st4.2d { v0, v1, v2, v3 }, [x8]8943; CHECK-GI-NEXT: ret8944 call void @llvm.aarch64.neon.st4.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, ptr %A)8945 %tmp = getelementptr i64, ptr %A, i64 %inc8946 ret ptr %tmp8947}8948 8949declare void @llvm.aarch64.neon.st4.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>,<2 x i64>, ptr)8950 8951 8952define ptr @test_v1i64_post_imm_st4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind {8953; CHECK-SD-LABEL: test_v1i64_post_imm_st4:8954; CHECK-SD: ; %bb.0:8955; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38956; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38957; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38958; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38959; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #328960; CHECK-SD-NEXT: ret8961;8962; CHECK-GI-LABEL: test_v1i64_post_imm_st4:8963; CHECK-GI: ; %bb.0:8964; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38965; CHECK-GI-NEXT: mov x8, x08966; CHECK-GI-NEXT: add x0, x0, #328967; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38968; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38969; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38970; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]8971; CHECK-GI-NEXT: ret8972 call void @llvm.aarch64.neon.st4.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, ptr %A)8973 %tmp = getelementptr i64, ptr %A, i64 48974 ret ptr %tmp8975}8976 8977define ptr @test_v1i64_post_reg_st4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 %inc) nounwind {8978; CHECK-SD-LABEL: test_v1i64_post_reg_st4:8979; CHECK-SD: ; %bb.0:8980; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38981; CHECK-SD-NEXT: lsl x8, x2, #38982; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38983; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38984; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38985; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x88986; CHECK-SD-NEXT: ret8987;8988; CHECK-GI-LABEL: test_v1i64_post_reg_st4:8989; CHECK-GI: ; %bb.0:8990; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d38991; CHECK-GI-NEXT: mov x8, x08992; CHECK-GI-NEXT: add x0, x0, x2, lsl #38993; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d38994; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d38995; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d38996; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]8997; CHECK-GI-NEXT: ret8998 call void @llvm.aarch64.neon.st4.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, ptr %A)8999 %tmp = getelementptr i64, ptr %A, i64 %inc9000 ret ptr %tmp9001}9002 9003declare void @llvm.aarch64.neon.st4.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>,<1 x i64>, ptr)9004 9005 9006define ptr @test_v4f32_post_imm_st4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind {9007; CHECK-SD-LABEL: test_v4f32_post_imm_st4:9008; CHECK-SD: ; %bb.0:9009; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q39010; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q39011; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q39012; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q39013; CHECK-SD-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], #649014; CHECK-SD-NEXT: ret9015;9016; CHECK-GI-LABEL: test_v4f32_post_imm_st4:9017; CHECK-GI: ; %bb.0:9018; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q39019; CHECK-GI-NEXT: mov x8, x09020; CHECK-GI-NEXT: add x0, x0, #649021; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q39022; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q39023; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q39024; CHECK-GI-NEXT: st4.4s { v0, v1, v2, v3 }, [x8]9025; CHECK-GI-NEXT: ret9026 call void @llvm.aarch64.neon.st4.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, ptr %A)9027 %tmp = getelementptr float, ptr %A, i32 169028 ret ptr %tmp9029}9030 9031define ptr @test_v4f32_post_reg_st4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 %inc) nounwind {9032; CHECK-SD-LABEL: test_v4f32_post_reg_st4:9033; CHECK-SD: ; %bb.0:9034; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q39035; CHECK-SD-NEXT: lsl x8, x2, #29036; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q39037; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q39038; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q39039; CHECK-SD-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], x89040; CHECK-SD-NEXT: ret9041;9042; CHECK-GI-LABEL: test_v4f32_post_reg_st4:9043; CHECK-GI: ; %bb.0:9044; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q39045; CHECK-GI-NEXT: mov x8, x09046; CHECK-GI-NEXT: add x0, x0, x2, lsl #29047; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q39048; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q39049; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q39050; CHECK-GI-NEXT: st4.4s { v0, v1, v2, v3 }, [x8]9051; CHECK-GI-NEXT: ret9052 call void @llvm.aarch64.neon.st4.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, ptr %A)9053 %tmp = getelementptr float, ptr %A, i64 %inc9054 ret ptr %tmp9055}9056 9057declare void @llvm.aarch64.neon.st4.v4f32.p0(<4 x float>, <4 x float>, <4 x float>, <4 x float>, ptr)9058 9059 9060define ptr @test_v2f32_post_imm_st4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind {9061; CHECK-SD-LABEL: test_v2f32_post_imm_st4:9062; CHECK-SD: ; %bb.0:9063; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d39064; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d39065; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d39066; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d39067; CHECK-SD-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], #329068; CHECK-SD-NEXT: ret9069;9070; CHECK-GI-LABEL: test_v2f32_post_imm_st4:9071; CHECK-GI: ; %bb.0:9072; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d39073; CHECK-GI-NEXT: mov x8, x09074; CHECK-GI-NEXT: add x0, x0, #329075; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d39076; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d39077; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d39078; CHECK-GI-NEXT: st4.2s { v0, v1, v2, v3 }, [x8]9079; CHECK-GI-NEXT: ret9080 call void @llvm.aarch64.neon.st4.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, ptr %A)9081 %tmp = getelementptr float, ptr %A, i32 89082 ret ptr %tmp9083}9084 9085define ptr @test_v2f32_post_reg_st4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 %inc) nounwind {9086; CHECK-SD-LABEL: test_v2f32_post_reg_st4:9087; CHECK-SD: ; %bb.0:9088; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d39089; CHECK-SD-NEXT: lsl x8, x2, #29090; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d39091; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d39092; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d39093; CHECK-SD-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], x89094; CHECK-SD-NEXT: ret9095;9096; CHECK-GI-LABEL: test_v2f32_post_reg_st4:9097; CHECK-GI: ; %bb.0:9098; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d39099; CHECK-GI-NEXT: mov x8, x09100; CHECK-GI-NEXT: add x0, x0, x2, lsl #29101; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d39102; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d39103; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d39104; CHECK-GI-NEXT: st4.2s { v0, v1, v2, v3 }, [x8]9105; CHECK-GI-NEXT: ret9106 call void @llvm.aarch64.neon.st4.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, ptr %A)9107 %tmp = getelementptr float, ptr %A, i64 %inc9108 ret ptr %tmp9109}9110 9111declare void @llvm.aarch64.neon.st4.v2f32.p0(<2 x float>, <2 x float>, <2 x float>, <2 x float>, ptr)9112 9113 9114define ptr @test_v2f64_post_imm_st4(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind {9115; CHECK-SD-LABEL: test_v2f64_post_imm_st4:9116; CHECK-SD: ; %bb.0:9117; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q39118; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q39119; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q39120; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q39121; CHECK-SD-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], #649122; CHECK-SD-NEXT: ret9123;9124; CHECK-GI-LABEL: test_v2f64_post_imm_st4:9125; CHECK-GI: ; %bb.0:9126; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q39127; CHECK-GI-NEXT: mov x8, x09128; CHECK-GI-NEXT: add x0, x0, #649129; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q39130; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q39131; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q39132; CHECK-GI-NEXT: st4.2d { v0, v1, v2, v3 }, [x8]9133; CHECK-GI-NEXT: ret9134 call void @llvm.aarch64.neon.st4.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, ptr %A)9135 %tmp = getelementptr double, ptr %A, i64 89136 ret ptr %tmp9137}9138 9139define ptr @test_v2f64_post_reg_st4(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 %inc) nounwind {9140; CHECK-SD-LABEL: test_v2f64_post_reg_st4:9141; CHECK-SD: ; %bb.0:9142; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q39143; CHECK-SD-NEXT: lsl x8, x2, #39144; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q39145; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q39146; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q39147; CHECK-SD-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], x89148; CHECK-SD-NEXT: ret9149;9150; CHECK-GI-LABEL: test_v2f64_post_reg_st4:9151; CHECK-GI: ; %bb.0:9152; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q39153; CHECK-GI-NEXT: mov x8, x09154; CHECK-GI-NEXT: add x0, x0, x2, lsl #39155; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q39156; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q39157; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q39158; CHECK-GI-NEXT: st4.2d { v0, v1, v2, v3 }, [x8]9159; CHECK-GI-NEXT: ret9160 call void @llvm.aarch64.neon.st4.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, ptr %A)9161 %tmp = getelementptr double, ptr %A, i64 %inc9162 ret ptr %tmp9163}9164 9165declare void @llvm.aarch64.neon.st4.v2f64.p0(<2 x double>, <2 x double>, <2 x double>,<2 x double>, ptr)9166 9167 9168define ptr @test_v1f64_post_imm_st4(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind {9169; CHECK-SD-LABEL: test_v1f64_post_imm_st4:9170; CHECK-SD: ; %bb.0:9171; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d39172; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d39173; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d39174; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d39175; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #329176; CHECK-SD-NEXT: ret9177;9178; CHECK-GI-LABEL: test_v1f64_post_imm_st4:9179; CHECK-GI: ; %bb.0:9180; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d39181; CHECK-GI-NEXT: mov x8, x09182; CHECK-GI-NEXT: add x0, x0, #329183; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d39184; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d39185; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d39186; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]9187; CHECK-GI-NEXT: ret9188 call void @llvm.aarch64.neon.st4.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, ptr %A)9189 %tmp = getelementptr double, ptr %A, i64 49190 ret ptr %tmp9191}9192 9193define ptr @test_v1f64_post_reg_st4(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 %inc) nounwind {9194; CHECK-SD-LABEL: test_v1f64_post_reg_st4:9195; CHECK-SD: ; %bb.0:9196; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d39197; CHECK-SD-NEXT: lsl x8, x2, #39198; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d39199; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d39200; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d39201; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x89202; CHECK-SD-NEXT: ret9203;9204; CHECK-GI-LABEL: test_v1f64_post_reg_st4:9205; CHECK-GI: ; %bb.0:9206; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d39207; CHECK-GI-NEXT: mov x8, x09208; CHECK-GI-NEXT: add x0, x0, x2, lsl #39209; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d39210; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d39211; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d39212; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]9213; CHECK-GI-NEXT: ret9214 call void @llvm.aarch64.neon.st4.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, ptr %A)9215 %tmp = getelementptr double, ptr %A, i64 %inc9216 ret ptr %tmp9217}9218 9219declare void @llvm.aarch64.neon.st4.v1f64.p0(<1 x double>, <1 x double>, <1 x double>, <1 x double>, ptr)9220 9221 9222define ptr @test_v16i8_post_imm_st1x2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C) nounwind {9223; CHECK-SD-LABEL: test_v16i8_post_imm_st1x2:9224; CHECK-SD: ; %bb.0:9225; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19226; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19227; CHECK-SD-NEXT: st1.16b { v0, v1 }, [x0], #329228; CHECK-SD-NEXT: ret9229;9230; CHECK-GI-LABEL: test_v16i8_post_imm_st1x2:9231; CHECK-GI: ; %bb.0:9232; CHECK-GI-NEXT: mov x8, x09233; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19234; CHECK-GI-NEXT: add x0, x0, #329235; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19236; CHECK-GI-NEXT: st1.16b { v0, v1 }, [x8]9237; CHECK-GI-NEXT: ret9238 call void @llvm.aarch64.neon.st1x2.v16i8.p0(<16 x i8> %B, <16 x i8> %C, ptr %A)9239 %tmp = getelementptr i8, ptr %A, i32 329240 ret ptr %tmp9241}9242 9243define ptr @test_v16i8_post_reg_st1x2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, i64 %inc) nounwind {9244; CHECK-SD-LABEL: test_v16i8_post_reg_st1x2:9245; CHECK-SD: ; %bb.0:9246; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19247; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19248; CHECK-SD-NEXT: st1.16b { v0, v1 }, [x0], x29249; CHECK-SD-NEXT: ret9250;9251; CHECK-GI-LABEL: test_v16i8_post_reg_st1x2:9252; CHECK-GI: ; %bb.0:9253; CHECK-GI-NEXT: mov x8, x09254; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19255; CHECK-GI-NEXT: add x0, x0, x29256; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19257; CHECK-GI-NEXT: st1.16b { v0, v1 }, [x8]9258; CHECK-GI-NEXT: ret9259 call void @llvm.aarch64.neon.st1x2.v16i8.p0(<16 x i8> %B, <16 x i8> %C, ptr %A)9260 %tmp = getelementptr i8, ptr %A, i64 %inc9261 ret ptr %tmp9262}9263 9264declare void @llvm.aarch64.neon.st1x2.v16i8.p0(<16 x i8>, <16 x i8>, ptr)9265 9266 9267define ptr @test_v8i8_post_imm_st1x2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C) nounwind {9268; CHECK-SD-LABEL: test_v8i8_post_imm_st1x2:9269; CHECK-SD: ; %bb.0:9270; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19271; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19272; CHECK-SD-NEXT: st1.8b { v0, v1 }, [x0], #169273; CHECK-SD-NEXT: ret9274;9275; CHECK-GI-LABEL: test_v8i8_post_imm_st1x2:9276; CHECK-GI: ; %bb.0:9277; CHECK-GI-NEXT: mov x8, x09278; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19279; CHECK-GI-NEXT: add x0, x0, #169280; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19281; CHECK-GI-NEXT: st1.8b { v0, v1 }, [x8]9282; CHECK-GI-NEXT: ret9283 call void @llvm.aarch64.neon.st1x2.v8i8.p0(<8 x i8> %B, <8 x i8> %C, ptr %A)9284 %tmp = getelementptr i8, ptr %A, i32 169285 ret ptr %tmp9286}9287 9288define ptr @test_v8i8_post_reg_st1x2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, i64 %inc) nounwind {9289; CHECK-SD-LABEL: test_v8i8_post_reg_st1x2:9290; CHECK-SD: ; %bb.0:9291; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19292; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19293; CHECK-SD-NEXT: st1.8b { v0, v1 }, [x0], x29294; CHECK-SD-NEXT: ret9295;9296; CHECK-GI-LABEL: test_v8i8_post_reg_st1x2:9297; CHECK-GI: ; %bb.0:9298; CHECK-GI-NEXT: mov x8, x09299; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19300; CHECK-GI-NEXT: add x0, x0, x29301; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19302; CHECK-GI-NEXT: st1.8b { v0, v1 }, [x8]9303; CHECK-GI-NEXT: ret9304 call void @llvm.aarch64.neon.st1x2.v8i8.p0(<8 x i8> %B, <8 x i8> %C, ptr %A)9305 %tmp = getelementptr i8, ptr %A, i64 %inc9306 ret ptr %tmp9307}9308 9309declare void @llvm.aarch64.neon.st1x2.v8i8.p0(<8 x i8>, <8 x i8>, ptr)9310 9311 9312define ptr @test_v8i16_post_imm_st1x2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C) nounwind {9313; CHECK-SD-LABEL: test_v8i16_post_imm_st1x2:9314; CHECK-SD: ; %bb.0:9315; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19316; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19317; CHECK-SD-NEXT: st1.8h { v0, v1 }, [x0], #329318; CHECK-SD-NEXT: ret9319;9320; CHECK-GI-LABEL: test_v8i16_post_imm_st1x2:9321; CHECK-GI: ; %bb.0:9322; CHECK-GI-NEXT: mov x8, x09323; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19324; CHECK-GI-NEXT: add x0, x0, #329325; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19326; CHECK-GI-NEXT: st1.8h { v0, v1 }, [x8]9327; CHECK-GI-NEXT: ret9328 call void @llvm.aarch64.neon.st1x2.v8i16.p0(<8 x i16> %B, <8 x i16> %C, ptr %A)9329 %tmp = getelementptr i16, ptr %A, i32 169330 ret ptr %tmp9331}9332 9333define ptr @test_v8i16_post_reg_st1x2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, i64 %inc) nounwind {9334; CHECK-SD-LABEL: test_v8i16_post_reg_st1x2:9335; CHECK-SD: ; %bb.0:9336; CHECK-SD-NEXT: lsl x8, x2, #19337; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19338; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19339; CHECK-SD-NEXT: st1.8h { v0, v1 }, [x0], x89340; CHECK-SD-NEXT: ret9341;9342; CHECK-GI-LABEL: test_v8i16_post_reg_st1x2:9343; CHECK-GI: ; %bb.0:9344; CHECK-GI-NEXT: mov x8, x09345; CHECK-GI-NEXT: add x0, x0, x2, lsl #19346; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19347; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19348; CHECK-GI-NEXT: st1.8h { v0, v1 }, [x8]9349; CHECK-GI-NEXT: ret9350 call void @llvm.aarch64.neon.st1x2.v8i16.p0(<8 x i16> %B, <8 x i16> %C, ptr %A)9351 %tmp = getelementptr i16, ptr %A, i64 %inc9352 ret ptr %tmp9353}9354 9355declare void @llvm.aarch64.neon.st1x2.v8i16.p0(<8 x i16>, <8 x i16>, ptr)9356 9357 9358define ptr @test_v4i16_post_imm_st1x2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C) nounwind {9359; CHECK-SD-LABEL: test_v4i16_post_imm_st1x2:9360; CHECK-SD: ; %bb.0:9361; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19362; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19363; CHECK-SD-NEXT: st1.4h { v0, v1 }, [x0], #169364; CHECK-SD-NEXT: ret9365;9366; CHECK-GI-LABEL: test_v4i16_post_imm_st1x2:9367; CHECK-GI: ; %bb.0:9368; CHECK-GI-NEXT: mov x8, x09369; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19370; CHECK-GI-NEXT: add x0, x0, #169371; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19372; CHECK-GI-NEXT: st1.4h { v0, v1 }, [x8]9373; CHECK-GI-NEXT: ret9374 call void @llvm.aarch64.neon.st1x2.v4i16.p0(<4 x i16> %B, <4 x i16> %C, ptr %A)9375 %tmp = getelementptr i16, ptr %A, i32 89376 ret ptr %tmp9377}9378 9379define ptr @test_v4i16_post_reg_st1x2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, i64 %inc) nounwind {9380; CHECK-SD-LABEL: test_v4i16_post_reg_st1x2:9381; CHECK-SD: ; %bb.0:9382; CHECK-SD-NEXT: lsl x8, x2, #19383; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19384; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19385; CHECK-SD-NEXT: st1.4h { v0, v1 }, [x0], x89386; CHECK-SD-NEXT: ret9387;9388; CHECK-GI-LABEL: test_v4i16_post_reg_st1x2:9389; CHECK-GI: ; %bb.0:9390; CHECK-GI-NEXT: mov x8, x09391; CHECK-GI-NEXT: add x0, x0, x2, lsl #19392; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19393; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19394; CHECK-GI-NEXT: st1.4h { v0, v1 }, [x8]9395; CHECK-GI-NEXT: ret9396 call void @llvm.aarch64.neon.st1x2.v4i16.p0(<4 x i16> %B, <4 x i16> %C, ptr %A)9397 %tmp = getelementptr i16, ptr %A, i64 %inc9398 ret ptr %tmp9399}9400 9401declare void @llvm.aarch64.neon.st1x2.v4i16.p0(<4 x i16>, <4 x i16>, ptr)9402 9403 9404define ptr @test_v4i32_post_imm_st1x2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C) nounwind {9405; CHECK-SD-LABEL: test_v4i32_post_imm_st1x2:9406; CHECK-SD: ; %bb.0:9407; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19408; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19409; CHECK-SD-NEXT: st1.4s { v0, v1 }, [x0], #329410; CHECK-SD-NEXT: ret9411;9412; CHECK-GI-LABEL: test_v4i32_post_imm_st1x2:9413; CHECK-GI: ; %bb.0:9414; CHECK-GI-NEXT: mov x8, x09415; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19416; CHECK-GI-NEXT: add x0, x0, #329417; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19418; CHECK-GI-NEXT: st1.4s { v0, v1 }, [x8]9419; CHECK-GI-NEXT: ret9420 call void @llvm.aarch64.neon.st1x2.v4i32.p0(<4 x i32> %B, <4 x i32> %C, ptr %A)9421 %tmp = getelementptr i32, ptr %A, i32 89422 ret ptr %tmp9423}9424 9425define ptr @test_v4i32_post_reg_st1x2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, i64 %inc) nounwind {9426; CHECK-SD-LABEL: test_v4i32_post_reg_st1x2:9427; CHECK-SD: ; %bb.0:9428; CHECK-SD-NEXT: lsl x8, x2, #29429; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19430; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19431; CHECK-SD-NEXT: st1.4s { v0, v1 }, [x0], x89432; CHECK-SD-NEXT: ret9433;9434; CHECK-GI-LABEL: test_v4i32_post_reg_st1x2:9435; CHECK-GI: ; %bb.0:9436; CHECK-GI-NEXT: mov x8, x09437; CHECK-GI-NEXT: add x0, x0, x2, lsl #29438; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19439; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19440; CHECK-GI-NEXT: st1.4s { v0, v1 }, [x8]9441; CHECK-GI-NEXT: ret9442 call void @llvm.aarch64.neon.st1x2.v4i32.p0(<4 x i32> %B, <4 x i32> %C, ptr %A)9443 %tmp = getelementptr i32, ptr %A, i64 %inc9444 ret ptr %tmp9445}9446 9447declare void @llvm.aarch64.neon.st1x2.v4i32.p0(<4 x i32>, <4 x i32>, ptr)9448 9449 9450define ptr @test_v2i32_post_imm_st1x2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C) nounwind {9451; CHECK-SD-LABEL: test_v2i32_post_imm_st1x2:9452; CHECK-SD: ; %bb.0:9453; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19454; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19455; CHECK-SD-NEXT: st1.2s { v0, v1 }, [x0], #169456; CHECK-SD-NEXT: ret9457;9458; CHECK-GI-LABEL: test_v2i32_post_imm_st1x2:9459; CHECK-GI: ; %bb.0:9460; CHECK-GI-NEXT: mov x8, x09461; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19462; CHECK-GI-NEXT: add x0, x0, #169463; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19464; CHECK-GI-NEXT: st1.2s { v0, v1 }, [x8]9465; CHECK-GI-NEXT: ret9466 call void @llvm.aarch64.neon.st1x2.v2i32.p0(<2 x i32> %B, <2 x i32> %C, ptr %A)9467 %tmp = getelementptr i32, ptr %A, i32 49468 ret ptr %tmp9469}9470 9471define ptr @test_v2i32_post_reg_st1x2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, i64 %inc) nounwind {9472; CHECK-SD-LABEL: test_v2i32_post_reg_st1x2:9473; CHECK-SD: ; %bb.0:9474; CHECK-SD-NEXT: lsl x8, x2, #29475; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19476; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19477; CHECK-SD-NEXT: st1.2s { v0, v1 }, [x0], x89478; CHECK-SD-NEXT: ret9479;9480; CHECK-GI-LABEL: test_v2i32_post_reg_st1x2:9481; CHECK-GI: ; %bb.0:9482; CHECK-GI-NEXT: mov x8, x09483; CHECK-GI-NEXT: add x0, x0, x2, lsl #29484; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19485; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19486; CHECK-GI-NEXT: st1.2s { v0, v1 }, [x8]9487; CHECK-GI-NEXT: ret9488 call void @llvm.aarch64.neon.st1x2.v2i32.p0(<2 x i32> %B, <2 x i32> %C, ptr %A)9489 %tmp = getelementptr i32, ptr %A, i64 %inc9490 ret ptr %tmp9491}9492 9493declare void @llvm.aarch64.neon.st1x2.v2i32.p0(<2 x i32>, <2 x i32>, ptr)9494 9495 9496define ptr @test_v2i64_post_imm_st1x2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C) nounwind {9497; CHECK-SD-LABEL: test_v2i64_post_imm_st1x2:9498; CHECK-SD: ; %bb.0:9499; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19500; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19501; CHECK-SD-NEXT: st1.2d { v0, v1 }, [x0], #329502; CHECK-SD-NEXT: ret9503;9504; CHECK-GI-LABEL: test_v2i64_post_imm_st1x2:9505; CHECK-GI: ; %bb.0:9506; CHECK-GI-NEXT: mov x8, x09507; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19508; CHECK-GI-NEXT: add x0, x0, #329509; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19510; CHECK-GI-NEXT: st1.2d { v0, v1 }, [x8]9511; CHECK-GI-NEXT: ret9512 call void @llvm.aarch64.neon.st1x2.v2i64.p0(<2 x i64> %B, <2 x i64> %C, ptr %A)9513 %tmp = getelementptr i64, ptr %A, i64 49514 ret ptr %tmp9515}9516 9517define ptr @test_v2i64_post_reg_st1x2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, i64 %inc) nounwind {9518; CHECK-SD-LABEL: test_v2i64_post_reg_st1x2:9519; CHECK-SD: ; %bb.0:9520; CHECK-SD-NEXT: lsl x8, x2, #39521; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19522; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19523; CHECK-SD-NEXT: st1.2d { v0, v1 }, [x0], x89524; CHECK-SD-NEXT: ret9525;9526; CHECK-GI-LABEL: test_v2i64_post_reg_st1x2:9527; CHECK-GI: ; %bb.0:9528; CHECK-GI-NEXT: mov x8, x09529; CHECK-GI-NEXT: add x0, x0, x2, lsl #39530; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19531; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19532; CHECK-GI-NEXT: st1.2d { v0, v1 }, [x8]9533; CHECK-GI-NEXT: ret9534 call void @llvm.aarch64.neon.st1x2.v2i64.p0(<2 x i64> %B, <2 x i64> %C, ptr %A)9535 %tmp = getelementptr i64, ptr %A, i64 %inc9536 ret ptr %tmp9537}9538 9539declare void @llvm.aarch64.neon.st1x2.v2i64.p0(<2 x i64>, <2 x i64>, ptr)9540 9541 9542define ptr @test_v1i64_post_imm_st1x2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C) nounwind {9543; CHECK-SD-LABEL: test_v1i64_post_imm_st1x2:9544; CHECK-SD: ; %bb.0:9545; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19546; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19547; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], #169548; CHECK-SD-NEXT: ret9549;9550; CHECK-GI-LABEL: test_v1i64_post_imm_st1x2:9551; CHECK-GI: ; %bb.0:9552; CHECK-GI-NEXT: mov x8, x09553; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19554; CHECK-GI-NEXT: add x0, x0, #169555; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19556; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8]9557; CHECK-GI-NEXT: ret9558 call void @llvm.aarch64.neon.st1x2.v1i64.p0(<1 x i64> %B, <1 x i64> %C, ptr %A)9559 %tmp = getelementptr i64, ptr %A, i64 29560 ret ptr %tmp9561}9562 9563define ptr @test_v1i64_post_reg_st1x2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, i64 %inc) nounwind {9564; CHECK-SD-LABEL: test_v1i64_post_reg_st1x2:9565; CHECK-SD: ; %bb.0:9566; CHECK-SD-NEXT: lsl x8, x2, #39567; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19568; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19569; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], x89570; CHECK-SD-NEXT: ret9571;9572; CHECK-GI-LABEL: test_v1i64_post_reg_st1x2:9573; CHECK-GI: ; %bb.0:9574; CHECK-GI-NEXT: mov x8, x09575; CHECK-GI-NEXT: add x0, x0, x2, lsl #39576; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19577; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19578; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8]9579; CHECK-GI-NEXT: ret9580 call void @llvm.aarch64.neon.st1x2.v1i64.p0(<1 x i64> %B, <1 x i64> %C, ptr %A)9581 %tmp = getelementptr i64, ptr %A, i64 %inc9582 ret ptr %tmp9583}9584 9585declare void @llvm.aarch64.neon.st1x2.v1i64.p0(<1 x i64>, <1 x i64>, ptr)9586 9587 9588define ptr @test_v4f32_post_imm_st1x2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C) nounwind {9589; CHECK-SD-LABEL: test_v4f32_post_imm_st1x2:9590; CHECK-SD: ; %bb.0:9591; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19592; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19593; CHECK-SD-NEXT: st1.4s { v0, v1 }, [x0], #329594; CHECK-SD-NEXT: ret9595;9596; CHECK-GI-LABEL: test_v4f32_post_imm_st1x2:9597; CHECK-GI: ; %bb.0:9598; CHECK-GI-NEXT: mov x8, x09599; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19600; CHECK-GI-NEXT: add x0, x0, #329601; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19602; CHECK-GI-NEXT: st1.4s { v0, v1 }, [x8]9603; CHECK-GI-NEXT: ret9604 call void @llvm.aarch64.neon.st1x2.v4f32.p0(<4 x float> %B, <4 x float> %C, ptr %A)9605 %tmp = getelementptr float, ptr %A, i32 89606 ret ptr %tmp9607}9608 9609define ptr @test_v4f32_post_reg_st1x2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, i64 %inc) nounwind {9610; CHECK-SD-LABEL: test_v4f32_post_reg_st1x2:9611; CHECK-SD: ; %bb.0:9612; CHECK-SD-NEXT: lsl x8, x2, #29613; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19614; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19615; CHECK-SD-NEXT: st1.4s { v0, v1 }, [x0], x89616; CHECK-SD-NEXT: ret9617;9618; CHECK-GI-LABEL: test_v4f32_post_reg_st1x2:9619; CHECK-GI: ; %bb.0:9620; CHECK-GI-NEXT: mov x8, x09621; CHECK-GI-NEXT: add x0, x0, x2, lsl #29622; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19623; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19624; CHECK-GI-NEXT: st1.4s { v0, v1 }, [x8]9625; CHECK-GI-NEXT: ret9626 call void @llvm.aarch64.neon.st1x2.v4f32.p0(<4 x float> %B, <4 x float> %C, ptr %A)9627 %tmp = getelementptr float, ptr %A, i64 %inc9628 ret ptr %tmp9629}9630 9631declare void @llvm.aarch64.neon.st1x2.v4f32.p0(<4 x float>, <4 x float>, ptr)9632 9633 9634define ptr @test_v2f32_post_imm_st1x2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C) nounwind {9635; CHECK-SD-LABEL: test_v2f32_post_imm_st1x2:9636; CHECK-SD: ; %bb.0:9637; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19638; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19639; CHECK-SD-NEXT: st1.2s { v0, v1 }, [x0], #169640; CHECK-SD-NEXT: ret9641;9642; CHECK-GI-LABEL: test_v2f32_post_imm_st1x2:9643; CHECK-GI: ; %bb.0:9644; CHECK-GI-NEXT: mov x8, x09645; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19646; CHECK-GI-NEXT: add x0, x0, #169647; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19648; CHECK-GI-NEXT: st1.2s { v0, v1 }, [x8]9649; CHECK-GI-NEXT: ret9650 call void @llvm.aarch64.neon.st1x2.v2f32.p0(<2 x float> %B, <2 x float> %C, ptr %A)9651 %tmp = getelementptr float, ptr %A, i32 49652 ret ptr %tmp9653}9654 9655define ptr @test_v2f32_post_reg_st1x2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, i64 %inc) nounwind {9656; CHECK-SD-LABEL: test_v2f32_post_reg_st1x2:9657; CHECK-SD: ; %bb.0:9658; CHECK-SD-NEXT: lsl x8, x2, #29659; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19660; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19661; CHECK-SD-NEXT: st1.2s { v0, v1 }, [x0], x89662; CHECK-SD-NEXT: ret9663;9664; CHECK-GI-LABEL: test_v2f32_post_reg_st1x2:9665; CHECK-GI: ; %bb.0:9666; CHECK-GI-NEXT: mov x8, x09667; CHECK-GI-NEXT: add x0, x0, x2, lsl #29668; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19669; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19670; CHECK-GI-NEXT: st1.2s { v0, v1 }, [x8]9671; CHECK-GI-NEXT: ret9672 call void @llvm.aarch64.neon.st1x2.v2f32.p0(<2 x float> %B, <2 x float> %C, ptr %A)9673 %tmp = getelementptr float, ptr %A, i64 %inc9674 ret ptr %tmp9675}9676 9677declare void @llvm.aarch64.neon.st1x2.v2f32.p0(<2 x float>, <2 x float>, ptr)9678 9679 9680define ptr @test_v2f64_post_imm_st1x2(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C) nounwind {9681; CHECK-SD-LABEL: test_v2f64_post_imm_st1x2:9682; CHECK-SD: ; %bb.0:9683; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19684; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19685; CHECK-SD-NEXT: st1.2d { v0, v1 }, [x0], #329686; CHECK-SD-NEXT: ret9687;9688; CHECK-GI-LABEL: test_v2f64_post_imm_st1x2:9689; CHECK-GI: ; %bb.0:9690; CHECK-GI-NEXT: mov x8, x09691; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19692; CHECK-GI-NEXT: add x0, x0, #329693; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19694; CHECK-GI-NEXT: st1.2d { v0, v1 }, [x8]9695; CHECK-GI-NEXT: ret9696 call void @llvm.aarch64.neon.st1x2.v2f64.p0(<2 x double> %B, <2 x double> %C, ptr %A)9697 %tmp = getelementptr double, ptr %A, i64 49698 ret ptr %tmp9699}9700 9701define ptr @test_v2f64_post_reg_st1x2(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, i64 %inc) nounwind {9702; CHECK-SD-LABEL: test_v2f64_post_reg_st1x2:9703; CHECK-SD: ; %bb.0:9704; CHECK-SD-NEXT: lsl x8, x2, #39705; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19706; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19707; CHECK-SD-NEXT: st1.2d { v0, v1 }, [x0], x89708; CHECK-SD-NEXT: ret9709;9710; CHECK-GI-LABEL: test_v2f64_post_reg_st1x2:9711; CHECK-GI: ; %bb.0:9712; CHECK-GI-NEXT: mov x8, x09713; CHECK-GI-NEXT: add x0, x0, x2, lsl #39714; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q19715; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q19716; CHECK-GI-NEXT: st1.2d { v0, v1 }, [x8]9717; CHECK-GI-NEXT: ret9718 call void @llvm.aarch64.neon.st1x2.v2f64.p0(<2 x double> %B, <2 x double> %C, ptr %A)9719 %tmp = getelementptr double, ptr %A, i64 %inc9720 ret ptr %tmp9721}9722 9723declare void @llvm.aarch64.neon.st1x2.v2f64.p0(<2 x double>, <2 x double>, ptr)9724 9725 9726define ptr @test_v1f64_post_imm_st1x2(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C) nounwind {9727; CHECK-SD-LABEL: test_v1f64_post_imm_st1x2:9728; CHECK-SD: ; %bb.0:9729; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19730; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19731; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], #169732; CHECK-SD-NEXT: ret9733;9734; CHECK-GI-LABEL: test_v1f64_post_imm_st1x2:9735; CHECK-GI: ; %bb.0:9736; CHECK-GI-NEXT: mov x8, x09737; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19738; CHECK-GI-NEXT: add x0, x0, #169739; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19740; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8]9741; CHECK-GI-NEXT: ret9742 call void @llvm.aarch64.neon.st1x2.v1f64.p0(<1 x double> %B, <1 x double> %C, ptr %A)9743 %tmp = getelementptr double, ptr %A, i64 29744 ret ptr %tmp9745}9746 9747define ptr @test_v1f64_post_reg_st1x2(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, i64 %inc) nounwind {9748; CHECK-SD-LABEL: test_v1f64_post_reg_st1x2:9749; CHECK-SD: ; %bb.0:9750; CHECK-SD-NEXT: lsl x8, x2, #39751; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19752; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19753; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], x89754; CHECK-SD-NEXT: ret9755;9756; CHECK-GI-LABEL: test_v1f64_post_reg_st1x2:9757; CHECK-GI: ; %bb.0:9758; CHECK-GI-NEXT: mov x8, x09759; CHECK-GI-NEXT: add x0, x0, x2, lsl #39760; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d19761; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d19762; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8]9763; CHECK-GI-NEXT: ret9764 call void @llvm.aarch64.neon.st1x2.v1f64.p0(<1 x double> %B, <1 x double> %C, ptr %A)9765 %tmp = getelementptr double, ptr %A, i64 %inc9766 ret ptr %tmp9767}9768 9769declare void @llvm.aarch64.neon.st1x2.v1f64.p0(<1 x double>, <1 x double>, ptr)9770 9771 9772define ptr @test_v16i8_post_imm_st1x3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind {9773; CHECK-SD-LABEL: test_v16i8_post_imm_st1x3:9774; CHECK-SD: ; %bb.0:9775; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q29776; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q29777; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q29778; CHECK-SD-NEXT: st1.16b { v0, v1, v2 }, [x0], #489779; CHECK-SD-NEXT: ret9780;9781; CHECK-GI-LABEL: test_v16i8_post_imm_st1x3:9782; CHECK-GI: ; %bb.0:9783; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q29784; CHECK-GI-NEXT: mov x8, x09785; CHECK-GI-NEXT: add x0, x0, #489786; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q29787; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q29788; CHECK-GI-NEXT: st1.16b { v0, v1, v2 }, [x8]9789; CHECK-GI-NEXT: ret9790 call void @llvm.aarch64.neon.st1x3.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, ptr %A)9791 %tmp = getelementptr i8, ptr %A, i32 489792 ret ptr %tmp9793}9794 9795define ptr @test_v16i8_post_reg_st1x3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 %inc) nounwind {9796; CHECK-SD-LABEL: test_v16i8_post_reg_st1x3:9797; CHECK-SD: ; %bb.0:9798; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q29799; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q29800; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q29801; CHECK-SD-NEXT: st1.16b { v0, v1, v2 }, [x0], x29802; CHECK-SD-NEXT: ret9803;9804; CHECK-GI-LABEL: test_v16i8_post_reg_st1x3:9805; CHECK-GI: ; %bb.0:9806; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q29807; CHECK-GI-NEXT: mov x8, x09808; CHECK-GI-NEXT: add x0, x0, x29809; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q29810; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q29811; CHECK-GI-NEXT: st1.16b { v0, v1, v2 }, [x8]9812; CHECK-GI-NEXT: ret9813 call void @llvm.aarch64.neon.st1x3.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, ptr %A)9814 %tmp = getelementptr i8, ptr %A, i64 %inc9815 ret ptr %tmp9816}9817 9818declare void @llvm.aarch64.neon.st1x3.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>, ptr)9819 9820 9821define ptr @test_v8i8_post_imm_st1x3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind {9822; CHECK-SD-LABEL: test_v8i8_post_imm_st1x3:9823; CHECK-SD: ; %bb.0:9824; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d29825; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d29826; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d29827; CHECK-SD-NEXT: st1.8b { v0, v1, v2 }, [x0], #249828; CHECK-SD-NEXT: ret9829;9830; CHECK-GI-LABEL: test_v8i8_post_imm_st1x3:9831; CHECK-GI: ; %bb.0:9832; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d29833; CHECK-GI-NEXT: mov x8, x09834; CHECK-GI-NEXT: add x0, x0, #249835; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d29836; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d29837; CHECK-GI-NEXT: st1.8b { v0, v1, v2 }, [x8]9838; CHECK-GI-NEXT: ret9839 call void @llvm.aarch64.neon.st1x3.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, ptr %A)9840 %tmp = getelementptr i8, ptr %A, i32 249841 ret ptr %tmp9842}9843 9844define ptr @test_v8i8_post_reg_st1x3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 %inc) nounwind {9845; CHECK-SD-LABEL: test_v8i8_post_reg_st1x3:9846; CHECK-SD: ; %bb.0:9847; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d29848; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d29849; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d29850; CHECK-SD-NEXT: st1.8b { v0, v1, v2 }, [x0], x29851; CHECK-SD-NEXT: ret9852;9853; CHECK-GI-LABEL: test_v8i8_post_reg_st1x3:9854; CHECK-GI: ; %bb.0:9855; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d29856; CHECK-GI-NEXT: mov x8, x09857; CHECK-GI-NEXT: add x0, x0, x29858; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d29859; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d29860; CHECK-GI-NEXT: st1.8b { v0, v1, v2 }, [x8]9861; CHECK-GI-NEXT: ret9862 call void @llvm.aarch64.neon.st1x3.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, ptr %A)9863 %tmp = getelementptr i8, ptr %A, i64 %inc9864 ret ptr %tmp9865}9866 9867declare void @llvm.aarch64.neon.st1x3.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, ptr)9868 9869 9870define ptr @test_v8i16_post_imm_st1x3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind {9871; CHECK-SD-LABEL: test_v8i16_post_imm_st1x3:9872; CHECK-SD: ; %bb.0:9873; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q29874; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q29875; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q29876; CHECK-SD-NEXT: st1.8h { v0, v1, v2 }, [x0], #489877; CHECK-SD-NEXT: ret9878;9879; CHECK-GI-LABEL: test_v8i16_post_imm_st1x3:9880; CHECK-GI: ; %bb.0:9881; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q29882; CHECK-GI-NEXT: mov x8, x09883; CHECK-GI-NEXT: add x0, x0, #489884; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q29885; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q29886; CHECK-GI-NEXT: st1.8h { v0, v1, v2 }, [x8]9887; CHECK-GI-NEXT: ret9888 call void @llvm.aarch64.neon.st1x3.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, ptr %A)9889 %tmp = getelementptr i16, ptr %A, i32 249890 ret ptr %tmp9891}9892 9893define ptr @test_v8i16_post_reg_st1x3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 %inc) nounwind {9894; CHECK-SD-LABEL: test_v8i16_post_reg_st1x3:9895; CHECK-SD: ; %bb.0:9896; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q29897; CHECK-SD-NEXT: lsl x8, x2, #19898; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q29899; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q29900; CHECK-SD-NEXT: st1.8h { v0, v1, v2 }, [x0], x89901; CHECK-SD-NEXT: ret9902;9903; CHECK-GI-LABEL: test_v8i16_post_reg_st1x3:9904; CHECK-GI: ; %bb.0:9905; CHECK-GI-NEXT: mov x8, x09906; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q29907; CHECK-GI-NEXT: add x0, x0, x2, lsl #19908; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q29909; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q29910; CHECK-GI-NEXT: st1.8h { v0, v1, v2 }, [x8]9911; CHECK-GI-NEXT: ret9912 call void @llvm.aarch64.neon.st1x3.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, ptr %A)9913 %tmp = getelementptr i16, ptr %A, i64 %inc9914 ret ptr %tmp9915}9916 9917declare void @llvm.aarch64.neon.st1x3.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>, ptr)9918 9919 9920define ptr @test_v4i16_post_imm_st1x3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind {9921; CHECK-SD-LABEL: test_v4i16_post_imm_st1x3:9922; CHECK-SD: ; %bb.0:9923; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d29924; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d29925; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d29926; CHECK-SD-NEXT: st1.4h { v0, v1, v2 }, [x0], #249927; CHECK-SD-NEXT: ret9928;9929; CHECK-GI-LABEL: test_v4i16_post_imm_st1x3:9930; CHECK-GI: ; %bb.0:9931; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d29932; CHECK-GI-NEXT: mov x8, x09933; CHECK-GI-NEXT: add x0, x0, #249934; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d29935; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d29936; CHECK-GI-NEXT: st1.4h { v0, v1, v2 }, [x8]9937; CHECK-GI-NEXT: ret9938 call void @llvm.aarch64.neon.st1x3.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, ptr %A)9939 %tmp = getelementptr i16, ptr %A, i32 129940 ret ptr %tmp9941}9942 9943define ptr @test_v4i16_post_reg_st1x3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 %inc) nounwind {9944; CHECK-SD-LABEL: test_v4i16_post_reg_st1x3:9945; CHECK-SD: ; %bb.0:9946; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d29947; CHECK-SD-NEXT: lsl x8, x2, #19948; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d29949; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d29950; CHECK-SD-NEXT: st1.4h { v0, v1, v2 }, [x0], x89951; CHECK-SD-NEXT: ret9952;9953; CHECK-GI-LABEL: test_v4i16_post_reg_st1x3:9954; CHECK-GI: ; %bb.0:9955; CHECK-GI-NEXT: mov x8, x09956; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d29957; CHECK-GI-NEXT: add x0, x0, x2, lsl #19958; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d29959; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d29960; CHECK-GI-NEXT: st1.4h { v0, v1, v2 }, [x8]9961; CHECK-GI-NEXT: ret9962 call void @llvm.aarch64.neon.st1x3.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, ptr %A)9963 %tmp = getelementptr i16, ptr %A, i64 %inc9964 ret ptr %tmp9965}9966 9967declare void @llvm.aarch64.neon.st1x3.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>, ptr)9968 9969 9970define ptr @test_v4i32_post_imm_st1x3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind {9971; CHECK-SD-LABEL: test_v4i32_post_imm_st1x3:9972; CHECK-SD: ; %bb.0:9973; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q29974; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q29975; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q29976; CHECK-SD-NEXT: st1.4s { v0, v1, v2 }, [x0], #489977; CHECK-SD-NEXT: ret9978;9979; CHECK-GI-LABEL: test_v4i32_post_imm_st1x3:9980; CHECK-GI: ; %bb.0:9981; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q29982; CHECK-GI-NEXT: mov x8, x09983; CHECK-GI-NEXT: add x0, x0, #489984; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q29985; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q29986; CHECK-GI-NEXT: st1.4s { v0, v1, v2 }, [x8]9987; CHECK-GI-NEXT: ret9988 call void @llvm.aarch64.neon.st1x3.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, ptr %A)9989 %tmp = getelementptr i32, ptr %A, i32 129990 ret ptr %tmp9991}9992 9993define ptr @test_v4i32_post_reg_st1x3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 %inc) nounwind {9994; CHECK-SD-LABEL: test_v4i32_post_reg_st1x3:9995; CHECK-SD: ; %bb.0:9996; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q29997; CHECK-SD-NEXT: lsl x8, x2, #29998; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q29999; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q210000; CHECK-SD-NEXT: st1.4s { v0, v1, v2 }, [x0], x810001; CHECK-SD-NEXT: ret10002;10003; CHECK-GI-LABEL: test_v4i32_post_reg_st1x3:10004; CHECK-GI: ; %bb.0:10005; CHECK-GI-NEXT: mov x8, x010006; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q210007; CHECK-GI-NEXT: add x0, x0, x2, lsl #210008; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q210009; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q210010; CHECK-GI-NEXT: st1.4s { v0, v1, v2 }, [x8]10011; CHECK-GI-NEXT: ret10012 call void @llvm.aarch64.neon.st1x3.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, ptr %A)10013 %tmp = getelementptr i32, ptr %A, i64 %inc10014 ret ptr %tmp10015}10016 10017declare void @llvm.aarch64.neon.st1x3.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>, ptr)10018 10019 10020define ptr @test_v2i32_post_imm_st1x3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind {10021; CHECK-SD-LABEL: test_v2i32_post_imm_st1x3:10022; CHECK-SD: ; %bb.0:10023; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210024; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210025; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210026; CHECK-SD-NEXT: st1.2s { v0, v1, v2 }, [x0], #2410027; CHECK-SD-NEXT: ret10028;10029; CHECK-GI-LABEL: test_v2i32_post_imm_st1x3:10030; CHECK-GI: ; %bb.0:10031; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210032; CHECK-GI-NEXT: mov x8, x010033; CHECK-GI-NEXT: add x0, x0, #2410034; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210035; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210036; CHECK-GI-NEXT: st1.2s { v0, v1, v2 }, [x8]10037; CHECK-GI-NEXT: ret10038 call void @llvm.aarch64.neon.st1x3.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, ptr %A)10039 %tmp = getelementptr i32, ptr %A, i32 610040 ret ptr %tmp10041}10042 10043define ptr @test_v2i32_post_reg_st1x3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 %inc) nounwind {10044; CHECK-SD-LABEL: test_v2i32_post_reg_st1x3:10045; CHECK-SD: ; %bb.0:10046; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210047; CHECK-SD-NEXT: lsl x8, x2, #210048; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210049; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210050; CHECK-SD-NEXT: st1.2s { v0, v1, v2 }, [x0], x810051; CHECK-SD-NEXT: ret10052;10053; CHECK-GI-LABEL: test_v2i32_post_reg_st1x3:10054; CHECK-GI: ; %bb.0:10055; CHECK-GI-NEXT: mov x8, x010056; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210057; CHECK-GI-NEXT: add x0, x0, x2, lsl #210058; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210059; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210060; CHECK-GI-NEXT: st1.2s { v0, v1, v2 }, [x8]10061; CHECK-GI-NEXT: ret10062 call void @llvm.aarch64.neon.st1x3.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, ptr %A)10063 %tmp = getelementptr i32, ptr %A, i64 %inc10064 ret ptr %tmp10065}10066 10067declare void @llvm.aarch64.neon.st1x3.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>, ptr)10068 10069 10070define ptr @test_v2i64_post_imm_st1x3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind {10071; CHECK-SD-LABEL: test_v2i64_post_imm_st1x3:10072; CHECK-SD: ; %bb.0:10073; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q210074; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q210075; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q210076; CHECK-SD-NEXT: st1.2d { v0, v1, v2 }, [x0], #4810077; CHECK-SD-NEXT: ret10078;10079; CHECK-GI-LABEL: test_v2i64_post_imm_st1x3:10080; CHECK-GI: ; %bb.0:10081; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q210082; CHECK-GI-NEXT: mov x8, x010083; CHECK-GI-NEXT: add x0, x0, #4810084; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q210085; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q210086; CHECK-GI-NEXT: st1.2d { v0, v1, v2 }, [x8]10087; CHECK-GI-NEXT: ret10088 call void @llvm.aarch64.neon.st1x3.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, ptr %A)10089 %tmp = getelementptr i64, ptr %A, i64 610090 ret ptr %tmp10091}10092 10093define ptr @test_v2i64_post_reg_st1x3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 %inc) nounwind {10094; CHECK-SD-LABEL: test_v2i64_post_reg_st1x3:10095; CHECK-SD: ; %bb.0:10096; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q210097; CHECK-SD-NEXT: lsl x8, x2, #310098; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q210099; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q210100; CHECK-SD-NEXT: st1.2d { v0, v1, v2 }, [x0], x810101; CHECK-SD-NEXT: ret10102;10103; CHECK-GI-LABEL: test_v2i64_post_reg_st1x3:10104; CHECK-GI: ; %bb.0:10105; CHECK-GI-NEXT: mov x8, x010106; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q210107; CHECK-GI-NEXT: add x0, x0, x2, lsl #310108; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q210109; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q210110; CHECK-GI-NEXT: st1.2d { v0, v1, v2 }, [x8]10111; CHECK-GI-NEXT: ret10112 call void @llvm.aarch64.neon.st1x3.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, ptr %A)10113 %tmp = getelementptr i64, ptr %A, i64 %inc10114 ret ptr %tmp10115}10116 10117declare void @llvm.aarch64.neon.st1x3.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>, ptr)10118 10119 10120define ptr @test_v1i64_post_imm_st1x3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind {10121; CHECK-SD-LABEL: test_v1i64_post_imm_st1x3:10122; CHECK-SD: ; %bb.0:10123; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210124; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210125; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210126; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], #2410127; CHECK-SD-NEXT: ret10128;10129; CHECK-GI-LABEL: test_v1i64_post_imm_st1x3:10130; CHECK-GI: ; %bb.0:10131; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210132; CHECK-GI-NEXT: mov x8, x010133; CHECK-GI-NEXT: add x0, x0, #2410134; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210135; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210136; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8]10137; CHECK-GI-NEXT: ret10138 call void @llvm.aarch64.neon.st1x3.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, ptr %A)10139 %tmp = getelementptr i64, ptr %A, i64 310140 ret ptr %tmp10141}10142 10143define ptr @test_v1i64_post_reg_st1x3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 %inc) nounwind {10144; CHECK-SD-LABEL: test_v1i64_post_reg_st1x3:10145; CHECK-SD: ; %bb.0:10146; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210147; CHECK-SD-NEXT: lsl x8, x2, #310148; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210149; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210150; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], x810151; CHECK-SD-NEXT: ret10152;10153; CHECK-GI-LABEL: test_v1i64_post_reg_st1x3:10154; CHECK-GI: ; %bb.0:10155; CHECK-GI-NEXT: mov x8, x010156; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210157; CHECK-GI-NEXT: add x0, x0, x2, lsl #310158; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210159; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210160; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8]10161; CHECK-GI-NEXT: ret10162 call void @llvm.aarch64.neon.st1x3.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, ptr %A)10163 %tmp = getelementptr i64, ptr %A, i64 %inc10164 ret ptr %tmp10165}10166 10167declare void @llvm.aarch64.neon.st1x3.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>, ptr)10168 10169 10170define ptr @test_v4f32_post_imm_st1x3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind {10171; CHECK-SD-LABEL: test_v4f32_post_imm_st1x3:10172; CHECK-SD: ; %bb.0:10173; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q210174; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q210175; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q210176; CHECK-SD-NEXT: st1.4s { v0, v1, v2 }, [x0], #4810177; CHECK-SD-NEXT: ret10178;10179; CHECK-GI-LABEL: test_v4f32_post_imm_st1x3:10180; CHECK-GI: ; %bb.0:10181; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q210182; CHECK-GI-NEXT: mov x8, x010183; CHECK-GI-NEXT: add x0, x0, #4810184; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q210185; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q210186; CHECK-GI-NEXT: st1.4s { v0, v1, v2 }, [x8]10187; CHECK-GI-NEXT: ret10188 call void @llvm.aarch64.neon.st1x3.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, ptr %A)10189 %tmp = getelementptr float, ptr %A, i32 1210190 ret ptr %tmp10191}10192 10193define ptr @test_v4f32_post_reg_st1x3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, i64 %inc) nounwind {10194; CHECK-SD-LABEL: test_v4f32_post_reg_st1x3:10195; CHECK-SD: ; %bb.0:10196; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q210197; CHECK-SD-NEXT: lsl x8, x2, #210198; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q210199; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q210200; CHECK-SD-NEXT: st1.4s { v0, v1, v2 }, [x0], x810201; CHECK-SD-NEXT: ret10202;10203; CHECK-GI-LABEL: test_v4f32_post_reg_st1x3:10204; CHECK-GI: ; %bb.0:10205; CHECK-GI-NEXT: mov x8, x010206; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q210207; CHECK-GI-NEXT: add x0, x0, x2, lsl #210208; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q210209; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q210210; CHECK-GI-NEXT: st1.4s { v0, v1, v2 }, [x8]10211; CHECK-GI-NEXT: ret10212 call void @llvm.aarch64.neon.st1x3.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, ptr %A)10213 %tmp = getelementptr float, ptr %A, i64 %inc10214 ret ptr %tmp10215}10216 10217declare void @llvm.aarch64.neon.st1x3.v4f32.p0(<4 x float>, <4 x float>, <4 x float>, ptr)10218 10219 10220define ptr @test_v2f32_post_imm_st1x3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind {10221; CHECK-SD-LABEL: test_v2f32_post_imm_st1x3:10222; CHECK-SD: ; %bb.0:10223; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210224; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210225; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210226; CHECK-SD-NEXT: st1.2s { v0, v1, v2 }, [x0], #2410227; CHECK-SD-NEXT: ret10228;10229; CHECK-GI-LABEL: test_v2f32_post_imm_st1x3:10230; CHECK-GI: ; %bb.0:10231; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210232; CHECK-GI-NEXT: mov x8, x010233; CHECK-GI-NEXT: add x0, x0, #2410234; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210235; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210236; CHECK-GI-NEXT: st1.2s { v0, v1, v2 }, [x8]10237; CHECK-GI-NEXT: ret10238 call void @llvm.aarch64.neon.st1x3.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, ptr %A)10239 %tmp = getelementptr float, ptr %A, i32 610240 ret ptr %tmp10241}10242 10243define ptr @test_v2f32_post_reg_st1x3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, i64 %inc) nounwind {10244; CHECK-SD-LABEL: test_v2f32_post_reg_st1x3:10245; CHECK-SD: ; %bb.0:10246; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210247; CHECK-SD-NEXT: lsl x8, x2, #210248; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210249; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210250; CHECK-SD-NEXT: st1.2s { v0, v1, v2 }, [x0], x810251; CHECK-SD-NEXT: ret10252;10253; CHECK-GI-LABEL: test_v2f32_post_reg_st1x3:10254; CHECK-GI: ; %bb.0:10255; CHECK-GI-NEXT: mov x8, x010256; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210257; CHECK-GI-NEXT: add x0, x0, x2, lsl #210258; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210259; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210260; CHECK-GI-NEXT: st1.2s { v0, v1, v2 }, [x8]10261; CHECK-GI-NEXT: ret10262 call void @llvm.aarch64.neon.st1x3.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, ptr %A)10263 %tmp = getelementptr float, ptr %A, i64 %inc10264 ret ptr %tmp10265}10266 10267declare void @llvm.aarch64.neon.st1x3.v2f32.p0(<2 x float>, <2 x float>, <2 x float>, ptr)10268 10269 10270define ptr @test_v2f64_post_imm_st1x3(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind {10271; CHECK-SD-LABEL: test_v2f64_post_imm_st1x3:10272; CHECK-SD: ; %bb.0:10273; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q210274; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q210275; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q210276; CHECK-SD-NEXT: st1.2d { v0, v1, v2 }, [x0], #4810277; CHECK-SD-NEXT: ret10278;10279; CHECK-GI-LABEL: test_v2f64_post_imm_st1x3:10280; CHECK-GI: ; %bb.0:10281; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q210282; CHECK-GI-NEXT: mov x8, x010283; CHECK-GI-NEXT: add x0, x0, #4810284; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q210285; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q210286; CHECK-GI-NEXT: st1.2d { v0, v1, v2 }, [x8]10287; CHECK-GI-NEXT: ret10288 call void @llvm.aarch64.neon.st1x3.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, ptr %A)10289 %tmp = getelementptr double, ptr %A, i64 610290 ret ptr %tmp10291}10292 10293define ptr @test_v2f64_post_reg_st1x3(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, i64 %inc) nounwind {10294; CHECK-SD-LABEL: test_v2f64_post_reg_st1x3:10295; CHECK-SD: ; %bb.0:10296; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q210297; CHECK-SD-NEXT: lsl x8, x2, #310298; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q210299; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q210300; CHECK-SD-NEXT: st1.2d { v0, v1, v2 }, [x0], x810301; CHECK-SD-NEXT: ret10302;10303; CHECK-GI-LABEL: test_v2f64_post_reg_st1x3:10304; CHECK-GI: ; %bb.0:10305; CHECK-GI-NEXT: mov x8, x010306; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q210307; CHECK-GI-NEXT: add x0, x0, x2, lsl #310308; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q210309; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q210310; CHECK-GI-NEXT: st1.2d { v0, v1, v2 }, [x8]10311; CHECK-GI-NEXT: ret10312 call void @llvm.aarch64.neon.st1x3.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, ptr %A)10313 %tmp = getelementptr double, ptr %A, i64 %inc10314 ret ptr %tmp10315}10316 10317declare void @llvm.aarch64.neon.st1x3.v2f64.p0(<2 x double>, <2 x double>, <2 x double>, ptr)10318 10319 10320define ptr @test_v1f64_post_imm_st1x3(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind {10321; CHECK-SD-LABEL: test_v1f64_post_imm_st1x3:10322; CHECK-SD: ; %bb.0:10323; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210324; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210325; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210326; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], #2410327; CHECK-SD-NEXT: ret10328;10329; CHECK-GI-LABEL: test_v1f64_post_imm_st1x3:10330; CHECK-GI: ; %bb.0:10331; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210332; CHECK-GI-NEXT: mov x8, x010333; CHECK-GI-NEXT: add x0, x0, #2410334; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210335; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210336; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8]10337; CHECK-GI-NEXT: ret10338 call void @llvm.aarch64.neon.st1x3.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, ptr %A)10339 %tmp = getelementptr double, ptr %A, i64 310340 ret ptr %tmp10341}10342 10343define ptr @test_v1f64_post_reg_st1x3(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, i64 %inc) nounwind {10344; CHECK-SD-LABEL: test_v1f64_post_reg_st1x3:10345; CHECK-SD: ; %bb.0:10346; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210347; CHECK-SD-NEXT: lsl x8, x2, #310348; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210349; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210350; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], x810351; CHECK-SD-NEXT: ret10352;10353; CHECK-GI-LABEL: test_v1f64_post_reg_st1x3:10354; CHECK-GI: ; %bb.0:10355; CHECK-GI-NEXT: mov x8, x010356; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d210357; CHECK-GI-NEXT: add x0, x0, x2, lsl #310358; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d210359; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d210360; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8]10361; CHECK-GI-NEXT: ret10362 call void @llvm.aarch64.neon.st1x3.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, ptr %A)10363 %tmp = getelementptr double, ptr %A, i64 %inc10364 ret ptr %tmp10365}10366 10367declare void @llvm.aarch64.neon.st1x3.v1f64.p0(<1 x double>, <1 x double>, <1 x double>, ptr)10368 10369 10370define ptr @test_v16i8_post_imm_st1x4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind {10371; CHECK-SD-LABEL: test_v16i8_post_imm_st1x4:10372; CHECK-SD: ; %bb.0:10373; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310374; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310375; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310376; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310377; CHECK-SD-NEXT: st1.16b { v0, v1, v2, v3 }, [x0], #6410378; CHECK-SD-NEXT: ret10379;10380; CHECK-GI-LABEL: test_v16i8_post_imm_st1x4:10381; CHECK-GI: ; %bb.0:10382; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310383; CHECK-GI-NEXT: mov x8, x010384; CHECK-GI-NEXT: add x0, x0, #6410385; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310386; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310387; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310388; CHECK-GI-NEXT: st1.16b { v0, v1, v2, v3 }, [x8]10389; CHECK-GI-NEXT: ret10390 call void @llvm.aarch64.neon.st1x4.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, ptr %A)10391 %tmp = getelementptr i8, ptr %A, i32 6410392 ret ptr %tmp10393}10394 10395define ptr @test_v16i8_post_reg_st1x4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 %inc) nounwind {10396; CHECK-SD-LABEL: test_v16i8_post_reg_st1x4:10397; CHECK-SD: ; %bb.0:10398; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310399; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310400; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310401; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310402; CHECK-SD-NEXT: st1.16b { v0, v1, v2, v3 }, [x0], x210403; CHECK-SD-NEXT: ret10404;10405; CHECK-GI-LABEL: test_v16i8_post_reg_st1x4:10406; CHECK-GI: ; %bb.0:10407; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310408; CHECK-GI-NEXT: mov x8, x010409; CHECK-GI-NEXT: add x0, x0, x210410; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310411; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310412; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310413; CHECK-GI-NEXT: st1.16b { v0, v1, v2, v3 }, [x8]10414; CHECK-GI-NEXT: ret10415 call void @llvm.aarch64.neon.st1x4.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, ptr %A)10416 %tmp = getelementptr i8, ptr %A, i64 %inc10417 ret ptr %tmp10418}10419 10420declare void @llvm.aarch64.neon.st1x4.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, ptr)10421 10422 10423define ptr @test_v8i8_post_imm_st1x4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind {10424; CHECK-SD-LABEL: test_v8i8_post_imm_st1x4:10425; CHECK-SD: ; %bb.0:10426; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310427; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310428; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310429; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310430; CHECK-SD-NEXT: st1.8b { v0, v1, v2, v3 }, [x0], #3210431; CHECK-SD-NEXT: ret10432;10433; CHECK-GI-LABEL: test_v8i8_post_imm_st1x4:10434; CHECK-GI: ; %bb.0:10435; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310436; CHECK-GI-NEXT: mov x8, x010437; CHECK-GI-NEXT: add x0, x0, #3210438; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310439; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310440; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310441; CHECK-GI-NEXT: st1.8b { v0, v1, v2, v3 }, [x8]10442; CHECK-GI-NEXT: ret10443 call void @llvm.aarch64.neon.st1x4.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, ptr %A)10444 %tmp = getelementptr i8, ptr %A, i32 3210445 ret ptr %tmp10446}10447 10448define ptr @test_v8i8_post_reg_st1x4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 %inc) nounwind {10449; CHECK-SD-LABEL: test_v8i8_post_reg_st1x4:10450; CHECK-SD: ; %bb.0:10451; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310452; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310453; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310454; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310455; CHECK-SD-NEXT: st1.8b { v0, v1, v2, v3 }, [x0], x210456; CHECK-SD-NEXT: ret10457;10458; CHECK-GI-LABEL: test_v8i8_post_reg_st1x4:10459; CHECK-GI: ; %bb.0:10460; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310461; CHECK-GI-NEXT: mov x8, x010462; CHECK-GI-NEXT: add x0, x0, x210463; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310464; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310465; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310466; CHECK-GI-NEXT: st1.8b { v0, v1, v2, v3 }, [x8]10467; CHECK-GI-NEXT: ret10468 call void @llvm.aarch64.neon.st1x4.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, ptr %A)10469 %tmp = getelementptr i8, ptr %A, i64 %inc10470 ret ptr %tmp10471}10472 10473declare void @llvm.aarch64.neon.st1x4.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, ptr)10474 10475 10476define ptr @test_v8i16_post_imm_st1x4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind {10477; CHECK-SD-LABEL: test_v8i16_post_imm_st1x4:10478; CHECK-SD: ; %bb.0:10479; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310480; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310481; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310482; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310483; CHECK-SD-NEXT: st1.8h { v0, v1, v2, v3 }, [x0], #6410484; CHECK-SD-NEXT: ret10485;10486; CHECK-GI-LABEL: test_v8i16_post_imm_st1x4:10487; CHECK-GI: ; %bb.0:10488; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310489; CHECK-GI-NEXT: mov x8, x010490; CHECK-GI-NEXT: add x0, x0, #6410491; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310492; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310493; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310494; CHECK-GI-NEXT: st1.8h { v0, v1, v2, v3 }, [x8]10495; CHECK-GI-NEXT: ret10496 call void @llvm.aarch64.neon.st1x4.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, ptr %A)10497 %tmp = getelementptr i16, ptr %A, i32 3210498 ret ptr %tmp10499}10500 10501define ptr @test_v8i16_post_reg_st1x4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 %inc) nounwind {10502; CHECK-SD-LABEL: test_v8i16_post_reg_st1x4:10503; CHECK-SD: ; %bb.0:10504; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310505; CHECK-SD-NEXT: lsl x8, x2, #110506; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310507; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310508; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310509; CHECK-SD-NEXT: st1.8h { v0, v1, v2, v3 }, [x0], x810510; CHECK-SD-NEXT: ret10511;10512; CHECK-GI-LABEL: test_v8i16_post_reg_st1x4:10513; CHECK-GI: ; %bb.0:10514; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310515; CHECK-GI-NEXT: mov x8, x010516; CHECK-GI-NEXT: add x0, x0, x2, lsl #110517; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310518; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310519; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310520; CHECK-GI-NEXT: st1.8h { v0, v1, v2, v3 }, [x8]10521; CHECK-GI-NEXT: ret10522 call void @llvm.aarch64.neon.st1x4.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, ptr %A)10523 %tmp = getelementptr i16, ptr %A, i64 %inc10524 ret ptr %tmp10525}10526 10527declare void @llvm.aarch64.neon.st1x4.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, ptr)10528 10529 10530define ptr @test_v4i16_post_imm_st1x4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind {10531; CHECK-SD-LABEL: test_v4i16_post_imm_st1x4:10532; CHECK-SD: ; %bb.0:10533; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310534; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310535; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310536; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310537; CHECK-SD-NEXT: st1.4h { v0, v1, v2, v3 }, [x0], #3210538; CHECK-SD-NEXT: ret10539;10540; CHECK-GI-LABEL: test_v4i16_post_imm_st1x4:10541; CHECK-GI: ; %bb.0:10542; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310543; CHECK-GI-NEXT: mov x8, x010544; CHECK-GI-NEXT: add x0, x0, #3210545; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310546; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310547; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310548; CHECK-GI-NEXT: st1.4h { v0, v1, v2, v3 }, [x8]10549; CHECK-GI-NEXT: ret10550 call void @llvm.aarch64.neon.st1x4.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, ptr %A)10551 %tmp = getelementptr i16, ptr %A, i32 1610552 ret ptr %tmp10553}10554 10555define ptr @test_v4i16_post_reg_st1x4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 %inc) nounwind {10556; CHECK-SD-LABEL: test_v4i16_post_reg_st1x4:10557; CHECK-SD: ; %bb.0:10558; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310559; CHECK-SD-NEXT: lsl x8, x2, #110560; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310561; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310562; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310563; CHECK-SD-NEXT: st1.4h { v0, v1, v2, v3 }, [x0], x810564; CHECK-SD-NEXT: ret10565;10566; CHECK-GI-LABEL: test_v4i16_post_reg_st1x4:10567; CHECK-GI: ; %bb.0:10568; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310569; CHECK-GI-NEXT: mov x8, x010570; CHECK-GI-NEXT: add x0, x0, x2, lsl #110571; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310572; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310573; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310574; CHECK-GI-NEXT: st1.4h { v0, v1, v2, v3 }, [x8]10575; CHECK-GI-NEXT: ret10576 call void @llvm.aarch64.neon.st1x4.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, ptr %A)10577 %tmp = getelementptr i16, ptr %A, i64 %inc10578 ret ptr %tmp10579}10580 10581declare void @llvm.aarch64.neon.st1x4.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>,<4 x i16>, ptr)10582 10583 10584define ptr @test_v4i32_post_imm_st1x4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind {10585; CHECK-SD-LABEL: test_v4i32_post_imm_st1x4:10586; CHECK-SD: ; %bb.0:10587; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310588; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310589; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310590; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310591; CHECK-SD-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], #6410592; CHECK-SD-NEXT: ret10593;10594; CHECK-GI-LABEL: test_v4i32_post_imm_st1x4:10595; CHECK-GI: ; %bb.0:10596; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310597; CHECK-GI-NEXT: mov x8, x010598; CHECK-GI-NEXT: add x0, x0, #6410599; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310600; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310601; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310602; CHECK-GI-NEXT: st1.4s { v0, v1, v2, v3 }, [x8]10603; CHECK-GI-NEXT: ret10604 call void @llvm.aarch64.neon.st1x4.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, ptr %A)10605 %tmp = getelementptr i32, ptr %A, i32 1610606 ret ptr %tmp10607}10608 10609define ptr @test_v4i32_post_reg_st1x4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 %inc) nounwind {10610; CHECK-SD-LABEL: test_v4i32_post_reg_st1x4:10611; CHECK-SD: ; %bb.0:10612; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310613; CHECK-SD-NEXT: lsl x8, x2, #210614; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310615; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310616; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310617; CHECK-SD-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], x810618; CHECK-SD-NEXT: ret10619;10620; CHECK-GI-LABEL: test_v4i32_post_reg_st1x4:10621; CHECK-GI: ; %bb.0:10622; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310623; CHECK-GI-NEXT: mov x8, x010624; CHECK-GI-NEXT: add x0, x0, x2, lsl #210625; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310626; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310627; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310628; CHECK-GI-NEXT: st1.4s { v0, v1, v2, v3 }, [x8]10629; CHECK-GI-NEXT: ret10630 call void @llvm.aarch64.neon.st1x4.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, ptr %A)10631 %tmp = getelementptr i32, ptr %A, i64 %inc10632 ret ptr %tmp10633}10634 10635declare void @llvm.aarch64.neon.st1x4.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>,<4 x i32>, ptr)10636 10637 10638define ptr @test_v2i32_post_imm_st1x4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind {10639; CHECK-SD-LABEL: test_v2i32_post_imm_st1x4:10640; CHECK-SD: ; %bb.0:10641; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310642; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310643; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310644; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310645; CHECK-SD-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], #3210646; CHECK-SD-NEXT: ret10647;10648; CHECK-GI-LABEL: test_v2i32_post_imm_st1x4:10649; CHECK-GI: ; %bb.0:10650; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310651; CHECK-GI-NEXT: mov x8, x010652; CHECK-GI-NEXT: add x0, x0, #3210653; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310654; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310655; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310656; CHECK-GI-NEXT: st1.2s { v0, v1, v2, v3 }, [x8]10657; CHECK-GI-NEXT: ret10658 call void @llvm.aarch64.neon.st1x4.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, ptr %A)10659 %tmp = getelementptr i32, ptr %A, i32 810660 ret ptr %tmp10661}10662 10663define ptr @test_v2i32_post_reg_st1x4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 %inc) nounwind {10664; CHECK-SD-LABEL: test_v2i32_post_reg_st1x4:10665; CHECK-SD: ; %bb.0:10666; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310667; CHECK-SD-NEXT: lsl x8, x2, #210668; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310669; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310670; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310671; CHECK-SD-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], x810672; CHECK-SD-NEXT: ret10673;10674; CHECK-GI-LABEL: test_v2i32_post_reg_st1x4:10675; CHECK-GI: ; %bb.0:10676; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310677; CHECK-GI-NEXT: mov x8, x010678; CHECK-GI-NEXT: add x0, x0, x2, lsl #210679; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310680; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310681; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310682; CHECK-GI-NEXT: st1.2s { v0, v1, v2, v3 }, [x8]10683; CHECK-GI-NEXT: ret10684 call void @llvm.aarch64.neon.st1x4.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, ptr %A)10685 %tmp = getelementptr i32, ptr %A, i64 %inc10686 ret ptr %tmp10687}10688 10689declare void @llvm.aarch64.neon.st1x4.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, ptr)10690 10691 10692define ptr @test_v2i64_post_imm_st1x4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind {10693; CHECK-SD-LABEL: test_v2i64_post_imm_st1x4:10694; CHECK-SD: ; %bb.0:10695; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310696; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310697; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310698; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310699; CHECK-SD-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], #6410700; CHECK-SD-NEXT: ret10701;10702; CHECK-GI-LABEL: test_v2i64_post_imm_st1x4:10703; CHECK-GI: ; %bb.0:10704; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310705; CHECK-GI-NEXT: mov x8, x010706; CHECK-GI-NEXT: add x0, x0, #6410707; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310708; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310709; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310710; CHECK-GI-NEXT: st1.2d { v0, v1, v2, v3 }, [x8]10711; CHECK-GI-NEXT: ret10712 call void @llvm.aarch64.neon.st1x4.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, ptr %A)10713 %tmp = getelementptr i64, ptr %A, i64 810714 ret ptr %tmp10715}10716 10717define ptr @test_v2i64_post_reg_st1x4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 %inc) nounwind {10718; CHECK-SD-LABEL: test_v2i64_post_reg_st1x4:10719; CHECK-SD: ; %bb.0:10720; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310721; CHECK-SD-NEXT: lsl x8, x2, #310722; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310723; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310724; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310725; CHECK-SD-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], x810726; CHECK-SD-NEXT: ret10727;10728; CHECK-GI-LABEL: test_v2i64_post_reg_st1x4:10729; CHECK-GI: ; %bb.0:10730; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310731; CHECK-GI-NEXT: mov x8, x010732; CHECK-GI-NEXT: add x0, x0, x2, lsl #310733; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310734; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310735; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310736; CHECK-GI-NEXT: st1.2d { v0, v1, v2, v3 }, [x8]10737; CHECK-GI-NEXT: ret10738 call void @llvm.aarch64.neon.st1x4.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, ptr %A)10739 %tmp = getelementptr i64, ptr %A, i64 %inc10740 ret ptr %tmp10741}10742 10743declare void @llvm.aarch64.neon.st1x4.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>,<2 x i64>, ptr)10744 10745 10746define ptr @test_v1i64_post_imm_st1x4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind {10747; CHECK-SD-LABEL: test_v1i64_post_imm_st1x4:10748; CHECK-SD: ; %bb.0:10749; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310750; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310751; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310752; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310753; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #3210754; CHECK-SD-NEXT: ret10755;10756; CHECK-GI-LABEL: test_v1i64_post_imm_st1x4:10757; CHECK-GI: ; %bb.0:10758; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310759; CHECK-GI-NEXT: mov x8, x010760; CHECK-GI-NEXT: add x0, x0, #3210761; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310762; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310763; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310764; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]10765; CHECK-GI-NEXT: ret10766 call void @llvm.aarch64.neon.st1x4.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, ptr %A)10767 %tmp = getelementptr i64, ptr %A, i64 410768 ret ptr %tmp10769}10770 10771define ptr @test_v1i64_post_reg_st1x4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 %inc) nounwind {10772; CHECK-SD-LABEL: test_v1i64_post_reg_st1x4:10773; CHECK-SD: ; %bb.0:10774; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310775; CHECK-SD-NEXT: lsl x8, x2, #310776; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310777; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310778; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310779; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x810780; CHECK-SD-NEXT: ret10781;10782; CHECK-GI-LABEL: test_v1i64_post_reg_st1x4:10783; CHECK-GI: ; %bb.0:10784; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310785; CHECK-GI-NEXT: mov x8, x010786; CHECK-GI-NEXT: add x0, x0, x2, lsl #310787; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310788; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310789; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310790; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]10791; CHECK-GI-NEXT: ret10792 call void @llvm.aarch64.neon.st1x4.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, ptr %A)10793 %tmp = getelementptr i64, ptr %A, i64 %inc10794 ret ptr %tmp10795}10796 10797declare void @llvm.aarch64.neon.st1x4.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>,<1 x i64>, ptr)10798 10799 10800define ptr @test_v4f32_post_imm_st1x4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind {10801; CHECK-SD-LABEL: test_v4f32_post_imm_st1x4:10802; CHECK-SD: ; %bb.0:10803; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310804; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310805; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310806; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310807; CHECK-SD-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], #6410808; CHECK-SD-NEXT: ret10809;10810; CHECK-GI-LABEL: test_v4f32_post_imm_st1x4:10811; CHECK-GI: ; %bb.0:10812; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310813; CHECK-GI-NEXT: mov x8, x010814; CHECK-GI-NEXT: add x0, x0, #6410815; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310816; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310817; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310818; CHECK-GI-NEXT: st1.4s { v0, v1, v2, v3 }, [x8]10819; CHECK-GI-NEXT: ret10820 call void @llvm.aarch64.neon.st1x4.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, ptr %A)10821 %tmp = getelementptr float, ptr %A, i32 1610822 ret ptr %tmp10823}10824 10825define ptr @test_v4f32_post_reg_st1x4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 %inc) nounwind {10826; CHECK-SD-LABEL: test_v4f32_post_reg_st1x4:10827; CHECK-SD: ; %bb.0:10828; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310829; CHECK-SD-NEXT: lsl x8, x2, #210830; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310831; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310832; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310833; CHECK-SD-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], x810834; CHECK-SD-NEXT: ret10835;10836; CHECK-GI-LABEL: test_v4f32_post_reg_st1x4:10837; CHECK-GI: ; %bb.0:10838; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310839; CHECK-GI-NEXT: mov x8, x010840; CHECK-GI-NEXT: add x0, x0, x2, lsl #210841; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310842; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310843; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310844; CHECK-GI-NEXT: st1.4s { v0, v1, v2, v3 }, [x8]10845; CHECK-GI-NEXT: ret10846 call void @llvm.aarch64.neon.st1x4.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, ptr %A)10847 %tmp = getelementptr float, ptr %A, i64 %inc10848 ret ptr %tmp10849}10850 10851declare void @llvm.aarch64.neon.st1x4.v4f32.p0(<4 x float>, <4 x float>, <4 x float>, <4 x float>, ptr)10852 10853 10854define ptr @test_v2f32_post_imm_st1x4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind {10855; CHECK-SD-LABEL: test_v2f32_post_imm_st1x4:10856; CHECK-SD: ; %bb.0:10857; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310858; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310859; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310860; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310861; CHECK-SD-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], #3210862; CHECK-SD-NEXT: ret10863;10864; CHECK-GI-LABEL: test_v2f32_post_imm_st1x4:10865; CHECK-GI: ; %bb.0:10866; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310867; CHECK-GI-NEXT: mov x8, x010868; CHECK-GI-NEXT: add x0, x0, #3210869; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310870; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310871; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310872; CHECK-GI-NEXT: st1.2s { v0, v1, v2, v3 }, [x8]10873; CHECK-GI-NEXT: ret10874 call void @llvm.aarch64.neon.st1x4.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, ptr %A)10875 %tmp = getelementptr float, ptr %A, i32 810876 ret ptr %tmp10877}10878 10879define ptr @test_v2f32_post_reg_st1x4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 %inc) nounwind {10880; CHECK-SD-LABEL: test_v2f32_post_reg_st1x4:10881; CHECK-SD: ; %bb.0:10882; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310883; CHECK-SD-NEXT: lsl x8, x2, #210884; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310885; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310886; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310887; CHECK-SD-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], x810888; CHECK-SD-NEXT: ret10889;10890; CHECK-GI-LABEL: test_v2f32_post_reg_st1x4:10891; CHECK-GI: ; %bb.0:10892; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310893; CHECK-GI-NEXT: mov x8, x010894; CHECK-GI-NEXT: add x0, x0, x2, lsl #210895; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310896; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310897; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310898; CHECK-GI-NEXT: st1.2s { v0, v1, v2, v3 }, [x8]10899; CHECK-GI-NEXT: ret10900 call void @llvm.aarch64.neon.st1x4.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, ptr %A)10901 %tmp = getelementptr float, ptr %A, i64 %inc10902 ret ptr %tmp10903}10904 10905declare void @llvm.aarch64.neon.st1x4.v2f32.p0(<2 x float>, <2 x float>, <2 x float>, <2 x float>, ptr)10906 10907 10908define ptr @test_v2f64_post_imm_st1x4(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind {10909; CHECK-SD-LABEL: test_v2f64_post_imm_st1x4:10910; CHECK-SD: ; %bb.0:10911; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310912; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310913; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310914; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310915; CHECK-SD-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], #6410916; CHECK-SD-NEXT: ret10917;10918; CHECK-GI-LABEL: test_v2f64_post_imm_st1x4:10919; CHECK-GI: ; %bb.0:10920; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310921; CHECK-GI-NEXT: mov x8, x010922; CHECK-GI-NEXT: add x0, x0, #6410923; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310924; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310925; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310926; CHECK-GI-NEXT: st1.2d { v0, v1, v2, v3 }, [x8]10927; CHECK-GI-NEXT: ret10928 call void @llvm.aarch64.neon.st1x4.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, ptr %A)10929 %tmp = getelementptr double, ptr %A, i64 810930 ret ptr %tmp10931}10932 10933define ptr @test_v2f64_post_reg_st1x4(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 %inc) nounwind {10934; CHECK-SD-LABEL: test_v2f64_post_reg_st1x4:10935; CHECK-SD: ; %bb.0:10936; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310937; CHECK-SD-NEXT: lsl x8, x2, #310938; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310939; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310940; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310941; CHECK-SD-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], x810942; CHECK-SD-NEXT: ret10943;10944; CHECK-GI-LABEL: test_v2f64_post_reg_st1x4:10945; CHECK-GI: ; %bb.0:10946; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q310947; CHECK-GI-NEXT: mov x8, x010948; CHECK-GI-NEXT: add x0, x0, x2, lsl #310949; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q310950; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q310951; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q310952; CHECK-GI-NEXT: st1.2d { v0, v1, v2, v3 }, [x8]10953; CHECK-GI-NEXT: ret10954 call void @llvm.aarch64.neon.st1x4.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, ptr %A)10955 %tmp = getelementptr double, ptr %A, i64 %inc10956 ret ptr %tmp10957}10958 10959declare void @llvm.aarch64.neon.st1x4.v2f64.p0(<2 x double>, <2 x double>, <2 x double>,<2 x double>, ptr)10960 10961 10962define ptr @test_v1f64_post_imm_st1x4(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind {10963; CHECK-SD-LABEL: test_v1f64_post_imm_st1x4:10964; CHECK-SD: ; %bb.0:10965; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310966; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310967; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310968; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310969; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #3210970; CHECK-SD-NEXT: ret10971;10972; CHECK-GI-LABEL: test_v1f64_post_imm_st1x4:10973; CHECK-GI: ; %bb.0:10974; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310975; CHECK-GI-NEXT: mov x8, x010976; CHECK-GI-NEXT: add x0, x0, #3210977; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310978; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310979; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310980; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]10981; CHECK-GI-NEXT: ret10982 call void @llvm.aarch64.neon.st1x4.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, ptr %A)10983 %tmp = getelementptr double, ptr %A, i64 410984 ret ptr %tmp10985}10986 10987define ptr @test_v1f64_post_reg_st1x4(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 %inc) nounwind {10988; CHECK-SD-LABEL: test_v1f64_post_reg_st1x4:10989; CHECK-SD: ; %bb.0:10990; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d310991; CHECK-SD-NEXT: lsl x8, x2, #310992; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d310993; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d310994; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d310995; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x810996; CHECK-SD-NEXT: ret10997;10998; CHECK-GI-LABEL: test_v1f64_post_reg_st1x4:10999; CHECK-GI: ; %bb.0:11000; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d311001; CHECK-GI-NEXT: mov x8, x011002; CHECK-GI-NEXT: add x0, x0, x2, lsl #311003; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d311004; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d311005; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d311006; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8]11007; CHECK-GI-NEXT: ret11008 call void @llvm.aarch64.neon.st1x4.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, ptr %A)11009 %tmp = getelementptr double, ptr %A, i64 %inc11010 ret ptr %tmp11011}11012 11013declare void @llvm.aarch64.neon.st1x4.v1f64.p0(<1 x double>, <1 x double>, <1 x double>, <1 x double>, ptr)11014 11015define ptr @test_v16i8_post_imm_st2lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C) nounwind {11016; CHECK-SD-LABEL: test_v16i8_post_imm_st2lane:11017; CHECK-SD: ; %bb.0:11018; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111019; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111020; CHECK-SD-NEXT: st2.b { v0, v1 }[0], [x0], #211021; CHECK-SD-NEXT: ret11022;11023; CHECK-GI-LABEL: test_v16i8_post_imm_st2lane:11024; CHECK-GI: ; %bb.0:11025; CHECK-GI-NEXT: mov x8, x011026; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111027; CHECK-GI-NEXT: add x0, x0, #211028; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111029; CHECK-GI-NEXT: st2.b { v0, v1 }[0], [x8]11030; CHECK-GI-NEXT: ret11031 call void @llvm.aarch64.neon.st2lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, i64 0, ptr %A)11032 %tmp = getelementptr i8, ptr %A, i32 211033 ret ptr %tmp11034}11035 11036define ptr @test_v16i8_post_reg_st2lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, i64 %inc) nounwind {11037; CHECK-SD-LABEL: test_v16i8_post_reg_st2lane:11038; CHECK-SD: ; %bb.0:11039; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111040; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111041; CHECK-SD-NEXT: st2.b { v0, v1 }[0], [x0], x211042; CHECK-SD-NEXT: ret11043;11044; CHECK-GI-LABEL: test_v16i8_post_reg_st2lane:11045; CHECK-GI: ; %bb.0:11046; CHECK-GI-NEXT: mov x8, x011047; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111048; CHECK-GI-NEXT: add x0, x0, x211049; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111050; CHECK-GI-NEXT: st2.b { v0, v1 }[0], [x8]11051; CHECK-GI-NEXT: ret11052 call void @llvm.aarch64.neon.st2lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, i64 0, ptr %A)11053 %tmp = getelementptr i8, ptr %A, i64 %inc11054 ret ptr %tmp11055}11056 11057declare void @llvm.aarch64.neon.st2lane.v16i8.p0(<16 x i8>, <16 x i8>, i64, ptr)11058 11059 11060define ptr @test_v8i8_post_imm_st2lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C) nounwind {11061; CHECK-SD-LABEL: test_v8i8_post_imm_st2lane:11062; CHECK-SD: ; %bb.0:11063; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111064; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111065; CHECK-SD-NEXT: st2.b { v0, v1 }[0], [x0], #211066; CHECK-SD-NEXT: ret11067;11068; CHECK-GI-LABEL: test_v8i8_post_imm_st2lane:11069; CHECK-GI: ; %bb.0:11070; CHECK-GI-NEXT: mov x8, x011071; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111072; CHECK-GI-NEXT: add x0, x0, #211073; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111074; CHECK-GI-NEXT: st2.b { v0, v1 }[0], [x8]11075; CHECK-GI-NEXT: ret11076 call void @llvm.aarch64.neon.st2lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, i64 0, ptr %A)11077 %tmp = getelementptr i8, ptr %A, i32 211078 ret ptr %tmp11079}11080 11081define ptr @test_v8i8_post_reg_st2lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, i64 %inc) nounwind {11082; CHECK-SD-LABEL: test_v8i8_post_reg_st2lane:11083; CHECK-SD: ; %bb.0:11084; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111085; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111086; CHECK-SD-NEXT: st2.b { v0, v1 }[0], [x0], x211087; CHECK-SD-NEXT: ret11088;11089; CHECK-GI-LABEL: test_v8i8_post_reg_st2lane:11090; CHECK-GI: ; %bb.0:11091; CHECK-GI-NEXT: mov x8, x011092; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111093; CHECK-GI-NEXT: add x0, x0, x211094; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111095; CHECK-GI-NEXT: st2.b { v0, v1 }[0], [x8]11096; CHECK-GI-NEXT: ret11097 call void @llvm.aarch64.neon.st2lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, i64 0, ptr %A)11098 %tmp = getelementptr i8, ptr %A, i64 %inc11099 ret ptr %tmp11100}11101 11102declare void @llvm.aarch64.neon.st2lane.v8i8.p0(<8 x i8>, <8 x i8>, i64, ptr)11103 11104 11105define ptr @test_v8i16_post_imm_st2lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C) nounwind {11106; CHECK-SD-LABEL: test_v8i16_post_imm_st2lane:11107; CHECK-SD: ; %bb.0:11108; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111109; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111110; CHECK-SD-NEXT: st2.h { v0, v1 }[0], [x0], #411111; CHECK-SD-NEXT: ret11112;11113; CHECK-GI-LABEL: test_v8i16_post_imm_st2lane:11114; CHECK-GI: ; %bb.0:11115; CHECK-GI-NEXT: mov x8, x011116; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111117; CHECK-GI-NEXT: add x0, x0, #411118; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111119; CHECK-GI-NEXT: st2.h { v0, v1 }[0], [x8]11120; CHECK-GI-NEXT: ret11121 call void @llvm.aarch64.neon.st2lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, i64 0, ptr %A)11122 %tmp = getelementptr i16, ptr %A, i32 211123 ret ptr %tmp11124}11125 11126define ptr @test_v8i16_post_reg_st2lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, i64 %inc) nounwind {11127; CHECK-SD-LABEL: test_v8i16_post_reg_st2lane:11128; CHECK-SD: ; %bb.0:11129; CHECK-SD-NEXT: lsl x8, x2, #111130; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111131; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111132; CHECK-SD-NEXT: st2.h { v0, v1 }[0], [x0], x811133; CHECK-SD-NEXT: ret11134;11135; CHECK-GI-LABEL: test_v8i16_post_reg_st2lane:11136; CHECK-GI: ; %bb.0:11137; CHECK-GI-NEXT: mov x8, x011138; CHECK-GI-NEXT: add x0, x0, x2, lsl #111139; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111140; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111141; CHECK-GI-NEXT: st2.h { v0, v1 }[0], [x8]11142; CHECK-GI-NEXT: ret11143 call void @llvm.aarch64.neon.st2lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, i64 0, ptr %A)11144 %tmp = getelementptr i16, ptr %A, i64 %inc11145 ret ptr %tmp11146}11147 11148declare void @llvm.aarch64.neon.st2lane.v8i16.p0(<8 x i16>, <8 x i16>, i64, ptr)11149 11150 11151define ptr @test_v4i16_post_imm_st2lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C) nounwind {11152; CHECK-SD-LABEL: test_v4i16_post_imm_st2lane:11153; CHECK-SD: ; %bb.0:11154; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111155; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111156; CHECK-SD-NEXT: st2.h { v0, v1 }[0], [x0], #411157; CHECK-SD-NEXT: ret11158;11159; CHECK-GI-LABEL: test_v4i16_post_imm_st2lane:11160; CHECK-GI: ; %bb.0:11161; CHECK-GI-NEXT: mov x8, x011162; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111163; CHECK-GI-NEXT: add x0, x0, #411164; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111165; CHECK-GI-NEXT: st2.h { v0, v1 }[0], [x8]11166; CHECK-GI-NEXT: ret11167 call void @llvm.aarch64.neon.st2lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, i64 0, ptr %A)11168 %tmp = getelementptr i16, ptr %A, i32 211169 ret ptr %tmp11170}11171 11172define ptr @test_v4i16_post_reg_st2lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, i64 %inc) nounwind {11173; CHECK-SD-LABEL: test_v4i16_post_reg_st2lane:11174; CHECK-SD: ; %bb.0:11175; CHECK-SD-NEXT: lsl x8, x2, #111176; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111177; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111178; CHECK-SD-NEXT: st2.h { v0, v1 }[0], [x0], x811179; CHECK-SD-NEXT: ret11180;11181; CHECK-GI-LABEL: test_v4i16_post_reg_st2lane:11182; CHECK-GI: ; %bb.0:11183; CHECK-GI-NEXT: mov x8, x011184; CHECK-GI-NEXT: add x0, x0, x2, lsl #111185; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111186; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111187; CHECK-GI-NEXT: st2.h { v0, v1 }[0], [x8]11188; CHECK-GI-NEXT: ret11189 call void @llvm.aarch64.neon.st2lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, i64 0, ptr %A)11190 %tmp = getelementptr i16, ptr %A, i64 %inc11191 ret ptr %tmp11192}11193 11194declare void @llvm.aarch64.neon.st2lane.v4i16.p0(<4 x i16>, <4 x i16>, i64, ptr)11195 11196 11197define ptr @test_v4i32_post_imm_st2lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C) nounwind {11198; CHECK-SD-LABEL: test_v4i32_post_imm_st2lane:11199; CHECK-SD: ; %bb.0:11200; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111201; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111202; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], #811203; CHECK-SD-NEXT: ret11204;11205; CHECK-GI-LABEL: test_v4i32_post_imm_st2lane:11206; CHECK-GI: ; %bb.0:11207; CHECK-GI-NEXT: mov x8, x011208; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111209; CHECK-GI-NEXT: add x0, x0, #811210; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111211; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8]11212; CHECK-GI-NEXT: ret11213 call void @llvm.aarch64.neon.st2lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, i64 0, ptr %A)11214 %tmp = getelementptr i32, ptr %A, i32 211215 ret ptr %tmp11216}11217 11218define ptr @test_v4i32_post_reg_st2lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, i64 %inc) nounwind {11219; CHECK-SD-LABEL: test_v4i32_post_reg_st2lane:11220; CHECK-SD: ; %bb.0:11221; CHECK-SD-NEXT: lsl x8, x2, #211222; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111223; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111224; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], x811225; CHECK-SD-NEXT: ret11226;11227; CHECK-GI-LABEL: test_v4i32_post_reg_st2lane:11228; CHECK-GI: ; %bb.0:11229; CHECK-GI-NEXT: mov x8, x011230; CHECK-GI-NEXT: add x0, x0, x2, lsl #211231; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111232; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111233; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8]11234; CHECK-GI-NEXT: ret11235 call void @llvm.aarch64.neon.st2lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, i64 0, ptr %A)11236 %tmp = getelementptr i32, ptr %A, i64 %inc11237 ret ptr %tmp11238}11239 11240declare void @llvm.aarch64.neon.st2lane.v4i32.p0(<4 x i32>, <4 x i32>, i64, ptr)11241 11242 11243define ptr @test_v2i32_post_imm_st2lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C) nounwind {11244; CHECK-SD-LABEL: test_v2i32_post_imm_st2lane:11245; CHECK-SD: ; %bb.0:11246; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111247; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111248; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], #811249; CHECK-SD-NEXT: ret11250;11251; CHECK-GI-LABEL: test_v2i32_post_imm_st2lane:11252; CHECK-GI: ; %bb.0:11253; CHECK-GI-NEXT: mov x8, x011254; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111255; CHECK-GI-NEXT: add x0, x0, #811256; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111257; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8]11258; CHECK-GI-NEXT: ret11259 call void @llvm.aarch64.neon.st2lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, i64 0, ptr %A)11260 %tmp = getelementptr i32, ptr %A, i32 211261 ret ptr %tmp11262}11263 11264define ptr @test_v2i32_post_reg_st2lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, i64 %inc) nounwind {11265; CHECK-SD-LABEL: test_v2i32_post_reg_st2lane:11266; CHECK-SD: ; %bb.0:11267; CHECK-SD-NEXT: lsl x8, x2, #211268; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111269; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111270; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], x811271; CHECK-SD-NEXT: ret11272;11273; CHECK-GI-LABEL: test_v2i32_post_reg_st2lane:11274; CHECK-GI: ; %bb.0:11275; CHECK-GI-NEXT: mov x8, x011276; CHECK-GI-NEXT: add x0, x0, x2, lsl #211277; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111278; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111279; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8]11280; CHECK-GI-NEXT: ret11281 call void @llvm.aarch64.neon.st2lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, i64 0, ptr %A)11282 %tmp = getelementptr i32, ptr %A, i64 %inc11283 ret ptr %tmp11284}11285 11286declare void @llvm.aarch64.neon.st2lane.v2i32.p0(<2 x i32>, <2 x i32>, i64, ptr)11287 11288 11289define ptr @test_v2i64_post_imm_st2lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C) nounwind {11290; CHECK-SD-LABEL: test_v2i64_post_imm_st2lane:11291; CHECK-SD: ; %bb.0:11292; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111293; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111294; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], #1611295; CHECK-SD-NEXT: ret11296;11297; CHECK-GI-LABEL: test_v2i64_post_imm_st2lane:11298; CHECK-GI: ; %bb.0:11299; CHECK-GI-NEXT: mov x8, x011300; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111301; CHECK-GI-NEXT: add x0, x0, #1611302; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111303; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8]11304; CHECK-GI-NEXT: ret11305 call void @llvm.aarch64.neon.st2lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, i64 0, ptr %A)11306 %tmp = getelementptr i64, ptr %A, i64 211307 ret ptr %tmp11308}11309 11310define ptr @test_v2i64_post_reg_st2lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, i64 %inc) nounwind {11311; CHECK-SD-LABEL: test_v2i64_post_reg_st2lane:11312; CHECK-SD: ; %bb.0:11313; CHECK-SD-NEXT: lsl x8, x2, #311314; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111315; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111316; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], x811317; CHECK-SD-NEXT: ret11318;11319; CHECK-GI-LABEL: test_v2i64_post_reg_st2lane:11320; CHECK-GI: ; %bb.0:11321; CHECK-GI-NEXT: mov x8, x011322; CHECK-GI-NEXT: add x0, x0, x2, lsl #311323; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111324; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111325; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8]11326; CHECK-GI-NEXT: ret11327 call void @llvm.aarch64.neon.st2lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, i64 0, ptr %A)11328 %tmp = getelementptr i64, ptr %A, i64 %inc11329 ret ptr %tmp11330}11331 11332declare void @llvm.aarch64.neon.st2lane.v2i64.p0(<2 x i64>, <2 x i64>, i64, ptr)11333 11334 11335define ptr @test_v1i64_post_imm_st2lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C) nounwind {11336; CHECK-SD-LABEL: test_v1i64_post_imm_st2lane:11337; CHECK-SD: ; %bb.0:11338; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111339; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111340; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], #1611341; CHECK-SD-NEXT: ret11342;11343; CHECK-GI-LABEL: test_v1i64_post_imm_st2lane:11344; CHECK-GI: ; %bb.0:11345; CHECK-GI-NEXT: mov x8, x011346; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111347; CHECK-GI-NEXT: add x0, x0, #1611348; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111349; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8]11350; CHECK-GI-NEXT: ret11351 call void @llvm.aarch64.neon.st2lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, i64 0, ptr %A)11352 %tmp = getelementptr i64, ptr %A, i64 211353 ret ptr %tmp11354}11355 11356define ptr @test_v1i64_post_reg_st2lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, i64 %inc) nounwind {11357; CHECK-SD-LABEL: test_v1i64_post_reg_st2lane:11358; CHECK-SD: ; %bb.0:11359; CHECK-SD-NEXT: lsl x8, x2, #311360; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111361; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111362; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], x811363; CHECK-SD-NEXT: ret11364;11365; CHECK-GI-LABEL: test_v1i64_post_reg_st2lane:11366; CHECK-GI: ; %bb.0:11367; CHECK-GI-NEXT: mov x8, x011368; CHECK-GI-NEXT: add x0, x0, x2, lsl #311369; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111370; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111371; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8]11372; CHECK-GI-NEXT: ret11373 call void @llvm.aarch64.neon.st2lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, i64 0, ptr %A)11374 %tmp = getelementptr i64, ptr %A, i64 %inc11375 ret ptr %tmp11376}11377 11378declare void @llvm.aarch64.neon.st2lane.v1i64.p0(<1 x i64>, <1 x i64>, i64, ptr)11379 11380 11381define ptr @test_v4f32_post_imm_st2lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C) nounwind {11382; CHECK-SD-LABEL: test_v4f32_post_imm_st2lane:11383; CHECK-SD: ; %bb.0:11384; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111385; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111386; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], #811387; CHECK-SD-NEXT: ret11388;11389; CHECK-GI-LABEL: test_v4f32_post_imm_st2lane:11390; CHECK-GI: ; %bb.0:11391; CHECK-GI-NEXT: mov x8, x011392; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111393; CHECK-GI-NEXT: add x0, x0, #811394; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111395; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8]11396; CHECK-GI-NEXT: ret11397 call void @llvm.aarch64.neon.st2lane.v4f32.p0(<4 x float> %B, <4 x float> %C, i64 0, ptr %A)11398 %tmp = getelementptr float, ptr %A, i32 211399 ret ptr %tmp11400}11401 11402define ptr @test_v4f32_post_reg_st2lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, i64 %inc) nounwind {11403; CHECK-SD-LABEL: test_v4f32_post_reg_st2lane:11404; CHECK-SD: ; %bb.0:11405; CHECK-SD-NEXT: lsl x8, x2, #211406; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111407; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111408; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], x811409; CHECK-SD-NEXT: ret11410;11411; CHECK-GI-LABEL: test_v4f32_post_reg_st2lane:11412; CHECK-GI: ; %bb.0:11413; CHECK-GI-NEXT: mov x8, x011414; CHECK-GI-NEXT: add x0, x0, x2, lsl #211415; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111416; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111417; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8]11418; CHECK-GI-NEXT: ret11419 call void @llvm.aarch64.neon.st2lane.v4f32.p0(<4 x float> %B, <4 x float> %C, i64 0, ptr %A)11420 %tmp = getelementptr float, ptr %A, i64 %inc11421 ret ptr %tmp11422}11423 11424declare void @llvm.aarch64.neon.st2lane.v4f32.p0(<4 x float>, <4 x float>, i64, ptr)11425 11426 11427define ptr @test_v2f32_post_imm_st2lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C) nounwind {11428; CHECK-SD-LABEL: test_v2f32_post_imm_st2lane:11429; CHECK-SD: ; %bb.0:11430; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111431; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111432; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], #811433; CHECK-SD-NEXT: ret11434;11435; CHECK-GI-LABEL: test_v2f32_post_imm_st2lane:11436; CHECK-GI: ; %bb.0:11437; CHECK-GI-NEXT: mov x8, x011438; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111439; CHECK-GI-NEXT: add x0, x0, #811440; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111441; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8]11442; CHECK-GI-NEXT: ret11443 call void @llvm.aarch64.neon.st2lane.v2f32.p0(<2 x float> %B, <2 x float> %C, i64 0, ptr %A)11444 %tmp = getelementptr float, ptr %A, i32 211445 ret ptr %tmp11446}11447 11448define ptr @test_v2f32_post_reg_st2lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, i64 %inc) nounwind {11449; CHECK-SD-LABEL: test_v2f32_post_reg_st2lane:11450; CHECK-SD: ; %bb.0:11451; CHECK-SD-NEXT: lsl x8, x2, #211452; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111453; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111454; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], x811455; CHECK-SD-NEXT: ret11456;11457; CHECK-GI-LABEL: test_v2f32_post_reg_st2lane:11458; CHECK-GI: ; %bb.0:11459; CHECK-GI-NEXT: mov x8, x011460; CHECK-GI-NEXT: add x0, x0, x2, lsl #211461; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111462; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111463; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8]11464; CHECK-GI-NEXT: ret11465 call void @llvm.aarch64.neon.st2lane.v2f32.p0(<2 x float> %B, <2 x float> %C, i64 0, ptr %A)11466 %tmp = getelementptr float, ptr %A, i64 %inc11467 ret ptr %tmp11468}11469 11470declare void @llvm.aarch64.neon.st2lane.v2f32.p0(<2 x float>, <2 x float>, i64, ptr)11471 11472 11473define ptr @test_v2f64_post_imm_st2lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C) nounwind {11474; CHECK-SD-LABEL: test_v2f64_post_imm_st2lane:11475; CHECK-SD: ; %bb.0:11476; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111477; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111478; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], #1611479; CHECK-SD-NEXT: ret11480;11481; CHECK-GI-LABEL: test_v2f64_post_imm_st2lane:11482; CHECK-GI: ; %bb.0:11483; CHECK-GI-NEXT: mov x8, x011484; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111485; CHECK-GI-NEXT: add x0, x0, #1611486; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111487; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8]11488; CHECK-GI-NEXT: ret11489 call void @llvm.aarch64.neon.st2lane.v2f64.p0(<2 x double> %B, <2 x double> %C, i64 0, ptr %A)11490 %tmp = getelementptr double, ptr %A, i64 211491 ret ptr %tmp11492}11493 11494define ptr @test_v2f64_post_reg_st2lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, i64 %inc) nounwind {11495; CHECK-SD-LABEL: test_v2f64_post_reg_st2lane:11496; CHECK-SD: ; %bb.0:11497; CHECK-SD-NEXT: lsl x8, x2, #311498; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111499; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111500; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], x811501; CHECK-SD-NEXT: ret11502;11503; CHECK-GI-LABEL: test_v2f64_post_reg_st2lane:11504; CHECK-GI: ; %bb.0:11505; CHECK-GI-NEXT: mov x8, x011506; CHECK-GI-NEXT: add x0, x0, x2, lsl #311507; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q111508; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q111509; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8]11510; CHECK-GI-NEXT: ret11511 call void @llvm.aarch64.neon.st2lane.v2f64.p0(<2 x double> %B, <2 x double> %C, i64 0, ptr %A)11512 %tmp = getelementptr double, ptr %A, i64 %inc11513 ret ptr %tmp11514}11515 11516declare void @llvm.aarch64.neon.st2lane.v2f64.p0(<2 x double>, <2 x double>, i64, ptr)11517 11518 11519define ptr @test_v1f64_post_imm_st2lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C) nounwind {11520; CHECK-SD-LABEL: test_v1f64_post_imm_st2lane:11521; CHECK-SD: ; %bb.0:11522; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111523; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111524; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], #1611525; CHECK-SD-NEXT: ret11526;11527; CHECK-GI-LABEL: test_v1f64_post_imm_st2lane:11528; CHECK-GI: ; %bb.0:11529; CHECK-GI-NEXT: mov x8, x011530; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111531; CHECK-GI-NEXT: add x0, x0, #1611532; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111533; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8]11534; CHECK-GI-NEXT: ret11535 call void @llvm.aarch64.neon.st2lane.v1f64.p0(<1 x double> %B, <1 x double> %C, i64 0, ptr %A)11536 %tmp = getelementptr double, ptr %A, i64 211537 ret ptr %tmp11538}11539 11540define ptr @test_v1f64_post_reg_st2lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, i64 %inc) nounwind {11541; CHECK-SD-LABEL: test_v1f64_post_reg_st2lane:11542; CHECK-SD: ; %bb.0:11543; CHECK-SD-NEXT: lsl x8, x2, #311544; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111545; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111546; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], x811547; CHECK-SD-NEXT: ret11548;11549; CHECK-GI-LABEL: test_v1f64_post_reg_st2lane:11550; CHECK-GI: ; %bb.0:11551; CHECK-GI-NEXT: mov x8, x011552; CHECK-GI-NEXT: add x0, x0, x2, lsl #311553; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q111554; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q111555; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8]11556; CHECK-GI-NEXT: ret11557 call void @llvm.aarch64.neon.st2lane.v1f64.p0(<1 x double> %B, <1 x double> %C, i64 0, ptr %A)11558 %tmp = getelementptr double, ptr %A, i64 %inc11559 ret ptr %tmp11560}11561 11562declare void @llvm.aarch64.neon.st2lane.v1f64.p0(<1 x double>, <1 x double>, i64, ptr)11563 11564 11565define ptr @test_v16i8_post_imm_st3lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind {11566; CHECK-SD-LABEL: test_v16i8_post_imm_st3lane:11567; CHECK-SD: ; %bb.0:11568; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211569; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211570; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211571; CHECK-SD-NEXT: st3.b { v0, v1, v2 }[0], [x0], #311572; CHECK-SD-NEXT: ret11573;11574; CHECK-GI-LABEL: test_v16i8_post_imm_st3lane:11575; CHECK-GI: ; %bb.0:11576; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211577; CHECK-GI-NEXT: mov x8, x011578; CHECK-GI-NEXT: add x0, x0, #311579; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211580; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211581; CHECK-GI-NEXT: st3.b { v0, v1, v2 }[0], [x8]11582; CHECK-GI-NEXT: ret11583 call void @llvm.aarch64.neon.st3lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, ptr %A)11584 %tmp = getelementptr i8, ptr %A, i32 311585 ret ptr %tmp11586}11587 11588define ptr @test_v16i8_post_reg_st3lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 %inc) nounwind {11589; CHECK-SD-LABEL: test_v16i8_post_reg_st3lane:11590; CHECK-SD: ; %bb.0:11591; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211592; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211593; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211594; CHECK-SD-NEXT: st3.b { v0, v1, v2 }[0], [x0], x211595; CHECK-SD-NEXT: ret11596;11597; CHECK-GI-LABEL: test_v16i8_post_reg_st3lane:11598; CHECK-GI: ; %bb.0:11599; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211600; CHECK-GI-NEXT: mov x8, x011601; CHECK-GI-NEXT: add x0, x0, x211602; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211603; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211604; CHECK-GI-NEXT: st3.b { v0, v1, v2 }[0], [x8]11605; CHECK-GI-NEXT: ret11606 call void @llvm.aarch64.neon.st3lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, ptr %A)11607 %tmp = getelementptr i8, ptr %A, i64 %inc11608 ret ptr %tmp11609}11610 11611declare void @llvm.aarch64.neon.st3lane.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>, i64, ptr)11612 11613 11614define ptr @test_v8i8_post_imm_st3lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind {11615; CHECK-SD-LABEL: test_v8i8_post_imm_st3lane:11616; CHECK-SD: ; %bb.0:11617; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211618; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211619; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211620; CHECK-SD-NEXT: st3.b { v0, v1, v2 }[0], [x0], #311621; CHECK-SD-NEXT: ret11622;11623; CHECK-GI-LABEL: test_v8i8_post_imm_st3lane:11624; CHECK-GI: ; %bb.0:11625; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211626; CHECK-GI-NEXT: mov x8, x011627; CHECK-GI-NEXT: add x0, x0, #311628; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211629; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211630; CHECK-GI-NEXT: st3.b { v0, v1, v2 }[0], [x8]11631; CHECK-GI-NEXT: ret11632 call void @llvm.aarch64.neon.st3lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, ptr %A)11633 %tmp = getelementptr i8, ptr %A, i32 311634 ret ptr %tmp11635}11636 11637define ptr @test_v8i8_post_reg_st3lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 %inc) nounwind {11638; CHECK-SD-LABEL: test_v8i8_post_reg_st3lane:11639; CHECK-SD: ; %bb.0:11640; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211641; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211642; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211643; CHECK-SD-NEXT: st3.b { v0, v1, v2 }[0], [x0], x211644; CHECK-SD-NEXT: ret11645;11646; CHECK-GI-LABEL: test_v8i8_post_reg_st3lane:11647; CHECK-GI: ; %bb.0:11648; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211649; CHECK-GI-NEXT: mov x8, x011650; CHECK-GI-NEXT: add x0, x0, x211651; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211652; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211653; CHECK-GI-NEXT: st3.b { v0, v1, v2 }[0], [x8]11654; CHECK-GI-NEXT: ret11655 call void @llvm.aarch64.neon.st3lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, ptr %A)11656 %tmp = getelementptr i8, ptr %A, i64 %inc11657 ret ptr %tmp11658}11659 11660declare void @llvm.aarch64.neon.st3lane.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, i64, ptr)11661 11662 11663define ptr @test_v8i16_post_imm_st3lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind {11664; CHECK-SD-LABEL: test_v8i16_post_imm_st3lane:11665; CHECK-SD: ; %bb.0:11666; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211667; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211668; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211669; CHECK-SD-NEXT: st3.h { v0, v1, v2 }[0], [x0], #611670; CHECK-SD-NEXT: ret11671;11672; CHECK-GI-LABEL: test_v8i16_post_imm_st3lane:11673; CHECK-GI: ; %bb.0:11674; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211675; CHECK-GI-NEXT: mov x8, x011676; CHECK-GI-NEXT: add x0, x0, #611677; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211678; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211679; CHECK-GI-NEXT: st3.h { v0, v1, v2 }[0], [x8]11680; CHECK-GI-NEXT: ret11681 call void @llvm.aarch64.neon.st3lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, ptr %A)11682 %tmp = getelementptr i16, ptr %A, i32 311683 ret ptr %tmp11684}11685 11686define ptr @test_v8i16_post_reg_st3lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 %inc) nounwind {11687; CHECK-SD-LABEL: test_v8i16_post_reg_st3lane:11688; CHECK-SD: ; %bb.0:11689; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211690; CHECK-SD-NEXT: lsl x8, x2, #111691; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211692; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211693; CHECK-SD-NEXT: st3.h { v0, v1, v2 }[0], [x0], x811694; CHECK-SD-NEXT: ret11695;11696; CHECK-GI-LABEL: test_v8i16_post_reg_st3lane:11697; CHECK-GI: ; %bb.0:11698; CHECK-GI-NEXT: mov x8, x011699; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211700; CHECK-GI-NEXT: add x0, x0, x2, lsl #111701; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211702; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211703; CHECK-GI-NEXT: st3.h { v0, v1, v2 }[0], [x8]11704; CHECK-GI-NEXT: ret11705 call void @llvm.aarch64.neon.st3lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, ptr %A)11706 %tmp = getelementptr i16, ptr %A, i64 %inc11707 ret ptr %tmp11708}11709 11710declare void @llvm.aarch64.neon.st3lane.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>, i64, ptr)11711 11712 11713define ptr @test_v4i16_post_imm_st3lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind {11714; CHECK-SD-LABEL: test_v4i16_post_imm_st3lane:11715; CHECK-SD: ; %bb.0:11716; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211717; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211718; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211719; CHECK-SD-NEXT: st3.h { v0, v1, v2 }[0], [x0], #611720; CHECK-SD-NEXT: ret11721;11722; CHECK-GI-LABEL: test_v4i16_post_imm_st3lane:11723; CHECK-GI: ; %bb.0:11724; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211725; CHECK-GI-NEXT: mov x8, x011726; CHECK-GI-NEXT: add x0, x0, #611727; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211728; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211729; CHECK-GI-NEXT: st3.h { v0, v1, v2 }[0], [x8]11730; CHECK-GI-NEXT: ret11731 call void @llvm.aarch64.neon.st3lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, ptr %A)11732 %tmp = getelementptr i16, ptr %A, i32 311733 ret ptr %tmp11734}11735 11736define ptr @test_v4i16_post_reg_st3lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 %inc) nounwind {11737; CHECK-SD-LABEL: test_v4i16_post_reg_st3lane:11738; CHECK-SD: ; %bb.0:11739; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211740; CHECK-SD-NEXT: lsl x8, x2, #111741; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211742; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211743; CHECK-SD-NEXT: st3.h { v0, v1, v2 }[0], [x0], x811744; CHECK-SD-NEXT: ret11745;11746; CHECK-GI-LABEL: test_v4i16_post_reg_st3lane:11747; CHECK-GI: ; %bb.0:11748; CHECK-GI-NEXT: mov x8, x011749; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211750; CHECK-GI-NEXT: add x0, x0, x2, lsl #111751; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211752; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211753; CHECK-GI-NEXT: st3.h { v0, v1, v2 }[0], [x8]11754; CHECK-GI-NEXT: ret11755 call void @llvm.aarch64.neon.st3lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, ptr %A)11756 %tmp = getelementptr i16, ptr %A, i64 %inc11757 ret ptr %tmp11758}11759 11760declare void @llvm.aarch64.neon.st3lane.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>, i64, ptr)11761 11762 11763define ptr @test_v4i32_post_imm_st3lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind {11764; CHECK-SD-LABEL: test_v4i32_post_imm_st3lane:11765; CHECK-SD: ; %bb.0:11766; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211767; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211768; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211769; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], #1211770; CHECK-SD-NEXT: ret11771;11772; CHECK-GI-LABEL: test_v4i32_post_imm_st3lane:11773; CHECK-GI: ; %bb.0:11774; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211775; CHECK-GI-NEXT: mov x8, x011776; CHECK-GI-NEXT: add x0, x0, #1211777; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211778; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211779; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8]11780; CHECK-GI-NEXT: ret11781 call void @llvm.aarch64.neon.st3lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, ptr %A)11782 %tmp = getelementptr i32, ptr %A, i32 311783 ret ptr %tmp11784}11785 11786define ptr @test_v4i32_post_reg_st3lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 %inc) nounwind {11787; CHECK-SD-LABEL: test_v4i32_post_reg_st3lane:11788; CHECK-SD: ; %bb.0:11789; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211790; CHECK-SD-NEXT: lsl x8, x2, #211791; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211792; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211793; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], x811794; CHECK-SD-NEXT: ret11795;11796; CHECK-GI-LABEL: test_v4i32_post_reg_st3lane:11797; CHECK-GI: ; %bb.0:11798; CHECK-GI-NEXT: mov x8, x011799; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211800; CHECK-GI-NEXT: add x0, x0, x2, lsl #211801; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211802; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211803; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8]11804; CHECK-GI-NEXT: ret11805 call void @llvm.aarch64.neon.st3lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, ptr %A)11806 %tmp = getelementptr i32, ptr %A, i64 %inc11807 ret ptr %tmp11808}11809 11810declare void @llvm.aarch64.neon.st3lane.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>, i64, ptr)11811 11812 11813define ptr @test_v2i32_post_imm_st3lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind {11814; CHECK-SD-LABEL: test_v2i32_post_imm_st3lane:11815; CHECK-SD: ; %bb.0:11816; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211817; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211818; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211819; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], #1211820; CHECK-SD-NEXT: ret11821;11822; CHECK-GI-LABEL: test_v2i32_post_imm_st3lane:11823; CHECK-GI: ; %bb.0:11824; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211825; CHECK-GI-NEXT: mov x8, x011826; CHECK-GI-NEXT: add x0, x0, #1211827; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211828; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211829; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8]11830; CHECK-GI-NEXT: ret11831 call void @llvm.aarch64.neon.st3lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, ptr %A)11832 %tmp = getelementptr i32, ptr %A, i32 311833 ret ptr %tmp11834}11835 11836define ptr @test_v2i32_post_reg_st3lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 %inc) nounwind {11837; CHECK-SD-LABEL: test_v2i32_post_reg_st3lane:11838; CHECK-SD: ; %bb.0:11839; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211840; CHECK-SD-NEXT: lsl x8, x2, #211841; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211842; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211843; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], x811844; CHECK-SD-NEXT: ret11845;11846; CHECK-GI-LABEL: test_v2i32_post_reg_st3lane:11847; CHECK-GI: ; %bb.0:11848; CHECK-GI-NEXT: mov x8, x011849; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211850; CHECK-GI-NEXT: add x0, x0, x2, lsl #211851; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211852; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211853; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8]11854; CHECK-GI-NEXT: ret11855 call void @llvm.aarch64.neon.st3lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, ptr %A)11856 %tmp = getelementptr i32, ptr %A, i64 %inc11857 ret ptr %tmp11858}11859 11860declare void @llvm.aarch64.neon.st3lane.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>, i64, ptr)11861 11862 11863define ptr @test_v2i64_post_imm_st3lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind {11864; CHECK-SD-LABEL: test_v2i64_post_imm_st3lane:11865; CHECK-SD: ; %bb.0:11866; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211867; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211868; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211869; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], #2411870; CHECK-SD-NEXT: ret11871;11872; CHECK-GI-LABEL: test_v2i64_post_imm_st3lane:11873; CHECK-GI: ; %bb.0:11874; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211875; CHECK-GI-NEXT: mov x8, x011876; CHECK-GI-NEXT: add x0, x0, #2411877; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211878; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211879; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8]11880; CHECK-GI-NEXT: ret11881 call void @llvm.aarch64.neon.st3lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, ptr %A)11882 %tmp = getelementptr i64, ptr %A, i64 311883 ret ptr %tmp11884}11885 11886define ptr @test_v2i64_post_reg_st3lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 %inc) nounwind {11887; CHECK-SD-LABEL: test_v2i64_post_reg_st3lane:11888; CHECK-SD: ; %bb.0:11889; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211890; CHECK-SD-NEXT: lsl x8, x2, #311891; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211892; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211893; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], x811894; CHECK-SD-NEXT: ret11895;11896; CHECK-GI-LABEL: test_v2i64_post_reg_st3lane:11897; CHECK-GI: ; %bb.0:11898; CHECK-GI-NEXT: mov x8, x011899; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211900; CHECK-GI-NEXT: add x0, x0, x2, lsl #311901; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211902; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211903; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8]11904; CHECK-GI-NEXT: ret11905 call void @llvm.aarch64.neon.st3lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, ptr %A)11906 %tmp = getelementptr i64, ptr %A, i64 %inc11907 ret ptr %tmp11908}11909 11910declare void @llvm.aarch64.neon.st3lane.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>, i64, ptr)11911 11912 11913define ptr @test_v1i64_post_imm_st3lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind {11914; CHECK-SD-LABEL: test_v1i64_post_imm_st3lane:11915; CHECK-SD: ; %bb.0:11916; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211917; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211918; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211919; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], #2411920; CHECK-SD-NEXT: ret11921;11922; CHECK-GI-LABEL: test_v1i64_post_imm_st3lane:11923; CHECK-GI: ; %bb.0:11924; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211925; CHECK-GI-NEXT: mov x8, x011926; CHECK-GI-NEXT: add x0, x0, #2411927; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211928; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211929; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8]11930; CHECK-GI-NEXT: ret11931 call void @llvm.aarch64.neon.st3lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, ptr %A)11932 %tmp = getelementptr i64, ptr %A, i64 311933 ret ptr %tmp11934}11935 11936define ptr @test_v1i64_post_reg_st3lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 %inc) nounwind {11937; CHECK-SD-LABEL: test_v1i64_post_reg_st3lane:11938; CHECK-SD: ; %bb.0:11939; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211940; CHECK-SD-NEXT: lsl x8, x2, #311941; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211942; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211943; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], x811944; CHECK-SD-NEXT: ret11945;11946; CHECK-GI-LABEL: test_v1i64_post_reg_st3lane:11947; CHECK-GI: ; %bb.0:11948; CHECK-GI-NEXT: mov x8, x011949; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q211950; CHECK-GI-NEXT: add x0, x0, x2, lsl #311951; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q211952; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q211953; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8]11954; CHECK-GI-NEXT: ret11955 call void @llvm.aarch64.neon.st3lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, ptr %A)11956 %tmp = getelementptr i64, ptr %A, i64 %inc11957 ret ptr %tmp11958}11959 11960declare void @llvm.aarch64.neon.st3lane.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>, i64, ptr)11961 11962 11963define ptr @test_v4f32_post_imm_st3lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind {11964; CHECK-SD-LABEL: test_v4f32_post_imm_st3lane:11965; CHECK-SD: ; %bb.0:11966; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211967; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211968; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211969; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], #1211970; CHECK-SD-NEXT: ret11971;11972; CHECK-GI-LABEL: test_v4f32_post_imm_st3lane:11973; CHECK-GI: ; %bb.0:11974; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211975; CHECK-GI-NEXT: mov x8, x011976; CHECK-GI-NEXT: add x0, x0, #1211977; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211978; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211979; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8]11980; CHECK-GI-NEXT: ret11981 call void @llvm.aarch64.neon.st3lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, ptr %A)11982 %tmp = getelementptr float, ptr %A, i32 311983 ret ptr %tmp11984}11985 11986define ptr @test_v4f32_post_reg_st3lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, i64 %inc) nounwind {11987; CHECK-SD-LABEL: test_v4f32_post_reg_st3lane:11988; CHECK-SD: ; %bb.0:11989; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q211990; CHECK-SD-NEXT: lsl x8, x2, #211991; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q211992; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q211993; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], x811994; CHECK-SD-NEXT: ret11995;11996; CHECK-GI-LABEL: test_v4f32_post_reg_st3lane:11997; CHECK-GI: ; %bb.0:11998; CHECK-GI-NEXT: mov x8, x011999; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q212000; CHECK-GI-NEXT: add x0, x0, x2, lsl #212001; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q212002; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q212003; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8]12004; CHECK-GI-NEXT: ret12005 call void @llvm.aarch64.neon.st3lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, ptr %A)12006 %tmp = getelementptr float, ptr %A, i64 %inc12007 ret ptr %tmp12008}12009 12010declare void @llvm.aarch64.neon.st3lane.v4f32.p0(<4 x float>, <4 x float>, <4 x float>, i64, ptr)12011 12012 12013define ptr @test_v2f32_post_imm_st3lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind {12014; CHECK-SD-LABEL: test_v2f32_post_imm_st3lane:12015; CHECK-SD: ; %bb.0:12016; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q212017; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q212018; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q212019; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], #1212020; CHECK-SD-NEXT: ret12021;12022; CHECK-GI-LABEL: test_v2f32_post_imm_st3lane:12023; CHECK-GI: ; %bb.0:12024; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q212025; CHECK-GI-NEXT: mov x8, x012026; CHECK-GI-NEXT: add x0, x0, #1212027; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q212028; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q212029; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8]12030; CHECK-GI-NEXT: ret12031 call void @llvm.aarch64.neon.st3lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, ptr %A)12032 %tmp = getelementptr float, ptr %A, i32 312033 ret ptr %tmp12034}12035 12036define ptr @test_v2f32_post_reg_st3lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, i64 %inc) nounwind {12037; CHECK-SD-LABEL: test_v2f32_post_reg_st3lane:12038; CHECK-SD: ; %bb.0:12039; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q212040; CHECK-SD-NEXT: lsl x8, x2, #212041; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q212042; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q212043; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], x812044; CHECK-SD-NEXT: ret12045;12046; CHECK-GI-LABEL: test_v2f32_post_reg_st3lane:12047; CHECK-GI: ; %bb.0:12048; CHECK-GI-NEXT: mov x8, x012049; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q212050; CHECK-GI-NEXT: add x0, x0, x2, lsl #212051; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q212052; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q212053; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8]12054; CHECK-GI-NEXT: ret12055 call void @llvm.aarch64.neon.st3lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, ptr %A)12056 %tmp = getelementptr float, ptr %A, i64 %inc12057 ret ptr %tmp12058}12059 12060declare void @llvm.aarch64.neon.st3lane.v2f32.p0(<2 x float>, <2 x float>, <2 x float>, i64, ptr)12061 12062 12063define ptr @test_v2f64_post_imm_st3lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind {12064; CHECK-SD-LABEL: test_v2f64_post_imm_st3lane:12065; CHECK-SD: ; %bb.0:12066; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q212067; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q212068; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q212069; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], #2412070; CHECK-SD-NEXT: ret12071;12072; CHECK-GI-LABEL: test_v2f64_post_imm_st3lane:12073; CHECK-GI: ; %bb.0:12074; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q212075; CHECK-GI-NEXT: mov x8, x012076; CHECK-GI-NEXT: add x0, x0, #2412077; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q212078; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q212079; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8]12080; CHECK-GI-NEXT: ret12081 call void @llvm.aarch64.neon.st3lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, ptr %A)12082 %tmp = getelementptr double, ptr %A, i64 312083 ret ptr %tmp12084}12085 12086define ptr @test_v2f64_post_reg_st3lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, i64 %inc) nounwind {12087; CHECK-SD-LABEL: test_v2f64_post_reg_st3lane:12088; CHECK-SD: ; %bb.0:12089; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q212090; CHECK-SD-NEXT: lsl x8, x2, #312091; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q212092; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q212093; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], x812094; CHECK-SD-NEXT: ret12095;12096; CHECK-GI-LABEL: test_v2f64_post_reg_st3lane:12097; CHECK-GI: ; %bb.0:12098; CHECK-GI-NEXT: mov x8, x012099; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q212100; CHECK-GI-NEXT: add x0, x0, x2, lsl #312101; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q212102; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q212103; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8]12104; CHECK-GI-NEXT: ret12105 call void @llvm.aarch64.neon.st3lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, ptr %A)12106 %tmp = getelementptr double, ptr %A, i64 %inc12107 ret ptr %tmp12108}12109 12110declare void @llvm.aarch64.neon.st3lane.v2f64.p0(<2 x double>, <2 x double>, <2 x double>, i64, ptr)12111 12112 12113define ptr @test_v1f64_post_imm_st3lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind {12114; CHECK-SD-LABEL: test_v1f64_post_imm_st3lane:12115; CHECK-SD: ; %bb.0:12116; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q212117; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q212118; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q212119; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], #2412120; CHECK-SD-NEXT: ret12121;12122; CHECK-GI-LABEL: test_v1f64_post_imm_st3lane:12123; CHECK-GI: ; %bb.0:12124; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q212125; CHECK-GI-NEXT: mov x8, x012126; CHECK-GI-NEXT: add x0, x0, #2412127; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q212128; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q212129; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8]12130; CHECK-GI-NEXT: ret12131 call void @llvm.aarch64.neon.st3lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, ptr %A)12132 %tmp = getelementptr double, ptr %A, i64 312133 ret ptr %tmp12134}12135 12136define ptr @test_v1f64_post_reg_st3lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, i64 %inc) nounwind {12137; CHECK-SD-LABEL: test_v1f64_post_reg_st3lane:12138; CHECK-SD: ; %bb.0:12139; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q212140; CHECK-SD-NEXT: lsl x8, x2, #312141; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q212142; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q212143; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], x812144; CHECK-SD-NEXT: ret12145;12146; CHECK-GI-LABEL: test_v1f64_post_reg_st3lane:12147; CHECK-GI: ; %bb.0:12148; CHECK-GI-NEXT: mov x8, x012149; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q212150; CHECK-GI-NEXT: add x0, x0, x2, lsl #312151; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q212152; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q212153; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8]12154; CHECK-GI-NEXT: ret12155 call void @llvm.aarch64.neon.st3lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, ptr %A)12156 %tmp = getelementptr double, ptr %A, i64 %inc12157 ret ptr %tmp12158}12159 12160declare void @llvm.aarch64.neon.st3lane.v1f64.p0(<1 x double>, <1 x double>, <1 x double>, i64, ptr)12161 12162 12163define ptr @test_v16i8_post_imm_st4lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind {12164; CHECK-SD-LABEL: test_v16i8_post_imm_st4lane:12165; CHECK-SD: ; %bb.0:12166; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312167; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312168; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312169; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312170; CHECK-SD-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], #412171; CHECK-SD-NEXT: ret12172;12173; CHECK-GI-LABEL: test_v16i8_post_imm_st4lane:12174; CHECK-GI: ; %bb.0:12175; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312176; CHECK-GI-NEXT: mov x8, x012177; CHECK-GI-NEXT: add x0, x0, #412178; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312179; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312180; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312181; CHECK-GI-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8]12182; CHECK-GI-NEXT: ret12183 call void @llvm.aarch64.neon.st4lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, ptr %A)12184 %tmp = getelementptr i8, ptr %A, i32 412185 ret ptr %tmp12186}12187 12188define ptr @test_v16i8_post_reg_st4lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 %inc) nounwind {12189; CHECK-SD-LABEL: test_v16i8_post_reg_st4lane:12190; CHECK-SD: ; %bb.0:12191; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312192; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312193; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312194; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312195; CHECK-SD-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], x212196; CHECK-SD-NEXT: ret12197;12198; CHECK-GI-LABEL: test_v16i8_post_reg_st4lane:12199; CHECK-GI: ; %bb.0:12200; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312201; CHECK-GI-NEXT: mov x8, x012202; CHECK-GI-NEXT: add x0, x0, x212203; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312204; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312205; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312206; CHECK-GI-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8]12207; CHECK-GI-NEXT: ret12208 call void @llvm.aarch64.neon.st4lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, ptr %A)12209 %tmp = getelementptr i8, ptr %A, i64 %inc12210 ret ptr %tmp12211}12212 12213declare void @llvm.aarch64.neon.st4lane.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, i64, ptr)12214 12215 12216define ptr @test_v8i8_post_imm_st4lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind {12217; CHECK-SD-LABEL: test_v8i8_post_imm_st4lane:12218; CHECK-SD: ; %bb.0:12219; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312220; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312221; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312222; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312223; CHECK-SD-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], #412224; CHECK-SD-NEXT: ret12225;12226; CHECK-GI-LABEL: test_v8i8_post_imm_st4lane:12227; CHECK-GI: ; %bb.0:12228; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312229; CHECK-GI-NEXT: mov x8, x012230; CHECK-GI-NEXT: add x0, x0, #412231; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312232; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312233; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312234; CHECK-GI-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8]12235; CHECK-GI-NEXT: ret12236 call void @llvm.aarch64.neon.st4lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, ptr %A)12237 %tmp = getelementptr i8, ptr %A, i32 412238 ret ptr %tmp12239}12240 12241define ptr @test_v8i8_post_reg_st4lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 %inc) nounwind {12242; CHECK-SD-LABEL: test_v8i8_post_reg_st4lane:12243; CHECK-SD: ; %bb.0:12244; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312245; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312246; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312247; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312248; CHECK-SD-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], x212249; CHECK-SD-NEXT: ret12250;12251; CHECK-GI-LABEL: test_v8i8_post_reg_st4lane:12252; CHECK-GI: ; %bb.0:12253; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312254; CHECK-GI-NEXT: mov x8, x012255; CHECK-GI-NEXT: add x0, x0, x212256; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312257; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312258; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312259; CHECK-GI-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8]12260; CHECK-GI-NEXT: ret12261 call void @llvm.aarch64.neon.st4lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, ptr %A)12262 %tmp = getelementptr i8, ptr %A, i64 %inc12263 ret ptr %tmp12264}12265 12266declare void @llvm.aarch64.neon.st4lane.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i64, ptr)12267 12268 12269define ptr @test_v8i16_post_imm_st4lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind {12270; CHECK-SD-LABEL: test_v8i16_post_imm_st4lane:12271; CHECK-SD: ; %bb.0:12272; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312273; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312274; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312275; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312276; CHECK-SD-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], #812277; CHECK-SD-NEXT: ret12278;12279; CHECK-GI-LABEL: test_v8i16_post_imm_st4lane:12280; CHECK-GI: ; %bb.0:12281; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312282; CHECK-GI-NEXT: mov x8, x012283; CHECK-GI-NEXT: add x0, x0, #812284; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312285; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312286; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312287; CHECK-GI-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8]12288; CHECK-GI-NEXT: ret12289 call void @llvm.aarch64.neon.st4lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, ptr %A)12290 %tmp = getelementptr i16, ptr %A, i32 412291 ret ptr %tmp12292}12293 12294define ptr @test_v8i16_post_reg_st4lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 %inc) nounwind {12295; CHECK-SD-LABEL: test_v8i16_post_reg_st4lane:12296; CHECK-SD: ; %bb.0:12297; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312298; CHECK-SD-NEXT: lsl x8, x2, #112299; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312300; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312301; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312302; CHECK-SD-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], x812303; CHECK-SD-NEXT: ret12304;12305; CHECK-GI-LABEL: test_v8i16_post_reg_st4lane:12306; CHECK-GI: ; %bb.0:12307; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312308; CHECK-GI-NEXT: mov x8, x012309; CHECK-GI-NEXT: add x0, x0, x2, lsl #112310; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312311; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312312; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312313; CHECK-GI-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8]12314; CHECK-GI-NEXT: ret12315 call void @llvm.aarch64.neon.st4lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, ptr %A)12316 %tmp = getelementptr i16, ptr %A, i64 %inc12317 ret ptr %tmp12318}12319 12320declare void @llvm.aarch64.neon.st4lane.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i64, ptr)12321 12322 12323define ptr @test_v4i16_post_imm_st4lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind {12324; CHECK-SD-LABEL: test_v4i16_post_imm_st4lane:12325; CHECK-SD: ; %bb.0:12326; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312327; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312328; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312329; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312330; CHECK-SD-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], #812331; CHECK-SD-NEXT: ret12332;12333; CHECK-GI-LABEL: test_v4i16_post_imm_st4lane:12334; CHECK-GI: ; %bb.0:12335; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312336; CHECK-GI-NEXT: mov x8, x012337; CHECK-GI-NEXT: add x0, x0, #812338; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312339; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312340; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312341; CHECK-GI-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8]12342; CHECK-GI-NEXT: ret12343 call void @llvm.aarch64.neon.st4lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, ptr %A)12344 %tmp = getelementptr i16, ptr %A, i32 412345 ret ptr %tmp12346}12347 12348define ptr @test_v4i16_post_reg_st4lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 %inc) nounwind {12349; CHECK-SD-LABEL: test_v4i16_post_reg_st4lane:12350; CHECK-SD: ; %bb.0:12351; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312352; CHECK-SD-NEXT: lsl x8, x2, #112353; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312354; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312355; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312356; CHECK-SD-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], x812357; CHECK-SD-NEXT: ret12358;12359; CHECK-GI-LABEL: test_v4i16_post_reg_st4lane:12360; CHECK-GI: ; %bb.0:12361; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312362; CHECK-GI-NEXT: mov x8, x012363; CHECK-GI-NEXT: add x0, x0, x2, lsl #112364; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312365; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312366; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312367; CHECK-GI-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8]12368; CHECK-GI-NEXT: ret12369 call void @llvm.aarch64.neon.st4lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, ptr %A)12370 %tmp = getelementptr i16, ptr %A, i64 %inc12371 ret ptr %tmp12372}12373 12374declare void @llvm.aarch64.neon.st4lane.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i64, ptr)12375 12376 12377define ptr @test_v4i32_post_imm_st4lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind {12378; CHECK-SD-LABEL: test_v4i32_post_imm_st4lane:12379; CHECK-SD: ; %bb.0:12380; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312381; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312382; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312383; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312384; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #1612385; CHECK-SD-NEXT: ret12386;12387; CHECK-GI-LABEL: test_v4i32_post_imm_st4lane:12388; CHECK-GI: ; %bb.0:12389; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312390; CHECK-GI-NEXT: mov x8, x012391; CHECK-GI-NEXT: add x0, x0, #1612392; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312393; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312394; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312395; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]12396; CHECK-GI-NEXT: ret12397 call void @llvm.aarch64.neon.st4lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, ptr %A)12398 %tmp = getelementptr i32, ptr %A, i32 412399 ret ptr %tmp12400}12401 12402define ptr @test_v4i32_post_reg_st4lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 %inc) nounwind {12403; CHECK-SD-LABEL: test_v4i32_post_reg_st4lane:12404; CHECK-SD: ; %bb.0:12405; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312406; CHECK-SD-NEXT: lsl x8, x2, #212407; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312408; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312409; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312410; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x812411; CHECK-SD-NEXT: ret12412;12413; CHECK-GI-LABEL: test_v4i32_post_reg_st4lane:12414; CHECK-GI: ; %bb.0:12415; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312416; CHECK-GI-NEXT: mov x8, x012417; CHECK-GI-NEXT: add x0, x0, x2, lsl #212418; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312419; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312420; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312421; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]12422; CHECK-GI-NEXT: ret12423 call void @llvm.aarch64.neon.st4lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, ptr %A)12424 %tmp = getelementptr i32, ptr %A, i64 %inc12425 ret ptr %tmp12426}12427 12428declare void @llvm.aarch64.neon.st4lane.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i64, ptr)12429 12430 12431define ptr @test_v2i32_post_imm_st4lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind {12432; CHECK-SD-LABEL: test_v2i32_post_imm_st4lane:12433; CHECK-SD: ; %bb.0:12434; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312435; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312436; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312437; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312438; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #1612439; CHECK-SD-NEXT: ret12440;12441; CHECK-GI-LABEL: test_v2i32_post_imm_st4lane:12442; CHECK-GI: ; %bb.0:12443; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312444; CHECK-GI-NEXT: mov x8, x012445; CHECK-GI-NEXT: add x0, x0, #1612446; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312447; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312448; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312449; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]12450; CHECK-GI-NEXT: ret12451 call void @llvm.aarch64.neon.st4lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, ptr %A)12452 %tmp = getelementptr i32, ptr %A, i32 412453 ret ptr %tmp12454}12455 12456define ptr @test_v2i32_post_reg_st4lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 %inc) nounwind {12457; CHECK-SD-LABEL: test_v2i32_post_reg_st4lane:12458; CHECK-SD: ; %bb.0:12459; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312460; CHECK-SD-NEXT: lsl x8, x2, #212461; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312462; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312463; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312464; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x812465; CHECK-SD-NEXT: ret12466;12467; CHECK-GI-LABEL: test_v2i32_post_reg_st4lane:12468; CHECK-GI: ; %bb.0:12469; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312470; CHECK-GI-NEXT: mov x8, x012471; CHECK-GI-NEXT: add x0, x0, x2, lsl #212472; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312473; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312474; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312475; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]12476; CHECK-GI-NEXT: ret12477 call void @llvm.aarch64.neon.st4lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, ptr %A)12478 %tmp = getelementptr i32, ptr %A, i64 %inc12479 ret ptr %tmp12480}12481 12482declare void @llvm.aarch64.neon.st4lane.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i64, ptr)12483 12484 12485define ptr @test_v2i64_post_imm_st4lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind {12486; CHECK-SD-LABEL: test_v2i64_post_imm_st4lane:12487; CHECK-SD: ; %bb.0:12488; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312489; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312490; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312491; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312492; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #3212493; CHECK-SD-NEXT: ret12494;12495; CHECK-GI-LABEL: test_v2i64_post_imm_st4lane:12496; CHECK-GI: ; %bb.0:12497; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312498; CHECK-GI-NEXT: mov x8, x012499; CHECK-GI-NEXT: add x0, x0, #3212500; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312501; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312502; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312503; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]12504; CHECK-GI-NEXT: ret12505 call void @llvm.aarch64.neon.st4lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, ptr %A)12506 %tmp = getelementptr i64, ptr %A, i64 412507 ret ptr %tmp12508}12509 12510define ptr @test_v2i64_post_reg_st4lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 %inc) nounwind {12511; CHECK-SD-LABEL: test_v2i64_post_reg_st4lane:12512; CHECK-SD: ; %bb.0:12513; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312514; CHECK-SD-NEXT: lsl x8, x2, #312515; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312516; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312517; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312518; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x812519; CHECK-SD-NEXT: ret12520;12521; CHECK-GI-LABEL: test_v2i64_post_reg_st4lane:12522; CHECK-GI: ; %bb.0:12523; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312524; CHECK-GI-NEXT: mov x8, x012525; CHECK-GI-NEXT: add x0, x0, x2, lsl #312526; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312527; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312528; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312529; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]12530; CHECK-GI-NEXT: ret12531 call void @llvm.aarch64.neon.st4lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, ptr %A)12532 %tmp = getelementptr i64, ptr %A, i64 %inc12533 ret ptr %tmp12534}12535 12536declare void @llvm.aarch64.neon.st4lane.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, i64, ptr)12537 12538 12539define ptr @test_v1i64_post_imm_st4lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind {12540; CHECK-SD-LABEL: test_v1i64_post_imm_st4lane:12541; CHECK-SD: ; %bb.0:12542; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312543; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312544; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312545; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312546; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #3212547; CHECK-SD-NEXT: ret12548;12549; CHECK-GI-LABEL: test_v1i64_post_imm_st4lane:12550; CHECK-GI: ; %bb.0:12551; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312552; CHECK-GI-NEXT: mov x8, x012553; CHECK-GI-NEXT: add x0, x0, #3212554; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312555; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312556; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312557; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]12558; CHECK-GI-NEXT: ret12559 call void @llvm.aarch64.neon.st4lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, ptr %A)12560 %tmp = getelementptr i64, ptr %A, i64 412561 ret ptr %tmp12562}12563 12564define ptr @test_v1i64_post_reg_st4lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 %inc) nounwind {12565; CHECK-SD-LABEL: test_v1i64_post_reg_st4lane:12566; CHECK-SD: ; %bb.0:12567; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312568; CHECK-SD-NEXT: lsl x8, x2, #312569; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312570; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312571; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312572; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x812573; CHECK-SD-NEXT: ret12574;12575; CHECK-GI-LABEL: test_v1i64_post_reg_st4lane:12576; CHECK-GI: ; %bb.0:12577; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312578; CHECK-GI-NEXT: mov x8, x012579; CHECK-GI-NEXT: add x0, x0, x2, lsl #312580; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312581; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312582; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312583; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]12584; CHECK-GI-NEXT: ret12585 call void @llvm.aarch64.neon.st4lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, ptr %A)12586 %tmp = getelementptr i64, ptr %A, i64 %inc12587 ret ptr %tmp12588}12589 12590declare void @llvm.aarch64.neon.st4lane.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>, i64, ptr)12591 12592 12593define ptr @test_v4f32_post_imm_st4lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind {12594; CHECK-SD-LABEL: test_v4f32_post_imm_st4lane:12595; CHECK-SD: ; %bb.0:12596; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312597; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312598; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312599; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312600; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #1612601; CHECK-SD-NEXT: ret12602;12603; CHECK-GI-LABEL: test_v4f32_post_imm_st4lane:12604; CHECK-GI: ; %bb.0:12605; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312606; CHECK-GI-NEXT: mov x8, x012607; CHECK-GI-NEXT: add x0, x0, #1612608; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312609; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312610; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312611; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]12612; CHECK-GI-NEXT: ret12613 call void @llvm.aarch64.neon.st4lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, ptr %A)12614 %tmp = getelementptr float, ptr %A, i32 412615 ret ptr %tmp12616}12617 12618define ptr @test_v4f32_post_reg_st4lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 %inc) nounwind {12619; CHECK-SD-LABEL: test_v4f32_post_reg_st4lane:12620; CHECK-SD: ; %bb.0:12621; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312622; CHECK-SD-NEXT: lsl x8, x2, #212623; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312624; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312625; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312626; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x812627; CHECK-SD-NEXT: ret12628;12629; CHECK-GI-LABEL: test_v4f32_post_reg_st4lane:12630; CHECK-GI: ; %bb.0:12631; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312632; CHECK-GI-NEXT: mov x8, x012633; CHECK-GI-NEXT: add x0, x0, x2, lsl #212634; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312635; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312636; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312637; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]12638; CHECK-GI-NEXT: ret12639 call void @llvm.aarch64.neon.st4lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, ptr %A)12640 %tmp = getelementptr float, ptr %A, i64 %inc12641 ret ptr %tmp12642}12643 12644declare void @llvm.aarch64.neon.st4lane.v4f32.p0(<4 x float>, <4 x float>, <4 x float>, <4 x float>, i64, ptr)12645 12646 12647define ptr @test_v2f32_post_imm_st4lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind {12648; CHECK-SD-LABEL: test_v2f32_post_imm_st4lane:12649; CHECK-SD: ; %bb.0:12650; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312651; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312652; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312653; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312654; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #1612655; CHECK-SD-NEXT: ret12656;12657; CHECK-GI-LABEL: test_v2f32_post_imm_st4lane:12658; CHECK-GI: ; %bb.0:12659; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312660; CHECK-GI-NEXT: mov x8, x012661; CHECK-GI-NEXT: add x0, x0, #1612662; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312663; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312664; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312665; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]12666; CHECK-GI-NEXT: ret12667 call void @llvm.aarch64.neon.st4lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, ptr %A)12668 %tmp = getelementptr float, ptr %A, i32 412669 ret ptr %tmp12670}12671 12672define ptr @test_v2f32_post_reg_st4lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 %inc) nounwind {12673; CHECK-SD-LABEL: test_v2f32_post_reg_st4lane:12674; CHECK-SD: ; %bb.0:12675; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312676; CHECK-SD-NEXT: lsl x8, x2, #212677; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312678; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312679; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312680; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x812681; CHECK-SD-NEXT: ret12682;12683; CHECK-GI-LABEL: test_v2f32_post_reg_st4lane:12684; CHECK-GI: ; %bb.0:12685; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312686; CHECK-GI-NEXT: mov x8, x012687; CHECK-GI-NEXT: add x0, x0, x2, lsl #212688; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312689; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312690; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312691; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8]12692; CHECK-GI-NEXT: ret12693 call void @llvm.aarch64.neon.st4lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, ptr %A)12694 %tmp = getelementptr float, ptr %A, i64 %inc12695 ret ptr %tmp12696}12697 12698declare void @llvm.aarch64.neon.st4lane.v2f32.p0(<2 x float>, <2 x float>, <2 x float>, <2 x float>, i64, ptr)12699 12700 12701define ptr @test_v2f64_post_imm_st4lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind {12702; CHECK-SD-LABEL: test_v2f64_post_imm_st4lane:12703; CHECK-SD: ; %bb.0:12704; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312705; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312706; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312707; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312708; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #3212709; CHECK-SD-NEXT: ret12710;12711; CHECK-GI-LABEL: test_v2f64_post_imm_st4lane:12712; CHECK-GI: ; %bb.0:12713; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312714; CHECK-GI-NEXT: mov x8, x012715; CHECK-GI-NEXT: add x0, x0, #3212716; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312717; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312718; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312719; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]12720; CHECK-GI-NEXT: ret12721 call void @llvm.aarch64.neon.st4lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, ptr %A)12722 %tmp = getelementptr double, ptr %A, i64 412723 ret ptr %tmp12724}12725 12726define ptr @test_v2f64_post_reg_st4lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 %inc) nounwind {12727; CHECK-SD-LABEL: test_v2f64_post_reg_st4lane:12728; CHECK-SD: ; %bb.0:12729; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312730; CHECK-SD-NEXT: lsl x8, x2, #312731; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312732; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312733; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312734; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x812735; CHECK-SD-NEXT: ret12736;12737; CHECK-GI-LABEL: test_v2f64_post_reg_st4lane:12738; CHECK-GI: ; %bb.0:12739; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312740; CHECK-GI-NEXT: mov x8, x012741; CHECK-GI-NEXT: add x0, x0, x2, lsl #312742; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312743; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312744; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312745; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]12746; CHECK-GI-NEXT: ret12747 call void @llvm.aarch64.neon.st4lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, ptr %A)12748 %tmp = getelementptr double, ptr %A, i64 %inc12749 ret ptr %tmp12750}12751 12752declare void @llvm.aarch64.neon.st4lane.v2f64.p0(<2 x double>, <2 x double>, <2 x double>, <2 x double>, i64, ptr)12753 12754 12755define ptr @test_v1f64_post_imm_st4lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind {12756; CHECK-SD-LABEL: test_v1f64_post_imm_st4lane:12757; CHECK-SD: ; %bb.0:12758; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312759; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312760; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312761; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312762; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #3212763; CHECK-SD-NEXT: ret12764;12765; CHECK-GI-LABEL: test_v1f64_post_imm_st4lane:12766; CHECK-GI: ; %bb.0:12767; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312768; CHECK-GI-NEXT: mov x8, x012769; CHECK-GI-NEXT: add x0, x0, #3212770; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312771; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312772; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312773; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]12774; CHECK-GI-NEXT: ret12775 call void @llvm.aarch64.neon.st4lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, ptr %A)12776 %tmp = getelementptr double, ptr %A, i64 412777 ret ptr %tmp12778}12779 12780define ptr @test_v1f64_post_reg_st4lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 %inc) nounwind {12781; CHECK-SD-LABEL: test_v1f64_post_reg_st4lane:12782; CHECK-SD: ; %bb.0:12783; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312784; CHECK-SD-NEXT: lsl x8, x2, #312785; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312786; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312787; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312788; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x812789; CHECK-SD-NEXT: ret12790;12791; CHECK-GI-LABEL: test_v1f64_post_reg_st4lane:12792; CHECK-GI: ; %bb.0:12793; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q312794; CHECK-GI-NEXT: mov x8, x012795; CHECK-GI-NEXT: add x0, x0, x2, lsl #312796; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q312797; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q312798; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q312799; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8]12800; CHECK-GI-NEXT: ret12801 call void @llvm.aarch64.neon.st4lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, ptr %A)12802 %tmp = getelementptr double, ptr %A, i64 %inc12803 ret ptr %tmp12804}12805 12806declare void @llvm.aarch64.neon.st4lane.v1f64.p0(<1 x double>, <1 x double>, <1 x double>, <1 x double>, i64, ptr)12807 12808define <16 x i8> @test_v16i8_post_imm_ld1r(ptr %bar, ptr %ptr) {12809; CHECK-SD-LABEL: test_v16i8_post_imm_ld1r:12810; CHECK-SD: ; %bb.0:12811; CHECK-SD-NEXT: ld1r.16b { v0 }, [x0], #112812; CHECK-SD-NEXT: str x0, [x1]12813; CHECK-SD-NEXT: ret12814;12815; CHECK-GI-LABEL: test_v16i8_post_imm_ld1r:12816; CHECK-GI: ; %bb.0:12817; CHECK-GI-NEXT: ldrb w8, [x0], #112818; CHECK-GI-NEXT: str x0, [x1]12819; CHECK-GI-NEXT: dup.16b v0, w812820; CHECK-GI-NEXT: ret12821 %tmp1 = load i8, ptr %bar12822 %tmp2 = insertelement <16 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 012823 %tmp3 = insertelement <16 x i8> %tmp2, i8 %tmp1, i32 112824 %tmp4 = insertelement <16 x i8> %tmp3, i8 %tmp1, i32 212825 %tmp5 = insertelement <16 x i8> %tmp4, i8 %tmp1, i32 312826 %tmp6 = insertelement <16 x i8> %tmp5, i8 %tmp1, i32 412827 %tmp7 = insertelement <16 x i8> %tmp6, i8 %tmp1, i32 512828 %tmp8 = insertelement <16 x i8> %tmp7, i8 %tmp1, i32 612829 %tmp9 = insertelement <16 x i8> %tmp8, i8 %tmp1, i32 712830 %tmp10 = insertelement <16 x i8> %tmp9, i8 %tmp1, i32 812831 %tmp11 = insertelement <16 x i8> %tmp10, i8 %tmp1, i32 912832 %tmp12 = insertelement <16 x i8> %tmp11, i8 %tmp1, i32 1012833 %tmp13 = insertelement <16 x i8> %tmp12, i8 %tmp1, i32 1112834 %tmp14 = insertelement <16 x i8> %tmp13, i8 %tmp1, i32 1212835 %tmp15 = insertelement <16 x i8> %tmp14, i8 %tmp1, i32 1312836 %tmp16 = insertelement <16 x i8> %tmp15, i8 %tmp1, i32 1412837 %tmp17 = insertelement <16 x i8> %tmp16, i8 %tmp1, i32 1512838 %tmp18 = getelementptr i8, ptr %bar, i64 112839 store ptr %tmp18, ptr %ptr12840 ret <16 x i8> %tmp1712841}12842 12843define <16 x i8> @test_v16i8_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {12844; CHECK-SD-LABEL: test_v16i8_post_reg_ld1r:12845; CHECK-SD: ; %bb.0:12846; CHECK-SD-NEXT: ld1r.16b { v0 }, [x0], x212847; CHECK-SD-NEXT: str x0, [x1]12848; CHECK-SD-NEXT: ret12849;12850; CHECK-GI-LABEL: test_v16i8_post_reg_ld1r:12851; CHECK-GI: ; %bb.0:12852; CHECK-GI-NEXT: ld1r.16b { v0 }, [x0]12853; CHECK-GI-NEXT: add x8, x0, x212854; CHECK-GI-NEXT: str x8, [x1]12855; CHECK-GI-NEXT: ret12856 %tmp1 = load i8, ptr %bar12857 %tmp2 = insertelement <16 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 012858 %tmp3 = insertelement <16 x i8> %tmp2, i8 %tmp1, i32 112859 %tmp4 = insertelement <16 x i8> %tmp3, i8 %tmp1, i32 212860 %tmp5 = insertelement <16 x i8> %tmp4, i8 %tmp1, i32 312861 %tmp6 = insertelement <16 x i8> %tmp5, i8 %tmp1, i32 412862 %tmp7 = insertelement <16 x i8> %tmp6, i8 %tmp1, i32 512863 %tmp8 = insertelement <16 x i8> %tmp7, i8 %tmp1, i32 612864 %tmp9 = insertelement <16 x i8> %tmp8, i8 %tmp1, i32 712865 %tmp10 = insertelement <16 x i8> %tmp9, i8 %tmp1, i32 812866 %tmp11 = insertelement <16 x i8> %tmp10, i8 %tmp1, i32 912867 %tmp12 = insertelement <16 x i8> %tmp11, i8 %tmp1, i32 1012868 %tmp13 = insertelement <16 x i8> %tmp12, i8 %tmp1, i32 1112869 %tmp14 = insertelement <16 x i8> %tmp13, i8 %tmp1, i32 1212870 %tmp15 = insertelement <16 x i8> %tmp14, i8 %tmp1, i32 1312871 %tmp16 = insertelement <16 x i8> %tmp15, i8 %tmp1, i32 1412872 %tmp17 = insertelement <16 x i8> %tmp16, i8 %tmp1, i32 1512873 %tmp18 = getelementptr i8, ptr %bar, i64 %inc12874 store ptr %tmp18, ptr %ptr12875 ret <16 x i8> %tmp1712876}12877 12878define <8 x i8> @test_v8i8_post_imm_ld1r(ptr %bar, ptr %ptr) {12879; CHECK-SD-LABEL: test_v8i8_post_imm_ld1r:12880; CHECK-SD: ; %bb.0:12881; CHECK-SD-NEXT: ld1r.8b { v0 }, [x0], #112882; CHECK-SD-NEXT: str x0, [x1]12883; CHECK-SD-NEXT: ret12884;12885; CHECK-GI-LABEL: test_v8i8_post_imm_ld1r:12886; CHECK-GI: ; %bb.0:12887; CHECK-GI-NEXT: ldrb w8, [x0], #112888; CHECK-GI-NEXT: str x0, [x1]12889; CHECK-GI-NEXT: dup.8b v0, w812890; CHECK-GI-NEXT: ret12891 %tmp1 = load i8, ptr %bar12892 %tmp2 = insertelement <8 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 012893 %tmp3 = insertelement <8 x i8> %tmp2, i8 %tmp1, i32 112894 %tmp4 = insertelement <8 x i8> %tmp3, i8 %tmp1, i32 212895 %tmp5 = insertelement <8 x i8> %tmp4, i8 %tmp1, i32 312896 %tmp6 = insertelement <8 x i8> %tmp5, i8 %tmp1, i32 412897 %tmp7 = insertelement <8 x i8> %tmp6, i8 %tmp1, i32 512898 %tmp8 = insertelement <8 x i8> %tmp7, i8 %tmp1, i32 612899 %tmp9 = insertelement <8 x i8> %tmp8, i8 %tmp1, i32 712900 %tmp10 = getelementptr i8, ptr %bar, i64 112901 store ptr %tmp10, ptr %ptr12902 ret <8 x i8> %tmp912903}12904 12905define <8 x i8> @test_v8i8_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {12906; CHECK-SD-LABEL: test_v8i8_post_reg_ld1r:12907; CHECK-SD: ; %bb.0:12908; CHECK-SD-NEXT: ld1r.8b { v0 }, [x0], x212909; CHECK-SD-NEXT: str x0, [x1]12910; CHECK-SD-NEXT: ret12911;12912; CHECK-GI-LABEL: test_v8i8_post_reg_ld1r:12913; CHECK-GI: ; %bb.0:12914; CHECK-GI-NEXT: ld1r.8b { v0 }, [x0]12915; CHECK-GI-NEXT: add x8, x0, x212916; CHECK-GI-NEXT: str x8, [x1]12917; CHECK-GI-NEXT: ret12918 %tmp1 = load i8, ptr %bar12919 %tmp2 = insertelement <8 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 012920 %tmp3 = insertelement <8 x i8> %tmp2, i8 %tmp1, i32 112921 %tmp4 = insertelement <8 x i8> %tmp3, i8 %tmp1, i32 212922 %tmp5 = insertelement <8 x i8> %tmp4, i8 %tmp1, i32 312923 %tmp6 = insertelement <8 x i8> %tmp5, i8 %tmp1, i32 412924 %tmp7 = insertelement <8 x i8> %tmp6, i8 %tmp1, i32 512925 %tmp8 = insertelement <8 x i8> %tmp7, i8 %tmp1, i32 612926 %tmp9 = insertelement <8 x i8> %tmp8, i8 %tmp1, i32 712927 %tmp10 = getelementptr i8, ptr %bar, i64 %inc12928 store ptr %tmp10, ptr %ptr12929 ret <8 x i8> %tmp912930}12931 12932define <8 x i16> @test_v8i16_post_imm_ld1r(ptr %bar, ptr %ptr) {12933; CHECK-SD-LABEL: test_v8i16_post_imm_ld1r:12934; CHECK-SD: ; %bb.0:12935; CHECK-SD-NEXT: ld1r.8h { v0 }, [x0], #212936; CHECK-SD-NEXT: str x0, [x1]12937; CHECK-SD-NEXT: ret12938;12939; CHECK-GI-LABEL: test_v8i16_post_imm_ld1r:12940; CHECK-GI: ; %bb.0:12941; CHECK-GI-NEXT: ldrh w8, [x0], #212942; CHECK-GI-NEXT: str x0, [x1]12943; CHECK-GI-NEXT: dup.8h v0, w812944; CHECK-GI-NEXT: ret12945 %tmp1 = load i16, ptr %bar12946 %tmp2 = insertelement <8 x i16> <i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>, i16 %tmp1, i32 012947 %tmp3 = insertelement <8 x i16> %tmp2, i16 %tmp1, i32 112948 %tmp4 = insertelement <8 x i16> %tmp3, i16 %tmp1, i32 212949 %tmp5 = insertelement <8 x i16> %tmp4, i16 %tmp1, i32 312950 %tmp6 = insertelement <8 x i16> %tmp5, i16 %tmp1, i32 412951 %tmp7 = insertelement <8 x i16> %tmp6, i16 %tmp1, i32 512952 %tmp8 = insertelement <8 x i16> %tmp7, i16 %tmp1, i32 612953 %tmp9 = insertelement <8 x i16> %tmp8, i16 %tmp1, i32 712954 %tmp10 = getelementptr i16, ptr %bar, i64 112955 store ptr %tmp10, ptr %ptr12956 ret <8 x i16> %tmp912957}12958 12959define <8 x i16> @test_v8i16_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {12960; CHECK-SD-LABEL: test_v8i16_post_reg_ld1r:12961; CHECK-SD: ; %bb.0:12962; CHECK-SD-NEXT: lsl x8, x2, #112963; CHECK-SD-NEXT: ld1r.8h { v0 }, [x0], x812964; CHECK-SD-NEXT: str x0, [x1]12965; CHECK-SD-NEXT: ret12966;12967; CHECK-GI-LABEL: test_v8i16_post_reg_ld1r:12968; CHECK-GI: ; %bb.0:12969; CHECK-GI-NEXT: ld1r.8h { v0 }, [x0]12970; CHECK-GI-NEXT: add x8, x0, x2, lsl #112971; CHECK-GI-NEXT: str x8, [x1]12972; CHECK-GI-NEXT: ret12973 %tmp1 = load i16, ptr %bar12974 %tmp2 = insertelement <8 x i16> <i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>, i16 %tmp1, i32 012975 %tmp3 = insertelement <8 x i16> %tmp2, i16 %tmp1, i32 112976 %tmp4 = insertelement <8 x i16> %tmp3, i16 %tmp1, i32 212977 %tmp5 = insertelement <8 x i16> %tmp4, i16 %tmp1, i32 312978 %tmp6 = insertelement <8 x i16> %tmp5, i16 %tmp1, i32 412979 %tmp7 = insertelement <8 x i16> %tmp6, i16 %tmp1, i32 512980 %tmp8 = insertelement <8 x i16> %tmp7, i16 %tmp1, i32 612981 %tmp9 = insertelement <8 x i16> %tmp8, i16 %tmp1, i32 712982 %tmp10 = getelementptr i16, ptr %bar, i64 %inc12983 store ptr %tmp10, ptr %ptr12984 ret <8 x i16> %tmp912985}12986 12987define <4 x i16> @test_v4i16_post_imm_ld1r(ptr %bar, ptr %ptr) {12988; CHECK-SD-LABEL: test_v4i16_post_imm_ld1r:12989; CHECK-SD: ; %bb.0:12990; CHECK-SD-NEXT: ld1r.4h { v0 }, [x0], #212991; CHECK-SD-NEXT: str x0, [x1]12992; CHECK-SD-NEXT: ret12993;12994; CHECK-GI-LABEL: test_v4i16_post_imm_ld1r:12995; CHECK-GI: ; %bb.0:12996; CHECK-GI-NEXT: ldrh w8, [x0], #212997; CHECK-GI-NEXT: str x0, [x1]12998; CHECK-GI-NEXT: dup.4h v0, w812999; CHECK-GI-NEXT: ret13000 %tmp1 = load i16, ptr %bar13001 %tmp2 = insertelement <4 x i16> <i16 undef, i16 undef, i16 undef, i16 undef>, i16 %tmp1, i32 013002 %tmp3 = insertelement <4 x i16> %tmp2, i16 %tmp1, i32 113003 %tmp4 = insertelement <4 x i16> %tmp3, i16 %tmp1, i32 213004 %tmp5 = insertelement <4 x i16> %tmp4, i16 %tmp1, i32 313005 %tmp6 = getelementptr i16, ptr %bar, i64 113006 store ptr %tmp6, ptr %ptr13007 ret <4 x i16> %tmp513008}13009 13010define <4 x i16> @test_v4i16_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {13011; CHECK-SD-LABEL: test_v4i16_post_reg_ld1r:13012; CHECK-SD: ; %bb.0:13013; CHECK-SD-NEXT: lsl x8, x2, #113014; CHECK-SD-NEXT: ld1r.4h { v0 }, [x0], x813015; CHECK-SD-NEXT: str x0, [x1]13016; CHECK-SD-NEXT: ret13017;13018; CHECK-GI-LABEL: test_v4i16_post_reg_ld1r:13019; CHECK-GI: ; %bb.0:13020; CHECK-GI-NEXT: ld1r.4h { v0 }, [x0]13021; CHECK-GI-NEXT: add x8, x0, x2, lsl #113022; CHECK-GI-NEXT: str x8, [x1]13023; CHECK-GI-NEXT: ret13024 %tmp1 = load i16, ptr %bar13025 %tmp2 = insertelement <4 x i16> <i16 undef, i16 undef, i16 undef, i16 undef>, i16 %tmp1, i32 013026 %tmp3 = insertelement <4 x i16> %tmp2, i16 %tmp1, i32 113027 %tmp4 = insertelement <4 x i16> %tmp3, i16 %tmp1, i32 213028 %tmp5 = insertelement <4 x i16> %tmp4, i16 %tmp1, i32 313029 %tmp6 = getelementptr i16, ptr %bar, i64 %inc13030 store ptr %tmp6, ptr %ptr13031 ret <4 x i16> %tmp513032}13033 13034define <4 x i32> @test_v4i32_post_imm_ld1r(ptr %bar, ptr %ptr) {13035; CHECK-SD-LABEL: test_v4i32_post_imm_ld1r:13036; CHECK-SD: ; %bb.0:13037; CHECK-SD-NEXT: ld1r.4s { v0 }, [x0], #413038; CHECK-SD-NEXT: str x0, [x1]13039; CHECK-SD-NEXT: ret13040;13041; CHECK-GI-LABEL: test_v4i32_post_imm_ld1r:13042; CHECK-GI: ; %bb.0:13043; CHECK-GI-NEXT: ldr w8, [x0], #413044; CHECK-GI-NEXT: str x0, [x1]13045; CHECK-GI-NEXT: dup.4s v0, w813046; CHECK-GI-NEXT: ret13047 %tmp1 = load i32, ptr %bar13048 %tmp2 = insertelement <4 x i32> <i32 undef, i32 undef, i32 undef, i32 undef>, i32 %tmp1, i32 013049 %tmp3 = insertelement <4 x i32> %tmp2, i32 %tmp1, i32 113050 %tmp4 = insertelement <4 x i32> %tmp3, i32 %tmp1, i32 213051 %tmp5 = insertelement <4 x i32> %tmp4, i32 %tmp1, i32 313052 %tmp6 = getelementptr i32, ptr %bar, i64 113053 store ptr %tmp6, ptr %ptr13054 ret <4 x i32> %tmp513055}13056 13057define <4 x i32> @test_v4i32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {13058; CHECK-SD-LABEL: test_v4i32_post_reg_ld1r:13059; CHECK-SD: ; %bb.0:13060; CHECK-SD-NEXT: lsl x8, x2, #213061; CHECK-SD-NEXT: ld1r.4s { v0 }, [x0], x813062; CHECK-SD-NEXT: str x0, [x1]13063; CHECK-SD-NEXT: ret13064;13065; CHECK-GI-LABEL: test_v4i32_post_reg_ld1r:13066; CHECK-GI: ; %bb.0:13067; CHECK-GI-NEXT: ld1r.4s { v0 }, [x0]13068; CHECK-GI-NEXT: add x8, x0, x2, lsl #213069; CHECK-GI-NEXT: str x8, [x1]13070; CHECK-GI-NEXT: ret13071 %tmp1 = load i32, ptr %bar13072 %tmp2 = insertelement <4 x i32> <i32 undef, i32 undef, i32 undef, i32 undef>, i32 %tmp1, i32 013073 %tmp3 = insertelement <4 x i32> %tmp2, i32 %tmp1, i32 113074 %tmp4 = insertelement <4 x i32> %tmp3, i32 %tmp1, i32 213075 %tmp5 = insertelement <4 x i32> %tmp4, i32 %tmp1, i32 313076 %tmp6 = getelementptr i32, ptr %bar, i64 %inc13077 store ptr %tmp6, ptr %ptr13078 ret <4 x i32> %tmp513079}13080 13081define <2 x i32> @test_v2i32_post_imm_ld1r(ptr %bar, ptr %ptr) {13082; CHECK-SD-LABEL: test_v2i32_post_imm_ld1r:13083; CHECK-SD: ; %bb.0:13084; CHECK-SD-NEXT: ld1r.2s { v0 }, [x0], #413085; CHECK-SD-NEXT: str x0, [x1]13086; CHECK-SD-NEXT: ret13087;13088; CHECK-GI-LABEL: test_v2i32_post_imm_ld1r:13089; CHECK-GI: ; %bb.0:13090; CHECK-GI-NEXT: ldr w8, [x0], #413091; CHECK-GI-NEXT: str x0, [x1]13092; CHECK-GI-NEXT: dup.2s v0, w813093; CHECK-GI-NEXT: ret13094 %tmp1 = load i32, ptr %bar13095 %tmp2 = insertelement <2 x i32> <i32 undef, i32 undef>, i32 %tmp1, i32 013096 %tmp3 = insertelement <2 x i32> %tmp2, i32 %tmp1, i32 113097 %tmp4 = getelementptr i32, ptr %bar, i64 113098 store ptr %tmp4, ptr %ptr13099 ret <2 x i32> %tmp313100}13101 13102define <2 x i32> @test_v2i32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {13103; CHECK-SD-LABEL: test_v2i32_post_reg_ld1r:13104; CHECK-SD: ; %bb.0:13105; CHECK-SD-NEXT: lsl x8, x2, #213106; CHECK-SD-NEXT: ld1r.2s { v0 }, [x0], x813107; CHECK-SD-NEXT: str x0, [x1]13108; CHECK-SD-NEXT: ret13109;13110; CHECK-GI-LABEL: test_v2i32_post_reg_ld1r:13111; CHECK-GI: ; %bb.0:13112; CHECK-GI-NEXT: ld1r.2s { v0 }, [x0]13113; CHECK-GI-NEXT: add x8, x0, x2, lsl #213114; CHECK-GI-NEXT: str x8, [x1]13115; CHECK-GI-NEXT: ret13116 %tmp1 = load i32, ptr %bar13117 %tmp2 = insertelement <2 x i32> <i32 undef, i32 undef>, i32 %tmp1, i32 013118 %tmp3 = insertelement <2 x i32> %tmp2, i32 %tmp1, i32 113119 %tmp4 = getelementptr i32, ptr %bar, i64 %inc13120 store ptr %tmp4, ptr %ptr13121 ret <2 x i32> %tmp313122}13123 13124define <2 x i64> @test_v2i64_post_imm_ld1r(ptr %bar, ptr %ptr) {13125; CHECK-SD-LABEL: test_v2i64_post_imm_ld1r:13126; CHECK-SD: ; %bb.0:13127; CHECK-SD-NEXT: ld1r.2d { v0 }, [x0], #813128; CHECK-SD-NEXT: str x0, [x1]13129; CHECK-SD-NEXT: ret13130;13131; CHECK-GI-LABEL: test_v2i64_post_imm_ld1r:13132; CHECK-GI: ; %bb.0:13133; CHECK-GI-NEXT: ldr x8, [x0], #813134; CHECK-GI-NEXT: str x0, [x1]13135; CHECK-GI-NEXT: dup.2d v0, x813136; CHECK-GI-NEXT: ret13137 %tmp1 = load i64, ptr %bar13138 %tmp2 = insertelement <2 x i64> <i64 undef, i64 undef>, i64 %tmp1, i32 013139 %tmp3 = insertelement <2 x i64> %tmp2, i64 %tmp1, i32 113140 %tmp4 = getelementptr i64, ptr %bar, i64 113141 store ptr %tmp4, ptr %ptr13142 ret <2 x i64> %tmp313143}13144 13145define <2 x i64> @test_v2i64_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {13146; CHECK-SD-LABEL: test_v2i64_post_reg_ld1r:13147; CHECK-SD: ; %bb.0:13148; CHECK-SD-NEXT: lsl x8, x2, #313149; CHECK-SD-NEXT: ld1r.2d { v0 }, [x0], x813150; CHECK-SD-NEXT: str x0, [x1]13151; CHECK-SD-NEXT: ret13152;13153; CHECK-GI-LABEL: test_v2i64_post_reg_ld1r:13154; CHECK-GI: ; %bb.0:13155; CHECK-GI-NEXT: ld1r.2d { v0 }, [x0]13156; CHECK-GI-NEXT: add x8, x0, x2, lsl #313157; CHECK-GI-NEXT: str x8, [x1]13158; CHECK-GI-NEXT: ret13159 %tmp1 = load i64, ptr %bar13160 %tmp2 = insertelement <2 x i64> <i64 undef, i64 undef>, i64 %tmp1, i32 013161 %tmp3 = insertelement <2 x i64> %tmp2, i64 %tmp1, i32 113162 %tmp4 = getelementptr i64, ptr %bar, i64 %inc13163 store ptr %tmp4, ptr %ptr13164 ret <2 x i64> %tmp313165}13166 13167define <4 x float> @test_v4f32_post_imm_ld1r(ptr %bar, ptr %ptr) {13168; CHECK-SD-LABEL: test_v4f32_post_imm_ld1r:13169; CHECK-SD: ; %bb.0:13170; CHECK-SD-NEXT: ld1r.4s { v0 }, [x0], #413171; CHECK-SD-NEXT: str x0, [x1]13172; CHECK-SD-NEXT: ret13173;13174; CHECK-GI-LABEL: test_v4f32_post_imm_ld1r:13175; CHECK-GI: ; %bb.0:13176; CHECK-GI-NEXT: ldr s0, [x0], #413177; CHECK-GI-NEXT: str x0, [x1]13178; CHECK-GI-NEXT: dup.4s v0, v0[0]13179; CHECK-GI-NEXT: ret13180 %tmp1 = load float, ptr %bar13181 %tmp2 = insertelement <4 x float> <float undef, float undef, float undef, float undef>, float %tmp1, i32 013182 %tmp3 = insertelement <4 x float> %tmp2, float %tmp1, i32 113183 %tmp4 = insertelement <4 x float> %tmp3, float %tmp1, i32 213184 %tmp5 = insertelement <4 x float> %tmp4, float %tmp1, i32 313185 %tmp6 = getelementptr float, ptr %bar, i64 113186 store ptr %tmp6, ptr %ptr13187 ret <4 x float> %tmp513188}13189 13190define <4 x float> @test_v4f32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {13191; CHECK-SD-LABEL: test_v4f32_post_reg_ld1r:13192; CHECK-SD: ; %bb.0:13193; CHECK-SD-NEXT: lsl x8, x2, #213194; CHECK-SD-NEXT: ld1r.4s { v0 }, [x0], x813195; CHECK-SD-NEXT: str x0, [x1]13196; CHECK-SD-NEXT: ret13197;13198; CHECK-GI-LABEL: test_v4f32_post_reg_ld1r:13199; CHECK-GI: ; %bb.0:13200; CHECK-GI-NEXT: ld1r.4s { v0 }, [x0]13201; CHECK-GI-NEXT: add x8, x0, x2, lsl #213202; CHECK-GI-NEXT: str x8, [x1]13203; CHECK-GI-NEXT: ret13204 %tmp1 = load float, ptr %bar13205 %tmp2 = insertelement <4 x float> <float undef, float undef, float undef, float undef>, float %tmp1, i32 013206 %tmp3 = insertelement <4 x float> %tmp2, float %tmp1, i32 113207 %tmp4 = insertelement <4 x float> %tmp3, float %tmp1, i32 213208 %tmp5 = insertelement <4 x float> %tmp4, float %tmp1, i32 313209 %tmp6 = getelementptr float, ptr %bar, i64 %inc13210 store ptr %tmp6, ptr %ptr13211 ret <4 x float> %tmp513212}13213 13214define <2 x float> @test_v2f32_post_imm_ld1r(ptr %bar, ptr %ptr) {13215; CHECK-SD-LABEL: test_v2f32_post_imm_ld1r:13216; CHECK-SD: ; %bb.0:13217; CHECK-SD-NEXT: ld1r.2s { v0 }, [x0], #413218; CHECK-SD-NEXT: str x0, [x1]13219; CHECK-SD-NEXT: ret13220;13221; CHECK-GI-LABEL: test_v2f32_post_imm_ld1r:13222; CHECK-GI: ; %bb.0:13223; CHECK-GI-NEXT: ldr s0, [x0], #413224; CHECK-GI-NEXT: str x0, [x1]13225; CHECK-GI-NEXT: dup.2s v0, v0[0]13226; CHECK-GI-NEXT: ret13227 %tmp1 = load float, ptr %bar13228 %tmp2 = insertelement <2 x float> <float undef, float undef>, float %tmp1, i32 013229 %tmp3 = insertelement <2 x float> %tmp2, float %tmp1, i32 113230 %tmp4 = getelementptr float, ptr %bar, i64 113231 store ptr %tmp4, ptr %ptr13232 ret <2 x float> %tmp313233}13234 13235define <2 x float> @test_v2f32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {13236; CHECK-SD-LABEL: test_v2f32_post_reg_ld1r:13237; CHECK-SD: ; %bb.0:13238; CHECK-SD-NEXT: lsl x8, x2, #213239; CHECK-SD-NEXT: ld1r.2s { v0 }, [x0], x813240; CHECK-SD-NEXT: str x0, [x1]13241; CHECK-SD-NEXT: ret13242;13243; CHECK-GI-LABEL: test_v2f32_post_reg_ld1r:13244; CHECK-GI: ; %bb.0:13245; CHECK-GI-NEXT: ld1r.2s { v0 }, [x0]13246; CHECK-GI-NEXT: add x8, x0, x2, lsl #213247; CHECK-GI-NEXT: str x8, [x1]13248; CHECK-GI-NEXT: ret13249 %tmp1 = load float, ptr %bar13250 %tmp2 = insertelement <2 x float> <float undef, float undef>, float %tmp1, i32 013251 %tmp3 = insertelement <2 x float> %tmp2, float %tmp1, i32 113252 %tmp4 = getelementptr float, ptr %bar, i64 %inc13253 store ptr %tmp4, ptr %ptr13254 ret <2 x float> %tmp313255}13256 13257define <2 x double> @test_v2f64_post_imm_ld1r(ptr %bar, ptr %ptr) {13258; CHECK-SD-LABEL: test_v2f64_post_imm_ld1r:13259; CHECK-SD: ; %bb.0:13260; CHECK-SD-NEXT: ld1r.2d { v0 }, [x0], #813261; CHECK-SD-NEXT: str x0, [x1]13262; CHECK-SD-NEXT: ret13263;13264; CHECK-GI-LABEL: test_v2f64_post_imm_ld1r:13265; CHECK-GI: ; %bb.0:13266; CHECK-GI-NEXT: ldr d0, [x0], #813267; CHECK-GI-NEXT: str x0, [x1]13268; CHECK-GI-NEXT: dup.2d v0, v0[0]13269; CHECK-GI-NEXT: ret13270 %tmp1 = load double, ptr %bar13271 %tmp2 = insertelement <2 x double> <double undef, double undef>, double %tmp1, i32 013272 %tmp3 = insertelement <2 x double> %tmp2, double %tmp1, i32 113273 %tmp4 = getelementptr double, ptr %bar, i64 113274 store ptr %tmp4, ptr %ptr13275 ret <2 x double> %tmp313276}13277 13278define <2 x double> @test_v2f64_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {13279; CHECK-SD-LABEL: test_v2f64_post_reg_ld1r:13280; CHECK-SD: ; %bb.0:13281; CHECK-SD-NEXT: lsl x8, x2, #313282; CHECK-SD-NEXT: ld1r.2d { v0 }, [x0], x813283; CHECK-SD-NEXT: str x0, [x1]13284; CHECK-SD-NEXT: ret13285;13286; CHECK-GI-LABEL: test_v2f64_post_reg_ld1r:13287; CHECK-GI: ; %bb.0:13288; CHECK-GI-NEXT: ld1r.2d { v0 }, [x0]13289; CHECK-GI-NEXT: add x8, x0, x2, lsl #313290; CHECK-GI-NEXT: str x8, [x1]13291; CHECK-GI-NEXT: ret13292 %tmp1 = load double, ptr %bar13293 %tmp2 = insertelement <2 x double> <double undef, double undef>, double %tmp1, i32 013294 %tmp3 = insertelement <2 x double> %tmp2, double %tmp1, i32 113295 %tmp4 = getelementptr double, ptr %bar, i64 %inc13296 store ptr %tmp4, ptr %ptr13297 ret <2 x double> %tmp313298}13299 13300define <16 x i8> @test_v16i8_post_imm_ld1lane(ptr %bar, ptr %ptr, <16 x i8> %A) {13301; CHECK-SD-LABEL: test_v16i8_post_imm_ld1lane:13302; CHECK-SD: ; %bb.0:13303; CHECK-SD-NEXT: ld1.b { v0 }[1], [x0], #113304; CHECK-SD-NEXT: str x0, [x1]13305; CHECK-SD-NEXT: ret13306;13307; CHECK-GI-LABEL: test_v16i8_post_imm_ld1lane:13308; CHECK-GI: ; %bb.0:13309; CHECK-GI-NEXT: ldrb w8, [x0], #113310; CHECK-GI-NEXT: str x0, [x1]13311; CHECK-GI-NEXT: mov.b v0[1], w813312; CHECK-GI-NEXT: ret13313 %tmp1 = load i8, ptr %bar13314 %tmp2 = insertelement <16 x i8> %A, i8 %tmp1, i32 113315 %tmp3 = getelementptr i8, ptr %bar, i64 113316 store ptr %tmp3, ptr %ptr13317 ret <16 x i8> %tmp213318}13319 13320define <16 x i8> @test_v16i8_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <16 x i8> %A) {13321; CHECK-SD-LABEL: test_v16i8_post_reg_ld1lane:13322; CHECK-SD: ; %bb.0:13323; CHECK-SD-NEXT: ld1.b { v0 }[1], [x0], x213324; CHECK-SD-NEXT: str x0, [x1]13325; CHECK-SD-NEXT: ret13326;13327; CHECK-GI-LABEL: test_v16i8_post_reg_ld1lane:13328; CHECK-GI: ; %bb.0:13329; CHECK-GI-NEXT: ld1.b { v0 }[1], [x0]13330; CHECK-GI-NEXT: add x8, x0, x213331; CHECK-GI-NEXT: str x8, [x1]13332; CHECK-GI-NEXT: ret13333 %tmp1 = load i8, ptr %bar13334 %tmp2 = insertelement <16 x i8> %A, i8 %tmp1, i32 113335 %tmp3 = getelementptr i8, ptr %bar, i64 %inc13336 store ptr %tmp3, ptr %ptr13337 ret <16 x i8> %tmp213338}13339 13340define <16 x i8> @test_v16i8_post_reg_ld1lane_zero(ptr %bar, ptr %ptr, i64 %inc) {13341; CHECK-SD-LABEL: test_v16i8_post_reg_ld1lane_zero:13342; CHECK-SD: ; %bb.0:13343; CHECK-SD-NEXT: ldr b0, [x0]13344; CHECK-SD-NEXT: add x8, x0, x213345; CHECK-SD-NEXT: str x8, [x1]13346; CHECK-SD-NEXT: ret13347;13348; CHECK-GI-LABEL: test_v16i8_post_reg_ld1lane_zero:13349; CHECK-GI: ; %bb.0:13350; CHECK-GI-NEXT: ldr b0, [x0]13351; CHECK-GI-NEXT: mov w8, #0 ; =0x013352; CHECK-GI-NEXT: mov.b v0[1], w813353; CHECK-GI-NEXT: mov.b v0[2], w813354; CHECK-GI-NEXT: mov.b v0[3], w813355; CHECK-GI-NEXT: mov.b v0[4], w813356; CHECK-GI-NEXT: mov.b v0[5], w813357; CHECK-GI-NEXT: mov.b v0[6], w813358; CHECK-GI-NEXT: mov.b v0[7], w813359; CHECK-GI-NEXT: mov.b v0[8], w813360; CHECK-GI-NEXT: mov.b v0[9], w813361; CHECK-GI-NEXT: mov.b v0[10], w813362; CHECK-GI-NEXT: mov.b v0[11], w813363; CHECK-GI-NEXT: mov.b v0[12], w813364; CHECK-GI-NEXT: mov.b v0[13], w813365; CHECK-GI-NEXT: mov.b v0[14], w813366; CHECK-GI-NEXT: mov.b v0[15], w813367; CHECK-GI-NEXT: add x8, x0, x213368; CHECK-GI-NEXT: str x8, [x1]13369; CHECK-GI-NEXT: ret13370 %tmp1 = load i8, ptr %bar13371 %tmp2 = insertelement <16 x i8> zeroinitializer, i8 %tmp1, i32 013372 %tmp3 = getelementptr i8, ptr %bar, i64 %inc13373 store ptr %tmp3, ptr %ptr13374 ret <16 x i8> %tmp213375}13376 13377define <16 x i8> @test_v16i8_post_reg_ld1lane_undef(ptr %bar, ptr %ptr, i64 %inc) {13378; CHECK-LABEL: test_v16i8_post_reg_ld1lane_undef:13379; CHECK: ; %bb.0:13380; CHECK-NEXT: ldr b0, [x0]13381; CHECK-NEXT: add x8, x0, x213382; CHECK-NEXT: str x8, [x1]13383; CHECK-NEXT: ret13384 %tmp1 = load i8, ptr %bar13385 %tmp2 = insertelement <16 x i8> poison, i8 %tmp1, i32 013386 %tmp3 = getelementptr i8, ptr %bar, i64 %inc13387 store ptr %tmp3, ptr %ptr13388 ret <16 x i8> %tmp213389}13390 13391define <8 x i8> @test_v8i8_post_imm_ld1lane(ptr %bar, ptr %ptr, <8 x i8> %A) {13392; CHECK-SD-LABEL: test_v8i8_post_imm_ld1lane:13393; CHECK-SD: ; %bb.0:13394; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q013395; CHECK-SD-NEXT: ld1.b { v0 }[1], [x0], #113396; CHECK-SD-NEXT: str x0, [x1]13397; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q013398; CHECK-SD-NEXT: ret13399;13400; CHECK-GI-LABEL: test_v8i8_post_imm_ld1lane:13401; CHECK-GI: ; %bb.0:13402; CHECK-GI-NEXT: ldrb w8, [x0], #113403; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q013404; CHECK-GI-NEXT: str x0, [x1]13405; CHECK-GI-NEXT: mov.b v0[1], w813406; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q013407; CHECK-GI-NEXT: ret13408 %tmp1 = load i8, ptr %bar13409 %tmp2 = insertelement <8 x i8> %A, i8 %tmp1, i32 113410 %tmp3 = getelementptr i8, ptr %bar, i64 113411 store ptr %tmp3, ptr %ptr13412 ret <8 x i8> %tmp213413}13414 13415define <8 x i8> @test_v8i8_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <8 x i8> %A) {13416; CHECK-SD-LABEL: test_v8i8_post_reg_ld1lane:13417; CHECK-SD: ; %bb.0:13418; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q013419; CHECK-SD-NEXT: ld1.b { v0 }[1], [x0], x213420; CHECK-SD-NEXT: str x0, [x1]13421; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q013422; CHECK-SD-NEXT: ret13423;13424; CHECK-GI-LABEL: test_v8i8_post_reg_ld1lane:13425; CHECK-GI: ; %bb.0:13426; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q013427; CHECK-GI-NEXT: add x8, x0, x213428; CHECK-GI-NEXT: ld1.b { v0 }[1], [x0]13429; CHECK-GI-NEXT: str x8, [x1]13430; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q013431; CHECK-GI-NEXT: ret13432 %tmp1 = load i8, ptr %bar13433 %tmp2 = insertelement <8 x i8> %A, i8 %tmp1, i32 113434 %tmp3 = getelementptr i8, ptr %bar, i64 %inc13435 store ptr %tmp3, ptr %ptr13436 ret <8 x i8> %tmp213437}13438 13439define <8 x i16> @test_v8i16_post_imm_ld1lane(ptr %bar, ptr %ptr, <8 x i16> %A) {13440; CHECK-SD-LABEL: test_v8i16_post_imm_ld1lane:13441; CHECK-SD: ; %bb.0:13442; CHECK-SD-NEXT: ld1.h { v0 }[1], [x0], #213443; CHECK-SD-NEXT: str x0, [x1]13444; CHECK-SD-NEXT: ret13445;13446; CHECK-GI-LABEL: test_v8i16_post_imm_ld1lane:13447; CHECK-GI: ; %bb.0:13448; CHECK-GI-NEXT: ldrh w8, [x0], #213449; CHECK-GI-NEXT: str x0, [x1]13450; CHECK-GI-NEXT: mov.h v0[1], w813451; CHECK-GI-NEXT: ret13452 %tmp1 = load i16, ptr %bar13453 %tmp2 = insertelement <8 x i16> %A, i16 %tmp1, i32 113454 %tmp3 = getelementptr i16, ptr %bar, i64 113455 store ptr %tmp3, ptr %ptr13456 ret <8 x i16> %tmp213457}13458 13459define <8 x i16> @test_v8i16_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <8 x i16> %A) {13460; CHECK-SD-LABEL: test_v8i16_post_reg_ld1lane:13461; CHECK-SD: ; %bb.0:13462; CHECK-SD-NEXT: lsl x8, x2, #113463; CHECK-SD-NEXT: ld1.h { v0 }[1], [x0], x813464; CHECK-SD-NEXT: str x0, [x1]13465; CHECK-SD-NEXT: ret13466;13467; CHECK-GI-LABEL: test_v8i16_post_reg_ld1lane:13468; CHECK-GI: ; %bb.0:13469; CHECK-GI-NEXT: ld1.h { v0 }[1], [x0]13470; CHECK-GI-NEXT: add x8, x0, x2, lsl #113471; CHECK-GI-NEXT: str x8, [x1]13472; CHECK-GI-NEXT: ret13473 %tmp1 = load i16, ptr %bar13474 %tmp2 = insertelement <8 x i16> %A, i16 %tmp1, i32 113475 %tmp3 = getelementptr i16, ptr %bar, i64 %inc13476 store ptr %tmp3, ptr %ptr13477 ret <8 x i16> %tmp213478}13479 13480define <4 x i16> @test_v4i16_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x i16> %A) {13481; CHECK-SD-LABEL: test_v4i16_post_imm_ld1lane:13482; CHECK-SD: ; %bb.0:13483; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q013484; CHECK-SD-NEXT: ld1.h { v0 }[1], [x0], #213485; CHECK-SD-NEXT: str x0, [x1]13486; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q013487; CHECK-SD-NEXT: ret13488;13489; CHECK-GI-LABEL: test_v4i16_post_imm_ld1lane:13490; CHECK-GI: ; %bb.0:13491; CHECK-GI-NEXT: ldrh w8, [x0], #213492; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q013493; CHECK-GI-NEXT: str x0, [x1]13494; CHECK-GI-NEXT: mov.h v0[1], w813495; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q013496; CHECK-GI-NEXT: ret13497 %tmp1 = load i16, ptr %bar13498 %tmp2 = insertelement <4 x i16> %A, i16 %tmp1, i32 113499 %tmp3 = getelementptr i16, ptr %bar, i64 113500 store ptr %tmp3, ptr %ptr13501 ret <4 x i16> %tmp213502}13503 13504define <4 x i16> @test_v4i16_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x i16> %A) {13505; CHECK-SD-LABEL: test_v4i16_post_reg_ld1lane:13506; CHECK-SD: ; %bb.0:13507; CHECK-SD-NEXT: lsl x8, x2, #113508; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q013509; CHECK-SD-NEXT: ld1.h { v0 }[1], [x0], x813510; CHECK-SD-NEXT: str x0, [x1]13511; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q013512; CHECK-SD-NEXT: ret13513;13514; CHECK-GI-LABEL: test_v4i16_post_reg_ld1lane:13515; CHECK-GI: ; %bb.0:13516; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q013517; CHECK-GI-NEXT: add x8, x0, x2, lsl #113518; CHECK-GI-NEXT: ld1.h { v0 }[1], [x0]13519; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q013520; CHECK-GI-NEXT: str x8, [x1]13521; CHECK-GI-NEXT: ret13522 %tmp1 = load i16, ptr %bar13523 %tmp2 = insertelement <4 x i16> %A, i16 %tmp1, i32 113524 %tmp3 = getelementptr i16, ptr %bar, i64 %inc13525 store ptr %tmp3, ptr %ptr13526 ret <4 x i16> %tmp213527}13528 13529define <4 x i32> @test_v4i32_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x i32> %A) {13530; CHECK-SD-LABEL: test_v4i32_post_imm_ld1lane:13531; CHECK-SD: ; %bb.0:13532; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], #413533; CHECK-SD-NEXT: str x0, [x1]13534; CHECK-SD-NEXT: ret13535;13536; CHECK-GI-LABEL: test_v4i32_post_imm_ld1lane:13537; CHECK-GI: ; %bb.0:13538; CHECK-GI-NEXT: ldr w8, [x0], #413539; CHECK-GI-NEXT: str x0, [x1]13540; CHECK-GI-NEXT: mov.s v0[1], w813541; CHECK-GI-NEXT: ret13542 %tmp1 = load i32, ptr %bar13543 %tmp2 = insertelement <4 x i32> %A, i32 %tmp1, i32 113544 %tmp3 = getelementptr i32, ptr %bar, i64 113545 store ptr %tmp3, ptr %ptr13546 ret <4 x i32> %tmp213547}13548 13549define <4 x i32> @test_v4i32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x i32> %A) {13550; CHECK-SD-LABEL: test_v4i32_post_reg_ld1lane:13551; CHECK-SD: ; %bb.0:13552; CHECK-SD-NEXT: lsl x8, x2, #213553; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], x813554; CHECK-SD-NEXT: str x0, [x1]13555; CHECK-SD-NEXT: ret13556;13557; CHECK-GI-LABEL: test_v4i32_post_reg_ld1lane:13558; CHECK-GI: ; %bb.0:13559; CHECK-GI-NEXT: ld1.s { v0 }[1], [x0]13560; CHECK-GI-NEXT: add x8, x0, x2, lsl #213561; CHECK-GI-NEXT: str x8, [x1]13562; CHECK-GI-NEXT: ret13563 %tmp1 = load i32, ptr %bar13564 %tmp2 = insertelement <4 x i32> %A, i32 %tmp1, i32 113565 %tmp3 = getelementptr i32, ptr %bar, i64 %inc13566 store ptr %tmp3, ptr %ptr13567 ret <4 x i32> %tmp213568}13569 13570define <2 x i32> @test_v2i32_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x i32> %A) {13571; CHECK-SD-LABEL: test_v2i32_post_imm_ld1lane:13572; CHECK-SD: ; %bb.0:13573; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q013574; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], #413575; CHECK-SD-NEXT: str x0, [x1]13576; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q013577; CHECK-SD-NEXT: ret13578;13579; CHECK-GI-LABEL: test_v2i32_post_imm_ld1lane:13580; CHECK-GI: ; %bb.0:13581; CHECK-GI-NEXT: ldr w8, [x0], #413582; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q013583; CHECK-GI-NEXT: str x0, [x1]13584; CHECK-GI-NEXT: mov.s v0[1], w813585; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q013586; CHECK-GI-NEXT: ret13587 %tmp1 = load i32, ptr %bar13588 %tmp2 = insertelement <2 x i32> %A, i32 %tmp1, i32 113589 %tmp3 = getelementptr i32, ptr %bar, i64 113590 store ptr %tmp3, ptr %ptr13591 ret <2 x i32> %tmp213592}13593 13594define <2 x i32> @test_v2i32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x i32> %A) {13595; CHECK-SD-LABEL: test_v2i32_post_reg_ld1lane:13596; CHECK-SD: ; %bb.0:13597; CHECK-SD-NEXT: lsl x8, x2, #213598; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q013599; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], x813600; CHECK-SD-NEXT: str x0, [x1]13601; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q013602; CHECK-SD-NEXT: ret13603;13604; CHECK-GI-LABEL: test_v2i32_post_reg_ld1lane:13605; CHECK-GI: ; %bb.0:13606; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q013607; CHECK-GI-NEXT: add x8, x0, x2, lsl #213608; CHECK-GI-NEXT: ld1.s { v0 }[1], [x0]13609; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q013610; CHECK-GI-NEXT: str x8, [x1]13611; CHECK-GI-NEXT: ret13612 %tmp1 = load i32, ptr %bar13613 %tmp2 = insertelement <2 x i32> %A, i32 %tmp1, i32 113614 %tmp3 = getelementptr i32, ptr %bar, i64 %inc13615 store ptr %tmp3, ptr %ptr13616 ret <2 x i32> %tmp213617}13618 13619define <2 x i64> @test_v2i64_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x i64> %A) {13620; CHECK-SD-LABEL: test_v2i64_post_imm_ld1lane:13621; CHECK-SD: ; %bb.0:13622; CHECK-SD-NEXT: ld1.d { v0 }[1], [x0], #813623; CHECK-SD-NEXT: str x0, [x1]13624; CHECK-SD-NEXT: ret13625;13626; CHECK-GI-LABEL: test_v2i64_post_imm_ld1lane:13627; CHECK-GI: ; %bb.0:13628; CHECK-GI-NEXT: ldr x8, [x0], #813629; CHECK-GI-NEXT: str x0, [x1]13630; CHECK-GI-NEXT: mov.d v0[1], x813631; CHECK-GI-NEXT: ret13632 %tmp1 = load i64, ptr %bar13633 %tmp2 = insertelement <2 x i64> %A, i64 %tmp1, i32 113634 %tmp3 = getelementptr i64, ptr %bar, i64 113635 store ptr %tmp3, ptr %ptr13636 ret <2 x i64> %tmp213637}13638 13639define <2 x i64> @test_v2i64_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x i64> %A) {13640; CHECK-SD-LABEL: test_v2i64_post_reg_ld1lane:13641; CHECK-SD: ; %bb.0:13642; CHECK-SD-NEXT: lsl x8, x2, #313643; CHECK-SD-NEXT: ld1.d { v0 }[1], [x0], x813644; CHECK-SD-NEXT: str x0, [x1]13645; CHECK-SD-NEXT: ret13646;13647; CHECK-GI-LABEL: test_v2i64_post_reg_ld1lane:13648; CHECK-GI: ; %bb.0:13649; CHECK-GI-NEXT: ld1.d { v0 }[1], [x0]13650; CHECK-GI-NEXT: add x8, x0, x2, lsl #313651; CHECK-GI-NEXT: str x8, [x1]13652; CHECK-GI-NEXT: ret13653 %tmp1 = load i64, ptr %bar13654 %tmp2 = insertelement <2 x i64> %A, i64 %tmp1, i32 113655 %tmp3 = getelementptr i64, ptr %bar, i64 %inc13656 store ptr %tmp3, ptr %ptr13657 ret <2 x i64> %tmp213658}13659 13660define <4 x float> @test_v4f32_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x float> %A) {13661; CHECK-SD-LABEL: test_v4f32_post_imm_ld1lane:13662; CHECK-SD: ; %bb.0:13663; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], #413664; CHECK-SD-NEXT: str x0, [x1]13665; CHECK-SD-NEXT: ret13666;13667; CHECK-GI-LABEL: test_v4f32_post_imm_ld1lane:13668; CHECK-GI: ; %bb.0:13669; CHECK-GI-NEXT: ldr s1, [x0], #413670; CHECK-GI-NEXT: str x0, [x1]13671; CHECK-GI-NEXT: mov.s v0[1], v1[0]13672; CHECK-GI-NEXT: ret13673 %tmp1 = load float, ptr %bar13674 %tmp2 = insertelement <4 x float> %A, float %tmp1, i32 113675 %tmp3 = getelementptr float, ptr %bar, i64 113676 store ptr %tmp3, ptr %ptr13677 ret <4 x float> %tmp213678}13679 13680define <4 x float> @test_v4f32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x float> %A) {13681; CHECK-SD-LABEL: test_v4f32_post_reg_ld1lane:13682; CHECK-SD: ; %bb.0:13683; CHECK-SD-NEXT: lsl x8, x2, #213684; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], x813685; CHECK-SD-NEXT: str x0, [x1]13686; CHECK-SD-NEXT: ret13687;13688; CHECK-GI-LABEL: test_v4f32_post_reg_ld1lane:13689; CHECK-GI: ; %bb.0:13690; CHECK-GI-NEXT: ld1.s { v0 }[1], [x0]13691; CHECK-GI-NEXT: add x8, x0, x2, lsl #213692; CHECK-GI-NEXT: str x8, [x1]13693; CHECK-GI-NEXT: ret13694 %tmp1 = load float, ptr %bar13695 %tmp2 = insertelement <4 x float> %A, float %tmp1, i32 113696 %tmp3 = getelementptr float, ptr %bar, i64 %inc13697 store ptr %tmp3, ptr %ptr13698 ret <4 x float> %tmp213699}13700 13701define <2 x float> @test_v2f32_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x float> %A) {13702; CHECK-SD-LABEL: test_v2f32_post_imm_ld1lane:13703; CHECK-SD: ; %bb.0:13704; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q013705; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], #413706; CHECK-SD-NEXT: str x0, [x1]13707; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q013708; CHECK-SD-NEXT: ret13709;13710; CHECK-GI-LABEL: test_v2f32_post_imm_ld1lane:13711; CHECK-GI: ; %bb.0:13712; CHECK-GI-NEXT: ldr s1, [x0], #413713; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q013714; CHECK-GI-NEXT: str x0, [x1]13715; CHECK-GI-NEXT: mov.s v0[1], v1[0]13716; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q013717; CHECK-GI-NEXT: ret13718 %tmp1 = load float, ptr %bar13719 %tmp2 = insertelement <2 x float> %A, float %tmp1, i32 113720 %tmp3 = getelementptr float, ptr %bar, i64 113721 store ptr %tmp3, ptr %ptr13722 ret <2 x float> %tmp213723}13724 13725define <2 x float> @test_v2f32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x float> %A) {13726; CHECK-SD-LABEL: test_v2f32_post_reg_ld1lane:13727; CHECK-SD: ; %bb.0:13728; CHECK-SD-NEXT: lsl x8, x2, #213729; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q013730; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], x813731; CHECK-SD-NEXT: str x0, [x1]13732; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q013733; CHECK-SD-NEXT: ret13734;13735; CHECK-GI-LABEL: test_v2f32_post_reg_ld1lane:13736; CHECK-GI: ; %bb.0:13737; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q013738; CHECK-GI-NEXT: add x8, x0, x2, lsl #213739; CHECK-GI-NEXT: ld1.s { v0 }[1], [x0]13740; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q013741; CHECK-GI-NEXT: str x8, [x1]13742; CHECK-GI-NEXT: ret13743 %tmp1 = load float, ptr %bar13744 %tmp2 = insertelement <2 x float> %A, float %tmp1, i32 113745 %tmp3 = getelementptr float, ptr %bar, i64 %inc13746 store ptr %tmp3, ptr %ptr13747 ret <2 x float> %tmp213748}13749 13750define <2 x double> @test_v2f64_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x double> %A) {13751; CHECK-SD-LABEL: test_v2f64_post_imm_ld1lane:13752; CHECK-SD: ; %bb.0:13753; CHECK-SD-NEXT: ld1.d { v0 }[1], [x0], #813754; CHECK-SD-NEXT: str x0, [x1]13755; CHECK-SD-NEXT: ret13756;13757; CHECK-GI-LABEL: test_v2f64_post_imm_ld1lane:13758; CHECK-GI: ; %bb.0:13759; CHECK-GI-NEXT: ldr d1, [x0], #813760; CHECK-GI-NEXT: str x0, [x1]13761; CHECK-GI-NEXT: mov.d v0[1], v1[0]13762; CHECK-GI-NEXT: ret13763 %tmp1 = load double, ptr %bar13764 %tmp2 = insertelement <2 x double> %A, double %tmp1, i32 113765 %tmp3 = getelementptr double, ptr %bar, i64 113766 store ptr %tmp3, ptr %ptr13767 ret <2 x double> %tmp213768}13769 13770define <2 x double> @test_v2f64_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x double> %A) {13771; CHECK-SD-LABEL: test_v2f64_post_reg_ld1lane:13772; CHECK-SD: ; %bb.0:13773; CHECK-SD-NEXT: lsl x8, x2, #313774; CHECK-SD-NEXT: ld1.d { v0 }[1], [x0], x813775; CHECK-SD-NEXT: str x0, [x1]13776; CHECK-SD-NEXT: ret13777;13778; CHECK-GI-LABEL: test_v2f64_post_reg_ld1lane:13779; CHECK-GI: ; %bb.0:13780; CHECK-GI-NEXT: ld1.d { v0 }[1], [x0]13781; CHECK-GI-NEXT: add x8, x0, x2, lsl #313782; CHECK-GI-NEXT: str x8, [x1]13783; CHECK-GI-NEXT: ret13784 %tmp1 = load double, ptr %bar13785 %tmp2 = insertelement <2 x double> %A, double %tmp1, i32 113786 %tmp3 = getelementptr double, ptr %bar, i64 %inc13787 store ptr %tmp3, ptr %ptr13788 ret <2 x double> %tmp213789}13790 13791; Check for dependencies between the vector and the scalar load.13792define <4 x float> @test_v4f32_post_reg_ld1lane_dep_vec_on_load(ptr %bar, ptr %ptr, i64 %inc, ptr %dep_ptr_1, ptr %dep_ptr_2, <4 x float> %vec) {13793; CHECK-LABEL: test_v4f32_post_reg_ld1lane_dep_vec_on_load:13794; CHECK: ; %bb.0:13795; CHECK-NEXT: ldr s1, [x0]13796; CHECK-NEXT: str q0, [x3]13797; CHECK-NEXT: add x8, x0, x2, lsl #213798; CHECK-NEXT: ldr q0, [x4]13799; CHECK-NEXT: str x8, [x1]13800; CHECK-NEXT: mov.s v0[1], v1[0]13801; CHECK-NEXT: ret13802 %tmp1 = load float, ptr %bar13803 store <4 x float> %vec, ptr %dep_ptr_1, align 1613804 %A = load <4 x float>, ptr %dep_ptr_2, align 1613805 %tmp2 = insertelement <4 x float> %A, float %tmp1, i32 113806 %tmp3 = getelementptr float, ptr %bar, i64 %inc13807 store ptr %tmp3, ptr %ptr13808 ret <4 x float> %tmp213809}13810 13811; Make sure that we test the narrow V64 code path.13812; The tests above don't, because there, 64-bit insert_vector_elt nodes will be13813; widened to 128-bit before the LD1LANEpost combine has the chance to run,13814; making it avoid narrow vector types.13815; One way to trick that combine into running early is to force the vector ops13816; legalizer to run. We achieve that using the ctpop.13817; PR2326513818define <4 x i16> @test_v4i16_post_reg_ld1lane_forced_narrow(ptr %bar, ptr %ptr, i64 %inc, <4 x i16> %A, ptr %d) {13819; CHECK-SD-LABEL: test_v4i16_post_reg_ld1lane_forced_narrow:13820; CHECK-SD: ; %bb.0:13821; CHECK-SD-NEXT: lsl x8, x2, #113822; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q013823; CHECK-SD-NEXT: ld1.h { v0 }[1], [x0], x813824; CHECK-SD-NEXT: str x0, [x1]13825; CHECK-SD-NEXT: ldr d1, [x3]13826; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q013827; CHECK-SD-NEXT: cnt.8b v1, v113828; CHECK-SD-NEXT: uaddlp.4h v1, v113829; CHECK-SD-NEXT: uaddlp.2s v1, v113830; CHECK-SD-NEXT: str d1, [x3]13831; CHECK-SD-NEXT: ret13832;13833; CHECK-GI-LABEL: test_v4i16_post_reg_ld1lane_forced_narrow:13834; CHECK-GI: ; %bb.0:13835; CHECK-GI-NEXT: add x8, x0, x2, lsl #113836; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q013837; CHECK-GI-NEXT: ld1.h { v0 }[1], [x0]13838; CHECK-GI-NEXT: str x8, [x1]13839; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q013840; CHECK-GI-NEXT: ldr d1, [x3]13841; CHECK-GI-NEXT: cnt.8b v1, v113842; CHECK-GI-NEXT: uaddlp.4h v1, v113843; CHECK-GI-NEXT: uaddlp.2s v1, v113844; CHECK-GI-NEXT: str d1, [x3]13845; CHECK-GI-NEXT: ret13846 %tmp1 = load i16, ptr %bar13847 %tmp2 = insertelement <4 x i16> %A, i16 %tmp1, i32 113848 %tmp3 = getelementptr i16, ptr %bar, i64 %inc13849 store ptr %tmp3, ptr %ptr13850 %dl = load <2 x i32>, ptr %d13851 %dr = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %dl)13852 store <2 x i32> %dr, ptr %d13853 ret <4 x i16> %tmp213854}13855 13856declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>)13857 13858define void @test_ld1lane_build(ptr %ptr0, ptr %ptr1, ptr %ptr2, ptr %ptr3, ptr %out) {13859; CHECK-SD-LABEL: test_ld1lane_build:13860; CHECK-SD: ; %bb.0:13861; CHECK-SD-NEXT: ldr s0, [x2]13862; CHECK-SD-NEXT: ldr s1, [x0]13863; CHECK-SD-NEXT: ld1.s { v0 }[1], [x3]13864; CHECK-SD-NEXT: ld1.s { v1 }[1], [x1]13865; CHECK-SD-NEXT: sub.2s v0, v1, v013866; CHECK-SD-NEXT: str d0, [x4]13867; CHECK-SD-NEXT: ret13868;13869; CHECK-GI-LABEL: test_ld1lane_build:13870; CHECK-GI: ; %bb.0:13871; CHECK-GI-NEXT: ldr s0, [x0]13872; CHECK-GI-NEXT: ldr s1, [x2]13873; CHECK-GI-NEXT: ld1.s { v0 }[1], [x1]13874; CHECK-GI-NEXT: ld1.s { v1 }[1], [x3]13875; CHECK-GI-NEXT: sub.2s v0, v0, v113876; CHECK-GI-NEXT: str d0, [x4]13877; CHECK-GI-NEXT: ret13878 %load0 = load i32, ptr %ptr0, align 413879 %load1 = load i32, ptr %ptr1, align 413880 %vec0_0 = insertelement <2 x i32> undef, i32 %load0, i32 013881 %vec0_1 = insertelement <2 x i32> %vec0_0, i32 %load1, i32 113882 13883 %load2 = load i32, ptr %ptr2, align 413884 %load3 = load i32, ptr %ptr3, align 413885 %vec1_0 = insertelement <2 x i32> undef, i32 %load2, i32 013886 %vec1_1 = insertelement <2 x i32> %vec1_0, i32 %load3, i32 113887 13888 %sub = sub nsw <2 x i32> %vec0_1, %vec1_113889 store <2 x i32> %sub, ptr %out, align 1613890 ret void13891}13892 13893define void @test_ld1lane_build_i16(ptr %a, ptr %b, ptr %c, ptr %d, <4 x i16> %e, ptr %p) {13894; CHECK-LABEL: test_ld1lane_build_i16:13895; CHECK: ; %bb.0:13896; CHECK-NEXT: ldr h1, [x0]13897; CHECK-NEXT: ld1.h { v1 }[1], [x1]13898; CHECK-NEXT: ld1.h { v1 }[2], [x2]13899; CHECK-NEXT: ld1.h { v1 }[3], [x3]13900; CHECK-NEXT: sub.4h v0, v1, v013901; CHECK-NEXT: str d0, [x4]13902; CHECK-NEXT: ret13903 %ld.a = load i16, ptr %a13904 %ld.b = load i16, ptr %b13905 %ld.c = load i16, ptr %c13906 %ld.d = load i16, ptr %d13907 %v.a = insertelement <4 x i16> undef, i16 %ld.a, i64 013908 %v.b = insertelement <4 x i16> %v.a, i16 %ld.b, i64 113909 %v.c = insertelement <4 x i16> %v.b, i16 %ld.c, i64 213910 %v = insertelement <4 x i16> %v.c, i16 %ld.d, i64 313911 %sub = sub nsw <4 x i16> %v, %e13912 store <4 x i16> %sub, ptr %p13913 ret void13914}13915 13916define void @test_ld1lane_build_half(ptr %a, ptr %b, ptr %c, ptr %d, <4 x half> %e, ptr %p) {13917; CHECK-LABEL: test_ld1lane_build_half:13918; CHECK: ; %bb.0:13919; CHECK-NEXT: ldr h1, [x0]13920; CHECK-NEXT: fcvtl v0.4s, v0.4h13921; CHECK-NEXT: ld1.h { v1 }[1], [x1]13922; CHECK-NEXT: ld1.h { v1 }[2], [x2]13923; CHECK-NEXT: ld1.h { v1 }[3], [x3]13924; CHECK-NEXT: fcvtl v1.4s, v1.4h13925; CHECK-NEXT: fsub.4s v0, v1, v013926; CHECK-NEXT: fcvtn v0.4h, v0.4s13927; CHECK-NEXT: str d0, [x4]13928; CHECK-NEXT: ret13929 %ld.a = load half, ptr %a13930 %ld.b = load half, ptr %b13931 %ld.c = load half, ptr %c13932 %ld.d = load half, ptr %d13933 %v.a = insertelement <4 x half> undef, half %ld.a, i64 013934 %v.b = insertelement <4 x half> %v.a, half %ld.b, i64 113935 %v.c = insertelement <4 x half> %v.b, half %ld.c, i64 213936 %v = insertelement <4 x half> %v.c, half %ld.d, i64 313937 %sub = fsub <4 x half> %v, %e13938 store <4 x half> %sub, ptr %p13939 ret void13940}13941 13942define void @test_ld1lane_build_i8(ptr %a, ptr %b, ptr %c, ptr %d, ptr %e, ptr %f, ptr %g, ptr %h, <8 x i8> %v, ptr %p) {13943; CHECK-LABEL: test_ld1lane_build_i8:13944; CHECK: ; %bb.0:13945; CHECK-NEXT: ldr b1, [x0]13946; CHECK-NEXT: ldr x8, [sp]13947; CHECK-NEXT: ld1.b { v1 }[1], [x1]13948; CHECK-NEXT: ld1.b { v1 }[2], [x2]13949; CHECK-NEXT: ld1.b { v1 }[3], [x3]13950; CHECK-NEXT: ld1.b { v1 }[4], [x4]13951; CHECK-NEXT: ld1.b { v1 }[5], [x5]13952; CHECK-NEXT: ld1.b { v1 }[6], [x6]13953; CHECK-NEXT: ld1.b { v1 }[7], [x7]13954; CHECK-NEXT: sub.8b v0, v1, v013955; CHECK-NEXT: str d0, [x8]13956; CHECK-NEXT: ret13957 %ld.a = load i8, ptr %a13958 %ld.b = load i8, ptr %b13959 %ld.c = load i8, ptr %c13960 %ld.d = load i8, ptr %d13961 %ld.e = load i8, ptr %e13962 %ld.f = load i8, ptr %f13963 %ld.g = load i8, ptr %g13964 %ld.h = load i8, ptr %h13965 %v.a = insertelement <8 x i8> undef, i8 %ld.a, i64 013966 %v.b = insertelement <8 x i8> %v.a, i8 %ld.b, i64 113967 %v.c = insertelement <8 x i8> %v.b, i8 %ld.c, i64 213968 %v.d = insertelement <8 x i8> %v.c, i8 %ld.d, i64 313969 %v.e = insertelement <8 x i8> %v.d, i8 %ld.e, i64 413970 %v.f = insertelement <8 x i8> %v.e, i8 %ld.f, i64 513971 %v.g = insertelement <8 x i8> %v.f, i8 %ld.g, i64 613972 %v1 = insertelement <8 x i8> %v.g, i8 %ld.h, i64 713973 %sub = sub nsw <8 x i8> %v1, %v13974 store <8 x i8> %sub, ptr %p13975 ret void13976}13977 13978define <4 x i32> @test_inc_cycle(<4 x i32> %vec, ptr %in) {13979; CHECK-LABEL: test_inc_cycle:13980; CHECK: ; %bb.0:13981; CHECK-NEXT: ld1.s { v0 }[0], [x0]13982; CHECK-NEXT: adrp x9, _var@PAGE13983; CHECK-NEXT: fmov x8, d013984; CHECK-NEXT: add x8, x0, x8, lsl #213985; CHECK-NEXT: str x8, [x9, _var@PAGEOFF]13986; CHECK-NEXT: ret13987 %elt = load i32, ptr %in13988 %newvec = insertelement <4 x i32> %vec, i32 %elt, i32 013989 13990 ; %inc cannot be %elt directly because we check that the load is only13991 ; used by the insert before trying to form post-inc.13992 %inc.vec = bitcast <4 x i32> %newvec to <2 x i64>13993 %inc = extractelement <2 x i64> %inc.vec, i32 013994 %newaddr = getelementptr i32, ptr %in, i64 %inc13995 store ptr %newaddr, ptr @var13996 13997 ret <4 x i32> %newvec13998}13999 14000@var = global ptr null14001 14002define i8 @load_single_extract_variable_index_i8(ptr %A, i32 %idx) {14003; CHECK-SD-LABEL: load_single_extract_variable_index_i8:14004; CHECK-SD: ; %bb.0:14005; CHECK-SD-NEXT: sub sp, sp, #1614006; CHECK-SD-NEXT: .cfi_def_cfa_offset 1614007; CHECK-SD-NEXT: mov x8, sp14008; CHECK-SD-NEXT: ldr q0, [x0]14009; CHECK-SD-NEXT: ; kill: def $w1 killed $w1 def $x114010; CHECK-SD-NEXT: bfxil x8, x1, #0, #414011; CHECK-SD-NEXT: str q0, [sp]14012; CHECK-SD-NEXT: ldrb w0, [x8]14013; CHECK-SD-NEXT: add sp, sp, #1614014; CHECK-SD-NEXT: ret14015;14016; CHECK-GI-LABEL: load_single_extract_variable_index_i8:14017; CHECK-GI: ; %bb.0:14018; CHECK-GI-NEXT: mov w8, w114019; CHECK-GI-NEXT: and x8, x8, #0xf14020; CHECK-GI-NEXT: ldrb w0, [x0, x8]14021; CHECK-GI-NEXT: ret14022 %lv = load <16 x i8>, ptr %A14023 %e = extractelement <16 x i8> %lv, i32 %idx14024 ret i8 %e14025}14026 14027define i16 @load_single_extract_variable_index_i16(ptr %A, i32 %idx) {14028; CHECK-SD-LABEL: load_single_extract_variable_index_i16:14029; CHECK-SD: ; %bb.0:14030; CHECK-SD-NEXT: sub sp, sp, #1614031; CHECK-SD-NEXT: .cfi_def_cfa_offset 1614032; CHECK-SD-NEXT: mov x8, sp14033; CHECK-SD-NEXT: ldr q0, [x0]14034; CHECK-SD-NEXT: ; kill: def $w1 killed $w1 def $x114035; CHECK-SD-NEXT: bfi x8, x1, #1, #314036; CHECK-SD-NEXT: str q0, [sp]14037; CHECK-SD-NEXT: ldrh w0, [x8]14038; CHECK-SD-NEXT: add sp, sp, #1614039; CHECK-SD-NEXT: ret14040;14041; CHECK-GI-LABEL: load_single_extract_variable_index_i16:14042; CHECK-GI: ; %bb.0:14043; CHECK-GI-NEXT: mov w8, w114044; CHECK-GI-NEXT: and x8, x8, #0x714045; CHECK-GI-NEXT: ldrh w0, [x0, x8, lsl #1]14046; CHECK-GI-NEXT: ret14047 %lv = load <8 x i16>, ptr %A14048 %e = extractelement <8 x i16> %lv, i32 %idx14049 ret i16 %e14050}14051 14052define i32 @load_single_extract_variable_index_i32(ptr %A, i32 %idx) {14053; CHECK-SD-LABEL: load_single_extract_variable_index_i32:14054; CHECK-SD: ; %bb.0:14055; CHECK-SD-NEXT: ; kill: def $w1 killed $w1 def $x114056; CHECK-SD-NEXT: and x8, x1, #0x314057; CHECK-SD-NEXT: ldr w0, [x0, x8, lsl #2]14058; CHECK-SD-NEXT: ret14059;14060; CHECK-GI-LABEL: load_single_extract_variable_index_i32:14061; CHECK-GI: ; %bb.0:14062; CHECK-GI-NEXT: mov w8, w114063; CHECK-GI-NEXT: and x8, x8, #0x314064; CHECK-GI-NEXT: ldr w0, [x0, x8, lsl #2]14065; CHECK-GI-NEXT: ret14066 %lv = load <4 x i32>, ptr %A14067 %e = extractelement <4 x i32> %lv, i32 %idx14068 ret i32 %e14069}14070 14071define i32 @load_single_extract_variable_index_v3i32_small_align(ptr %A, i32 %idx) {14072; CHECK-LABEL: load_single_extract_variable_index_v3i32_small_align:14073; CHECK: ; %bb.0:14074; CHECK-NEXT: mov w9, w114075; CHECK-NEXT: mov w8, #2 ; =0x214076; CHECK-NEXT: cmp x9, #214077; CHECK-NEXT: csel x8, x9, x8, lo14078; CHECK-NEXT: ldr w0, [x0, x8, lsl #2]14079; CHECK-NEXT: ret14080 %lv = load <3 x i32>, ptr %A, align 214081 %e = extractelement <3 x i32> %lv, i32 %idx14082 ret i32 %e14083}14084 14085define i32 @load_single_extract_variable_index_v3i32_default_align(ptr %A, i32 %idx) {14086; CHECK-LABEL: load_single_extract_variable_index_v3i32_default_align:14087; CHECK: ; %bb.0:14088; CHECK-NEXT: mov w9, w114089; CHECK-NEXT: mov w8, #2 ; =0x214090; CHECK-NEXT: cmp x9, #214091; CHECK-NEXT: csel x8, x9, x8, lo14092; CHECK-NEXT: ldr w0, [x0, x8, lsl #2]14093; CHECK-NEXT: ret14094 %lv = load <3 x i32>, ptr %A14095 %e = extractelement <3 x i32> %lv, i32 %idx14096 ret i32 %e14097}14098 14099define i32 @load_single_extract_valid_const_index_v3i32(ptr %A, i32 %idx) {14100; CHECK-LABEL: load_single_extract_valid_const_index_v3i32:14101; CHECK: ; %bb.0:14102; CHECK-NEXT: ldr w0, [x0, #8]14103; CHECK-NEXT: ret14104 %lv = load <3 x i32>, ptr %A14105 %e = extractelement <3 x i32> %lv, i32 214106 ret i32 %e14107}14108 14109define i32 @load_single_extract_variable_index_masked_i32(ptr %A, i32 %idx) {14110; CHECK-LABEL: load_single_extract_variable_index_masked_i32:14111; CHECK: ; %bb.0:14112; CHECK-NEXT: and w8, w1, #0x314113; CHECK-NEXT: ldr w0, [x0, w8, uxtw #2]14114; CHECK-NEXT: ret14115 %idx.x = and i32 %idx, 314116 %lv = load <4 x i32>, ptr %A14117 %e = extractelement <4 x i32> %lv, i32 %idx.x14118 ret i32 %e14119}14120 14121define i32 @load_single_extract_variable_index_masked2_i32(ptr %A, i32 %idx) {14122; CHECK-LABEL: load_single_extract_variable_index_masked2_i32:14123; CHECK: ; %bb.0:14124; CHECK-NEXT: and w8, w1, #0x114125; CHECK-NEXT: ldr w0, [x0, w8, uxtw #2]14126; CHECK-NEXT: ret14127 %idx.x = and i32 %idx, 114128 %lv = load <4 x i32>, ptr %A14129 %e = extractelement <4 x i32> %lv, i32 %idx.x14130 ret i32 %e14131}14132 14133define void @chained_insert_zero(ptr noundef %fenc, ptr noundef %pred, ptr noundef %residual, i32 noundef %stride) {14134; CHECK-SD-LABEL: chained_insert_zero:14135; CHECK-SD: ; %bb.0: ; %entry14136; CHECK-SD-NEXT: ldr s0, [x1]14137; CHECK-SD-NEXT: ldr s1, [x0]14138; CHECK-SD-NEXT: ; kill: def $w3 killed $w3 def $x314139; CHECK-SD-NEXT: sxtw x8, w314140; CHECK-SD-NEXT: usubl.8h v0, v1, v014141; CHECK-SD-NEXT: str d0, [x2]14142; CHECK-SD-NEXT: ldr s0, [x0, x8]14143; CHECK-SD-NEXT: ldr s1, [x1, x8]14144; CHECK-SD-NEXT: sbfiz x8, x3, #1, #3214145; CHECK-SD-NEXT: usubl.8h v0, v0, v114146; CHECK-SD-NEXT: str d0, [x2, x8]14147; CHECK-SD-NEXT: ret14148;14149; CHECK-GI-LABEL: chained_insert_zero:14150; CHECK-GI: ; %bb.0: ; %entry14151; CHECK-GI-NEXT: ldr s0, [x0]14152; CHECK-GI-NEXT: ldr s1, [x1]14153; CHECK-GI-NEXT: ; kill: def $w3 killed $w3 def $x314154; CHECK-GI-NEXT: sxtw x8, w314155; CHECK-GI-NEXT: mov.s v0[1], wzr14156; CHECK-GI-NEXT: mov.s v1[1], wzr14157; CHECK-GI-NEXT: usubl.8h v0, v0, v114158; CHECK-GI-NEXT: str d0, [x2]14159; CHECK-GI-NEXT: ldr s0, [x0, x8]14160; CHECK-GI-NEXT: ldr s1, [x1, x8]14161; CHECK-GI-NEXT: lsl x8, x8, #114162; CHECK-GI-NEXT: mov.s v0[1], wzr14163; CHECK-GI-NEXT: mov.s v1[1], wzr14164; CHECK-GI-NEXT: usubl.8h v0, v0, v114165; CHECK-GI-NEXT: str d0, [x2, x8]14166; CHECK-GI-NEXT: ret14167entry:14168 %idx.ext = sext i32 %stride to i6414169 %0 = load i32, ptr %fenc, align 414170 %vld1_lane.i = insertelement <2 x i32> <i32 poison, i32 0>, i32 %0, i64 014171 %1 = bitcast <2 x i32> %vld1_lane.i to <8 x i8>14172 %2 = load i32, ptr %pred, align 414173 %vld1_lane.i16 = insertelement <2 x i32> <i32 poison, i32 0>, i32 %2, i64 014174 %3 = bitcast <2 x i32> %vld1_lane.i16 to <8 x i8>14175 %vmovl.i15 = zext <8 x i8> %1 to <8 x i16>14176 %vmovl.i = zext <8 x i8> %3 to <8 x i16>14177 %sub.i = sub nsw <8 x i16> %vmovl.i15, %vmovl.i14178 %shuffle.i = shufflevector <8 x i16> %sub.i, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>14179 store <4 x i16> %shuffle.i, ptr %residual, align 214180 %add.ptr = getelementptr inbounds i8, ptr %fenc, i64 %idx.ext14181 %add.ptr6 = getelementptr inbounds i8, ptr %pred, i64 %idx.ext14182 %add.ptr8 = getelementptr inbounds i16, ptr %residual, i64 %idx.ext14183 %4 = load i32, ptr %add.ptr, align 414184 %vld1_lane.i.1 = insertelement <2 x i32> <i32 poison, i32 0>, i32 %4, i64 014185 %5 = bitcast <2 x i32> %vld1_lane.i.1 to <8 x i8>14186 %6 = load i32, ptr %add.ptr6, align 414187 %vld1_lane.i16.1 = insertelement <2 x i32> <i32 poison, i32 0>, i32 %6, i64 014188 %7 = bitcast <2 x i32> %vld1_lane.i16.1 to <8 x i8>14189 %vmovl.i15.1 = zext <8 x i8> %5 to <8 x i16>14190 %vmovl.i.1 = zext <8 x i8> %7 to <8 x i16>14191 %sub.i.1 = sub nsw <8 x i16> %vmovl.i15.1, %vmovl.i.114192 %shuffle.i.1 = shufflevector <8 x i16> %sub.i.1, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>14193 store <4 x i16> %shuffle.i.1, ptr %add.ptr8, align 214194 ret void14195}14196