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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s3 4;==--------------------------------------------------------------------------==5; Tests for MOV-immediate implemented with ORR-immediate.6;==--------------------------------------------------------------------------==7 8; 64-bit immed with 32-bit pattern size, rotated by 0.9define i64 @test64_32_rot0() nounwind {10; CHECK-LABEL: test64_32_rot0:11; CHECK: // %bb.0:12; CHECK-NEXT: mov x0, #3006477107913; CHECK-NEXT: ret14 ret i64 3006477107915}16 17; 64-bit immed with 32-bit pattern size, rotated by 2.18define i64 @test64_32_rot2() nounwind {19; CHECK-LABEL: test64_32_rot2:20; CHECK: // %bb.0:21; CHECK-NEXT: mov x0, #-461168600232126054122; CHECK-NEXT: ret23 ret i64 1383505807138829107524}25 26; 64-bit immed with 4-bit pattern size, rotated by 3.27define i64 @test64_4_rot3() nounwind {28; CHECK-LABEL: test64_4_rot3:29; CHECK: // %bb.0:30; CHECK-NEXT: mov x0, #-122978293824730344231; CHECK-NEXT: ret32 ret i64 1721696113546224817433}34 35; 64-bit immed with 64-bit pattern size, many bits.36define i64 @test64_64_manybits() nounwind {37; CHECK-LABEL: test64_64_manybits:38; CHECK: // %bb.0:39; CHECK-NEXT: mov x0, #450359962730496040; CHECK-NEXT: ret41 ret i64 450359962730496042}43 44; 64-bit immed with 64-bit pattern size, one bit.45define i64 @test64_64_onebit() nounwind {46; CHECK-LABEL: test64_64_onebit:47; CHECK: // %bb.0:48; CHECK-NEXT: mov x0, #27487790694449; CHECK-NEXT: ret50 ret i64 27487790694451}52 53; 32-bit immed with 32-bit pattern size, rotated by 16.54define i32 @test32_32_rot16() nounwind {55; CHECK-LABEL: test32_32_rot16:56; CHECK: // %bb.0:57; CHECK-NEXT: mov w0, #1671168058; CHECK-NEXT: ret59 ret i32 1671168060}61 62; 32-bit immed with 2-bit pattern size, rotated by 1.63define i32 @test32_2_rot1() nounwind {64; CHECK-LABEL: test32_2_rot1:65; CHECK: // %bb.0:66; CHECK-NEXT: mov w0, #-143165576667; CHECK-NEXT: ret68 ret i32 286331153069}70 71;==--------------------------------------------------------------------------==72; Tests for MOVZ with MOVK.73;==--------------------------------------------------------------------------==74 75define i32 @movz() nounwind {76; CHECK-LABEL: movz:77; CHECK: // %bb.0:78; CHECK-NEXT: mov w0, #579; CHECK-NEXT: ret80 ret i32 581}82 83define i64 @movz_3movk() nounwind {84; CHECK-LABEL: movz_3movk:85; CHECK: // %bb.0:86; CHECK-NEXT: mov x0, #2213687; CHECK-NEXT: movk x0, #43981, lsl #1688; CHECK-NEXT: movk x0, #4660, lsl #3289; CHECK-NEXT: movk x0, #5, lsl #4890; CHECK-NEXT: ret91 ret i64 142739231351359292}93 94define i64 @movz_movk_skip1() nounwind {95; CHECK-LABEL: movz_movk_skip1:96; CHECK: // %bb.0:97; CHECK-NEXT: mov x0, #112623616098; CHECK-NEXT: movk x0, #5, lsl #3299; CHECK-NEXT: ret100 ret i64 22601072640101}102 103define i64 @movz_skip1_movk() nounwind {104; CHECK-LABEL: movz_skip1_movk:105; CHECK: // %bb.0:106; CHECK-NEXT: mov x0, #4660107; CHECK-NEXT: movk x0, #34388, lsl #32108; CHECK-NEXT: ret109 ret i64 147695335379508110}111 112define i64 @orr_lsl_pattern() nounwind {113; CHECK-LABEL: orr_lsl_pattern:114; CHECK: // %bb.0:115; CHECK-NEXT: mov x0, #-6148914691236517206116; CHECK-NEXT: and x0, x0, #0x1fffffffe0117; CHECK-NEXT: ret118 ret i64 45812984480119}120 121; FIXME: prefer "mov x0, #-16639; lsl x0, x0, #24"122define i64 @mvn_lsl_pattern() nounwind {123; CHECK-LABEL: mvn_lsl_pattern:124; CHECK: // %bb.0:125; CHECK-NEXT: mov x0, #16777216126; CHECK-NEXT: movk x0, #65471, lsl #32127; CHECK-NEXT: movk x0, #65535, lsl #48128; CHECK-NEXT: ret129 ret i64 -279156097024130}131 132; FIXME: prefer "mov w0, #-63; movk x0, #17, lsl #32"133define i64 @mvn32_pattern_2() nounwind {134; CHECK-LABEL: mvn32_pattern_2:135; CHECK: // %bb.0:136; CHECK-NEXT: mov x0, #65473137; CHECK-NEXT: movk x0, #65535, lsl #16138; CHECK-NEXT: movk x0, #17, lsl #32139; CHECK-NEXT: ret140 ret i64 77309411265141}142 143;==--------------------------------------------------------------------------==144; Tests for MOVN with MOVK.145;==--------------------------------------------------------------------------==146 147define i64 @movn() nounwind {148; CHECK-LABEL: movn:149; CHECK: // %bb.0:150; CHECK-NEXT: mov x0, #-42151; CHECK-NEXT: ret152 ret i64 -42153}154 155define i64 @movn_skip1_movk() nounwind {156; CHECK-LABEL: movn_skip1_movk:157; CHECK: // %bb.0:158; CHECK-NEXT: mov x0, #-60876159; CHECK-NEXT: movk x0, #65494, lsl #32160; CHECK-NEXT: ret161 ret i64 -176093720012162}163 164;==--------------------------------------------------------------------------==165; Tests for ORR with MOVK.166;==--------------------------------------------------------------------------==167; rdar://14987673168 169define i64 @orr_movk1() nounwind {170; CHECK-LABEL: orr_movk1:171; CHECK: // %bb.0:172; CHECK-NEXT: mov x0, #72056494543077120173; CHECK-NEXT: movk x0, #57005, lsl #16174; CHECK-NEXT: ret175 ret i64 72056498262245120176}177 178define i64 @orr_movk2() nounwind {179; CHECK-LABEL: orr_movk2:180; CHECK: // %bb.0:181; CHECK-NEXT: mov x0, #72056494543077120182; CHECK-NEXT: movk x0, #57005, lsl #48183; CHECK-NEXT: ret184 ret i64 -2400982650836746496185}186 187define i64 @orr_movk3() nounwind {188; CHECK-LABEL: orr_movk3:189; CHECK: // %bb.0:190; CHECK-NEXT: mov x0, #72056494543077120191; CHECK-NEXT: movk x0, #57005, lsl #32192; CHECK-NEXT: ret193 ret i64 72020953688702720194}195 196define i64 @orr_movk4() nounwind {197; CHECK-LABEL: orr_movk4:198; CHECK: // %bb.0:199; CHECK-NEXT: mov x0, #72056494543077120200; CHECK-NEXT: movk x0, #57005201; CHECK-NEXT: ret202 ret i64 72056494543068845203}204 205; rdar://14987618206define i64 @orr_movk5() nounwind {207; CHECK-LABEL: orr_movk5:208; CHECK: // %bb.0:209; CHECK-NEXT: mov x0, #-71777214294589696210; CHECK-NEXT: movk x0, #57005, lsl #16211; CHECK-NEXT: ret212 ret i64 -71777214836900096213}214 215define i64 @orr_movk6() nounwind {216; CHECK-LABEL: orr_movk6:217; CHECK: // %bb.0:218; CHECK-NEXT: mov x0, #-71777214294589696219; CHECK-NEXT: movk x0, #57005, lsl #16220; CHECK-NEXT: movk x0, #57005, lsl #48221; CHECK-NEXT: ret222 ret i64 -2400982647117578496223}224 225define i64 @orr_movk7() nounwind {226; CHECK-LABEL: orr_movk7:227; CHECK: // %bb.0:228; CHECK-NEXT: mov x0, #-71777214294589696229; CHECK-NEXT: movk x0, #57005, lsl #48230; CHECK-NEXT: ret231 ret i64 -2400982646575268096232}233 234define i64 @orr_movk8() nounwind {235; CHECK-LABEL: orr_movk8:236; CHECK: // %bb.0:237; CHECK-NEXT: mov x0, #-71777214294589696238; CHECK-NEXT: movk x0, #57005239; CHECK-NEXT: movk x0, #57005, lsl #48240; CHECK-NEXT: ret241 ret i64 -2400982646575276371242}243 244; rdar://14987715245define i64 @orr_movk9() nounwind {246; CHECK-LABEL: orr_movk9:247; CHECK: // %bb.0:248; CHECK-NEXT: mov x0, #1152921435887370240249; CHECK-NEXT: movk x0, #65280250; CHECK-NEXT: movk x0, #57005, lsl #16251; CHECK-NEXT: ret252 ret i64 1152921439623315200253}254 255define i64 @orr_movk10() nounwind {256; CHECK-LABEL: orr_movk10:257; CHECK: // %bb.0:258; CHECK-NEXT: mov x0, #1152921504606846720259; CHECK-NEXT: movk x0, #57005, lsl #16260; CHECK-NEXT: ret261 ret i64 1152921504047824640262}263 264define i64 @orr_movk11() nounwind {265; CHECK-LABEL: orr_movk11:266; CHECK: // %bb.0:267; CHECK-NEXT: mov x0, #-65281268; CHECK-NEXT: movk x0, #57005, lsl #16269; CHECK-NEXT: movk x0, #65520, lsl #48270; CHECK-NEXT: ret271 ret i64 -4222125209747201272}273 274define i64 @orr_movk12() nounwind {275; CHECK-LABEL: orr_movk12:276; CHECK: // %bb.0:277; CHECK-NEXT: mov x0, #-4503599627370241278; CHECK-NEXT: movk x0, #57005, lsl #32279; CHECK-NEXT: ret280 ret i64 -4258765016661761281}282 283define i64 @orr_movk13() nounwind {284; CHECK-LABEL: orr_movk13:285; CHECK: // %bb.0:286; CHECK-NEXT: mov x0, #17592169267200287; CHECK-NEXT: movk x0, #57005288; CHECK-NEXT: movk x0, #57005, lsl #48289; CHECK-NEXT: ret290 ret i64 -2401245434149282131291}292 293; rdar://13944082294define i64 @g() nounwind {295; CHECK-LABEL: g:296; CHECK: // %bb.0: // %entry297; CHECK-NEXT: mov x0, #2298; CHECK-NEXT: movk x0, #65535, lsl #48299; CHECK-NEXT: ret300entry:301 ret i64 -281474976710654302}303 304define i64 @orr_movk14() nounwind {305; CHECK-LABEL: orr_movk14:306; CHECK: // %bb.0:307; CHECK-NEXT: mov x0, #-549755813888308; CHECK-NEXT: movk x0, #2048, lsl #16309; CHECK-NEXT: ret310 ret i64 -549621596160311}312 313define i64 @orr_movk15() nounwind {314; CHECK-LABEL: orr_movk15:315; CHECK: // %bb.0:316; CHECK-NEXT: mov x0, #549755813887317; CHECK-NEXT: movk x0, #63487, lsl #16318; CHECK-NEXT: ret319 ret i64 549621596159320}321 322define i64 @orr_movk16() nounwind {323; CHECK-LABEL: orr_movk16:324; CHECK: // %bb.0:325; CHECK-NEXT: mov x0, #2147483646326; CHECK-NEXT: orr x0, x0, #0x7fffe0007fffe0327; CHECK-NEXT: ret328 ret i64 36028661727494142329}330 331define i64 @orr_movk17() nounwind {332; CHECK-LABEL: orr_movk17:333; CHECK: // %bb.0:334; CHECK-NEXT: mov x0, #-1099511627776335; CHECK-NEXT: movk x0, #65280, lsl #16336; CHECK-NEXT: ret337 ret i64 -1095233437696338}339 340define i64 @orr_movk18() nounwind {341; CHECK-LABEL: orr_movk18:342; CHECK: // %bb.0:343; CHECK-NEXT: mov x0, #137438887936344; CHECK-NEXT: movk x0, #65473345; CHECK-NEXT: ret346 ret i64 137438953409347}348 349define i64 @orr_and() nounwind {350; CHECK-LABEL: orr_and:351; CHECK: // %bb.0:352; CHECK-NEXT: mov x0, #72340172838076673353; CHECK-NEXT: and x0, x0, #0xffffffffff00354; CHECK-NEXT: ret355 ret i64 1103823438080356}357 358; FIXME: prefer "mov w0, #-1431655766; movk x0, #9, lsl #32"359define i64 @movn_movk() nounwind {360; CHECK-LABEL: movn_movk:361; CHECK: // %bb.0:362; CHECK-NEXT: mov x0, #43690363; CHECK-NEXT: movk x0, #43690, lsl #16364; CHECK-NEXT: movk x0, #9, lsl #32365; CHECK-NEXT: ret366 ret i64 41518017194367}368 369; FIXME: prefer "mov w0, #-13690; orr x0, x0, #0x1111111111111111"370define i64 @movn_orr() nounwind {371; CHECK-LABEL: movn_orr:372; CHECK: // %bb.0:373; CHECK-NEXT: mov x0, #-51847374; CHECK-NEXT: movk x0, #4369, lsl #32375; CHECK-NEXT: movk x0, #4369, lsl #48376; CHECK-NEXT: ret377 ret i64 1229782942255887737378}379 380; FIXME: prefer "mov w0, #-305397761; eor x0, x0, #0x3333333333333333"381define i64 @movn_eor() nounwind {382; CHECK-LABEL: movn_eor:383; CHECK: // %bb.0:384; CHECK-NEXT: mov x0, #3689348814741910323385; CHECK-NEXT: movk x0, #52428386; CHECK-NEXT: movk x0, #8455, lsl #16387; CHECK-NEXT: ret388 ret i64 3689348814437076172389}390 391define i64 @orr_orr_64() nounwind {392; CHECK-LABEL: orr_orr_64:393; CHECK: // %bb.0:394; CHECK-NEXT: mov x0, #536866816395; CHECK-NEXT: orr x0, x0, #0x3fff800000000000396; CHECK-NEXT: ret397 ret i64 4611545281475899392398}399 400define i64 @orr_orr_32() nounwind {401; CHECK-LABEL: orr_orr_32:402; CHECK: // %bb.0:403; CHECK-NEXT: mov x0, #558551907040256404; CHECK-NEXT: orr x0, x0, #0x1c001c001c001c00405; CHECK-NEXT: ret406 ret i64 2018171185438784512407}408 409define i64 @orr_orr_16() nounwind {410; CHECK-LABEL: orr_orr_16:411; CHECK: // %bb.0:412; CHECK-NEXT: mov x0, #1152939097061330944413; CHECK-NEXT: orr x0, x0, #0x1000100010001414; CHECK-NEXT: ret415 ret i64 1153220576333074433416}417 418define i64 @orr_orr_8() nounwind {419; CHECK-LABEL: orr_orr_8:420; CHECK: // %bb.0:421; CHECK-NEXT: mov x0, #144680345676153346422; CHECK-NEXT: orr x0, x0, #0x1818181818181818423; CHECK-NEXT: ret424 ret i64 1880844493789993498425}426 427define i64 @orr_64_orr_8() nounwind {428; CHECK-LABEL: orr_64_orr_8:429; CHECK: // %bb.0:430; CHECK-NEXT: mov x0, #-6148914691236517206431; CHECK-NEXT: orr x0, x0, #0xfffff0000000000432; CHECK-NEXT: ret433 ret i64 -5764607889538110806434}435 436define i64 @orr_2_eor_16() nounwind {437; CHECK-LABEL: orr_2_eor_16:438; CHECK: // %bb.0:439; CHECK-NEXT: mov x0, #6148914691236517205440; CHECK-NEXT: eor x0, x0, #0x3000300030003000441; CHECK-NEXT: ret442 ret i64 7301853788297848149443}444 445define i64 @orr_2_eor_32() nounwind {446; CHECK-LABEL: orr_2_eor_32:447; CHECK: // %bb.0:448; CHECK-NEXT: mov x0, #6148914691236517205449; CHECK-NEXT: eor x0, x0, #0x1fffc0001fffc0450; CHECK-NEXT: ret451 ret i64 6145912199858268821452}453 454define i64 @orr_2_eor_64() nounwind {455; CHECK-LABEL: orr_2_eor_64:456; CHECK: // %bb.0:457; CHECK-NEXT: mov x0, #6148914691236517205458; CHECK-NEXT: eor x0, x0, #0x1fffffffffc00459; CHECK-NEXT: ret460 ret i64 6148727041252043093461}462 463define i64 @orr_4_eor_8() nounwind {464; CHECK-LABEL: orr_4_eor_8:465; CHECK: // %bb.0:466; CHECK-NEXT: mov x0, #2459565876494606882467; CHECK-NEXT: eor x0, x0, #0x8f8f8f8f8f8f8f8f468; CHECK-NEXT: ret469 ret i64 12514849900987264429470}471 472define i64 @orr_4_eor_16() nounwind {473; CHECK-LABEL: orr_4_eor_16:474; CHECK: // %bb.0:475; CHECK-NEXT: mov x0, #4919131752989213764476; CHECK-NEXT: eor x0, x0, #0xf00ff00ff00ff00f477; CHECK-NEXT: ret478 ret i64 12991675787320734795479}480 481define i64 @orr_4_eor_32() nounwind {482; CHECK-LABEL: orr_4_eor_32:483; CHECK: // %bb.0:484; CHECK-NEXT: mov x0, #4919131752989213764485; CHECK-NEXT: eor x0, x0, #0x1ff800001ff80000486; CHECK-NEXT: ret487 ret i64 6610233413460575300488}489 490define i64 @orr_4_eor_64() nounwind {491; CHECK-LABEL: orr_4_eor_64:492; CHECK: // %bb.0:493; CHECK-NEXT: mov x0, #1229782938247303441494; CHECK-NEXT: eor x0, x0, #0xfff80000000495; CHECK-NEXT: ret496 ret i64 1229798183233720593497}498 499define i64 @orr_8_eor_16() nounwind {500; CHECK-LABEL: orr_8_eor_16:501; CHECK: // %bb.0:502; CHECK-NEXT: mov x0, #3472328296227680304503; CHECK-NEXT: eor x0, x0, #0x1f801f801f801f80504; CHECK-NEXT: ret505 ret i64 3436298949444513712506}507 508define i64 @orr_8_eor_32() nounwind {509; CHECK-LABEL: orr_8_eor_32:510; CHECK: // %bb.0:511; CHECK-NEXT: mov x0, #1157442765409226768512; CHECK-NEXT: eor x0, x0, #0xffff8001ffff8001513; CHECK-NEXT: ret514 ret i64 17289195901212921873515}516 517define i64 @orr_8_eor_64() nounwind {518; CHECK-LABEL: orr_8_eor_64:519; CHECK: // %bb.0:520; CHECK-NEXT: mov x0, #3472328296227680304521; CHECK-NEXT: eor x0, x0, #0x3ffffffff00000522; CHECK-NEXT: ret523 ret i64 3463215129921859632524}525 526define i64 @orr_16_eor_32() nounwind {527; CHECK-LABEL: orr_16_eor_32:528; CHECK: // %bb.0:529; CHECK-NEXT: mov x0, #1143931760365539296530; CHECK-NEXT: eor x0, x0, #0xffff0001ffff0001531; CHECK-NEXT: ret532 ret i64 17302565756451360737533}534 535define i64 @orr_16_eor_64() nounwind {536; CHECK-LABEL: orr_16_eor_64:537; CHECK: // %bb.0:538; CHECK-NEXT: mov x0, #9214505439794855904539; CHECK-NEXT: eor x0, x0, #0xfe000540; CHECK-NEXT: ret541 ret i64 9214505439795847136542}543 544define i64 @orr_32_eor_64() nounwind {545; CHECK-LABEL: orr_32_eor_64:546; CHECK: // %bb.0:547; CHECK-NEXT: mov x0, #1030792151280548; CHECK-NEXT: eor x0, x0, #0xffff8000003fffff549; CHECK-NEXT: ret550 ret i64 18446604367017541391551}552