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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc  -mtriple=arm64-none-linux-gnu -mattr=+neon -fp-contract=fast \3; RUN:        < %s -verify-machineinstrs | FileCheck %s4 5define <8x i8> @test_select_cc_v8i8_i8(i8 %a, i8 %b, <8x i8> %c, <8x i8> %d ) {6; CHECK-LABEL: test_select_cc_v8i8_i8:7; CHECK:       // %bb.0:8; CHECK-NEXT:    fmov s2, w19; CHECK-NEXT:    fmov s3, w010; CHECK-NEXT:    cmeq v2.8b, v3.8b, v2.8b11; CHECK-NEXT:    dup v2.8b, v2.b[0]12; CHECK-NEXT:    bif v0.8b, v1.8b, v2.8b13; CHECK-NEXT:    ret14  %cmp31 = icmp eq i8 %a, %b15  %e = select i1 %cmp31, <8x i8> %c, <8x i8> %d16  ret <8x i8> %e17}18 19define <8x i8> @test_select_cc_v8i8_f32(float %a, float %b, <8x i8> %c, <8x i8> %d ) {20; CHECK-LABEL: test_select_cc_v8i8_f32:21; CHECK:       // %bb.0:22; CHECK-NEXT:    // kill: def $s0 killed $s0 def $d023; CHECK-NEXT:    // kill: def $s1 killed $s1 def $d124; CHECK-NEXT:    fcmeq v0.2s, v0.2s, v1.2s25; CHECK-NEXT:    dup v0.2s, v0.s[0]26; CHECK-NEXT:    bsl v0.8b, v2.8b, v3.8b27; CHECK-NEXT:    ret28  %cmp31 = fcmp oeq float %a, %b29  %e = select i1 %cmp31, <8x i8> %c, <8x i8> %d30  ret <8x i8> %e31}32 33define <8x i8> @test_select_cc_v8i8_f64(double %a, double %b, <8x i8> %c, <8x i8> %d ) {34; CHECK-LABEL: test_select_cc_v8i8_f64:35; CHECK:       // %bb.0:36; CHECK-NEXT:    fcmeq d0, d0, d137; CHECK-NEXT:    bsl v0.8b, v2.8b, v3.8b38; CHECK-NEXT:    ret39  %cmp31 = fcmp oeq double %a, %b40  %e = select i1 %cmp31, <8x i8> %c, <8x i8> %d41  ret <8x i8> %e42}43 44define <16x i8> @test_select_cc_v16i8_i8(i8 %a, i8 %b, <16x i8> %c, <16x i8> %d ) {45; CHECK-LABEL: test_select_cc_v16i8_i8:46; CHECK:       // %bb.0:47; CHECK-NEXT:    fmov s2, w148; CHECK-NEXT:    fmov s3, w049; CHECK-NEXT:    cmeq v2.16b, v3.16b, v2.16b50; CHECK-NEXT:    dup v2.16b, v2.b[0]51; CHECK-NEXT:    bif v0.16b, v1.16b, v2.16b52; CHECK-NEXT:    ret53  %cmp31 = icmp eq i8 %a, %b54  %e = select i1 %cmp31, <16x i8> %c, <16x i8> %d55  ret <16x i8> %e56}57 58define <16x i8> @test_select_cc_v16i8_f32(float %a, float %b, <16x i8> %c, <16x i8> %d ) {59; CHECK-LABEL: test_select_cc_v16i8_f32:60; CHECK:       // %bb.0:61; CHECK-NEXT:    // kill: def $s0 killed $s0 def $q062; CHECK-NEXT:    // kill: def $s1 killed $s1 def $q163; CHECK-NEXT:    fcmeq v0.4s, v0.4s, v1.4s64; CHECK-NEXT:    dup v0.4s, v0.s[0]65; CHECK-NEXT:    bsl v0.16b, v2.16b, v3.16b66; CHECK-NEXT:    ret67  %cmp31 = fcmp oeq float %a, %b68  %e = select i1 %cmp31, <16x i8> %c, <16x i8> %d69  ret <16x i8> %e70}71 72define <16x i8> @test_select_cc_v16i8_f64(double %a, double %b, <16x i8> %c, <16x i8> %d ) {73; CHECK-LABEL: test_select_cc_v16i8_f64:74; CHECK:       // %bb.0:75; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q076; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q177; CHECK-NEXT:    fcmeq v0.2d, v0.2d, v1.2d78; CHECK-NEXT:    dup v0.2d, v0.d[0]79; CHECK-NEXT:    bsl v0.16b, v2.16b, v3.16b80; CHECK-NEXT:    ret81  %cmp31 = fcmp oeq double %a, %b82  %e = select i1 %cmp31, <16x i8> %c, <16x i8> %d83  ret <16x i8> %e84}85 86define <4x i16> @test_select_cc_v4i16(i16 %a, i16 %b, <4x i16> %c, <4x i16> %d ) {87; CHECK-LABEL: test_select_cc_v4i16:88; CHECK:       // %bb.0:89; CHECK-NEXT:    fmov s2, w190; CHECK-NEXT:    fmov s3, w091; CHECK-NEXT:    cmeq v2.4h, v3.4h, v2.4h92; CHECK-NEXT:    dup v2.4h, v2.h[0]93; CHECK-NEXT:    bif v0.8b, v1.8b, v2.8b94; CHECK-NEXT:    ret95  %cmp31 = icmp eq i16 %a, %b96  %e = select i1 %cmp31, <4x i16> %c, <4x i16> %d97  ret <4x i16> %e98}99 100define <8x i16> @test_select_cc_v8i16(i16 %a, i16 %b, <8x i16> %c, <8x i16> %d ) {101; CHECK-LABEL: test_select_cc_v8i16:102; CHECK:       // %bb.0:103; CHECK-NEXT:    fmov s2, w1104; CHECK-NEXT:    fmov s3, w0105; CHECK-NEXT:    cmeq v2.8h, v3.8h, v2.8h106; CHECK-NEXT:    dup v2.8h, v2.h[0]107; CHECK-NEXT:    bif v0.16b, v1.16b, v2.16b108; CHECK-NEXT:    ret109  %cmp31 = icmp eq i16 %a, %b110  %e = select i1 %cmp31, <8x i16> %c, <8x i16> %d111  ret <8x i16> %e112}113 114define <2x i32> @test_select_cc_v2i32(i32 %a, i32 %b, <2x i32> %c, <2x i32> %d ) {115; CHECK-LABEL: test_select_cc_v2i32:116; CHECK:       // %bb.0:117; CHECK-NEXT:    fmov s2, w1118; CHECK-NEXT:    fmov s3, w0119; CHECK-NEXT:    cmeq v2.2s, v3.2s, v2.2s120; CHECK-NEXT:    dup v2.2s, v2.s[0]121; CHECK-NEXT:    bif v0.8b, v1.8b, v2.8b122; CHECK-NEXT:    ret123  %cmp31 = icmp eq i32 %a, %b124  %e = select i1 %cmp31, <2x i32> %c, <2x i32> %d125  ret <2x i32> %e126}127 128define <4x i32> @test_select_cc_v4i32(i32 %a, i32 %b, <4x i32> %c, <4x i32> %d ) {129; CHECK-LABEL: test_select_cc_v4i32:130; CHECK:       // %bb.0:131; CHECK-NEXT:    fmov s2, w1132; CHECK-NEXT:    fmov s3, w0133; CHECK-NEXT:    cmeq v2.4s, v3.4s, v2.4s134; CHECK-NEXT:    dup v2.4s, v2.s[0]135; CHECK-NEXT:    bif v0.16b, v1.16b, v2.16b136; CHECK-NEXT:    ret137  %cmp31 = icmp eq i32 %a, %b138  %e = select i1 %cmp31, <4x i32> %c, <4x i32> %d139  ret <4x i32> %e140}141 142define <1x i64> @test_select_cc_v1i64(i64 %a, i64 %b, <1x i64> %c, <1x i64> %d ) {143; CHECK-LABEL: test_select_cc_v1i64:144; CHECK:       // %bb.0:145; CHECK-NEXT:    fmov d2, x1146; CHECK-NEXT:    fmov d3, x0147; CHECK-NEXT:    cmeq d2, d3, d2148; CHECK-NEXT:    bif v0.8b, v1.8b, v2.8b149; CHECK-NEXT:    ret150  %cmp31 = icmp eq i64 %a, %b151  %e = select i1 %cmp31, <1x i64> %c, <1x i64> %d152  ret <1x i64> %e153}154 155define <2x i64> @test_select_cc_v2i64(i64 %a, i64 %b, <2x i64> %c, <2x i64> %d ) {156; CHECK-LABEL: test_select_cc_v2i64:157; CHECK:       // %bb.0:158; CHECK-NEXT:    fmov d2, x1159; CHECK-NEXT:    fmov d3, x0160; CHECK-NEXT:    cmeq v2.2d, v3.2d, v2.2d161; CHECK-NEXT:    dup v2.2d, v2.d[0]162; CHECK-NEXT:    bif v0.16b, v1.16b, v2.16b163; CHECK-NEXT:    ret164  %cmp31 = icmp eq i64 %a, %b165  %e = select i1 %cmp31, <2x i64> %c, <2x i64> %d166  ret <2x i64> %e167}168 169define <1 x float> @test_select_cc_v1f32(float %a, float %b, <1 x float> %c, <1 x float> %d ) {170; CHECK-LABEL: test_select_cc_v1f32:171; CHECK:       // %bb.0:172; CHECK-NEXT:    // kill: def $s0 killed $s0 def $d0173; CHECK-NEXT:    // kill: def $s1 killed $s1 def $d1174; CHECK-NEXT:    fcmeq v0.2s, v0.2s, v1.2s175; CHECK-NEXT:    bsl v0.8b, v2.8b, v3.8b176; CHECK-NEXT:    ret177  %cmp31 = fcmp oeq float %a, %b178  %e = select i1 %cmp31, <1 x float> %c, <1 x float> %d179  ret <1 x float> %e180}181 182define <2 x float> @test_select_cc_v2f32(float %a, float %b, <2 x float> %c, <2 x float> %d ) {183; CHECK-LABEL: test_select_cc_v2f32:184; CHECK:       // %bb.0:185; CHECK-NEXT:    // kill: def $s0 killed $s0 def $d0186; CHECK-NEXT:    // kill: def $s1 killed $s1 def $d1187; CHECK-NEXT:    fcmeq v0.2s, v0.2s, v1.2s188; CHECK-NEXT:    dup v0.2s, v0.s[0]189; CHECK-NEXT:    bsl v0.8b, v2.8b, v3.8b190; CHECK-NEXT:    ret191  %cmp31 = fcmp oeq float %a, %b192  %e = select i1 %cmp31, <2 x float> %c, <2 x float> %d193  ret <2 x float> %e194}195 196define <4x float> @test_select_cc_v4f32(float %a, float %b, <4x float> %c, <4x float> %d ) {197; CHECK-LABEL: test_select_cc_v4f32:198; CHECK:       // %bb.0:199; CHECK-NEXT:    // kill: def $s0 killed $s0 def $q0200; CHECK-NEXT:    // kill: def $s1 killed $s1 def $q1201; CHECK-NEXT:    fcmeq v0.4s, v0.4s, v1.4s202; CHECK-NEXT:    dup v0.4s, v0.s[0]203; CHECK-NEXT:    bsl v0.16b, v2.16b, v3.16b204; CHECK-NEXT:    ret205  %cmp31 = fcmp oeq float %a, %b206  %e = select i1 %cmp31, <4x float> %c, <4x float> %d207  ret <4x float> %e208}209 210define <4x float> @test_select_cc_v4f32_icmp(i32 %a, i32 %b, <4x float> %c, <4x float> %d ) {211; CHECK-LABEL: test_select_cc_v4f32_icmp:212; CHECK:       // %bb.0:213; CHECK-NEXT:    fmov s2, w1214; CHECK-NEXT:    fmov s3, w0215; CHECK-NEXT:    cmeq v2.4s, v3.4s, v2.4s216; CHECK-NEXT:    dup v2.4s, v2.s[0]217; CHECK-NEXT:    bif v0.16b, v1.16b, v2.16b218; CHECK-NEXT:    ret219  %cmp31 = icmp eq i32 %a, %b220  %e = select i1 %cmp31, <4x float> %c, <4x float> %d221  ret <4x float> %e222}223 224define <1 x double> @test_select_cc_v1f64(double %a, double %b, <1 x double> %c, <1 x double> %d ) {225; CHECK-LABEL: test_select_cc_v1f64:226; CHECK:       // %bb.0:227; CHECK-NEXT:    fcmeq d0, d0, d1228; CHECK-NEXT:    bsl v0.8b, v2.8b, v3.8b229; CHECK-NEXT:    ret230  %cmp31 = fcmp oeq double %a, %b231  %e = select i1 %cmp31, <1 x double> %c, <1 x double> %d232  ret <1 x double> %e233}234 235define <1 x double> @test_select_cc_v1f64_icmp(i64 %a, i64 %b, <1 x double> %c, <1 x double> %d ) {236; CHECK-LABEL: test_select_cc_v1f64_icmp:237; CHECK:       // %bb.0:238; CHECK-NEXT:    fmov d2, x1239; CHECK-NEXT:    fmov d3, x0240; CHECK-NEXT:    cmeq d2, d3, d2241; CHECK-NEXT:    bif v0.8b, v1.8b, v2.8b242; CHECK-NEXT:    ret243  %cmp31 = icmp eq i64 %a, %b244  %e = select i1 %cmp31, <1 x double> %c, <1 x double> %d245  ret <1 x double> %e246}247 248define <2 x double> @test_select_cc_v2f64(double %a, double %b, <2 x double> %c, <2 x double> %d ) {249; CHECK-LABEL: test_select_cc_v2f64:250; CHECK:       // %bb.0:251; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0252; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1253; CHECK-NEXT:    fcmeq v0.2d, v0.2d, v1.2d254; CHECK-NEXT:    dup v0.2d, v0.d[0]255; CHECK-NEXT:    bsl v0.16b, v2.16b, v3.16b256; CHECK-NEXT:    ret257  %cmp31 = fcmp oeq double %a, %b258  %e = select i1 %cmp31, <2 x double> %c, <2 x double> %d259  ret <2 x double> %e260}261 262; Special case: when the select condition is an icmp with i1 operands, don't263; do the comparison on vectors.264; Part of PR21549.265define <2 x i32> @test_select_cc_v2i32_icmpi1(i1 %cc, <2 x i32> %a, <2 x i32> %b) {266; CHECK-LABEL: test_select_cc_v2i32_icmpi1:267; CHECK:       // %bb.0:268; CHECK-NEXT:    tst w0, #0x1269; CHECK-NEXT:    csetm w8, ne270; CHECK-NEXT:    dup v2.2s, w8271; CHECK-NEXT:    bif v0.8b, v1.8b, v2.8b272; CHECK-NEXT:    ret273  %cmp = icmp ne i1 %cc, 0274  %e = select i1 %cmp, <2 x i32> %a, <2 x i32> %b275  ret <2 x i32> %e276}277 278; Also make sure we support irregular/non-power-of-2 types such as v3f32.279define <3 x float> @test_select_cc_v3f32_fcmp_f32(<3 x float> %a, <3 x float> %b, float %c1, float %c2) #0 {280; CHECK-LABEL: test_select_cc_v3f32_fcmp_f32:281; CHECK:       // %bb.0:282; CHECK-NEXT:    // kill: def $s2 killed $s2 def $q2283; CHECK-NEXT:    // kill: def $s3 killed $s3 def $q3284; CHECK-NEXT:    fcmeq v2.4s, v2.4s, v3.4s285; CHECK-NEXT:    dup v2.4s, v2.s[0]286; CHECK-NEXT:    bif v0.16b, v1.16b, v2.16b287; CHECK-NEXT:    ret288  %cc = fcmp oeq float %c1, %c2289  %r = select i1 %cc, <3 x float> %a, <3 x float> %b290  ret <3 x float> %r291}292 293define <3 x float> @test_select_cc_v3f32_fcmp_f64(<3 x float> %a, <3 x float> %b, double %c1, double %c2) #0 {294; CHECK-LABEL: test_select_cc_v3f32_fcmp_f64:295; CHECK:       // %bb.0:296; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2297; CHECK-NEXT:    // kill: def $d3 killed $d3 def $q3298; CHECK-NEXT:    fcmeq v2.2d, v2.2d, v3.2d299; CHECK-NEXT:    dup v2.2d, v2.d[0]300; CHECK-NEXT:    bif v0.16b, v1.16b, v2.16b301; CHECK-NEXT:    ret302  %cc = fcmp oeq double %c1, %c2303  %r = select i1 %cc, <3 x float> %a, <3 x float> %b304  ret <3 x float> %r305}306 307attributes #0 = { nounwind}308