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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-unknown-linux -o - | FileCheck %s3 4define void @test(ptr %p1, ptr %p2) {5; CHECK-LABEL: test:6; CHECK:       // %bb.0:7; CHECK-NEXT:    mov w8, #3 // =0x38; CHECK-NEXT:    mov w9, #1 // =0x19; CHECK-NEXT:    str w8, [x0]10; CHECK-NEXT:    str w9, [x1]11; CHECK-NEXT:    ret12  %tmp = shufflevector <1 x i32> <i32 1>, <1 x i32> undef, <3 x i32> <i32 0, i32 undef, i32 undef>13  %tmp2 = shufflevector <3 x i32> <i32 2, i32 3, i32 4>, <3 x i32> %tmp, <3 x i32> <i32 0, i32 1, i32 3>14  %tmp3 = shufflevector <3 x i32> %tmp2, <3 x i32> undef, <6 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 undef, i32 undef>15  %tmp4 = shufflevector <6 x i32> undef, <6 x i32> %tmp3, <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>16  %tmp6 = extractelement <9 x i32> %tmp4, i32 717  %tmp8 = extractelement <9 x i32> %tmp4, i32 818  store i32 %tmp6, ptr %p1, align 419  store i32 %tmp8, ptr %p2, align 420  ret void21}22 23; Test case from PR4195124define <4 x i32> @widen_shuffles_reduced(<3 x i32> %x, <3 x i32> %y) {25; CHECK-LABEL: widen_shuffles_reduced:26; CHECK:       // %bb.0:27; CHECK-NEXT:    zip1 v2.4s, v0.4s, v1.4s28; CHECK-NEXT:    zip1 v0.4s, v1.4s, v0.4s29; CHECK-NEXT:    ext v0.16b, v0.16b, v2.16b, #830; CHECK-NEXT:    ret31  %s3 = shufflevector <3 x i32> %y, <3 x i32> %x, <4 x i32> <i32 1, i32 4, i32 3, i32 0>32  ret <4 x i32> %s333}34 35define void @zip_mask_check(ptr %p1, ptr %p2, ptr %p3) {36; CHECK-LABEL: zip_mask_check:37; CHECK:       // %bb.0:38; CHECK-NEXT:    ldr q0, [x0]39; CHECK-NEXT:    ldr d1, [x1]40; CHECK-NEXT:    trn2 v0.4s, v0.4s, v1.4s41; CHECK-NEXT:    fmla v0.4s, v0.4s, v0.4s42; CHECK-NEXT:    fmla v0.4s, v0.4s, v0.4s43; CHECK-NEXT:    str s0, [x2]44; CHECK-NEXT:    ret45  %tmp3 = load <3 x float>, ptr %p1, align 1646  %tmp4 = load <3 x float>, ptr %p2, align 447  %tmp5 = shufflevector <3 x float> %tmp3, <3 x float> %tmp4, <4 x i32> <i32 1, i32 4, i32 undef, i32 undef>48  %tmp6 = shufflevector <4 x float> %tmp5, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 5, i32 undef>49  %tmp7 = shufflevector <4 x float> %tmp6, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 5>50  %tmp8 = call <4 x float> @llvm.fma.v4f32(<4 x float> %tmp7, <4 x float> undef, <4 x float> undef)51  %tmp9 = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> %tmp8)52  %tmp10 = shufflevector <4 x float> %tmp9, <4 x float> undef, <16 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>53  %tmp11 = bitcast <16 x float> %tmp10 to <16 x i32>54  %tmp12 = extractelement <16 x i32> %tmp11, i32 055  store i32 %tmp12, ptr %p3, align 456  ret void57}58 59declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>) #160