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1; RUN: llc -mtriple=arm64-apple-darwin -debug-entry-values -enable-misched=0 -mcpu=cyclone < %s | FileCheck %s2; RUN: llc -mtriple=arm64-apple-darwin -debug-entry-values -enable-misched=0 -mcpu=cyclone -fast-isel -fast-isel-abort=1 < %s | FileCheck %s3 4; Trivial patchpoint codegen5;6define i64 @trivial_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {7entry:8; CHECK-LABEL: trivial_patchpoint_codegen:9; CHECK: mov x16, #24483461070848010; CHECK-NEXT: movk x16, #48879, lsl #1611; CHECK-NEXT: movk x16, #5196612; CHECK-NEXT: blr x1613; CHECK: mov x16, #24483461070848014; CHECK-NEXT: movk x16, #48879, lsl #1615; CHECK-NEXT: movk x16, #5196716; CHECK-NEXT: blr x1617; CHECK: ret18 %resolveCall2 = inttoptr i64 244837814094590 to ptr19 %result = tail call i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 2, i32 20, ptr %resolveCall2, i32 4, i64 %p1, i64 %p2, i64 %p3, i64 %p4)20 %resolveCall3 = inttoptr i64 244837814094591 to ptr21 tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 3, i32 20, ptr %resolveCall3, i32 2, i64 %p1, i64 %result)22 ret i64 %result23}24 25; Caller frame metadata with stackmaps. This should not be optimized26; as a leaf function.27;28; CHECK-LABEL: caller_meta_leaf29; CHECK: sub sp, sp, #4830; CHECK-NEXT: stp x29, x30, [sp, #32]31; CHECK-NEXT: add x29, sp, #3232; CHECK: Ltmp33; CHECK: add sp, sp, #4834; CHECK: ret35 36define void @caller_meta_leaf() {37entry:38 %metadata = alloca i64, i32 3, align 839 store i64 11, ptr %metadata40 store i64 12, ptr %metadata41 store i64 13, ptr %metadata42 call void (i64, i32, ...) @llvm.experimental.stackmap(i64 4, i32 0, ptr %metadata)43 ret void44}45 46; Test patchpoints reusing the same TargetConstant.47; <rdar:15390785> Assertion failed: (CI.getNumArgOperands() >= NumArgs + 4)48; There is no way to verify this, since it depends on memory allocation.49; But I think it's useful to include as a working example.50define i64 @testLowerConstant(i64 %arg, i64 %tmp2, i64 %tmp10, ptr %tmp33, i64 %tmp79) {51entry:52 %tmp80 = add i64 %tmp79, -1653 %tmp81 = inttoptr i64 %tmp80 to ptr54 %tmp82 = load i64, ptr %tmp81, align 855 tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 14, i32 8, i64 %arg, i64 %tmp2, i64 %tmp10, i64 %tmp82)56 tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 15, i32 32, ptr null, i32 3, i64 %arg, i64 %tmp10, i64 %tmp82)57 %tmp83 = load i64, ptr %tmp33, align 858 %tmp84 = add i64 %tmp83, -2459 %tmp85 = inttoptr i64 %tmp84 to ptr60 %tmp86 = load i64, ptr %tmp85, align 861 tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 17, i32 8, i64 %arg, i64 %tmp10, i64 %tmp86)62 tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 18, i32 32, ptr null, i32 3, i64 %arg, i64 %tmp10, i64 %tmp86)63 ret i64 1064}65 66; Test small patchpoints that don't emit calls.67define void @small_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {68entry:69; CHECK-LABEL: small_patchpoint_codegen:70; CHECK: Ltmp71; CHECK: nop72; CHECK-NEXT: nop73; CHECK-NEXT: nop74; CHECK-NEXT: nop75; CHECK-NEXT: nop76; CHECK-NEXT: ldp77; CHECK-NEXT: ret78 %result = tail call i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 20, ptr null, i32 2, i64 %p1, i64 %p2)79 ret void80}81 82; Test register allocation for an i32 result value of patchpoint.83define i32 @generic_patchpoint_i32() {84entry:85; CHECK-LABEL: generic_patchpoint_i32:86; CHECK: Ltmp87; CHECK-NEXT: nop88; The return value is already in w0.89; CHECK-NEXT: ldp90; CHECK-NEXT: ret91 %result = tail call i32 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i32(i64 5, i32 4, ptr null, i32 0)92 ret i32 %result93}94 95; Test register allocation for an i64 result value of patchpoint.96define i64 @generic_patchpoint_i64() {97entry:98; CHECK-LABEL: generic_patchpoint_i64:99; CHECK: Ltmp100; CHECK-NEXT: nop101; The return value is already in x0.102; CHECK-NEXT: ldp103; CHECK-NEXT: ret104 %result = tail call i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 4, ptr null, i32 0)105 ret i64 %result106}107 108; Test register allocation for a ptr result value of patchpoint.109define ptr @generic_patchpoint_p0() {110entry:111; CHECK-LABEL: generic_patchpoint_p0:112; CHECK: Ltmp113; CHECK-NEXT: nop114; The return value is already in x0.115; CHECK-NEXT: ldp116; CHECK-NEXT: ret117 %result = tail call ptr (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.p0(i64 5, i32 4, ptr null, i32 0)118 ret ptr %result119}120 121; Test register allocation for a half result value of patchpoint.122define half @generic_patchpoint_f16() {123entry:124; CHECK-LABEL: generic_patchpoint_f16:125; CHECK: Ltmp126; CHECK-NEXT: nop127; The return value is already in h0.128; CHECK-NEXT: ldp129; CHECK-NEXT: ret130 %result = tail call half (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.f16(i64 5, i32 4, ptr null, i32 0)131 ret half %result132}133 134; Test register allocation for a float result value of patchpoint.135define float @generic_patchpoint_f32() {136entry:137; CHECK-LABEL: generic_patchpoint_f32:138; CHECK: Ltmp139; CHECK-NEXT: nop140; The return value is already in s0.141; CHECK-NEXT: ldp142; CHECK-NEXT: ret143 %result = tail call float (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.f32(i64 5, i32 4, ptr null, i32 0)144 ret float %result145}146 147; Test register allocation for a double result value of patchpoint.148define double @generic_patchpoint_f64() {149entry:150; CHECK-LABEL: generic_patchpoint_f64:151; CHECK: Ltmp152; CHECK-NEXT: nop153; The return value is already in d0.154; CHECK-NEXT: ldp155; CHECK-NEXT: ret156 %result = tail call double (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.f64(i64 5, i32 4, ptr null, i32 0)157 ret double %result158}159 160; Test register allocation for a <16 x i8> result value of patchpoint.161define <16 x i8> @generic_patchpoint_v16i8() {162entry:163; CHECK-LABEL: generic_patchpoint_v16i8:164; CHECK: Ltmp165; CHECK-NEXT: nop166; The return value is already in v0.16b.167; CHECK-NEXT: ldp168; CHECK-NEXT: ret169 %result = tail call <16 x i8> (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.v16i8(i64 5, i32 4, ptr null, i32 0)170 ret <16 x i8> %result171}172 173; Test register allocation for a <4 x i32> result value of patchpoint.174define <4 x i32> @generic_patchpoint_v4i32() {175entry:176; CHECK-LABEL: generic_patchpoint_v4i32:177; CHECK: Ltmp178; CHECK-NEXT: nop179; The return value is already in v0.4s.180; CHECK-NEXT: ldp181; CHECK-NEXT: ret182 %result = tail call <4 x i32> (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.v4i32(i64 5, i32 4, ptr null, i32 0)183 ret <4 x i32> %result184}185 186; Test register allocation for a <4 x float> result value of patchpoint.187define <4 x float> @generic_patchpoint_v4f32() {188entry:189; CHECK-LABEL: generic_patchpoint_v4f32:190; CHECK: Ltmp191; CHECK-NEXT: nop192; The return value is already in v0.4s.193; CHECK-NEXT: ldp194; CHECK-NEXT: ret195 %result = tail call <4 x float> (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.v4f32(i64 5, i32 4, ptr null, i32 0)196 ret <4 x float> %result197}198 199; Test register allocation for a <2 x double> result value of patchpoint.200define <2 x double> @generic_patchpoint_v2f64() {201entry:202; CHECK-LABEL: generic_patchpoint_v2f64:203; CHECK: Ltmp204; CHECK-NEXT: nop205; The return value is already in v0.2d.206; CHECK-NEXT: ldp207; CHECK-NEXT: ret208 %result = tail call <2 x double> (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.v2f64(i64 5, i32 4, ptr null, i32 0)209 ret <2 x double> %result210}211 212declare void @llvm.experimental.stackmap(i64, i32, ...)213declare void @llvm.experimental.patchpoint.void(i64, i32, ptr, i32, ...)214declare i32 @llvm.experimental.patchpoint.i32(i64, i32, ptr, i32, ...)215declare i64 @llvm.experimental.patchpoint.i64(i64, i32, ptr, i32, ...)216declare ptr @llvm.experimental.patchpoint.p0(i64, i32, ptr, i32, ...)217declare half @llvm.experimental.patchpoint.f16(i64, i32, ptr, i32, ...)218declare float @llvm.experimental.patchpoint.f32(i64, i32, ptr, i32, ...)219declare double @llvm.experimental.patchpoint.f64(i64, i32, ptr, i32, ...)220declare <16 x i8> @llvm.experimental.patchpoint.v16i8(i64, i32, ptr, i32, ...)221declare <4 x i32> @llvm.experimental.patchpoint.v4i32(i64, i32, ptr, i32, ...)222declare <4 x float> @llvm.experimental.patchpoint.v4f32(i64, i32, ptr, i32, ...)223declare <2 x double> @llvm.experimental.patchpoint.v2f64(i64, i32, ptr, i32, ...)224