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1; RUN: llc -O0 --mtriple=aarch64 -verify-machineinstrs --filetype=asm %s -o - 2>&1 | FileCheck %s2; RUN: llc -O1 --mtriple=aarch64 -verify-machineinstrs --filetype=asm %s -o - 2>&1 | FileCheck %s3; RUN: llc -O2 --mtriple=aarch64 -verify-machineinstrs --filetype=asm %s -o - 2>&1 | FileCheck %s4target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"5target triple = "aarch64-unknown-linux-gnu"6 7declare void @normal_cc()8 9; Caller: preserve_mostcc; callee: normalcc. Normally callee saved registers10; x9~x15 need to be spilled. Since most of them will be spilled in pairs in11; reverse order, we only check the odd number ones due to FileCheck not12; matching the same line of assembly twice.13; CHECK-LABEL: preserve_most14; CHECK-DAG: {{st[rp]}} {{(x[0-9]+, )?x9(, x[0-9]+)?}}, [sp, #{{[-0-9]+}}]15; CHECK-DAG: {{st[rp]}} {{(x[0-9]+, )?x11(, x[0-9]+)?}}, [sp, #{{[-0-9]+}}]16; CHECK-DAG: {{st[rp]}} {{(x[0-9]+, )?x13(, x[0-9]+)?}}, [sp, #{{[-0-9]+}}]17; CHECK-DAG: {{st[rp]}} {{(x[0-9]+, )?x15(, x[0-9]+)?}}, [sp, #{{[-0-9]+}}]18define preserve_mostcc void @preserve_most() {19 call void @normal_cc()20 ret void21}22 23; Caller: normalcc; callee: preserve_mostcc. x9 does not need to be spilled.24; The same holds for x10 through x15, but we only check x9.25; CHECK-LABEL: normal_cc_caller26; CHECK-NOT: stp {{x[0-9]+}}, x9, [sp, #{{[-0-9]+}}]27; CHECK-NOT: stp x9, {{x[0-9]+}}, [sp, #{{[-0-9]+}}]28; CHECK-NOT: str x9, [sp, {{#[-0-9]+}}]29define dso_local void @normal_cc_caller() {30entry:31 %v = alloca i32, align 432 call void asm sideeffect "mov x9, $0", "N,~{x9}"(i32 48879) #233 call preserve_mostcc void @preserve_most()34 %0 = load i32, ptr %v, align 435 %1 = call i32 asm sideeffect "mov ${0:w}, w9", "=r,r"(i32 %0) #236 store i32 %1, ptr %v, align 437 ret void38}39