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1; Disable machine cse to stress the different path of the algorithm.2; Otherwise, we always fall in the simple case, i.e., only one definition.3; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-machine-cse -aarch64-stress-promote-const -mcpu=cyclone -verify-machineinstrs | FileCheck -check-prefix=PROMOTED %s4; The REGULAR run just checks that the inputs passed to promote const expose5; the appropriate patterns.6; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-machine-cse -aarch64-enable-promote-const=false -mcpu=cyclone -verify-machineinstrs | FileCheck -check-prefix=REGULAR %s7 8%struct.uint8x16x4_t = type { [4 x <16 x i8>] }9 10; Constant is a structure11define %struct.uint8x16x4_t @test1() {12; PROMOTED-LABEL: test1:13; Promote constant has created a big constant for the whole structure14; PROMOTED: adrp [[PAGEADDR:x[0-9]+]], __PromotedConst@PAGE15; PROMOTED: add [[BASEADDR:x[0-9]+]], [[PAGEADDR]], __PromotedConst@PAGEOFF16; Destination registers are defined by the ABI17; PROMOTED-NEXT: ldp q0, q1, [[[BASEADDR]]]18; PROMOTED-NEXT: ldp q2, q3, [[[BASEADDR]], #32]19; PROMOTED-NEXT: ret20 21; REGULAR-LABEL: test1:22; Regular access is quite bad, it performs 4 loads, one for each chunk of23; the structure24; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL:lCP.*]]@PAGE25; Destination registers are defined by the ABI26; REGULAR: ldr q0, [[[PAGEADDR]], [[CSTLABEL]]@PAGEOFF]27; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL:lCP.*]]@PAGE28; REGULAR: ldr q1, [[[PAGEADDR]], [[CSTLABEL]]@PAGEOFF]29; REGULAR: adrp [[PAGEADDR2:x[0-9]+]], [[CSTLABEL2:lCP.*]]@PAGE30; REGULAR: ldr q2, [[[PAGEADDR2]], [[CSTLABEL2]]@PAGEOFF]31; REGULAR: adrp [[PAGEADDR3:x[0-9]+]], [[CSTLABEL3:lCP.*]]@PAGE32; REGULAR: ldr q3, [[[PAGEADDR3]], [[CSTLABEL3]]@PAGEOFF]33; REGULAR-NEXT: ret34entry:35 ret %struct.uint8x16x4_t { [4 x <16 x i8>] [<16 x i8> <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -115, i8 -119, i8 -120, i8 34, i8 -124, i8 0, i8 -128>, <16 x i8> <i8 32, i8 124, i8 121, i8 120, i8 8, i8 117, i8 -56, i8 113, i8 -76, i8 110, i8 -53, i8 107, i8 7, i8 105, i8 103, i8 102>, <16 x i8> <i8 -24, i8 99, i8 -121, i8 97, i8 66, i8 95, i8 24, i8 93, i8 6, i8 91, i8 12, i8 89, i8 39, i8 87, i8 86, i8 85>, <16 x i8> <i8 -104, i8 83, i8 -20, i8 81, i8 81, i8 80, i8 -59, i8 78, i8 73, i8 77, i8 -37, i8 75, i8 122, i8 74, i8 37, i8 73>] }36}37 38; Two different uses of the same constant in the same basic block39define <16 x i8> @test2(<16 x i8> %arg) {40entry:41; PROMOTED-LABEL: test2:42; In stress mode, constant vector are promoted43; PROMOTED: adrp [[PAGEADDR:x[0-9]+]], [[CSTV1:__PromotedConst.[0-9]+]]@PAGE44; PROMOTED: ldr q[[REGNUM:[0-9]+]], [[[PAGEADDR]], [[CSTV1]]@PAGEOFF]45; Destination register is defined by ABI46; PROMOTED-NEXT: add.16b v0, v0, v[[REGNUM]]47; PROMOTED-NEXT: mls.16b v0, v0, v[[REGNUM]]48; PROMOTED-NEXT: ret49 50; REGULAR-LABEL: test2:51; Regular access is strickly the same as promoted access.52; The difference is that the address (and thus the space in memory) is not53; shared between constants54; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL:lCP.*]]@PAGE55; REGULAR: ldr q[[REGNUM:[0-9]+]], [[[PAGEADDR]], [[CSTLABEL]]@PAGEOFF]56; Destination register is defined by ABI57; REGULAR-NEXT: add.16b v0, v0, v[[REGNUM]]58; REGULAR-NEXT: mls.16b v0, v0, v[[REGNUM]]59; REGULAR-NEXT: ret60 %add.i = add <16 x i8> %arg, <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -115, i8 -119, i8 -120, i8 34, i8 -124, i8 0, i8 -128>61 %mul.i = mul <16 x i8> %add.i, <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -115, i8 -119, i8 -120, i8 34, i8 -124, i8 0, i8 -128>62 %sub.i9 = sub <16 x i8> %add.i, %mul.i63 ret <16 x i8> %sub.i964}65 66; Two different uses of the same constant in two different basic blocks,67; one dominates the other68define <16 x i8> @test3(<16 x i8> %arg, i32 %path) {69; PROMOTED-LABEL: test3:70; In stress mode, constant vector are promoted71; Since, the constant is the same as the previous function,72; the same address must be used73; PROMOTED: ldr74; PROMOTED: ldr75; PROMOTED-NOT: ldr76; PROMOTED: ret77 78; REGULAR-LABEL: test3:79; REGULAR: ldr80; REGULAR: ldr81; REGULAR-NOT: ldr82; REGULAR: ret83entry:84 %add.i = add <16 x i8> %arg, <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -115, i8 -119, i8 -120, i8 34, i8 -124, i8 0, i8 -128>85 %tobool = icmp eq i32 %path, 086 br i1 %tobool, label %if.else, label %if.then87 88if.then: ; preds = %entry89 %mul.i13 = mul <16 x i8> %add.i, <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -115, i8 -119, i8 -120, i8 34, i8 -124, i8 0, i8 -128>90 br label %if.end91 92if.else: ; preds = %entry93 %mul.i = mul <16 x i8> %add.i, <i8 -24, i8 99, i8 -121, i8 97, i8 66, i8 95, i8 24, i8 93, i8 6, i8 91, i8 12, i8 89, i8 39, i8 87, i8 86, i8 85>94 br label %if.end95 96if.end: ; preds = %if.else, %if.then97 %ret2.0 = phi <16 x i8> [ %mul.i13, %if.then ], [ %mul.i, %if.else ]98 %add.i12 = add <16 x i8> %add.i, %ret2.099 ret <16 x i8> %add.i12100}101 102; Two different uses of the sane constant in two different basic blocks,103; none dominates the other104define <16 x i8> @test4(<16 x i8> %arg, i32 %path) {105; PROMOTED-LABEL: test4:106; In stress mode, constant vector are promoted107; Since, the constant is the same as the previous function,108; the same address must be used109; PROMOTED: ldr110; PROMOTED-NOT: ldr111; PROMOTED: ret112 113; REGULAR-LABEL: test4:114; REGULAR: ldr115; REGULAR-NOT: ldr116; REGULAR: ret117entry:118 %add.i = add <16 x i8> %arg, <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -115, i8 -119, i8 -120, i8 34, i8 -124, i8 0, i8 -128>119 %tobool = icmp eq i32 %path, 0120 br i1 %tobool, label %if.end, label %if.then121 122if.then: ; preds = %entry123 %mul.i = mul <16 x i8> %add.i, <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -115, i8 -119, i8 -120, i8 34, i8 -124, i8 0, i8 -128>124 br label %if.end125 126if.end: ; preds = %entry, %if.then127 %ret.0 = phi <16 x i8> [ %mul.i, %if.then ], [ %add.i, %entry ]128 ret <16 x i8> %ret.0129}130 131; Two different uses of the sane constant in two different basic blocks,132; one is in a phi.133define <16 x i8> @test5(<16 x i8> %arg, i32 %path) {134; PROMOTED-LABEL: test5:135; In stress mode, constant vector are promoted136; Since, the constant is the same as the previous function,137; the same address must be used138; PROMOTED: ldr139; PROMOTED-NOT: ldr140; PROMOTED: ret141 142; REGULAR-LABEL: test5:143; REGULAR: ldr144; REGULAR: ret145entry:146 %tobool = icmp eq i32 %path, 0147 br i1 %tobool, label %if.end, label %if.then148 149if.then: ; preds = %entry150 %add.i = add <16 x i8> %arg, <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -115, i8 -119, i8 -120, i8 34, i8 -124, i8 0, i8 -128>151 %mul.i26 = mul <16 x i8> %add.i, <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -115, i8 -119, i8 -120, i8 34, i8 -124, i8 0, i8 -128>152 br label %if.end153 154if.end: ; preds = %entry, %if.then155 %ret.0 = phi <16 x i8> [ %mul.i26, %if.then ], [ <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -115, i8 -119, i8 -120, i8 34, i8 -124, i8 0, i8 -128>, %entry ]156 %mul.i25 = mul <16 x i8> %ret.0, %ret.0157 %mul.i24 = mul <16 x i8> %mul.i25, %mul.i25158 %mul.i23 = mul <16 x i8> %mul.i24, %mul.i24159 %mul.i = mul <16 x i8> %mul.i23, %mul.i23160 ret <16 x i8> %mul.i161}162 163define void @accessBig(ptr %storage) {164; PROMOTED-LABEL: accessBig:165; PROMOTED: adrp166; PROMOTED: ret167 store <1 x i80> <i80 483673642326615442599424>, ptr %storage168 ret void169}170 171define void @asmStatement() {172; PROMOTED-LABEL: asmStatement:173; PROMOTED-NOT: adrp174; PROMOTED: ret175 call void asm sideeffect "bfxil w0, w0, $0, $1", "i,i"(i32 28, i32 4)176 ret void177}178 179