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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -O3 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64-linux-gnu -O3 -global-isel < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5; This used to miscompile:6; The 16-bit -1 should not become 32-bit -1 (sub w8, w8, #1).7 8@g = global i16 0, align 49define i32 @srl_and() {10; CHECK-SD-LABEL: srl_and:11; CHECK-SD: // %bb.0: // %entry12; CHECK-SD-NEXT: adrp x8, :got:g13; CHECK-SD-NEXT: mov w9, #50 // =0x3214; CHECK-SD-NEXT: ldr x8, [x8, :got_lo12:g]15; CHECK-SD-NEXT: ldrh w8, [x8]16; CHECK-SD-NEXT: eor w8, w8, w917; CHECK-SD-NEXT: mov w9, #65535 // =0xffff18; CHECK-SD-NEXT: add w8, w8, w919; CHECK-SD-NEXT: and w0, w8, w8, lsr #1620; CHECK-SD-NEXT: ret21;22; CHECK-GI-LABEL: srl_and:23; CHECK-GI: // %bb.0: // %entry24; CHECK-GI-NEXT: adrp x8, :got:g25; CHECK-GI-NEXT: mov w9, #50 // =0x3226; CHECK-GI-NEXT: ldr x8, [x8, :got_lo12:g]27; CHECK-GI-NEXT: ldrh w8, [x8]28; CHECK-GI-NEXT: eor w8, w8, w929; CHECK-GI-NEXT: mov w9, #65535 // =0xffff30; CHECK-GI-NEXT: add w8, w9, w8, uxth31; CHECK-GI-NEXT: and w9, w8, #0xffff32; CHECK-GI-NEXT: cmp w8, w933; CHECK-GI-NEXT: cset w8, ne34; CHECK-GI-NEXT: and w0, w9, w835; CHECK-GI-NEXT: ret36entry:37 %0 = load i16, ptr @g, align 438 %1 = xor i16 %0, 5039 %tobool = icmp ne i16 %1, 040 %lor.ext = zext i1 %tobool to i3241 %sub = add i16 %1, -142 43 %srl = zext i16 %sub to i3244 %and = and i32 %srl, %lor.ext45 46 ret i32 %and47}48;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:49; CHECK: {{.*}}50