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1; RUN: llc < %s -mtriple=arm64-apple-ios7.0 | FileCheck %s2; rdar://13214163 - Make sure we generate a correct lookup table for the TBL3; instruction when the element size of the vector is not 8 bits. We were4; getting both the endianness wrong and the element indexing wrong.5define <8 x i16> @foo(<8 x i16> %a) nounwind readnone {6; CHECK: .section __TEXT,__literal16,16byte_literals7; CHECK: .p2align 48; CHECK:lCPI0_0:9; CHECK: .byte 0 ; 0x010; CHECK: .byte 1 ; 0x111; CHECK: .byte 0 ; 0x012; CHECK: .byte 1 ; 0x113; CHECK: .byte 0 ; 0x014; CHECK: .byte 1 ; 0x115; CHECK: .byte 0 ; 0x016; CHECK: .byte 1 ; 0x117; CHECK: .byte 8 ; 0x818; CHECK: .byte 9 ; 0x919; CHECK: .byte 8 ; 0x820; CHECK: .byte 9 ; 0x921; CHECK: .byte 8 ; 0x822; CHECK: .byte 9 ; 0x923; CHECK: .byte 8 ; 0x824; CHECK: .byte 9 ; 0x925; CHECK: .section __TEXT,__text,regular,pure_instructions26; CHECK: .globl _foo27; CHECK: .p2align 228; CHECK:_foo: ; @foo29; CHECK: adrp [[BASE:x[0-9]+]], lCPI0_0@PAGE30; CHECK: ldr q[[REG:[0-9]+]], [[[BASE]], lCPI0_0@PAGEOFF]31; CHECK: tbl.16b v0, { v0 }, v[[REG]]32; CHECK: ret33 34 %val = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>35 ret <8 x i16> %val36}37