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1; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s2 3define i64 @test_vaddlv_s32(<2 x i32> %a1) nounwind readnone {4; CHECK: test_vaddlv_s325; CHECK: saddlp.1d v[[REGNUM:[0-9]+]], v[[INREG:[0-9]+]]6; CHECK-NEXT: fmov x[[OUTREG:[0-9]+]], d[[REGNUM]]7; CHECK-NEXT: ret8entry:9 %vaddlv.i = tail call i64 @llvm.aarch64.neon.saddlv.i64.v2i32(<2 x i32> %a1) nounwind10 ret i64 %vaddlv.i11}12 13define i64 @test_vaddlv_u32(<2 x i32> %a1) nounwind readnone {14; CHECK: test_vaddlv_u3215; CHECK: uaddlp.1d v[[REGNUM:[0-9]+]], v[[INREG:[0-9]+]]16; CHECK-NEXT: fmov x[[OUTREG:[0-9]+]], d[[REGNUM]]17; CHECK-NEXT: ret18entry:19 %vaddlv.i = tail call i64 @llvm.aarch64.neon.uaddlv.i64.v2i32(<2 x i32> %a1) nounwind20 ret i64 %vaddlv.i21}22 23declare i64 @llvm.aarch64.neon.uaddlv.i64.v2i32(<2 x i32>) nounwind readnone24 25declare i64 @llvm.aarch64.neon.saddlv.i64.v2i32(<2 x i32>) nounwind readnone26 27