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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -verify-machineinstrs | FileCheck %s3 4; rdar://94285795 6%type1 = type { <16 x i8> }7%type2 = type { <8 x i8> }8%type3 = type { <4 x i16> }9 10 11define hidden fastcc void @t1(ptr %argtable) nounwind {12; CHECK-LABEL: t1:13; CHECK: // %bb.0: // %entry14; CHECK-NEXT: movi.2d v0, #000000000000000015; CHECK-NEXT: ldr x8, [x0]16; CHECK-NEXT: str q0, [x8]17; CHECK-NEXT: ret18entry:19 %tmp1 = load ptr, ptr %argtable, align 820 store <16 x i8> zeroinitializer, ptr %tmp1, align 1621 ret void22}23 24define hidden fastcc void @t2(ptr %argtable) nounwind {25; CHECK-LABEL: t2:26; CHECK: // %bb.0: // %entry27; CHECK-NEXT: movi.2d v0, #000000000000000028; CHECK-NEXT: ldr x8, [x0]29; CHECK-NEXT: str d0, [x8]30; CHECK-NEXT: ret31entry:32 %tmp1 = load ptr, ptr %argtable, align 833 store <8 x i8> zeroinitializer, ptr %tmp1, align 834 ret void35}36 37; add a bunch of tests for rdar://1124628938 39@globalArray64x2 = common global ptr null, align 840@globalArray32x4 = common global ptr null, align 841@globalArray16x8 = common global ptr null, align 842@globalArray8x16 = common global ptr null, align 843@globalArray64x1 = common global ptr null, align 844@globalArray32x2 = common global ptr null, align 845@globalArray16x4 = common global ptr null, align 846@globalArray8x8 = common global ptr null, align 847@floatglobalArray64x2 = common global ptr null, align 848@floatglobalArray32x4 = common global ptr null, align 849@floatglobalArray64x1 = common global ptr null, align 850@floatglobalArray32x2 = common global ptr null, align 851 52define void @fct1_64x2(ptr nocapture %array, i64 %offset) nounwind ssp {53; CHECK-LABEL: fct1_64x2:54; CHECK: // %bb.0: // %entry55; CHECK-NEXT: adrp x8, :got:globalArray64x256; CHECK-NEXT: lsl x9, x1, #457; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray64x2]58; CHECK-NEXT: ldr q0, [x0, x9]59; CHECK-NEXT: ldr x8, [x8]60; CHECK-NEXT: str q0, [x8, x9]61; CHECK-NEXT: ret62entry:63 %arrayidx = getelementptr inbounds <2 x i64>, ptr %array, i64 %offset64 %tmp = load <2 x i64>, ptr %arrayidx, align 1665 %tmp1 = load ptr, ptr @globalArray64x2, align 866 %arrayidx1 = getelementptr inbounds <2 x i64>, ptr %tmp1, i64 %offset67 store <2 x i64> %tmp, ptr %arrayidx1, align 1668 ret void69}70 71define void @fct2_64x2(ptr nocapture %array) nounwind ssp {72; CHECK-LABEL: fct2_64x2:73; CHECK: // %bb.0: // %entry74; CHECK-NEXT: adrp x8, :got:globalArray64x275; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray64x2]76; CHECK-NEXT: ldr q0, [x0, #48]77; CHECK-NEXT: ldr x8, [x8]78; CHECK-NEXT: str q0, [x8, #80]79; CHECK-NEXT: ret80entry:81 %arrayidx = getelementptr inbounds <2 x i64>, ptr %array, i64 382 %tmp = load <2 x i64>, ptr %arrayidx, align 1683 %tmp1 = load ptr, ptr @globalArray64x2, align 884 %arrayidx1 = getelementptr inbounds <2 x i64>, ptr %tmp1, i64 585 store <2 x i64> %tmp, ptr %arrayidx1, align 1686 ret void87}88 89define void @fct1_32x4(ptr nocapture %array, i64 %offset) nounwind ssp {90; CHECK-LABEL: fct1_32x4:91; CHECK: // %bb.0: // %entry92; CHECK-NEXT: adrp x8, :got:globalArray32x493; CHECK-NEXT: lsl x9, x1, #494; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray32x4]95; CHECK-NEXT: ldr q0, [x0, x9]96; CHECK-NEXT: ldr x8, [x8]97; CHECK-NEXT: str q0, [x8, x9]98; CHECK-NEXT: ret99entry:100 %arrayidx = getelementptr inbounds <4 x i32>, ptr %array, i64 %offset101 %tmp = load <4 x i32>, ptr %arrayidx, align 16102 %tmp1 = load ptr, ptr @globalArray32x4, align 8103 %arrayidx1 = getelementptr inbounds <4 x i32>, ptr %tmp1, i64 %offset104 store <4 x i32> %tmp, ptr %arrayidx1, align 16105 ret void106}107 108define void @fct2_32x4(ptr nocapture %array) nounwind ssp {109; CHECK-LABEL: fct2_32x4:110; CHECK: // %bb.0: // %entry111; CHECK-NEXT: adrp x8, :got:globalArray32x4112; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray32x4]113; CHECK-NEXT: ldr q0, [x0, #48]114; CHECK-NEXT: ldr x8, [x8]115; CHECK-NEXT: str q0, [x8, #80]116; CHECK-NEXT: ret117entry:118 %arrayidx = getelementptr inbounds <4 x i32>, ptr %array, i64 3119 %tmp = load <4 x i32>, ptr %arrayidx, align 16120 %tmp1 = load ptr, ptr @globalArray32x4, align 8121 %arrayidx1 = getelementptr inbounds <4 x i32>, ptr %tmp1, i64 5122 store <4 x i32> %tmp, ptr %arrayidx1, align 16123 ret void124}125 126define void @fct1_16x8(ptr nocapture %array, i64 %offset) nounwind ssp {127; CHECK-LABEL: fct1_16x8:128; CHECK: // %bb.0: // %entry129; CHECK-NEXT: adrp x8, :got:globalArray16x8130; CHECK-NEXT: lsl x9, x1, #4131; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray16x8]132; CHECK-NEXT: ldr q0, [x0, x9]133; CHECK-NEXT: ldr x8, [x8]134; CHECK-NEXT: str q0, [x8, x9]135; CHECK-NEXT: ret136entry:137 %arrayidx = getelementptr inbounds <8 x i16>, ptr %array, i64 %offset138 %tmp = load <8 x i16>, ptr %arrayidx, align 16139 %tmp1 = load ptr, ptr @globalArray16x8, align 8140 %arrayidx1 = getelementptr inbounds <8 x i16>, ptr %tmp1, i64 %offset141 store <8 x i16> %tmp, ptr %arrayidx1, align 16142 ret void143}144 145define void @fct2_16x8(ptr nocapture %array) nounwind ssp {146; CHECK-LABEL: fct2_16x8:147; CHECK: // %bb.0: // %entry148; CHECK-NEXT: adrp x8, :got:globalArray16x8149; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray16x8]150; CHECK-NEXT: ldr q0, [x0, #48]151; CHECK-NEXT: ldr x8, [x8]152; CHECK-NEXT: str q0, [x8, #80]153; CHECK-NEXT: ret154entry:155 %arrayidx = getelementptr inbounds <8 x i16>, ptr %array, i64 3156 %tmp = load <8 x i16>, ptr %arrayidx, align 16157 %tmp1 = load ptr, ptr @globalArray16x8, align 8158 %arrayidx1 = getelementptr inbounds <8 x i16>, ptr %tmp1, i64 5159 store <8 x i16> %tmp, ptr %arrayidx1, align 16160 ret void161}162 163define void @fct1_8x16(ptr nocapture %array, i64 %offset) nounwind ssp {164; CHECK-LABEL: fct1_8x16:165; CHECK: // %bb.0: // %entry166; CHECK-NEXT: adrp x8, :got:globalArray8x16167; CHECK-NEXT: lsl x9, x1, #4168; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray8x16]169; CHECK-NEXT: ldr q0, [x0, x9]170; CHECK-NEXT: ldr x8, [x8]171; CHECK-NEXT: str q0, [x8, x9]172; CHECK-NEXT: ret173entry:174 %arrayidx = getelementptr inbounds <16 x i8>, ptr %array, i64 %offset175 %tmp = load <16 x i8>, ptr %arrayidx, align 16176 %tmp1 = load ptr, ptr @globalArray8x16, align 8177 %arrayidx1 = getelementptr inbounds <16 x i8>, ptr %tmp1, i64 %offset178 store <16 x i8> %tmp, ptr %arrayidx1, align 16179 ret void180}181 182define void @fct2_8x16(ptr nocapture %array) nounwind ssp {183; CHECK-LABEL: fct2_8x16:184; CHECK: // %bb.0: // %entry185; CHECK-NEXT: adrp x8, :got:globalArray8x16186; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray8x16]187; CHECK-NEXT: ldr q0, [x0, #48]188; CHECK-NEXT: ldr x8, [x8]189; CHECK-NEXT: str q0, [x8, #80]190; CHECK-NEXT: ret191entry:192 %arrayidx = getelementptr inbounds <16 x i8>, ptr %array, i64 3193 %tmp = load <16 x i8>, ptr %arrayidx, align 16194 %tmp1 = load ptr, ptr @globalArray8x16, align 8195 %arrayidx1 = getelementptr inbounds <16 x i8>, ptr %tmp1, i64 5196 store <16 x i8> %tmp, ptr %arrayidx1, align 16197 ret void198}199 200define void @fct1_64x1(ptr nocapture %array, i64 %offset) nounwind ssp {201; CHECK-LABEL: fct1_64x1:202; CHECK: // %bb.0: // %entry203; CHECK-NEXT: adrp x8, :got:globalArray64x1204; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray64x1]205; CHECK-NEXT: ldr d0, [x0, x1, lsl #3]206; CHECK-NEXT: ldr x8, [x8]207; CHECK-NEXT: str d0, [x8, x1, lsl #3]208; CHECK-NEXT: ret209entry:210 %arrayidx = getelementptr inbounds <1 x i64>, ptr %array, i64 %offset211 %tmp = load <1 x i64>, ptr %arrayidx, align 8212 %tmp1 = load ptr, ptr @globalArray64x1, align 8213 %arrayidx1 = getelementptr inbounds <1 x i64>, ptr %tmp1, i64 %offset214 store <1 x i64> %tmp, ptr %arrayidx1, align 8215 ret void216}217 218define void @fct2_64x1(ptr nocapture %array) nounwind ssp {219; CHECK-LABEL: fct2_64x1:220; CHECK: // %bb.0: // %entry221; CHECK-NEXT: adrp x8, :got:globalArray64x1222; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray64x1]223; CHECK-NEXT: ldr d0, [x0, #24]224; CHECK-NEXT: ldr x8, [x8]225; CHECK-NEXT: str d0, [x8, #40]226; CHECK-NEXT: ret227entry:228 %arrayidx = getelementptr inbounds <1 x i64>, ptr %array, i64 3229 %tmp = load <1 x i64>, ptr %arrayidx, align 8230 %tmp1 = load ptr, ptr @globalArray64x1, align 8231 %arrayidx1 = getelementptr inbounds <1 x i64>, ptr %tmp1, i64 5232 store <1 x i64> %tmp, ptr %arrayidx1, align 8233 ret void234}235 236define void @fct1_32x2(ptr nocapture %array, i64 %offset) nounwind ssp {237; CHECK-LABEL: fct1_32x2:238; CHECK: // %bb.0: // %entry239; CHECK-NEXT: adrp x8, :got:globalArray32x2240; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray32x2]241; CHECK-NEXT: ldr d0, [x0, x1, lsl #3]242; CHECK-NEXT: ldr x8, [x8]243; CHECK-NEXT: str d0, [x8, x1, lsl #3]244; CHECK-NEXT: ret245entry:246 %arrayidx = getelementptr inbounds <2 x i32>, ptr %array, i64 %offset247 %tmp = load <2 x i32>, ptr %arrayidx, align 8248 %tmp1 = load ptr, ptr @globalArray32x2, align 8249 %arrayidx1 = getelementptr inbounds <2 x i32>, ptr %tmp1, i64 %offset250 store <2 x i32> %tmp, ptr %arrayidx1, align 8251 ret void252}253 254define void @fct2_32x2(ptr nocapture %array) nounwind ssp {255; CHECK-LABEL: fct2_32x2:256; CHECK: // %bb.0: // %entry257; CHECK-NEXT: adrp x8, :got:globalArray32x2258; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray32x2]259; CHECK-NEXT: ldr d0, [x0, #24]260; CHECK-NEXT: ldr x8, [x8]261; CHECK-NEXT: str d0, [x8, #40]262; CHECK-NEXT: ret263entry:264 %arrayidx = getelementptr inbounds <2 x i32>, ptr %array, i64 3265 %tmp = load <2 x i32>, ptr %arrayidx, align 8266 %tmp1 = load ptr, ptr @globalArray32x2, align 8267 %arrayidx1 = getelementptr inbounds <2 x i32>, ptr %tmp1, i64 5268 store <2 x i32> %tmp, ptr %arrayidx1, align 8269 ret void270}271 272define void @fct1_16x4(ptr nocapture %array, i64 %offset) nounwind ssp {273; CHECK-LABEL: fct1_16x4:274; CHECK: // %bb.0: // %entry275; CHECK-NEXT: adrp x8, :got:globalArray16x4276; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray16x4]277; CHECK-NEXT: ldr d0, [x0, x1, lsl #3]278; CHECK-NEXT: ldr x8, [x8]279; CHECK-NEXT: str d0, [x8, x1, lsl #3]280; CHECK-NEXT: ret281entry:282 %arrayidx = getelementptr inbounds <4 x i16>, ptr %array, i64 %offset283 %tmp = load <4 x i16>, ptr %arrayidx, align 8284 %tmp1 = load ptr, ptr @globalArray16x4, align 8285 %arrayidx1 = getelementptr inbounds <4 x i16>, ptr %tmp1, i64 %offset286 store <4 x i16> %tmp, ptr %arrayidx1, align 8287 ret void288}289 290define void @fct2_16x4(ptr nocapture %array) nounwind ssp {291; CHECK-LABEL: fct2_16x4:292; CHECK: // %bb.0: // %entry293; CHECK-NEXT: adrp x8, :got:globalArray16x4294; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray16x4]295; CHECK-NEXT: ldr d0, [x0, #24]296; CHECK-NEXT: ldr x8, [x8]297; CHECK-NEXT: str d0, [x8, #40]298; CHECK-NEXT: ret299entry:300 %arrayidx = getelementptr inbounds <4 x i16>, ptr %array, i64 3301 %tmp = load <4 x i16>, ptr %arrayidx, align 8302 %tmp1 = load ptr, ptr @globalArray16x4, align 8303 %arrayidx1 = getelementptr inbounds <4 x i16>, ptr %tmp1, i64 5304 store <4 x i16> %tmp, ptr %arrayidx1, align 8305 ret void306}307 308define void @fct1_8x8(ptr nocapture %array, i64 %offset) nounwind ssp {309; CHECK-LABEL: fct1_8x8:310; CHECK: // %bb.0: // %entry311; CHECK-NEXT: adrp x8, :got:globalArray8x8312; CHECK-NEXT: ldr x8, [x8, :got_lo12:globalArray8x8]313; CHECK-NEXT: ldr d0, [x0, x1, lsl #3]314; CHECK-NEXT: ldr x8, [x8]315; CHECK-NEXT: str d0, [x8, x1, lsl #3]316; CHECK-NEXT: ret317entry:318 %arrayidx = getelementptr inbounds <8 x i8>, ptr %array, i64 %offset319 %tmp = load <8 x i8>, ptr %arrayidx, align 8320 %tmp1 = load ptr, ptr @globalArray8x8, align 8321 %arrayidx1 = getelementptr inbounds <8 x i8>, ptr %tmp1, i64 %offset322 store <8 x i8> %tmp, ptr %arrayidx1, align 8323 ret void324}325 326; Add a bunch of tests for rdar://13258794: Match LDUR/STUR for D and Q327; registers for unscaled vector accesses328 329define <1 x i64> @fct0(ptr %str) nounwind readonly ssp {330; CHECK-LABEL: fct0:331; CHECK: // %bb.0: // %entry332; CHECK-NEXT: ldur d0, [x0, #3]333; CHECK-NEXT: ret334entry:335 %p = getelementptr inbounds i8, ptr %str, i64 3336 %0 = load <1 x i64>, ptr %p, align 8337 ret <1 x i64> %0338}339 340define <2 x i32> @fct1(ptr %str) nounwind readonly ssp {341; CHECK-LABEL: fct1:342; CHECK: // %bb.0: // %entry343; CHECK-NEXT: ldur d0, [x0, #3]344; CHECK-NEXT: ret345entry:346 %p = getelementptr inbounds i8, ptr %str, i64 3347 %0 = load <2 x i32>, ptr %p, align 8348 ret <2 x i32> %0349}350 351define <4 x i16> @fct2(ptr %str) nounwind readonly ssp {352; CHECK-LABEL: fct2:353; CHECK: // %bb.0: // %entry354; CHECK-NEXT: ldur d0, [x0, #3]355; CHECK-NEXT: ret356entry:357 %p = getelementptr inbounds i8, ptr %str, i64 3358 %0 = load <4 x i16>, ptr %p, align 8359 ret <4 x i16> %0360}361 362define <8 x i8> @fct3(ptr %str) nounwind readonly ssp {363; CHECK-LABEL: fct3:364; CHECK: // %bb.0: // %entry365; CHECK-NEXT: ldur d0, [x0, #3]366; CHECK-NEXT: ret367entry:368 %p = getelementptr inbounds i8, ptr %str, i64 3369 %0 = load <8 x i8>, ptr %p, align 8370 ret <8 x i8> %0371}372 373define <2 x i64> @fct4(ptr %str) nounwind readonly ssp {374; CHECK-LABEL: fct4:375; CHECK: // %bb.0: // %entry376; CHECK-NEXT: ldur q0, [x0, #3]377; CHECK-NEXT: ret378entry:379 %p = getelementptr inbounds i8, ptr %str, i64 3380 %0 = load <2 x i64>, ptr %p, align 16381 ret <2 x i64> %0382}383 384define <4 x i32> @fct5(ptr %str) nounwind readonly ssp {385; CHECK-LABEL: fct5:386; CHECK: // %bb.0: // %entry387; CHECK-NEXT: ldur q0, [x0, #3]388; CHECK-NEXT: ret389entry:390 %p = getelementptr inbounds i8, ptr %str, i64 3391 %0 = load <4 x i32>, ptr %p, align 16392 ret <4 x i32> %0393}394 395define <8 x i16> @fct6(ptr %str) nounwind readonly ssp {396; CHECK-LABEL: fct6:397; CHECK: // %bb.0: // %entry398; CHECK-NEXT: ldur q0, [x0, #3]399; CHECK-NEXT: ret400entry:401 %p = getelementptr inbounds i8, ptr %str, i64 3402 %0 = load <8 x i16>, ptr %p, align 16403 ret <8 x i16> %0404}405 406define <16 x i8> @fct7(ptr %str) nounwind readonly ssp {407; CHECK-LABEL: fct7:408; CHECK: // %bb.0: // %entry409; CHECK-NEXT: ldur q0, [x0, #3]410; CHECK-NEXT: ret411entry:412 %p = getelementptr inbounds i8, ptr %str, i64 3413 %0 = load <16 x i8>, ptr %p, align 16414 ret <16 x i8> %0415}416 417define void @fct8(ptr %str) nounwind ssp {418; CHECK-LABEL: fct8:419; CHECK: // %bb.0: // %entry420; CHECK-NEXT: ldur d0, [x0, #3]421; CHECK-NEXT: stur d0, [x0, #4]422; CHECK-NEXT: ret423entry:424 %p = getelementptr inbounds i8, ptr %str, i64 3425 %0 = load <1 x i64>, ptr %p, align 8426 %p2 = getelementptr inbounds i8, ptr %str, i64 4427 store <1 x i64> %0, ptr %p2, align 8428 ret void429}430 431define void @fct9(ptr %str) nounwind ssp {432; CHECK-LABEL: fct9:433; CHECK: // %bb.0: // %entry434; CHECK-NEXT: ldur d0, [x0, #3]435; CHECK-NEXT: stur d0, [x0, #4]436; CHECK-NEXT: ret437entry:438 %p = getelementptr inbounds i8, ptr %str, i64 3439 %0 = load <2 x i32>, ptr %p, align 8440 %p2 = getelementptr inbounds i8, ptr %str, i64 4441 store <2 x i32> %0, ptr %p2, align 8442 ret void443}444 445define void @fct10(ptr %str) nounwind ssp {446; CHECK-LABEL: fct10:447; CHECK: // %bb.0: // %entry448; CHECK-NEXT: ldur d0, [x0, #3]449; CHECK-NEXT: stur d0, [x0, #4]450; CHECK-NEXT: ret451entry:452 %p = getelementptr inbounds i8, ptr %str, i64 3453 %0 = load <4 x i16>, ptr %p, align 8454 %p2 = getelementptr inbounds i8, ptr %str, i64 4455 store <4 x i16> %0, ptr %p2, align 8456 ret void457}458 459define void @fct11(ptr %str) nounwind ssp {460; CHECK-LABEL: fct11:461; CHECK: // %bb.0: // %entry462; CHECK-NEXT: ldur d0, [x0, #3]463; CHECK-NEXT: stur d0, [x0, #4]464; CHECK-NEXT: ret465entry:466 %p = getelementptr inbounds i8, ptr %str, i64 3467 %0 = load <8 x i8>, ptr %p, align 8468 %p2 = getelementptr inbounds i8, ptr %str, i64 4469 store <8 x i8> %0, ptr %p2, align 8470 ret void471}472 473define void @fct12(ptr %str) nounwind ssp {474; CHECK-LABEL: fct12:475; CHECK: // %bb.0: // %entry476; CHECK-NEXT: ldur q0, [x0, #3]477; CHECK-NEXT: stur q0, [x0, #4]478; CHECK-NEXT: ret479entry:480 %p = getelementptr inbounds i8, ptr %str, i64 3481 %0 = load <2 x i64>, ptr %p, align 16482 %p2 = getelementptr inbounds i8, ptr %str, i64 4483 store <2 x i64> %0, ptr %p2, align 16484 ret void485}486 487define void @fct13(ptr %str) nounwind ssp {488; CHECK-LABEL: fct13:489; CHECK: // %bb.0: // %entry490; CHECK-NEXT: ldur q0, [x0, #3]491; CHECK-NEXT: stur q0, [x0, #4]492; CHECK-NEXT: ret493entry:494 %p = getelementptr inbounds i8, ptr %str, i64 3495 %0 = load <4 x i32>, ptr %p, align 16496 %p2 = getelementptr inbounds i8, ptr %str, i64 4497 store <4 x i32> %0, ptr %p2, align 16498 ret void499}500 501define void @fct14(ptr %str) nounwind ssp {502; CHECK-LABEL: fct14:503; CHECK: // %bb.0: // %entry504; CHECK-NEXT: ldur q0, [x0, #3]505; CHECK-NEXT: stur q0, [x0, #4]506; CHECK-NEXT: ret507entry:508 %p = getelementptr inbounds i8, ptr %str, i64 3509 %0 = load <8 x i16>, ptr %p, align 16510 %p2 = getelementptr inbounds i8, ptr %str, i64 4511 store <8 x i16> %0, ptr %p2, align 16512 ret void513}514 515define void @fct15(ptr %str) nounwind ssp {516; CHECK-LABEL: fct15:517; CHECK: // %bb.0: // %entry518; CHECK-NEXT: ldur q0, [x0, #3]519; CHECK-NEXT: stur q0, [x0, #4]520; CHECK-NEXT: ret521entry:522 %p = getelementptr inbounds i8, ptr %str, i64 3523 %0 = load <16 x i8>, ptr %p, align 16524 %p2 = getelementptr inbounds i8, ptr %str, i64 4525 store <16 x i8> %0, ptr %p2, align 16526 ret void527}528 529; Check the building of vector from a single loaded value.530; Part of <rdar://problem/14170854>531;532; Single loads with immediate offset.533define <8 x i8> @fct16(ptr nocapture %sp0) {534; CHECK-LABEL: fct16:535; CHECK: // %bb.0: // %entry536; CHECK-NEXT: ldr b0, [x0, #1]537; CHECK-NEXT: mul.8b v0, v0, v0538; CHECK-NEXT: ret539entry:540 %addr = getelementptr i8, ptr %sp0, i64 1541 %pix_sp0.0.copyload = load i8, ptr %addr, align 1542 %vec = insertelement <8 x i8> undef, i8 %pix_sp0.0.copyload, i32 0543 %vmull.i = mul <8 x i8> %vec, %vec544 ret <8 x i8> %vmull.i545}546 547define <16 x i8> @fct17(ptr nocapture %sp0) {548; CHECK-LABEL: fct17:549; CHECK: // %bb.0: // %entry550; CHECK-NEXT: ldr b0, [x0, #1]551; CHECK-NEXT: mul.16b v0, v0, v0552; CHECK-NEXT: ret553entry:554 %addr = getelementptr i8, ptr %sp0, i64 1555 %pix_sp0.0.copyload = load i8, ptr %addr, align 1556 %vec = insertelement <16 x i8> undef, i8 %pix_sp0.0.copyload, i32 0557 %vmull.i = mul <16 x i8> %vec, %vec558 ret <16 x i8> %vmull.i559}560 561define <4 x i16> @fct18(ptr nocapture %sp0) {562; CHECK-LABEL: fct18:563; CHECK: // %bb.0: // %entry564; CHECK-NEXT: ldr h0, [x0, #2]565; CHECK-NEXT: mul.4h v0, v0, v0566; CHECK-NEXT: ret567entry:568 %addr = getelementptr i16, ptr %sp0, i64 1569 %pix_sp0.0.copyload = load i16, ptr %addr, align 1570 %vec = insertelement <4 x i16> undef, i16 %pix_sp0.0.copyload, i32 0571 %vmull.i = mul <4 x i16> %vec, %vec572 ret <4 x i16> %vmull.i573}574 575define <8 x i16> @fct19(ptr nocapture %sp0) {576; CHECK-LABEL: fct19:577; CHECK: // %bb.0: // %entry578; CHECK-NEXT: ldr h0, [x0, #2]579; CHECK-NEXT: mul.8h v0, v0, v0580; CHECK-NEXT: ret581entry:582 %addr = getelementptr i16, ptr %sp0, i64 1583 %pix_sp0.0.copyload = load i16, ptr %addr, align 1584 %vec = insertelement <8 x i16> undef, i16 %pix_sp0.0.copyload, i32 0585 %vmull.i = mul <8 x i16> %vec, %vec586 ret <8 x i16> %vmull.i587}588 589define <2 x i32> @fct20(ptr nocapture %sp0) {590; CHECK-LABEL: fct20:591; CHECK: // %bb.0: // %entry592; CHECK-NEXT: ldr s0, [x0, #4]593; CHECK-NEXT: mul.2s v0, v0, v0594; CHECK-NEXT: ret595entry:596 %addr = getelementptr i32, ptr %sp0, i64 1597 %pix_sp0.0.copyload = load i32, ptr %addr, align 1598 %vec = insertelement <2 x i32> undef, i32 %pix_sp0.0.copyload, i32 0599 %vmull.i = mul <2 x i32> %vec, %vec600 ret <2 x i32> %vmull.i601}602 603define <4 x i32> @fct21(ptr nocapture %sp0) {604; CHECK-LABEL: fct21:605; CHECK: // %bb.0: // %entry606; CHECK-NEXT: ldr s0, [x0, #4]607; CHECK-NEXT: mul.4s v0, v0, v0608; CHECK-NEXT: ret609entry:610 %addr = getelementptr i32, ptr %sp0, i64 1611 %pix_sp0.0.copyload = load i32, ptr %addr, align 1612 %vec = insertelement <4 x i32> undef, i32 %pix_sp0.0.copyload, i32 0613 %vmull.i = mul <4 x i32> %vec, %vec614 ret <4 x i32> %vmull.i615}616 617define <1 x i64> @fct22(ptr nocapture %sp0) {618; CHECK-LABEL: fct22:619; CHECK: // %bb.0: // %entry620; CHECK-NEXT: ldr d0, [x0, #8]621; CHECK-NEXT: ret622entry:623 %addr = getelementptr i64, ptr %sp0, i64 1624 %pix_sp0.0.copyload = load i64, ptr %addr, align 1625 %vec = insertelement <1 x i64> undef, i64 %pix_sp0.0.copyload, i32 0626 ret <1 x i64> %vec627}628 629define <2 x i64> @fct23(ptr nocapture %sp0) {630; CHECK-LABEL: fct23:631; CHECK: // %bb.0: // %entry632; CHECK-NEXT: ldr d0, [x0, #8]633; CHECK-NEXT: ret634entry:635 %addr = getelementptr i64, ptr %sp0, i64 1636 %pix_sp0.0.copyload = load i64, ptr %addr, align 1637 %vec = insertelement <2 x i64> undef, i64 %pix_sp0.0.copyload, i32 0638 ret <2 x i64> %vec639}640 641;642; Single loads with register offset.643define <8 x i8> @fct24(ptr nocapture %sp0, i64 %offset) {644; CHECK-LABEL: fct24:645; CHECK: // %bb.0: // %entry646; CHECK-NEXT: ldr b0, [x0, x1]647; CHECK-NEXT: mul.8b v0, v0, v0648; CHECK-NEXT: ret649entry:650 %addr = getelementptr i8, ptr %sp0, i64 %offset651 %pix_sp0.0.copyload = load i8, ptr %addr, align 1652 %vec = insertelement <8 x i8> undef, i8 %pix_sp0.0.copyload, i32 0653 %vmull.i = mul <8 x i8> %vec, %vec654 ret <8 x i8> %vmull.i655}656 657define <16 x i8> @fct25(ptr nocapture %sp0, i64 %offset) {658; CHECK-LABEL: fct25:659; CHECK: // %bb.0: // %entry660; CHECK-NEXT: ldr b0, [x0, x1]661; CHECK-NEXT: mul.16b v0, v0, v0662; CHECK-NEXT: ret663entry:664 %addr = getelementptr i8, ptr %sp0, i64 %offset665 %pix_sp0.0.copyload = load i8, ptr %addr, align 1666 %vec = insertelement <16 x i8> undef, i8 %pix_sp0.0.copyload, i32 0667 %vmull.i = mul <16 x i8> %vec, %vec668 ret <16 x i8> %vmull.i669}670 671define <4 x i16> @fct26(ptr nocapture %sp0, i64 %offset) {672; CHECK-LABEL: fct26:673; CHECK: // %bb.0: // %entry674; CHECK-NEXT: ldr h0, [x0, x1, lsl #1]675; CHECK-NEXT: mul.4h v0, v0, v0676; CHECK-NEXT: ret677entry:678 %addr = getelementptr i16, ptr %sp0, i64 %offset679 %pix_sp0.0.copyload = load i16, ptr %addr, align 1680 %vec = insertelement <4 x i16> undef, i16 %pix_sp0.0.copyload, i32 0681 %vmull.i = mul <4 x i16> %vec, %vec682 ret <4 x i16> %vmull.i683}684 685define <8 x i16> @fct27(ptr nocapture %sp0, i64 %offset) {686; CHECK-LABEL: fct27:687; CHECK: // %bb.0: // %entry688; CHECK-NEXT: ldr h0, [x0, x1, lsl #1]689; CHECK-NEXT: mul.8h v0, v0, v0690; CHECK-NEXT: ret691entry:692 %addr = getelementptr i16, ptr %sp0, i64 %offset693 %pix_sp0.0.copyload = load i16, ptr %addr, align 1694 %vec = insertelement <8 x i16> undef, i16 %pix_sp0.0.copyload, i32 0695 %vmull.i = mul <8 x i16> %vec, %vec696 ret <8 x i16> %vmull.i697}698 699define <2 x i32> @fct28(ptr nocapture %sp0, i64 %offset) {700; CHECK-LABEL: fct28:701; CHECK: // %bb.0: // %entry702; CHECK-NEXT: ldr s0, [x0, x1, lsl #2]703; CHECK-NEXT: mul.2s v0, v0, v0704; CHECK-NEXT: ret705entry:706 %addr = getelementptr i32, ptr %sp0, i64 %offset707 %pix_sp0.0.copyload = load i32, ptr %addr, align 1708 %vec = insertelement <2 x i32> undef, i32 %pix_sp0.0.copyload, i32 0709 %vmull.i = mul <2 x i32> %vec, %vec710 ret <2 x i32> %vmull.i711}712 713define <4 x i32> @fct29(ptr nocapture %sp0, i64 %offset) {714; CHECK-LABEL: fct29:715; CHECK: // %bb.0: // %entry716; CHECK-NEXT: ldr s0, [x0, x1, lsl #2]717; CHECK-NEXT: mul.4s v0, v0, v0718; CHECK-NEXT: ret719entry:720 %addr = getelementptr i32, ptr %sp0, i64 %offset721 %pix_sp0.0.copyload = load i32, ptr %addr, align 1722 %vec = insertelement <4 x i32> undef, i32 %pix_sp0.0.copyload, i32 0723 %vmull.i = mul <4 x i32> %vec, %vec724 ret <4 x i32> %vmull.i725}726 727define <1 x i64> @fct30(ptr nocapture %sp0, i64 %offset) {728; CHECK-LABEL: fct30:729; CHECK: // %bb.0: // %entry730; CHECK-NEXT: ldr d0, [x0, x1, lsl #3]731; CHECK-NEXT: ret732entry:733 %addr = getelementptr i64, ptr %sp0, i64 %offset734 %pix_sp0.0.copyload = load i64, ptr %addr, align 1735 %vec = insertelement <1 x i64> undef, i64 %pix_sp0.0.copyload, i32 0736 ret <1 x i64> %vec737}738 739define <2 x i64> @fct31(ptr nocapture %sp0, i64 %offset) {740; CHECK-LABEL: fct31:741; CHECK: // %bb.0: // %entry742; CHECK-NEXT: ldr d0, [x0, x1, lsl #3]743; CHECK-NEXT: ret744entry:745 %addr = getelementptr i64, ptr %sp0, i64 %offset746 %pix_sp0.0.copyload = load i64, ptr %addr, align 1747 %vec = insertelement <2 x i64> undef, i64 %pix_sp0.0.copyload, i32 0748 ret <2 x i64> %vec749}750