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1; RUN: llc -o - %s | FileCheck %s2target triple = "aarch64--"3 4declare void @begin()5declare void @end()6 7; Test that we use the zero register before regalloc and do not unnecessarily8; clobber a register with the SUBS (cmp) instruction.9; CHECK-LABEL: func:10define void @func(ptr %addr) {11 ; We should not see any spills or reloads between begin and end12 ; CHECK: bl begin13 ; CHECK-NOT: str{{.*}}sp14 ; CHECK-NOT: Folded Spill15 ; CHECK-NOT: ldr{{.*}}sp16 ; CHECK-NOT: Folded Reload17 call void @begin()18 %v0 = load volatile i64, ptr %addr 19 %v1 = load volatile i64, ptr %addr 20 %v2 = load volatile i64, ptr %addr 21 %v3 = load volatile i64, ptr %addr 22 %v4 = load volatile i64, ptr %addr 23 %v5 = load volatile i64, ptr %addr 24 %v6 = load volatile i64, ptr %addr 25 %v7 = load volatile i64, ptr %addr 26 %v8 = load volatile i64, ptr %addr 27 %v9 = load volatile i64, ptr %addr 28 %v10 = load volatile i64, ptr %addr 29 %v11 = load volatile i64, ptr %addr 30 %v12 = load volatile i64, ptr %addr 31 %v13 = load volatile i64, ptr %addr 32 %v14 = load volatile i64, ptr %addr 33 %v15 = load volatile i64, ptr %addr 34 %v16 = load volatile i64, ptr %addr 35 %v17 = load volatile i64, ptr %addr 36 %v18 = load volatile i64, ptr %addr 37 %v19 = load volatile i64, ptr %addr 38 %v20 = load volatile i64, ptr %addr39 %v21 = load volatile i64, ptr %addr40 %v22 = load volatile i64, ptr %addr41 %v23 = load volatile i64, ptr %addr42 %v24 = load volatile i64, ptr %addr43 %v25 = load volatile i64, ptr %addr44 %v26 = load volatile i64, ptr %addr45 %v27 = load volatile i64, ptr %addr46 %v28 = load volatile i64, ptr %addr47 %v29 = load volatile i64, ptr %addr48 49 %c = icmp eq i64 %v0, %v150 br i1 %c, label %if.then, label %if.end51 52if.then:53 store volatile i64 %v2, ptr %addr54 br label %if.end55 56if.end:57 store volatile i64 %v0, ptr %addr58 store volatile i64 %v1, ptr %addr59 store volatile i64 %v2, ptr %addr60 store volatile i64 %v3, ptr %addr61 store volatile i64 %v4, ptr %addr62 store volatile i64 %v5, ptr %addr63 store volatile i64 %v6, ptr %addr64 store volatile i64 %v7, ptr %addr65 store volatile i64 %v8, ptr %addr66 store volatile i64 %v9, ptr %addr67 store volatile i64 %v10, ptr %addr68 store volatile i64 %v11, ptr %addr69 store volatile i64 %v12, ptr %addr70 store volatile i64 %v13, ptr %addr71 store volatile i64 %v14, ptr %addr72 store volatile i64 %v15, ptr %addr73 store volatile i64 %v16, ptr %addr74 store volatile i64 %v17, ptr %addr75 store volatile i64 %v18, ptr %addr76 store volatile i64 %v19, ptr %addr77 store volatile i64 %v20, ptr %addr78 store volatile i64 %v21, ptr %addr79 store volatile i64 %v22, ptr %addr80 store volatile i64 %v23, ptr %addr81 store volatile i64 %v24, ptr %addr82 store volatile i64 %v25, ptr %addr83 store volatile i64 %v26, ptr %addr84 store volatile i64 %v27, ptr %addr85 store volatile i64 %v28, ptr %addr86 store volatile i64 %v29, ptr %addr87 ; CHECK: bl end88 call void @end()89 90 ret void91}92