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1; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -verify-machineinstrs -mattr=+lse -aarch64-enable-sink-fold=true < %s | FileCheck %s2; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -verify-machineinstrs -mattr=+lse -mattr=+outline-atomics -aarch64-enable-sink-fold=true < %s | FileCheck %s3; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -verify-machineinstrs -mattr=+outline-atomics -aarch64-enable-sink-fold=true < %s | FileCheck %s --check-prefix=OUTLINE-ATOMICS4; RUN: llc -mtriple=aarch64_be-none-linux-gnu -disable-post-ra -verify-machineinstrs -mattr=+lse -aarch64-enable-sink-fold=true < %s | FileCheck %s5; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -verify-machineinstrs -mattr=+lse -aarch64-enable-sink-fold=true < %s | FileCheck %s --check-prefix=CHECK-REG6 7; Point of CHECK-REG is to make sure UNPREDICTABLE instructions aren't created8; (i.e. reusing a register for status & data in store exclusive).9; CHECK-REG-NOT: stlxrb w[[NEW:[0-9]+]], w[[NEW]], [x{{[0-9]+}}]10; CHECK-REG-NOT: stlxrb w[[NEW:[0-9]+]], x[[NEW]], [x{{[0-9]+}}]11 12@var8 = dso_local global i8 013@var16 = dso_local global i16 014@var32 = dso_local global i32 015@var64 = dso_local global i64 016@var128 = dso_local global i128 017 18define dso_local i8 @test_atomic_load_add_i8(i8 %offset) nounwind {19; CHECK-LABEL: test_atomic_load_add_i8:20; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8:21; OUTLINE-ATOMICS: // %bb.0:22; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill23; OUTLINE-ATOMICS-NEXT: adrp x1, var824; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var825; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel26; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload27; OUTLINE-ATOMICS-NEXT: ret28 %old = atomicrmw add ptr @var8, i8 %offset seq_cst29; CHECK-NOT: dmb30; CHECK: adrp [[TMPADDR:x[0-9]+]], var831; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var832 33; CHECK: ldaddalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]34; CHECK-NOT: dmb35 36 ret i8 %old37}38 39define dso_local i16 @test_atomic_load_add_i16(i16 %offset) nounwind {40; CHECK-LABEL: test_atomic_load_add_i16:41; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16:42; OUTLINE-ATOMICS: // %bb.0:43; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill44; OUTLINE-ATOMICS-NEXT: adrp x1, var1645; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var1646; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel47; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload48; OUTLINE-ATOMICS-NEXT: ret49 %old = atomicrmw add ptr @var16, i16 %offset seq_cst50; CHECK-NOT: dmb51; CHECK: adrp [[TMPADDR:x[0-9]+]], var1652; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var1653 54; CHECK: ldaddalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]55; CHECK-NOT: dmb56 57 ret i16 %old58}59 60define dso_local i32 @test_atomic_load_add_i32(i32 %offset) nounwind {61; CHECK-LABEL: test_atomic_load_add_i32:62; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32:63; OUTLINE-ATOMICS: // %bb.0:64; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill65; OUTLINE-ATOMICS-NEXT: adrp x1, var3266; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var3267; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel68; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload69; OUTLINE-ATOMICS-NEXT: ret70 %old = atomicrmw add ptr @var32, i32 %offset seq_cst71; CHECK-NOT: dmb72; CHECK: adrp [[TMPADDR:x[0-9]+]], var3273; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var3274 75; CHECK: ldaddal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]76; CHECK-NOT: dmb77 78 ret i32 %old79}80 81define dso_local i64 @test_atomic_load_add_i64(i64 %offset) nounwind {82; CHECK-LABEL: test_atomic_load_add_i64:83; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64:84; OUTLINE-ATOMICS: // %bb.0:85; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill86; OUTLINE-ATOMICS-NEXT: adrp x1, var6487; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var6488; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel89; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload90; OUTLINE-ATOMICS-NEXT: ret91 %old = atomicrmw add ptr @var64, i64 %offset seq_cst92; CHECK-NOT: dmb93; CHECK: adrp [[TMPADDR:x[0-9]+]], var6494; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var6495 96; CHECK: ldaddal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]97; CHECK-NOT: dmb98 99 ret i64 %old100}101 102define dso_local void @test_atomic_load_add_i32_noret(i32 %offset) nounwind {103; CHECK-LABEL: test_atomic_load_add_i32_noret:104; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret:105; OUTLINE-ATOMICS: // %bb.0:106; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill107; OUTLINE-ATOMICS-NEXT: adrp x1, var32108; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32109; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel110; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload111; OUTLINE-ATOMICS-NEXT: ret112 atomicrmw add ptr @var32, i32 %offset seq_cst113; CHECK-NOT: dmb114; CHECK: adrp [[TMPADDR:x[0-9]+]], var32115; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32116 117; CHECK: ldaddal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]118; CHECK-NOT: dmb119 ret void120}121 122define dso_local void @test_atomic_load_add_i64_noret(i64 %offset) nounwind {123; CHECK-LABEL: test_atomic_load_add_i64_noret:124; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret:125; OUTLINE-ATOMICS: // %bb.0:126; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill127; OUTLINE-ATOMICS-NEXT: adrp x1, var64128; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64129; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel130; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload131; OUTLINE-ATOMICS-NEXT: ret132 atomicrmw add ptr @var64, i64 %offset seq_cst133; CHECK-NOT: dmb134; CHECK: adrp [[TMPADDR:x[0-9]+]], var64135; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64136 137; CHECK: ldaddal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]138; CHECK-NOT: dmb139 ret void140}141 142define dso_local i8 @test_atomic_load_or_i8(i8 %offset) nounwind {143; CHECK-LABEL: test_atomic_load_or_i8:144; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8:145; OUTLINE-ATOMICS: // %bb.0:146; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill147; OUTLINE-ATOMICS-NEXT: adrp x1, var8148; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8149; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_acq_rel150; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload151; OUTLINE-ATOMICS-NEXT: ret152 %old = atomicrmw or ptr @var8, i8 %offset seq_cst153; CHECK-NOT: dmb154; CHECK: adrp [[TMPADDR:x[0-9]+]], var8155; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8156 157; CHECK: ldsetalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]158; CHECK-NOT: dmb159 160 ret i8 %old161}162 163define dso_local i16 @test_atomic_load_or_i16(i16 %offset) nounwind {164; CHECK-LABEL: test_atomic_load_or_i16:165; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16:166; OUTLINE-ATOMICS: // %bb.0:167; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill168; OUTLINE-ATOMICS-NEXT: adrp x1, var16169; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16170; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_acq_rel171; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload172; OUTLINE-ATOMICS-NEXT: ret173 %old = atomicrmw or ptr @var16, i16 %offset seq_cst174; CHECK-NOT: dmb175; CHECK: adrp [[TMPADDR:x[0-9]+]], var16176; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16177 178; CHECK: ldsetalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]179; CHECK-NOT: dmb180 181 ret i16 %old182}183 184define dso_local i32 @test_atomic_load_or_i32(i32 %offset) nounwind {185; CHECK-LABEL: test_atomic_load_or_i32:186; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32:187; OUTLINE-ATOMICS: // %bb.0:188; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill189; OUTLINE-ATOMICS-NEXT: adrp x1, var32190; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32191; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel192; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload193; OUTLINE-ATOMICS-NEXT: ret194 %old = atomicrmw or ptr @var32, i32 %offset seq_cst195; CHECK-NOT: dmb196; CHECK: adrp [[TMPADDR:x[0-9]+]], var32197; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32198 199; CHECK: ldsetal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]200; CHECK-NOT: dmb201 202 ret i32 %old203}204 205define dso_local i64 @test_atomic_load_or_i64(i64 %offset) nounwind {206; CHECK-LABEL: test_atomic_load_or_i64:207; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64:208; OUTLINE-ATOMICS: // %bb.0:209; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill210; OUTLINE-ATOMICS-NEXT: adrp x1, var64211; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64212; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel213; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload214; OUTLINE-ATOMICS-NEXT: ret215 %old = atomicrmw or ptr @var64, i64 %offset seq_cst216; CHECK-NOT: dmb217; CHECK: adrp [[TMPADDR:x[0-9]+]], var64218; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64219 220; CHECK: ldsetal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]221; CHECK-NOT: dmb222 223 ret i64 %old224}225 226define dso_local void @test_atomic_load_or_i32_noret(i32 %offset) nounwind {227; CHECK-LABEL: test_atomic_load_or_i32_noret:228; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret:229; OUTLINE-ATOMICS: // %bb.0:230; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill231; OUTLINE-ATOMICS-NEXT: adrp x1, var32232; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32233; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel234; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload235; OUTLINE-ATOMICS-NEXT: ret236 atomicrmw or ptr @var32, i32 %offset seq_cst237; CHECK-NOT: dmb238; CHECK: adrp [[TMPADDR:x[0-9]+]], var32239; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32240 241; CHECK: ldsetal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]242; CHECK-NOT: dmb243 ret void244}245 246define dso_local void @test_atomic_load_or_i64_noret(i64 %offset) nounwind {247; CHECK-LABEL: test_atomic_load_or_i64_noret:248; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret:249; OUTLINE-ATOMICS: // %bb.0:250; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill251; OUTLINE-ATOMICS-NEXT: adrp x1, var64252; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64253; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel254; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload255; OUTLINE-ATOMICS-NEXT: ret256 atomicrmw or ptr @var64, i64 %offset seq_cst257; CHECK-NOT: dmb258; CHECK: adrp [[TMPADDR:x[0-9]+]], var64259; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64260 261; CHECK: ldsetal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]262; CHECK-NOT: dmb263 ret void264}265 266define dso_local i8 @test_atomic_load_xor_i8(i8 %offset) nounwind {267; CHECK-LABEL: test_atomic_load_xor_i8:268; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8:269; OUTLINE-ATOMICS: // %bb.0:270; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill271; OUTLINE-ATOMICS-NEXT: adrp x1, var8272; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8273; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_acq_rel274; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload275; OUTLINE-ATOMICS-NEXT: ret276 %old = atomicrmw xor ptr @var8, i8 %offset seq_cst277; CHECK-NOT: dmb278; CHECK: adrp [[TMPADDR:x[0-9]+]], var8279; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8280 281; CHECK: ldeoralb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]282; CHECK-NOT: dmb283 284 ret i8 %old285}286 287define dso_local i16 @test_atomic_load_xor_i16(i16 %offset) nounwind {288; CHECK-LABEL: test_atomic_load_xor_i16:289; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16:290; OUTLINE-ATOMICS: // %bb.0:291; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill292; OUTLINE-ATOMICS-NEXT: adrp x1, var16293; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16294; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_acq_rel295; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload296; OUTLINE-ATOMICS-NEXT: ret297 %old = atomicrmw xor ptr @var16, i16 %offset seq_cst298; CHECK-NOT: dmb299; CHECK: adrp [[TMPADDR:x[0-9]+]], var16300; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16301 302; CHECK: ldeoralh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]303; CHECK-NOT: dmb304 305 ret i16 %old306}307 308define dso_local i32 @test_atomic_load_xor_i32(i32 %offset) nounwind {309; CHECK-LABEL: test_atomic_load_xor_i32:310; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32:311; OUTLINE-ATOMICS: // %bb.0:312; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill313; OUTLINE-ATOMICS-NEXT: adrp x1, var32314; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32315; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel316; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload317; OUTLINE-ATOMICS-NEXT: ret318 %old = atomicrmw xor ptr @var32, i32 %offset seq_cst319; CHECK-NOT: dmb320; CHECK: adrp [[TMPADDR:x[0-9]+]], var32321; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32322 323; CHECK: ldeoral w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]324; CHECK-NOT: dmb325 326 ret i32 %old327}328 329define dso_local i64 @test_atomic_load_xor_i64(i64 %offset) nounwind {330; CHECK-LABEL: test_atomic_load_xor_i64:331; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64:332; OUTLINE-ATOMICS: // %bb.0:333; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill334; OUTLINE-ATOMICS-NEXT: adrp x1, var64335; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64336; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel337; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload338; OUTLINE-ATOMICS-NEXT: ret339 %old = atomicrmw xor ptr @var64, i64 %offset seq_cst340; CHECK-NOT: dmb341; CHECK: adrp [[TMPADDR:x[0-9]+]], var64342; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64343 344; CHECK: ldeoral x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]345; CHECK-NOT: dmb346 347 ret i64 %old348}349 350define dso_local void @test_atomic_load_xor_i32_noret(i32 %offset) nounwind {351; CHECK-LABEL: test_atomic_load_xor_i32_noret:352; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret:353; OUTLINE-ATOMICS: // %bb.0:354; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill355; OUTLINE-ATOMICS-NEXT: adrp x1, var32356; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32357; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel358; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload359; OUTLINE-ATOMICS-NEXT: ret360 atomicrmw xor ptr @var32, i32 %offset seq_cst361; CHECK-NOT: dmb362; CHECK: adrp [[TMPADDR:x[0-9]+]], var32363; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32364 365; CHECK: ldeoral w0, w[[NEW:[0-9]+]], [x[[ADDR]]]366; CHECK-NOT: dmb367 ret void368}369 370define dso_local void @test_atomic_load_xor_i64_noret(i64 %offset) nounwind {371; CHECK-LABEL: test_atomic_load_xor_i64_noret:372; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret:373; OUTLINE-ATOMICS: // %bb.0:374; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill375; OUTLINE-ATOMICS-NEXT: adrp x1, var64376; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64377; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel378; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload379; OUTLINE-ATOMICS-NEXT: ret380 atomicrmw xor ptr @var64, i64 %offset seq_cst381; CHECK-NOT: dmb382; CHECK: adrp [[TMPADDR:x[0-9]+]], var64383; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64384 385; CHECK: ldeoral x0, x[[NEW:[0-9]+]], [x[[ADDR]]]386; CHECK-NOT: dmb387 ret void388}389 390define dso_local i8 @test_atomic_load_min_i8(i8 %offset) nounwind {391; CHECK-LABEL: test_atomic_load_min_i8:392; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8:393; OUTLINE-ATOMICS: // %bb.0:394; OUTLINE-ATOMICS-NEXT: adrp x9, var8395; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8396; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start397; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1398; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]399; OUTLINE-ATOMICS-NEXT: sxtb w8, w10400; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb401; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le402; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]403; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]404; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end405; OUTLINE-ATOMICS-NEXT: mov w0, w8406; OUTLINE-ATOMICS-NEXT: ret407 %old = atomicrmw min ptr @var8, i8 %offset seq_cst408; CHECK-NOT: dmb409; CHECK: adrp [[TMPADDR:x[0-9]+]], var8410; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8411 412; CHECK: ldsminalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]413; CHECK-NOT: dmb414 415 ret i8 %old416}417 418define dso_local i16 @test_atomic_load_min_i16(i16 %offset) nounwind {419; CHECK-LABEL: test_atomic_load_min_i16:420; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16:421; OUTLINE-ATOMICS: // %bb.0:422; OUTLINE-ATOMICS-NEXT: adrp x9, var16423; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16424; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start425; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1426; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]427; OUTLINE-ATOMICS-NEXT: sxth w8, w10428; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth429; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le430; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]431; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]432; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end433; OUTLINE-ATOMICS-NEXT: mov w0, w8434; OUTLINE-ATOMICS-NEXT: ret435 %old = atomicrmw min ptr @var16, i16 %offset seq_cst436; CHECK-NOT: dmb437; CHECK: adrp [[TMPADDR:x[0-9]+]], var16438; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16439 440; CHECK: ldsminalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]441; CHECK-NOT: dmb442 443 ret i16 %old444}445 446define dso_local i32 @test_atomic_load_min_i32(i32 %offset) nounwind {447; CHECK-LABEL: test_atomic_load_min_i32:448; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32:449; OUTLINE-ATOMICS: // %bb.0:450; OUTLINE-ATOMICS-NEXT: adrp x9, var32451; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32452; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start453; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1454; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]455; OUTLINE-ATOMICS-NEXT: cmp w8, w0456; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le457; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]458; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]459; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end460; OUTLINE-ATOMICS-NEXT: mov w0, w8461; OUTLINE-ATOMICS-NEXT: ret462 %old = atomicrmw min ptr @var32, i32 %offset seq_cst463; CHECK-NOT: dmb464; CHECK: adrp [[TMPADDR:x[0-9]+]], var32465; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32466 467; CHECK: ldsminal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]468; CHECK-NOT: dmb469 470 ret i32 %old471}472 473define dso_local i64 @test_atomic_load_min_i64(i64 %offset) nounwind {474; CHECK-LABEL: test_atomic_load_min_i64:475; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64:476; OUTLINE-ATOMICS: // %bb.0:477; OUTLINE-ATOMICS-NEXT: adrp x9, var64478; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64479; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start480; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1481; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]482; OUTLINE-ATOMICS-NEXT: cmp x8, x0483; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le484; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]485; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]486; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end487; OUTLINE-ATOMICS-NEXT: mov x0, x8488; OUTLINE-ATOMICS-NEXT: ret489 %old = atomicrmw min ptr @var64, i64 %offset seq_cst490; CHECK-NOT: dmb491; CHECK: adrp [[TMPADDR:x[0-9]+]], var64492; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64493 494; CHECK: ldsminal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]495; CHECK-NOT: dmb496 497 ret i64 %old498}499 500define dso_local void @test_atomic_load_min_i32_noret(i32 %offset) nounwind {501; CHECK-LABEL: test_atomic_load_min_i32_noret:502; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret:503; OUTLINE-ATOMICS: // %bb.0:504; OUTLINE-ATOMICS-NEXT: adrp x8, var32505; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32506; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start507; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1508; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]509; OUTLINE-ATOMICS-NEXT: cmp w9, w0510; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le511; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]512; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]513; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end514; OUTLINE-ATOMICS-NEXT: ret515 atomicrmw min ptr @var32, i32 %offset seq_cst516; CHECK-NOT: dmb517; CHECK: adrp [[TMPADDR:x[0-9]+]], var32518; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32519 520; CHECK: ldsminal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]521; CHECK-NOT: dmb522 ret void523}524 525define dso_local void @test_atomic_load_min_i64_noret(i64 %offset) nounwind {526; CHECK-LABEL: test_atomic_load_min_i64_noret:527; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret:528; OUTLINE-ATOMICS: // %bb.0:529; OUTLINE-ATOMICS-NEXT: adrp x8, var64530; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64531; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start532; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1533; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]534; OUTLINE-ATOMICS-NEXT: cmp x9, x0535; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le536; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]537; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]538; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end539; OUTLINE-ATOMICS-NEXT: ret540 atomicrmw min ptr @var64, i64 %offset seq_cst541; CHECK-NOT: dmb542; CHECK: adrp [[TMPADDR:x[0-9]+]], var64543; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64544 545; CHECK: ldsminal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]546; CHECK-NOT: dmb547 ret void548}549 550define dso_local i8 @test_atomic_load_umin_i8(i8 %offset) nounwind {551; CHECK-LABEL: test_atomic_load_umin_i8:552; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8:553; OUTLINE-ATOMICS: // %bb.0:554; OUTLINE-ATOMICS-NEXT: adrp x8, var8555; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8556; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff557; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start558; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1559; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]560; OUTLINE-ATOMICS-NEXT: cmp w0, w9561; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls562; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]563; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]564; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end565; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0566; OUTLINE-ATOMICS-NEXT: ret567 %old = atomicrmw umin ptr @var8, i8 %offset seq_cst568; CHECK-NOT: dmb569; CHECK: adrp [[TMPADDR:x[0-9]+]], var8570; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8571 572; CHECK: lduminalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]573; CHECK-NOT: dmb574 575 ret i8 %old576}577 578define dso_local i16 @test_atomic_load_umin_i16(i16 %offset) nounwind {579; CHECK-LABEL: test_atomic_load_umin_i16:580; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16:581; OUTLINE-ATOMICS: // %bb.0:582; OUTLINE-ATOMICS-NEXT: adrp x8, var16583; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16584; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff585; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start586; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1587; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]588; OUTLINE-ATOMICS-NEXT: cmp w0, w9589; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls590; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]591; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]592; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end593; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0594; OUTLINE-ATOMICS-NEXT: ret595 %old = atomicrmw umin ptr @var16, i16 %offset seq_cst596; CHECK-NOT: dmb597; CHECK: adrp [[TMPADDR:x[0-9]+]], var16598; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16599 600; CHECK: lduminalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]601; CHECK-NOT: dmb602 603 ret i16 %old604}605 606define dso_local i32 @test_atomic_load_umin_i32(i32 %offset) nounwind {607; CHECK-LABEL: test_atomic_load_umin_i32:608; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32:609; OUTLINE-ATOMICS: // %bb.0:610; OUTLINE-ATOMICS-NEXT: adrp x9, var32611; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32612; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start613; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1614; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]615; OUTLINE-ATOMICS-NEXT: cmp w8, w0616; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls617; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]618; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]619; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end620; OUTLINE-ATOMICS-NEXT: mov w0, w8621; OUTLINE-ATOMICS-NEXT: ret622 %old = atomicrmw umin ptr @var32, i32 %offset seq_cst623; CHECK-NOT: dmb624; CHECK: adrp [[TMPADDR:x[0-9]+]], var32625; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32626 627; CHECK: lduminal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]628; CHECK-NOT: dmb629 630 ret i32 %old631}632 633define dso_local i64 @test_atomic_load_umin_i64(i64 %offset) nounwind {634; CHECK-LABEL: test_atomic_load_umin_i64:635; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64:636; OUTLINE-ATOMICS: // %bb.0:637; OUTLINE-ATOMICS-NEXT: adrp x9, var64638; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64639; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start640; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1641; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]642; OUTLINE-ATOMICS-NEXT: cmp x8, x0643; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls644; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]645; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]646; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end647; OUTLINE-ATOMICS-NEXT: mov x0, x8648; OUTLINE-ATOMICS-NEXT: ret649 %old = atomicrmw umin ptr @var64, i64 %offset seq_cst650; CHECK-NOT: dmb651; CHECK: adrp [[TMPADDR:x[0-9]+]], var64652; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64653 654; CHECK: lduminal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]655; CHECK-NOT: dmb656 657 ret i64 %old658}659 660define dso_local void @test_atomic_load_umin_i32_noret(i32 %offset) nounwind {661; CHECK-LABEL: test_atomic_load_umin_i32_noret:662; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret:663; OUTLINE-ATOMICS: // %bb.0:664; OUTLINE-ATOMICS-NEXT: adrp x8, var32665; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32666; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start667; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1668; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]669; OUTLINE-ATOMICS-NEXT: cmp w9, w0670; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls671; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]672; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]673; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end674; OUTLINE-ATOMICS-NEXT: ret675 atomicrmw umin ptr @var32, i32 %offset seq_cst676; CHECK-NOT: dmb677; CHECK: adrp [[TMPADDR:x[0-9]+]], var32678; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32679 680; CHECK: lduminal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]681; CHECK-NOT: dmb682 ret void683}684 685define dso_local void @test_atomic_load_umin_i64_noret(i64 %offset) nounwind {686; CHECK-LABEL: test_atomic_load_umin_i64_noret:687; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret:688; OUTLINE-ATOMICS: // %bb.0:689; OUTLINE-ATOMICS-NEXT: adrp x8, var64690; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64691; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start692; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1693; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]694; OUTLINE-ATOMICS-NEXT: cmp x9, x0695; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls696; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]697; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]698; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end699; OUTLINE-ATOMICS-NEXT: ret700 atomicrmw umin ptr @var64, i64 %offset seq_cst701; CHECK-NOT: dmb702; CHECK: adrp [[TMPADDR:x[0-9]+]], var64703; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64704 705; CHECK: lduminal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]706; CHECK-NOT: dmb707 ret void708}709 710define dso_local i8 @test_atomic_load_max_i8(i8 %offset) nounwind {711; CHECK-LABEL: test_atomic_load_max_i8:712; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8:713; OUTLINE-ATOMICS: // %bb.0:714; OUTLINE-ATOMICS-NEXT: adrp x9, var8715; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8716; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start717; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1718; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]719; OUTLINE-ATOMICS-NEXT: sxtb w8, w10720; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb721; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt722; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]723; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]724; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end725; OUTLINE-ATOMICS-NEXT: mov w0, w8726; OUTLINE-ATOMICS-NEXT: ret727 %old = atomicrmw max ptr @var8, i8 %offset seq_cst728; CHECK-NOT: dmb729; CHECK: adrp [[TMPADDR:x[0-9]+]], var8730; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8731 732; CHECK: ldsmaxalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]733; CHECK-NOT: dmb734 735 ret i8 %old736}737 738define dso_local i16 @test_atomic_load_max_i16(i16 %offset) nounwind {739; CHECK-LABEL: test_atomic_load_max_i16:740; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16:741; OUTLINE-ATOMICS: // %bb.0:742; OUTLINE-ATOMICS-NEXT: adrp x9, var16743; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16744; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start745; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1746; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]747; OUTLINE-ATOMICS-NEXT: sxth w8, w10748; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth749; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt750; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]751; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]752; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end753; OUTLINE-ATOMICS-NEXT: mov w0, w8754; OUTLINE-ATOMICS-NEXT: ret755 %old = atomicrmw max ptr @var16, i16 %offset seq_cst756; CHECK-NOT: dmb757; CHECK: adrp [[TMPADDR:x[0-9]+]], var16758; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16759 760; CHECK: ldsmaxalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]761; CHECK-NOT: dmb762 763 ret i16 %old764}765 766define dso_local i32 @test_atomic_load_max_i32(i32 %offset) nounwind {767; CHECK-LABEL: test_atomic_load_max_i32:768; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32:769; OUTLINE-ATOMICS: // %bb.0:770; OUTLINE-ATOMICS-NEXT: adrp x9, var32771; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32772; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start773; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1774; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]775; OUTLINE-ATOMICS-NEXT: cmp w8, w0776; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt777; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]778; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]779; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end780; OUTLINE-ATOMICS-NEXT: mov w0, w8781; OUTLINE-ATOMICS-NEXT: ret782 %old = atomicrmw max ptr @var32, i32 %offset seq_cst783; CHECK-NOT: dmb784; CHECK: adrp [[TMPADDR:x[0-9]+]], var32785; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32786 787; CHECK: ldsmaxal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]788; CHECK-NOT: dmb789 790 ret i32 %old791}792 793define dso_local i64 @test_atomic_load_max_i64(i64 %offset) nounwind {794; CHECK-LABEL: test_atomic_load_max_i64:795; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64:796; OUTLINE-ATOMICS: // %bb.0:797; OUTLINE-ATOMICS-NEXT: adrp x9, var64798; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64799; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start800; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1801; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]802; OUTLINE-ATOMICS-NEXT: cmp x8, x0803; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt804; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]805; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]806; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end807; OUTLINE-ATOMICS-NEXT: mov x0, x8808; OUTLINE-ATOMICS-NEXT: ret809 %old = atomicrmw max ptr @var64, i64 %offset seq_cst810; CHECK-NOT: dmb811; CHECK: adrp [[TMPADDR:x[0-9]+]], var64812; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64813 814; CHECK: ldsmaxal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]815; CHECK-NOT: dmb816 817 ret i64 %old818}819 820define dso_local void @test_atomic_load_max_i32_noret(i32 %offset) nounwind {821; CHECK-LABEL: test_atomic_load_max_i32_noret:822; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret:823; OUTLINE-ATOMICS: // %bb.0:824; OUTLINE-ATOMICS-NEXT: adrp x8, var32825; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32826; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start827; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1828; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]829; OUTLINE-ATOMICS-NEXT: cmp w9, w0830; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt831; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]832; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]833; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end834; OUTLINE-ATOMICS-NEXT: ret835 atomicrmw max ptr @var32, i32 %offset seq_cst836; CHECK-NOT: dmb837; CHECK: adrp [[TMPADDR:x[0-9]+]], var32838; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32839 840; CHECK: ldsmaxal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]841; CHECK-NOT: dmb842 ret void843}844 845define dso_local void @test_atomic_load_max_i64_noret(i64 %offset) nounwind {846; CHECK-LABEL: test_atomic_load_max_i64_noret:847; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret:848; OUTLINE-ATOMICS: // %bb.0:849; OUTLINE-ATOMICS-NEXT: adrp x8, var64850; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64851; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start852; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1853; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]854; OUTLINE-ATOMICS-NEXT: cmp x9, x0855; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt856; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]857; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]858; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end859; OUTLINE-ATOMICS-NEXT: ret860 atomicrmw max ptr @var64, i64 %offset seq_cst861; CHECK-NOT: dmb862; CHECK: adrp [[TMPADDR:x[0-9]+]], var64863; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64864 865; CHECK: ldsmaxal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]866; CHECK-NOT: dmb867 ret void868}869 870define dso_local i8 @test_atomic_load_umax_i8(i8 %offset) nounwind {871; CHECK-LABEL: test_atomic_load_umax_i8:872; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8:873; OUTLINE-ATOMICS: // %bb.0:874; OUTLINE-ATOMICS-NEXT: adrp x8, var8875; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8876; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff877; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start878; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1879; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]880; OUTLINE-ATOMICS-NEXT: cmp w0, w9881; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi882; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]883; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]884; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end885; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0886; OUTLINE-ATOMICS-NEXT: ret887 %old = atomicrmw umax ptr @var8, i8 %offset seq_cst888; CHECK-NOT: dmb889; CHECK: adrp [[TMPADDR:x[0-9]+]], var8890; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8891 892; CHECK: ldumaxalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]893; CHECK-NOT: dmb894 895 ret i8 %old896}897 898define dso_local i16 @test_atomic_load_umax_i16(i16 %offset) nounwind {899; CHECK-LABEL: test_atomic_load_umax_i16:900; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16:901; OUTLINE-ATOMICS: // %bb.0:902; OUTLINE-ATOMICS-NEXT: adrp x8, var16903; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16904; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff905; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start906; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1907; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]908; OUTLINE-ATOMICS-NEXT: cmp w0, w9909; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi910; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]911; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]912; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end913; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0914; OUTLINE-ATOMICS-NEXT: ret915 %old = atomicrmw umax ptr @var16, i16 %offset seq_cst916; CHECK-NOT: dmb917; CHECK: adrp [[TMPADDR:x[0-9]+]], var16918; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16919 920; CHECK: ldumaxalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]921; CHECK-NOT: dmb922 923 ret i16 %old924}925 926define dso_local i32 @test_atomic_load_umax_i32(i32 %offset) nounwind {927; CHECK-LABEL: test_atomic_load_umax_i32:928; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32:929; OUTLINE-ATOMICS: // %bb.0:930; OUTLINE-ATOMICS-NEXT: adrp x9, var32931; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32932; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start933; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1934; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]935; OUTLINE-ATOMICS-NEXT: cmp w8, w0936; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi937; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]938; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]939; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end940; OUTLINE-ATOMICS-NEXT: mov w0, w8941; OUTLINE-ATOMICS-NEXT: ret942 %old = atomicrmw umax ptr @var32, i32 %offset seq_cst943; CHECK-NOT: dmb944; CHECK: adrp [[TMPADDR:x[0-9]+]], var32945; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32946 947; CHECK: ldumaxal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]948; CHECK-NOT: dmb949 950 ret i32 %old951}952 953define dso_local i64 @test_atomic_load_umax_i64(i64 %offset) nounwind {954; CHECK-LABEL: test_atomic_load_umax_i64:955; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64:956; OUTLINE-ATOMICS: // %bb.0:957; OUTLINE-ATOMICS-NEXT: adrp x9, var64958; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64959; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start960; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1961; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]962; OUTLINE-ATOMICS-NEXT: cmp x8, x0963; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi964; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]965; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]966; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end967; OUTLINE-ATOMICS-NEXT: mov x0, x8968; OUTLINE-ATOMICS-NEXT: ret969 %old = atomicrmw umax ptr @var64, i64 %offset seq_cst970; CHECK-NOT: dmb971; CHECK: adrp [[TMPADDR:x[0-9]+]], var64972; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64973 974; CHECK: ldumaxal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]975; CHECK-NOT: dmb976 977 ret i64 %old978}979 980define dso_local void @test_atomic_load_umax_i32_noret(i32 %offset) nounwind {981; CHECK-LABEL: test_atomic_load_umax_i32_noret:982; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret:983; OUTLINE-ATOMICS: // %bb.0:984; OUTLINE-ATOMICS-NEXT: adrp x8, var32985; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32986; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start987; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1988; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]989; OUTLINE-ATOMICS-NEXT: cmp w9, w0990; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi991; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]992; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]993; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end994; OUTLINE-ATOMICS-NEXT: ret995 atomicrmw umax ptr @var32, i32 %offset seq_cst996; CHECK-NOT: dmb997; CHECK: adrp [[TMPADDR:x[0-9]+]], var32998; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32999 1000; CHECK: ldumaxal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]1001; CHECK-NOT: dmb1002 ret void1003}1004 1005define dso_local void @test_atomic_load_umax_i64_noret(i64 %offset) nounwind {1006; CHECK-LABEL: test_atomic_load_umax_i64_noret:1007; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret:1008; OUTLINE-ATOMICS: // %bb.0:1009; OUTLINE-ATOMICS-NEXT: adrp x8, var641010; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var641011; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start1012; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=11013; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]1014; OUTLINE-ATOMICS-NEXT: cmp x9, x01015; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi1016; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]1017; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]1018; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end1019; OUTLINE-ATOMICS-NEXT: ret1020 atomicrmw umax ptr @var64, i64 %offset seq_cst1021; CHECK-NOT: dmb1022; CHECK: adrp [[TMPADDR:x[0-9]+]], var641023; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var641024 1025; CHECK: ldumaxal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]1026; CHECK-NOT: dmb1027 ret void1028}1029 1030define dso_local i8 @test_atomic_load_xchg_i8(i8 %offset) nounwind {1031; CHECK-LABEL: test_atomic_load_xchg_i8:1032; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8:1033; OUTLINE-ATOMICS: // %bb.0:1034; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1035; OUTLINE-ATOMICS-NEXT: adrp x1, var81036; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var81037; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_acq_rel1038; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1039; OUTLINE-ATOMICS-NEXT: ret1040 %old = atomicrmw xchg ptr @var8, i8 %offset seq_cst1041; CHECK-NOT: dmb1042; CHECK: adrp [[TMPADDR:x[0-9]+]], var81043; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var81044 1045; CHECK: swpalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]1046; CHECK-NOT: dmb1047 1048 ret i8 %old1049}1050 1051define dso_local i16 @test_atomic_load_xchg_i16(i16 %offset) nounwind {1052; CHECK-LABEL: test_atomic_load_xchg_i16:1053; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16:1054; OUTLINE-ATOMICS: // %bb.0:1055; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1056; OUTLINE-ATOMICS-NEXT: adrp x1, var161057; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var161058; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_acq_rel1059; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1060; OUTLINE-ATOMICS-NEXT: ret1061 %old = atomicrmw xchg ptr @var16, i16 %offset seq_cst1062; CHECK-NOT: dmb1063; CHECK: adrp [[TMPADDR:x[0-9]+]], var161064; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var161065 1066; CHECK: swpalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]1067; CHECK-NOT: dmb1068 1069 ret i16 %old1070}1071 1072define dso_local i32 @test_atomic_load_xchg_i32(i32 %offset) nounwind {1073; CHECK-LABEL: test_atomic_load_xchg_i32:1074; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32:1075; OUTLINE-ATOMICS: // %bb.0:1076; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1077; OUTLINE-ATOMICS-NEXT: adrp x1, var321078; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var321079; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel1080; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1081; OUTLINE-ATOMICS-NEXT: ret1082 %old = atomicrmw xchg ptr @var32, i32 %offset seq_cst1083; CHECK-NOT: dmb1084; CHECK: adrp [[TMPADDR:x[0-9]+]], var321085; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var321086 1087; CHECK: swpal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]1088; CHECK-NOT: dmb1089 1090 ret i32 %old1091}1092 1093define dso_local i64 @test_atomic_load_xchg_i64(i64 %offset) nounwind {1094; CHECK-LABEL: test_atomic_load_xchg_i64:1095; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64:1096; OUTLINE-ATOMICS: // %bb.0:1097; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1098; OUTLINE-ATOMICS-NEXT: adrp x1, var641099; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var641100; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel1101; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1102; OUTLINE-ATOMICS-NEXT: ret1103 %old = atomicrmw xchg ptr @var64, i64 %offset seq_cst1104; CHECK-NOT: dmb1105; CHECK: adrp [[TMPADDR:x[0-9]+]], var641106; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var641107 1108; CHECK: swpal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]1109; CHECK-NOT: dmb1110 1111 ret i64 %old1112}1113 1114define dso_local void @test_atomic_load_xchg_i32_noret(i32 %offset) nounwind {1115; CHECK-LABEL: test_atomic_load_xchg_i32_noret:1116; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret:1117; OUTLINE-ATOMICS: // %bb.0:1118; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1119; OUTLINE-ATOMICS-NEXT: adrp x1, var321120; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var321121; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel1122; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1123; OUTLINE-ATOMICS-NEXT: ret1124 atomicrmw xchg ptr @var32, i32 %offset seq_cst1125; CHECK-NOT: dmb1126; CHECK: adrp [[TMPADDR:x[0-9]+]], var321127; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var321128 1129; CHECK: swpal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]1130; CHECK-NOT: dmb1131 1132 ret void1133}1134 1135define dso_local void @test_atomic_load_xchg_i64_noret(i64 %offset) nounwind {1136; CHECK-LABEL: test_atomic_load_xchg_i64_noret:1137; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret:1138; OUTLINE-ATOMICS: // %bb.0:1139; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1140; OUTLINE-ATOMICS-NEXT: adrp x1, var641141; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var641142; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel1143; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1144; OUTLINE-ATOMICS-NEXT: ret1145 atomicrmw xchg ptr @var64, i64 %offset seq_cst1146; CHECK-NOT: dmb1147; CHECK: adrp [[TMPADDR:x[0-9]+]], var641148; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var641149 1150; CHECK: swpal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]1151; CHECK-NOT: dmb1152 1153 ret void1154}1155 1156define dso_local i8 @test_atomic_cmpxchg_i8(i8 %wanted, i8 %new) nounwind {1157; CHECK-LABEL: test_atomic_cmpxchg_i8:1158; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8:1159; OUTLINE-ATOMICS: // %bb.0:1160; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1161; OUTLINE-ATOMICS-NEXT: adrp x2, var81162; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var81163; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_acq1164; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1165; OUTLINE-ATOMICS-NEXT: ret1166 %pair = cmpxchg ptr @var8, i8 %wanted, i8 %new acquire acquire1167 %old = extractvalue { i8, i1 } %pair, 01168 1169; CHECK-NOT: dmb1170; CHECK: adrp [[TMPADDR:x[0-9]+]], var81171; CHECK-NEXT: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var81172; CHECK-NEXT: casab w0, w1, [x[[ADDR]]]1173; CHECK-NEXT: ret1174 1175 ret i8 %old1176}1177 1178define dso_local i1 @test_atomic_cmpxchg_i8_1(i8 %wanted, i8 %new) nounwind {1179; CHECK-LABEL: test_atomic_cmpxchg_i8_1:1180; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8_1:1181; OUTLINE-ATOMICS: // %bb.0:1182; OUTLINE-ATOMICS-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill1183; OUTLINE-ATOMICS-NEXT: mov w19, w01184; OUTLINE-ATOMICS-NEXT: adrp x2, var81185; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var81186; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_acq1187; OUTLINE-ATOMICS-NEXT: cmp w0, w19, uxtb1188; OUTLINE-ATOMICS-NEXT: cset w0, eq1189; OUTLINE-ATOMICS-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload1190; OUTLINE-ATOMICS-NEXT: ret1191 %pair = cmpxchg ptr @var8, i8 %wanted, i8 %new acquire acquire1192 %success = extractvalue { i8, i1 } %pair, 11193 1194; CHECK-NOT: dmb1195; CHECK: adrp [[TMPADDR:x[0-9]+]], var81196; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var81197 1198; CHECK: casab w[[NEW:[0-9]+]], w1, [x[[ADDR]]]1199; CHECK-NEXT: cmp w[[NEW]], w0, uxtb1200; CHECK-NEXT: cset w0, eq1201; CHECK-NEXT: ret1202 ret i1 %success1203}1204 1205define dso_local i16 @test_atomic_cmpxchg_i16(i16 %wanted, i16 %new) nounwind {1206; CHECK-LABEL: test_atomic_cmpxchg_i16:1207; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16:1208; OUTLINE-ATOMICS: // %bb.0:1209; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1210; OUTLINE-ATOMICS-NEXT: adrp x2, var161211; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var161212; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_acq1213; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1214; OUTLINE-ATOMICS-NEXT: ret1215 %pair = cmpxchg ptr @var16, i16 %wanted, i16 %new acquire acquire1216 %old = extractvalue { i16, i1 } %pair, 01217 1218; CHECK-NOT: dmb1219; CHECK: adrp [[TMPADDR:x[0-9]+]], var161220; CHECK-NEXT: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var161221; CHECK-NEXT: casah w0, w1, [x[[ADDR]]]1222; CHECK-NEXT: ret1223 1224 ret i16 %old1225}1226 1227define dso_local i1 @test_atomic_cmpxchg_i16_1(i16 %wanted, i16 %new) nounwind {1228; CHECK-LABEL: test_atomic_cmpxchg_i16_1:1229; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16_1:1230; OUTLINE-ATOMICS: // %bb.0:1231; OUTLINE-ATOMICS-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill1232; OUTLINE-ATOMICS-NEXT: mov w19, w01233; OUTLINE-ATOMICS-NEXT: adrp x2, var161234; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var161235; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_acq1236; OUTLINE-ATOMICS-NEXT: cmp w0, w19, uxth1237; OUTLINE-ATOMICS-NEXT: cset w0, eq1238; OUTLINE-ATOMICS-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload1239; OUTLINE-ATOMICS-NEXT: ret1240 %pair = cmpxchg ptr @var16, i16 %wanted, i16 %new acquire acquire1241 %success = extractvalue { i16, i1 } %pair, 11242 1243; CHECK-NOT: dmb1244; CHECK: adrp [[TMPADDR:x[0-9]+]], var161245; CHECK-NEXT: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var161246 1247; CHECK: casah w[[NEW:[0-9]+]], w1, [x[[ADDR]]]1248; CHECK-NEXT: cmp w[[NEW]], w0, uxth1249; CHECK-NEXT: cset w0, eq1250; CHECK-NEXT: ret1251 1252 ret i1 %success1253}1254 1255define dso_local i32 @test_atomic_cmpxchg_i32(i32 %wanted, i32 %new) nounwind {1256; CHECK-LABEL: test_atomic_cmpxchg_i32:1257; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32:1258; OUTLINE-ATOMICS: // %bb.0:1259; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1260; OUTLINE-ATOMICS-NEXT: adrp x2, var321261; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var321262; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq1263; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1264; OUTLINE-ATOMICS-NEXT: ret1265 %pair = cmpxchg ptr @var32, i32 %wanted, i32 %new acquire acquire1266 %old = extractvalue { i32, i1 } %pair, 01267 1268; CHECK-NOT: dmb1269; CHECK: adrp [[TMPADDR:x[0-9]+]], var321270; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var321271 1272; CHECK: casa w0, w1, [x[[ADDR]]]1273; CHECK-NOT: dmb1274 1275 ret i32 %old1276}1277 1278define dso_local i32 @test_atomic_cmpxchg_i32_monotonic_acquire(i32 %wanted, i32 %new) nounwind {1279; CHECK-LABEL: test_atomic_cmpxchg_i32_monotonic_acquire:1280; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_monotonic_acquire:1281; OUTLINE-ATOMICS: // %bb.0:1282; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1283; OUTLINE-ATOMICS-NEXT: adrp x2, var321284; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var321285; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq1286; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1287; OUTLINE-ATOMICS-NEXT: ret1288 %pair = cmpxchg ptr @var32, i32 %wanted, i32 %new monotonic acquire1289 %old = extractvalue { i32, i1 } %pair, 01290 1291; CHECK-NOT: dmb1292; CHECK: adrp [[TMPADDR:x[0-9]+]], var321293; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var321294 1295; CHECK: casa w0, w1, [x[[ADDR]]]1296; CHECK-NOT: dmb1297 1298 ret i32 %old1299}1300 1301define dso_local i64 @test_atomic_cmpxchg_i64(i64 %wanted, i64 %new) nounwind {1302; CHECK-LABEL: test_atomic_cmpxchg_i64:1303; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i64:1304; OUTLINE-ATOMICS: // %bb.0:1305; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1306; OUTLINE-ATOMICS-NEXT: adrp x2, var641307; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var641308; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas8_acq1309; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1310; OUTLINE-ATOMICS-NEXT: ret1311 %pair = cmpxchg ptr @var64, i64 %wanted, i64 %new acquire acquire1312 %old = extractvalue { i64, i1 } %pair, 01313 1314; CHECK-NOT: dmb1315; CHECK: adrp [[TMPADDR:x[0-9]+]], var641316; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var641317 1318; CHECK: casa x0, x1, [x[[ADDR]]]1319; CHECK-NOT: dmb1320 1321 ret i64 %old1322}1323 1324define dso_local i128 @test_atomic_cmpxchg_i128(i128 %wanted, i128 %new) nounwind {1325; CHECK-LABEL: test_atomic_cmpxchg_i128:1326; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128:1327; OUTLINE-ATOMICS: // %bb.0:1328; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1329; OUTLINE-ATOMICS-NEXT: adrp x4, var1281330; OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var1281331; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq1332; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1333; OUTLINE-ATOMICS-NEXT: ret1334 %pair = cmpxchg ptr @var128, i128 %wanted, i128 %new acquire acquire1335 %old = extractvalue { i128, i1 } %pair, 01336 1337; CHECK-NOT: dmb1338; CHECK: adrp [[TMPADDR:x[0-9]+]], var1281339; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var1281340 1341; CHECK: caspa x0, x1, x2, x3, [x[[ADDR]]]1342; CHECK-NOT: dmb1343 1344 ret i128 %old1345}1346 1347define dso_local i128 @test_atomic_cmpxchg_i128_monotonic_seqcst(i128 %wanted, i128 %new) nounwind {1348; CHECK-LABEL: test_atomic_cmpxchg_i128_monotonic_seqcst:1349; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_monotonic_seqcst:1350; OUTLINE-ATOMICS: // %bb.0:1351; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1352; OUTLINE-ATOMICS-NEXT: adrp x4, var1281353; OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var1281354; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq_rel1355; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1356; OUTLINE-ATOMICS-NEXT: ret1357 %pair = cmpxchg ptr @var128, i128 %wanted, i128 %new monotonic seq_cst1358 %old = extractvalue { i128, i1 } %pair, 01359 1360; CHECK-NOT: dmb1361; CHECK: adrp [[TMPADDR:x[0-9]+]], var1281362; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var1281363 1364; CHECK: caspal x0, x1, x2, x3, [x[[ADDR]]]1365; CHECK-NOT: dmb1366 1367 ret i128 %old1368}1369 1370define dso_local i128 @test_atomic_cmpxchg_i128_release_acquire(i128 %wanted, i128 %new) nounwind {1371; CHECK-LABEL: test_atomic_cmpxchg_i128_release_acquire:1372; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_release_acquire:1373; OUTLINE-ATOMICS: // %bb.0:1374; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1375; OUTLINE-ATOMICS-NEXT: adrp x4, var1281376; OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var1281377; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq_rel1378; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1379; OUTLINE-ATOMICS-NEXT: ret1380 %pair = cmpxchg ptr @var128, i128 %wanted, i128 %new release acquire1381 %old = extractvalue { i128, i1 } %pair, 01382 1383; CHECK-NOT: dmb1384; CHECK: adrp [[TMPADDR:x[0-9]+]], var1281385; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var1281386 1387; CHECK: caspal x0, x1, x2, x3, [x[[ADDR]]]1388; CHECK-NOT: dmb1389 1390 ret i128 %old1391}1392 1393define dso_local i8 @test_atomic_load_sub_i8(i8 %offset) nounwind {1394; CHECK-LABEL: test_atomic_load_sub_i8:1395; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8:1396; OUTLINE-ATOMICS: // %bb.0:1397; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1398; OUTLINE-ATOMICS-NEXT: neg w0, w01399; OUTLINE-ATOMICS-NEXT: adrp x1, var81400; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var81401; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel1402; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1403; OUTLINE-ATOMICS-NEXT: ret1404 %old = atomicrmw sub ptr @var8, i8 %offset seq_cst1405; CHECK-NOT: dmb1406; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]1407; CHECK: adrp [[TMPADDR:x[0-9]+]], var81408; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var81409 1410; CHECK: ldaddalb w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]1411; CHECK-NOT: dmb1412 1413 ret i8 %old1414}1415 1416define dso_local i16 @test_atomic_load_sub_i16(i16 %offset) nounwind {1417; CHECK-LABEL: test_atomic_load_sub_i16:1418; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16:1419; OUTLINE-ATOMICS: // %bb.0:1420; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1421; OUTLINE-ATOMICS-NEXT: neg w0, w01422; OUTLINE-ATOMICS-NEXT: adrp x1, var161423; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var161424; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel1425; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1426; OUTLINE-ATOMICS-NEXT: ret1427 %old = atomicrmw sub ptr @var16, i16 %offset seq_cst1428; CHECK-NOT: dmb1429; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]1430; CHECK: adrp [[TMPADDR:x[0-9]+]], var161431; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var161432 1433; CHECK: ldaddalh w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]1434; CHECK-NOT: dmb1435 1436 ret i16 %old1437}1438 1439define dso_local i32 @test_atomic_load_sub_i32(i32 %offset) nounwind {1440; CHECK-LABEL: test_atomic_load_sub_i32:1441; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32:1442; OUTLINE-ATOMICS: // %bb.0:1443; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1444; OUTLINE-ATOMICS-NEXT: neg w0, w01445; OUTLINE-ATOMICS-NEXT: adrp x1, var321446; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var321447; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel1448; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1449; OUTLINE-ATOMICS-NEXT: ret1450 %old = atomicrmw sub ptr @var32, i32 %offset seq_cst1451; CHECK-NOT: dmb1452; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]1453; CHECK: adrp [[TMPADDR:x[0-9]+]], var321454; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var321455 1456; CHECK: ldaddal w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]1457; CHECK-NOT: dmb1458 1459 ret i32 %old1460}1461 1462define dso_local i64 @test_atomic_load_sub_i64(i64 %offset) nounwind {1463; CHECK-LABEL: test_atomic_load_sub_i64:1464; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64:1465; OUTLINE-ATOMICS: // %bb.0:1466; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1467; OUTLINE-ATOMICS-NEXT: neg x0, x01468; OUTLINE-ATOMICS-NEXT: adrp x1, var641469; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var641470; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel1471; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1472; OUTLINE-ATOMICS-NEXT: ret1473 %old = atomicrmw sub ptr @var64, i64 %offset seq_cst1474; CHECK-NOT: dmb1475; CHECK: neg x[[NEG:[0-9]+]], x[[OLD:[0-9]+]]1476; CHECK: adrp [[TMPADDR:x[0-9]+]], var641477; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var641478 1479; CHECK: ldaddal x[[NEG]], x[[NEW:[0-9]+]], [x[[ADDR]]]1480; CHECK-NOT: dmb1481 1482 ret i64 %old1483}1484 1485define dso_local void @test_atomic_load_sub_i32_noret(i32 %offset) nounwind {1486; CHECK-LABEL: test_atomic_load_sub_i32_noret:1487; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret:1488; OUTLINE-ATOMICS: // %bb.0:1489; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1490; OUTLINE-ATOMICS-NEXT: neg w0, w01491; OUTLINE-ATOMICS-NEXT: adrp x1, var321492; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var321493; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel1494; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1495; OUTLINE-ATOMICS-NEXT: ret1496 atomicrmw sub ptr @var32, i32 %offset seq_cst1497; CHECK-NOT: dmb1498; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]1499; CHECK: adrp [[TMPADDR:x[0-9]+]], var321500; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var321501 1502; CHECK: ldaddal w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]1503; CHECK-NOT: dmb1504 1505 ret void1506}1507 1508define dso_local void @test_atomic_load_sub_i64_noret(i64 %offset) nounwind {1509; CHECK-LABEL: test_atomic_load_sub_i64_noret:1510; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret:1511; OUTLINE-ATOMICS: // %bb.0:1512; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1513; OUTLINE-ATOMICS-NEXT: neg x0, x01514; OUTLINE-ATOMICS-NEXT: adrp x1, var641515; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var641516; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel1517; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1518; OUTLINE-ATOMICS-NEXT: ret1519 atomicrmw sub ptr @var64, i64 %offset seq_cst1520; CHECK-NOT: dmb1521; CHECK: neg x[[NEG:[0-9]+]], x[[OLD:[0-9]+]]1522; CHECK: adrp [[TMPADDR:x[0-9]+]], var641523; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var641524 1525; CHECK: ldaddal x[[NEG]], x[[NEW:[0-9]+]], [x[[ADDR]]]1526; CHECK-NOT: dmb1527 1528 ret void1529}1530 1531define dso_local i8 @test_atomic_load_sub_i8_neg_imm() nounwind {1532; CHECK-LABEL: test_atomic_load_sub_i8_neg_imm:1533; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_neg_imm:1534; OUTLINE-ATOMICS: // %bb.0:1535; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1536; OUTLINE-ATOMICS-NEXT: adrp x1, var81537; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var81538; OUTLINE-ATOMICS-NEXT: mov w0, #11539; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel1540; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1541; OUTLINE-ATOMICS-NEXT: ret1542 %old = atomicrmw sub ptr @var8, i8 -1 seq_cst1543 1544; CHECK-NOT: dmb1545; CHECK: mov w[[IMM:[0-9]+]], #11546; CHECK: adrp [[TMPADDR:x[0-9]+]], var81547; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var81548; CHECK: ldaddalb w[[IMM]], w[[NEW:[0-9]+]], [x[[ADDR]]]1549; CHECK-NOT: dmb1550 1551 ret i8 %old1552}1553 1554define dso_local i16 @test_atomic_load_sub_i16_neg_imm() nounwind {1555; CHECK-LABEL: test_atomic_load_sub_i16_neg_imm:1556; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_neg_imm:1557; OUTLINE-ATOMICS: // %bb.0:1558; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1559; OUTLINE-ATOMICS-NEXT: adrp x1, var161560; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var161561; OUTLINE-ATOMICS-NEXT: mov w0, #11562; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel1563; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1564; OUTLINE-ATOMICS-NEXT: ret1565 %old = atomicrmw sub ptr @var16, i16 -1 seq_cst1566 1567; CHECK-NOT: dmb1568; CHECK: mov w[[IMM:[0-9]+]], #11569; CHECK: adrp [[TMPADDR:x[0-9]+]], var161570; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var161571; CHECK: ldaddalh w[[IMM]], w[[NEW:[0-9]+]], [x[[ADDR]]]1572; CHECK-NOT: dmb1573 1574 ret i16 %old1575}1576 1577define dso_local i32 @test_atomic_load_sub_i32_neg_imm() nounwind {1578; CHECK-LABEL: test_atomic_load_sub_i32_neg_imm:1579; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_neg_imm:1580; OUTLINE-ATOMICS: // %bb.0:1581; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1582; OUTLINE-ATOMICS-NEXT: adrp x1, var321583; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var321584; OUTLINE-ATOMICS-NEXT: mov w0, #11585; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel1586; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1587; OUTLINE-ATOMICS-NEXT: ret1588 %old = atomicrmw sub ptr @var32, i32 -1 seq_cst1589 1590; CHECK-NOT: dmb1591; CHECK: mov w[[IMM:[0-9]+]], #11592; CHECK: adrp [[TMPADDR:x[0-9]+]], var321593; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var321594; CHECK: ldaddal w[[IMM]], w[[NEW:[0-9]+]], [x[[ADDR]]]1595; CHECK-NOT: dmb1596 1597 ret i32 %old1598}1599 1600define dso_local i64 @test_atomic_load_sub_i64_neg_imm() nounwind {1601; CHECK-LABEL: test_atomic_load_sub_i64_neg_imm:1602; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_neg_imm:1603; OUTLINE-ATOMICS: // %bb.0:1604; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1605; OUTLINE-ATOMICS-NEXT: adrp x1, var641606; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var641607; OUTLINE-ATOMICS-NEXT: mov w0, #11608; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel1609; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1610; OUTLINE-ATOMICS-NEXT: ret1611 %old = atomicrmw sub ptr @var64, i64 -1 seq_cst1612 1613; CHECK-NOT: dmb1614; CHECK: mov w[[IMM:[0-9]+]], #11615; CHECK: adrp [[TMPADDR:x[0-9]+]], var641616; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var641617; CHECK: ldaddal x[[IMM]], x[[NEW:[0-9]+]], [x[[ADDR]]]1618; CHECK-NOT: dmb1619 1620 ret i64 %old1621}1622 1623define dso_local i8 @test_atomic_load_sub_i8_neg_arg(i8 %offset) nounwind {1624; CHECK-LABEL: test_atomic_load_sub_i8_neg_arg:1625; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_neg_arg:1626; OUTLINE-ATOMICS: // %bb.0:1627; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1628; OUTLINE-ATOMICS-NEXT: adrp x1, var81629; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var81630; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel1631; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1632; OUTLINE-ATOMICS-NEXT: ret1633 %neg = sub i8 0, %offset1634 %old = atomicrmw sub ptr @var8, i8 %neg seq_cst1635 1636; CHECK-NOT: dmb1637; CHECK: adrp [[TMPADDR:x[0-9]+]], var81638; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var81639; CHECK: ldaddalb w0, w[[NEW:[0-9]+]], [x[[ADDR]]]1640; CHECK-NOT: dmb1641 1642 ret i8 %old1643}1644 1645define dso_local i16 @test_atomic_load_sub_i16_neg_arg(i16 %offset) nounwind {1646; CHECK-LABEL: test_atomic_load_sub_i16_neg_arg:1647; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_neg_arg:1648; OUTLINE-ATOMICS: // %bb.0:1649; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1650; OUTLINE-ATOMICS-NEXT: adrp x1, var161651; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var161652; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel1653; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1654; OUTLINE-ATOMICS-NEXT: ret1655 %neg = sub i16 0, %offset1656 %old = atomicrmw sub ptr @var16, i16 %neg seq_cst1657 1658; CHECK-NOT: dmb1659; CHECK: adrp [[TMPADDR:x[0-9]+]], var161660; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var161661; CHECK: ldaddalh w0, w[[NEW:[0-9]+]], [x[[ADDR]]]1662; CHECK-NOT: dmb1663 1664 ret i16 %old1665}1666 1667define dso_local i32 @test_atomic_load_sub_i32_neg_arg(i32 %offset) nounwind {1668; CHECK-LABEL: test_atomic_load_sub_i32_neg_arg:1669; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_neg_arg:1670; OUTLINE-ATOMICS: // %bb.0:1671; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1672; OUTLINE-ATOMICS-NEXT: adrp x1, var321673; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var321674; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel1675; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1676; OUTLINE-ATOMICS-NEXT: ret1677 %neg = sub i32 0, %offset1678 %old = atomicrmw sub ptr @var32, i32 %neg seq_cst1679 1680; CHECK-NOT: dmb1681; CHECK: adrp [[TMPADDR:x[0-9]+]], var321682; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var321683; CHECK: ldaddal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]1684; CHECK-NOT: dmb1685 1686 ret i32 %old1687}1688 1689define dso_local i64 @test_atomic_load_sub_i64_neg_arg(i64 %offset) nounwind {1690; CHECK-LABEL: test_atomic_load_sub_i64_neg_arg:1691; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_neg_arg:1692; OUTLINE-ATOMICS: // %bb.0:1693; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1694; OUTLINE-ATOMICS-NEXT: adrp x1, var641695; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var641696; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel1697; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1698; OUTLINE-ATOMICS-NEXT: ret1699 %neg = sub i64 0, %offset1700 %old = atomicrmw sub ptr @var64, i64 %neg seq_cst1701 1702; CHECK-NOT: dmb1703; CHECK: adrp [[TMPADDR:x[0-9]+]], var641704; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var641705; CHECK: ldaddal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]1706; CHECK-NOT: dmb1707 1708 ret i64 %old1709}1710 1711define dso_local i8 @test_atomic_load_and_i8(i8 %offset) nounwind {1712; CHECK-LABEL: test_atomic_load_and_i8:1713; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8:1714; OUTLINE-ATOMICS: // %bb.0:1715; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1716; OUTLINE-ATOMICS-NEXT: adrp x1, var81717; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var81718; OUTLINE-ATOMICS-NEXT: mvn w0, w01719; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel1720; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1721; OUTLINE-ATOMICS-NEXT: ret1722 %old = atomicrmw and ptr @var8, i8 %offset seq_cst1723; CHECK-NOT: dmb1724; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]1725; CHECK: adrp [[TMPADDR:x[0-9]+]], var81726; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var81727 1728; CHECK: ldclralb w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]1729; CHECK-NOT: dmb1730 ret i8 %old1731}1732 1733define dso_local i16 @test_atomic_load_and_i16(i16 %offset) nounwind {1734; CHECK-LABEL: test_atomic_load_and_i16:1735; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16:1736; OUTLINE-ATOMICS: // %bb.0:1737; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1738; OUTLINE-ATOMICS-NEXT: adrp x1, var161739; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var161740; OUTLINE-ATOMICS-NEXT: mvn w0, w01741; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel1742; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1743; OUTLINE-ATOMICS-NEXT: ret1744 %old = atomicrmw and ptr @var16, i16 %offset seq_cst1745; CHECK-NOT: dmb1746; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]1747; CHECK: adrp [[TMPADDR:x[0-9]+]], var161748; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var161749 1750; CHECK: ldclralh w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]1751; CHECK-NOT: dmb1752 ret i16 %old1753}1754 1755define dso_local i32 @test_atomic_load_and_i32(i32 %offset) nounwind {1756; CHECK-LABEL: test_atomic_load_and_i32:1757; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32:1758; OUTLINE-ATOMICS: // %bb.0:1759; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1760; OUTLINE-ATOMICS-NEXT: adrp x1, var321761; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var321762; OUTLINE-ATOMICS-NEXT: mvn w0, w01763; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel1764; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1765; OUTLINE-ATOMICS-NEXT: ret1766 %old = atomicrmw and ptr @var32, i32 %offset seq_cst1767; CHECK-NOT: dmb1768; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]1769; CHECK: adrp [[TMPADDR:x[0-9]+]], var321770; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var321771 1772; CHECK: ldclral w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]1773; CHECK-NOT: dmb1774 ret i32 %old1775}1776 1777define dso_local i64 @test_atomic_load_and_i64(i64 %offset) nounwind {1778; CHECK-LABEL: test_atomic_load_and_i64:1779; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64:1780; OUTLINE-ATOMICS: // %bb.0:1781; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1782; OUTLINE-ATOMICS-NEXT: adrp x1, var641783; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var641784; OUTLINE-ATOMICS-NEXT: mvn x0, x01785; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel1786; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1787; OUTLINE-ATOMICS-NEXT: ret1788 %old = atomicrmw and ptr @var64, i64 %offset seq_cst1789; CHECK-NOT: dmb1790; CHECK: mvn x[[NOT:[0-9]+]], x[[OLD:[0-9]+]]1791; CHECK: adrp [[TMPADDR:x[0-9]+]], var641792; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var641793 1794; CHECK: ldclral x[[NOT]], x[[NEW:[0-9]+]], [x[[ADDR]]]1795; CHECK-NOT: dmb1796 ret i64 %old1797}1798 1799define dso_local i8 @test_atomic_load_and_i8_inv_imm() nounwind {1800; CHECK-LABEL: test_atomic_load_and_i8_inv_imm:1801; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_inv_imm:1802; OUTLINE-ATOMICS: // %bb.0:1803; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1804; OUTLINE-ATOMICS-NEXT: adrp x1, var81805; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var81806; OUTLINE-ATOMICS-NEXT: mov w0, #11807; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel1808; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1809; OUTLINE-ATOMICS-NEXT: ret1810 %old = atomicrmw and ptr @var8, i8 -2 seq_cst1811; CHECK-NOT: dmb1812; CHECK: mov w[[CONST:[0-9]+]], #11813; CHECK: adrp [[TMPADDR:x[0-9]+]], var81814; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var81815; CHECK: ldclralb w[[CONST]], w[[NEW:[0-9]+]], [x[[ADDR]]]1816; CHECK-NOT: dmb1817 ret i8 %old1818}1819 1820define dso_local i16 @test_atomic_load_and_i16_inv_imm() nounwind {1821; CHECK-LABEL: test_atomic_load_and_i16_inv_imm:1822; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_inv_imm:1823; OUTLINE-ATOMICS: // %bb.0:1824; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1825; OUTLINE-ATOMICS-NEXT: adrp x1, var161826; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var161827; OUTLINE-ATOMICS-NEXT: mov w0, #11828; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel1829; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1830; OUTLINE-ATOMICS-NEXT: ret1831 %old = atomicrmw and ptr @var16, i16 -2 seq_cst1832; CHECK-NOT: dmb1833; CHECK: mov w[[CONST:[0-9]+]], #11834; CHECK: adrp [[TMPADDR:x[0-9]+]], var161835; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var161836; CHECK: ldclralh w[[CONST]], w[[NEW:[0-9]+]], [x[[ADDR]]]1837; CHECK-NOT: dmb1838 ret i16 %old1839}1840 1841define dso_local i32 @test_atomic_load_and_i32_inv_imm() nounwind {1842; CHECK-LABEL: test_atomic_load_and_i32_inv_imm:1843; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_inv_imm:1844; OUTLINE-ATOMICS: // %bb.0:1845; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1846; OUTLINE-ATOMICS-NEXT: adrp x1, var321847; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var321848; OUTLINE-ATOMICS-NEXT: mov w0, #11849; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel1850; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1851; OUTLINE-ATOMICS-NEXT: ret1852 %old = atomicrmw and ptr @var32, i32 -2 seq_cst1853; CHECK-NOT: dmb1854; CHECK: mov w[[CONST:[0-9]+]], #11855; CHECK: adrp [[TMPADDR:x[0-9]+]], var321856; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var321857; CHECK: ldclral w[[CONST]], w[[NEW:[0-9]+]], [x[[ADDR]]]1858; CHECK-NOT: dmb1859 ret i32 %old1860}1861 1862define dso_local i64 @test_atomic_load_and_i64_inv_imm() nounwind {1863; CHECK-LABEL: test_atomic_load_and_i64_inv_imm:1864; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_inv_imm:1865; OUTLINE-ATOMICS: // %bb.0:1866; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1867; OUTLINE-ATOMICS-NEXT: adrp x1, var641868; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var641869; OUTLINE-ATOMICS-NEXT: mov w0, #11870; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel1871; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1872; OUTLINE-ATOMICS-NEXT: ret1873 %old = atomicrmw and ptr @var64, i64 -2 seq_cst1874; CHECK-NOT: dmb1875; CHECK: mov w[[CONST:[0-9]+]], #11876; CHECK: adrp [[TMPADDR:x[0-9]+]], var641877; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var641878; CHECK: ldclral x[[CONST]], x[[NEW:[0-9]+]], [x[[ADDR]]]1879; CHECK-NOT: dmb1880 ret i64 %old1881}1882 1883define dso_local i8 @test_atomic_load_and_i8_inv_arg(i8 %offset) nounwind {1884; CHECK-LABEL: test_atomic_load_and_i8_inv_arg:1885; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_inv_arg:1886; OUTLINE-ATOMICS: // %bb.0:1887; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1888; OUTLINE-ATOMICS-NEXT: adrp x1, var81889; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var81890; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel1891; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1892; OUTLINE-ATOMICS-NEXT: ret1893 %inv = xor i8 %offset, -11894 %old = atomicrmw and ptr @var8, i8 %inv seq_cst1895; CHECK-NOT: dmb1896; CHECK: adrp [[TMPADDR:x[0-9]+]], var81897; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var81898; CHECK: ldclralb w0, w[[NEW:[0-9]+]], [x[[ADDR]]]1899; CHECK-NOT: dmb1900 ret i8 %old1901}1902 1903define dso_local i16 @test_atomic_load_and_i16_inv_arg(i16 %offset) nounwind {1904; CHECK-LABEL: test_atomic_load_and_i16_inv_arg:1905; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_inv_arg:1906; OUTLINE-ATOMICS: // %bb.0:1907; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1908; OUTLINE-ATOMICS-NEXT: adrp x1, var161909; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var161910; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel1911; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1912; OUTLINE-ATOMICS-NEXT: ret1913 %inv = xor i16 %offset, -11914 %old = atomicrmw and ptr @var16, i16 %inv seq_cst1915; CHECK-NOT: dmb1916; CHECK: adrp [[TMPADDR:x[0-9]+]], var161917; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var161918; CHECK: ldclralh w0, w[[NEW:[0-9]+]], [x[[ADDR]]]1919; CHECK-NOT: dmb1920 ret i16 %old1921}1922 1923define dso_local i32 @test_atomic_load_and_i32_inv_arg(i32 %offset) nounwind {1924; CHECK-LABEL: test_atomic_load_and_i32_inv_arg:1925; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_inv_arg:1926; OUTLINE-ATOMICS: // %bb.0:1927; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1928; OUTLINE-ATOMICS-NEXT: adrp x1, var321929; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var321930; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel1931; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1932; OUTLINE-ATOMICS-NEXT: ret1933 %inv = xor i32 %offset, -11934 %old = atomicrmw and ptr @var32, i32 %inv seq_cst1935; CHECK-NOT: dmb1936; CHECK: adrp [[TMPADDR:x[0-9]+]], var321937; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var321938; CHECK: ldclral w0, w[[NEW:[0-9]+]], [x[[ADDR]]]1939; CHECK-NOT: dmb1940 ret i32 %old1941}1942 1943define dso_local i64 @test_atomic_load_and_i64_inv_arg(i64 %offset) nounwind {1944; CHECK-LABEL: test_atomic_load_and_i64_inv_arg:1945; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_inv_arg:1946; OUTLINE-ATOMICS: // %bb.0:1947; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1948; OUTLINE-ATOMICS-NEXT: adrp x1, var641949; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var641950; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel1951; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1952; OUTLINE-ATOMICS-NEXT: ret1953 %inv = xor i64 %offset, -11954 %old = atomicrmw and ptr @var64, i64 %inv seq_cst1955; CHECK-NOT: dmb1956; CHECK: adrp [[TMPADDR:x[0-9]+]], var641957; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var641958; CHECK: ldclral x0, x[[NEW:[0-9]+]], [x[[ADDR]]]1959; CHECK-NOT: dmb1960 ret i64 %old1961}1962 1963define dso_local void @test_atomic_load_and_i32_noret(i32 %offset) nounwind {1964; CHECK-LABEL: test_atomic_load_and_i32_noret:1965; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret:1966; OUTLINE-ATOMICS: // %bb.0:1967; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1968; OUTLINE-ATOMICS-NEXT: adrp x1, var321969; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var321970; OUTLINE-ATOMICS-NEXT: mvn w0, w01971; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel1972; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1973; OUTLINE-ATOMICS-NEXT: ret1974 atomicrmw and ptr @var32, i32 %offset seq_cst1975; CHECK-NOT: dmb1976; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]1977; CHECK: adrp [[TMPADDR:x[0-9]+]], var321978; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var321979 1980; CHECK: ldclral w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]1981; CHECK-NOT: dmb1982 ret void1983}1984 1985define dso_local void @test_atomic_load_and_i64_noret(i64 %offset) nounwind {1986; CHECK-LABEL: test_atomic_load_and_i64_noret:1987; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret:1988; OUTLINE-ATOMICS: // %bb.0:1989; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1990; OUTLINE-ATOMICS-NEXT: adrp x1, var641991; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var641992; OUTLINE-ATOMICS-NEXT: mvn x0, x01993; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel1994; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1995; OUTLINE-ATOMICS-NEXT: ret1996 atomicrmw and ptr @var64, i64 %offset seq_cst1997; CHECK-NOT: dmb1998; CHECK: mvn x[[NOT:[0-9]+]], x[[OLD:[0-9]+]]1999; CHECK: adrp [[TMPADDR:x[0-9]+]], var642000; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642001 2002; CHECK: ldclral x[[NOT]], x[[NEW:[0-9]+]], [x[[ADDR]]]2003; CHECK-NOT: dmb2004 ret void2005}2006 2007define dso_local i8 @test_atomic_load_add_i8_acq_rel(i8 %offset) nounwind {2008; CHECK-LABEL: test_atomic_load_add_i8_acq_rel:2009; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_acq_rel:2010; OUTLINE-ATOMICS: // %bb.0:2011; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2012; OUTLINE-ATOMICS-NEXT: adrp x1, var82013; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var82014; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel2015; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2016; OUTLINE-ATOMICS-NEXT: ret2017 %old = atomicrmw add ptr @var8, i8 %offset acq_rel2018; CHECK-NOT: dmb2019; CHECK: adrp [[TMPADDR:x[0-9]+]], var82020; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var82021 2022; CHECK: ldaddalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]2023; CHECK-NOT: dmb2024 2025 ret i8 %old2026}2027 2028define dso_local i16 @test_atomic_load_add_i16_acq_rel(i16 %offset) nounwind {2029; CHECK-LABEL: test_atomic_load_add_i16_acq_rel:2030; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_acq_rel:2031; OUTLINE-ATOMICS: // %bb.0:2032; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2033; OUTLINE-ATOMICS-NEXT: adrp x1, var162034; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var162035; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel2036; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2037; OUTLINE-ATOMICS-NEXT: ret2038 %old = atomicrmw add ptr @var16, i16 %offset acq_rel2039; CHECK-NOT: dmb2040; CHECK: adrp [[TMPADDR:x[0-9]+]], var162041; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var162042 2043; CHECK: ldaddalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]2044; CHECK-NOT: dmb2045 2046 ret i16 %old2047}2048 2049define dso_local i32 @test_atomic_load_add_i32_acq_rel(i32 %offset) nounwind {2050; CHECK-LABEL: test_atomic_load_add_i32_acq_rel:2051; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_acq_rel:2052; OUTLINE-ATOMICS: // %bb.0:2053; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2054; OUTLINE-ATOMICS-NEXT: adrp x1, var322055; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322056; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel2057; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2058; OUTLINE-ATOMICS-NEXT: ret2059 %old = atomicrmw add ptr @var32, i32 %offset acq_rel2060; CHECK-NOT: dmb2061; CHECK: adrp [[TMPADDR:x[0-9]+]], var322062; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322063 2064; CHECK: ldaddal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]2065; CHECK-NOT: dmb2066 2067 ret i32 %old2068}2069 2070define dso_local i64 @test_atomic_load_add_i64_acq_rel(i64 %offset) nounwind {2071; CHECK-LABEL: test_atomic_load_add_i64_acq_rel:2072; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_acq_rel:2073; OUTLINE-ATOMICS: // %bb.0:2074; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2075; OUTLINE-ATOMICS-NEXT: adrp x1, var642076; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642077; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel2078; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2079; OUTLINE-ATOMICS-NEXT: ret2080 %old = atomicrmw add ptr @var64, i64 %offset acq_rel2081; CHECK-NOT: dmb2082; CHECK: adrp [[TMPADDR:x[0-9]+]], var642083; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642084 2085; CHECK: ldaddal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]2086; CHECK-NOT: dmb2087 2088 ret i64 %old2089}2090 2091define dso_local void @test_atomic_load_add_i32_noret_acq_rel(i32 %offset) nounwind {2092; CHECK-LABEL: test_atomic_load_add_i32_noret_acq_rel:2093; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_acq_rel:2094; OUTLINE-ATOMICS: // %bb.0:2095; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2096; OUTLINE-ATOMICS-NEXT: adrp x1, var322097; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322098; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel2099; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2100; OUTLINE-ATOMICS-NEXT: ret2101 atomicrmw add ptr @var32, i32 %offset acq_rel2102; CHECK-NOT: dmb2103; CHECK: adrp [[TMPADDR:x[0-9]+]], var322104; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322105 2106; CHECK: ldaddal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]2107; CHECK-NOT: dmb2108 ret void2109}2110 2111define dso_local void @test_atomic_load_add_i64_noret_acq_rel(i64 %offset) nounwind {2112; CHECK-LABEL: test_atomic_load_add_i64_noret_acq_rel:2113; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_acq_rel:2114; OUTLINE-ATOMICS: // %bb.0:2115; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2116; OUTLINE-ATOMICS-NEXT: adrp x1, var642117; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642118; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel2119; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2120; OUTLINE-ATOMICS-NEXT: ret2121 atomicrmw add ptr @var64, i64 %offset acq_rel2122; CHECK-NOT: dmb2123; CHECK: adrp [[TMPADDR:x[0-9]+]], var642124; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642125 2126; CHECK: ldaddal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]2127; CHECK-NOT: dmb2128 ret void2129}2130 2131define dso_local i8 @test_atomic_load_add_i8_acquire(i8 %offset) nounwind {2132; CHECK-LABEL: test_atomic_load_add_i8_acquire:2133; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_acquire:2134; OUTLINE-ATOMICS: // %bb.0:2135; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2136; OUTLINE-ATOMICS-NEXT: adrp x1, var82137; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var82138; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq2139; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2140; OUTLINE-ATOMICS-NEXT: ret2141 %old = atomicrmw add ptr @var8, i8 %offset acquire2142; CHECK-NOT: dmb2143; CHECK: adrp [[TMPADDR:x[0-9]+]], var82144; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var82145 2146; CHECK: ldaddab w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]2147; CHECK-NOT: dmb2148 2149 ret i8 %old2150}2151 2152define dso_local i16 @test_atomic_load_add_i16_acquire(i16 %offset) nounwind {2153; CHECK-LABEL: test_atomic_load_add_i16_acquire:2154; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_acquire:2155; OUTLINE-ATOMICS: // %bb.0:2156; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2157; OUTLINE-ATOMICS-NEXT: adrp x1, var162158; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var162159; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq2160; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2161; OUTLINE-ATOMICS-NEXT: ret2162 %old = atomicrmw add ptr @var16, i16 %offset acquire2163; CHECK-NOT: dmb2164; CHECK: adrp [[TMPADDR:x[0-9]+]], var162165; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var162166 2167; CHECK: ldaddah w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]2168; CHECK-NOT: dmb2169 2170 ret i16 %old2171}2172 2173define dso_local i32 @test_atomic_load_add_i32_acquire(i32 %offset) nounwind {2174; CHECK-LABEL: test_atomic_load_add_i32_acquire:2175; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_acquire:2176; OUTLINE-ATOMICS: // %bb.0:2177; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2178; OUTLINE-ATOMICS-NEXT: adrp x1, var322179; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322180; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq2181; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2182; OUTLINE-ATOMICS-NEXT: ret2183 %old = atomicrmw add ptr @var32, i32 %offset acquire2184; CHECK-NOT: dmb2185; CHECK: adrp [[TMPADDR:x[0-9]+]], var322186; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322187 2188; CHECK: ldadda w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]2189; CHECK-NOT: dmb2190 2191 ret i32 %old2192}2193 2194define dso_local i64 @test_atomic_load_add_i64_acquire(i64 %offset) nounwind {2195; CHECK-LABEL: test_atomic_load_add_i64_acquire:2196; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_acquire:2197; OUTLINE-ATOMICS: // %bb.0:2198; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2199; OUTLINE-ATOMICS-NEXT: adrp x1, var642200; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642201; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq2202; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2203; OUTLINE-ATOMICS-NEXT: ret2204 %old = atomicrmw add ptr @var64, i64 %offset acquire2205; CHECK-NOT: dmb2206; CHECK: adrp [[TMPADDR:x[0-9]+]], var642207; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642208 2209; CHECK: ldadda x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]2210; CHECK-NOT: dmb2211 2212 ret i64 %old2213}2214 2215define dso_local void @test_atomic_load_add_i32_noret_acquire(i32 %offset) nounwind {2216; CHECK-LABEL: test_atomic_load_add_i32_noret_acquire:2217; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_acquire:2218; OUTLINE-ATOMICS: // %bb.0:2219; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2220; OUTLINE-ATOMICS-NEXT: adrp x1, var322221; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322222; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq2223; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2224; OUTLINE-ATOMICS-NEXT: ret2225 atomicrmw add ptr @var32, i32 %offset acquire2226; CHECK-NOT: dmb2227; CHECK: adrp [[TMPADDR:x[0-9]+]], var322228; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322229 2230; CHECK: ldadda w0, w[[NEW:[0-9]+]], [x[[ADDR]]]2231; CHECK-NOT: dmb2232 ret void2233}2234 2235define dso_local void @test_atomic_load_add_i64_noret_acquire(i64 %offset) nounwind {2236; CHECK-LABEL: test_atomic_load_add_i64_noret_acquire:2237; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_acquire:2238; OUTLINE-ATOMICS: // %bb.0:2239; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2240; OUTLINE-ATOMICS-NEXT: adrp x1, var642241; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642242; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq2243; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2244; OUTLINE-ATOMICS-NEXT: ret2245 atomicrmw add ptr @var64, i64 %offset acquire2246; CHECK-NOT: dmb2247; CHECK: adrp [[TMPADDR:x[0-9]+]], var642248; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642249 2250; CHECK: ldadda x0, x[[NEW:[0-9]+]], [x[[ADDR]]]2251; CHECK-NOT: dmb2252 ret void2253}2254 2255define dso_local i8 @test_atomic_load_add_i8_monotonic(i8 %offset) nounwind {2256; CHECK-LABEL: test_atomic_load_add_i8_monotonic:2257; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_monotonic:2258; OUTLINE-ATOMICS: // %bb.0:2259; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2260; OUTLINE-ATOMICS-NEXT: adrp x1, var82261; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var82262; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_relax2263; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2264; OUTLINE-ATOMICS-NEXT: ret2265 %old = atomicrmw add ptr @var8, i8 %offset monotonic2266; CHECK-NOT: dmb2267; CHECK: adrp [[TMPADDR:x[0-9]+]], var82268; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var82269 2270; CHECK: ldaddb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]2271; CHECK-NOT: dmb2272 2273 ret i8 %old2274}2275 2276define dso_local i16 @test_atomic_load_add_i16_monotonic(i16 %offset) nounwind {2277; CHECK-LABEL: test_atomic_load_add_i16_monotonic:2278; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_monotonic:2279; OUTLINE-ATOMICS: // %bb.0:2280; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2281; OUTLINE-ATOMICS-NEXT: adrp x1, var162282; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var162283; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_relax2284; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2285; OUTLINE-ATOMICS-NEXT: ret2286 %old = atomicrmw add ptr @var16, i16 %offset monotonic2287; CHECK-NOT: dmb2288; CHECK: adrp [[TMPADDR:x[0-9]+]], var162289; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var162290 2291; CHECK: ldaddh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]2292; CHECK-NOT: dmb2293 2294 ret i16 %old2295}2296 2297define dso_local i32 @test_atomic_load_add_i32_monotonic(i32 %offset) nounwind {2298; CHECK-LABEL: test_atomic_load_add_i32_monotonic:2299; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_monotonic:2300; OUTLINE-ATOMICS: // %bb.0:2301; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2302; OUTLINE-ATOMICS-NEXT: adrp x1, var322303; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322304; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_relax2305; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2306; OUTLINE-ATOMICS-NEXT: ret2307 %old = atomicrmw add ptr @var32, i32 %offset monotonic2308; CHECK-NOT: dmb2309; CHECK: adrp [[TMPADDR:x[0-9]+]], var322310; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322311 2312; CHECK: ldadd w[[OLD:[0-9]+]], w[[NEW:[0-9,a-z]+]], [x[[ADDR]]]2313; CHECK-NOT: dmb2314 2315 ret i32 %old2316}2317 2318define dso_local i64 @test_atomic_load_add_i64_monotonic(i64 %offset) nounwind {2319; CHECK-LABEL: test_atomic_load_add_i64_monotonic:2320; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_monotonic:2321; OUTLINE-ATOMICS: // %bb.0:2322; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2323; OUTLINE-ATOMICS-NEXT: adrp x1, var642324; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642325; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_relax2326; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2327; OUTLINE-ATOMICS-NEXT: ret2328 %old = atomicrmw add ptr @var64, i64 %offset monotonic2329; CHECK-NOT: dmb2330; CHECK: adrp [[TMPADDR:x[0-9]+]], var642331; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642332 2333; CHECK: ldadd x[[OLD:[0-9]+]], x[[NEW:[0-9,a-z]+]], [x[[ADDR]]]2334; CHECK-NOT: dmb2335 2336 ret i64 %old2337}2338 2339define dso_local void @test_atomic_load_add_i32_noret_monotonic(i32 %offset) nounwind {2340; CHECK-LABEL: test_atomic_load_add_i32_noret_monotonic:2341; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_monotonic:2342; OUTLINE-ATOMICS: // %bb.0:2343; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2344; OUTLINE-ATOMICS-NEXT: adrp x1, var322345; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322346; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_relax2347; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2348; OUTLINE-ATOMICS-NEXT: ret2349 atomicrmw add ptr @var32, i32 %offset monotonic2350; CHECK-NOT: dmb2351; CHECK: adrp [[TMPADDR:x[0-9]+]], var322352; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322353 2354; CHECK: ldadd w{{[0-9]+}}, w{{[1-9][0-9]*}}, [x[[ADDR]]]2355; CHECK-NOT: dmb2356 ret void2357}2358 2359define dso_local void @test_atomic_load_add_i64_noret_monotonic(i64 %offset) nounwind {2360; CHECK-LABEL: test_atomic_load_add_i64_noret_monotonic:2361; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_monotonic:2362; OUTLINE-ATOMICS: // %bb.0:2363; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2364; OUTLINE-ATOMICS-NEXT: adrp x1, var642365; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642366; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_relax2367; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2368; OUTLINE-ATOMICS-NEXT: ret2369 atomicrmw add ptr @var64, i64 %offset monotonic2370; CHECK-NOT: dmb2371; CHECK: adrp [[TMPADDR:x[0-9]+]], var642372; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642373 2374; CHECK: ldadd x{{[0-9]}}, x{{[1-9][0-9]*}}, [x[[ADDR]]]2375; CHECK-NOT: dmb2376 ret void2377}2378 2379define dso_local i8 @test_atomic_load_add_i8_release(i8 %offset) nounwind {2380; CHECK-LABEL: test_atomic_load_add_i8_release:2381; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_release:2382; OUTLINE-ATOMICS: // %bb.0:2383; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2384; OUTLINE-ATOMICS-NEXT: adrp x1, var82385; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var82386; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_rel2387; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2388; OUTLINE-ATOMICS-NEXT: ret2389 %old = atomicrmw add ptr @var8, i8 %offset release2390; CHECK-NOT: dmb2391; CHECK: adrp [[TMPADDR:x[0-9]+]], var82392; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var82393 2394; CHECK: ldaddlb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]2395; CHECK-NOT: dmb2396 2397 ret i8 %old2398}2399 2400define dso_local i16 @test_atomic_load_add_i16_release(i16 %offset) nounwind {2401; CHECK-LABEL: test_atomic_load_add_i16_release:2402; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_release:2403; OUTLINE-ATOMICS: // %bb.0:2404; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2405; OUTLINE-ATOMICS-NEXT: adrp x1, var162406; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var162407; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_rel2408; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2409; OUTLINE-ATOMICS-NEXT: ret2410 %old = atomicrmw add ptr @var16, i16 %offset release2411; CHECK-NOT: dmb2412; CHECK: adrp [[TMPADDR:x[0-9]+]], var162413; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var162414 2415; CHECK: ldaddlh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]2416; CHECK-NOT: dmb2417 2418 ret i16 %old2419}2420 2421define dso_local i32 @test_atomic_load_add_i32_release(i32 %offset) nounwind {2422; CHECK-LABEL: test_atomic_load_add_i32_release:2423; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_release:2424; OUTLINE-ATOMICS: // %bb.0:2425; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2426; OUTLINE-ATOMICS-NEXT: adrp x1, var322427; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322428; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_rel2429; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2430; OUTLINE-ATOMICS-NEXT: ret2431 %old = atomicrmw add ptr @var32, i32 %offset release2432; CHECK-NOT: dmb2433; CHECK: adrp [[TMPADDR:x[0-9]+]], var322434; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322435 2436; CHECK: ldaddl w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]2437; CHECK-NOT: dmb2438 2439 ret i32 %old2440}2441 2442define dso_local i64 @test_atomic_load_add_i64_release(i64 %offset) nounwind {2443; CHECK-LABEL: test_atomic_load_add_i64_release:2444; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_release:2445; OUTLINE-ATOMICS: // %bb.0:2446; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2447; OUTLINE-ATOMICS-NEXT: adrp x1, var642448; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642449; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_rel2450; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2451; OUTLINE-ATOMICS-NEXT: ret2452 %old = atomicrmw add ptr @var64, i64 %offset release2453; CHECK-NOT: dmb2454; CHECK: adrp [[TMPADDR:x[0-9]+]], var642455; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642456 2457; CHECK: ldaddl x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]2458; CHECK-NOT: dmb2459 2460 ret i64 %old2461}2462 2463define dso_local void @test_atomic_load_add_i32_noret_release(i32 %offset) nounwind {2464; CHECK-LABEL: test_atomic_load_add_i32_noret_release:2465; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_release:2466; OUTLINE-ATOMICS: // %bb.0:2467; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2468; OUTLINE-ATOMICS-NEXT: adrp x1, var322469; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322470; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_rel2471; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2472; OUTLINE-ATOMICS-NEXT: ret2473 atomicrmw add ptr @var32, i32 %offset release2474; CHECK-NOT: dmb2475; CHECK: adrp [[TMPADDR:x[0-9]+]], var322476; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322477 2478; CHECK: ldaddl w{{[0-9]+}}, w{{[1-9][0-9]*}}, [x[[ADDR]]]2479; CHECK-NOT: dmb2480 ret void2481}2482 2483define dso_local void @test_atomic_load_add_i64_noret_release(i64 %offset) nounwind {2484; CHECK-LABEL: test_atomic_load_add_i64_noret_release:2485; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_release:2486; OUTLINE-ATOMICS: // %bb.0:2487; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2488; OUTLINE-ATOMICS-NEXT: adrp x1, var642489; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642490; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_rel2491; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2492; OUTLINE-ATOMICS-NEXT: ret2493 atomicrmw add ptr @var64, i64 %offset release2494; CHECK-NOT: dmb2495; CHECK: adrp [[TMPADDR:x[0-9]+]], var642496; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642497 2498; CHECK: ldaddl x{{[0-9]+}}, x{{[1-9][0-9]*}}, [x[[ADDR]]]2499; CHECK-NOT: dmb2500 ret void2501}2502 2503define dso_local i8 @test_atomic_load_add_i8_seq_cst(i8 %offset) nounwind {2504; CHECK-LABEL: test_atomic_load_add_i8_seq_cst:2505; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_seq_cst:2506; OUTLINE-ATOMICS: // %bb.0:2507; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2508; OUTLINE-ATOMICS-NEXT: adrp x1, var82509; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var82510; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel2511; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2512; OUTLINE-ATOMICS-NEXT: ret2513 %old = atomicrmw add ptr @var8, i8 %offset seq_cst2514; CHECK-NOT: dmb2515; CHECK: adrp [[TMPADDR:x[0-9]+]], var82516; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var82517 2518; CHECK: ldaddalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]2519; CHECK-NOT: dmb2520 2521 ret i8 %old2522}2523 2524define dso_local i16 @test_atomic_load_add_i16_seq_cst(i16 %offset) nounwind {2525; CHECK-LABEL: test_atomic_load_add_i16_seq_cst:2526; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_seq_cst:2527; OUTLINE-ATOMICS: // %bb.0:2528; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2529; OUTLINE-ATOMICS-NEXT: adrp x1, var162530; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var162531; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel2532; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2533; OUTLINE-ATOMICS-NEXT: ret2534 %old = atomicrmw add ptr @var16, i16 %offset seq_cst2535; CHECK-NOT: dmb2536; CHECK: adrp [[TMPADDR:x[0-9]+]], var162537; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var162538 2539; CHECK: ldaddalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]2540; CHECK-NOT: dmb2541 2542 ret i16 %old2543}2544 2545define dso_local i32 @test_atomic_load_add_i32_seq_cst(i32 %offset) nounwind {2546; CHECK-LABEL: test_atomic_load_add_i32_seq_cst:2547; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_seq_cst:2548; OUTLINE-ATOMICS: // %bb.0:2549; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2550; OUTLINE-ATOMICS-NEXT: adrp x1, var322551; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322552; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel2553; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2554; OUTLINE-ATOMICS-NEXT: ret2555 %old = atomicrmw add ptr @var32, i32 %offset seq_cst2556; CHECK-NOT: dmb2557; CHECK: adrp [[TMPADDR:x[0-9]+]], var322558; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322559 2560; CHECK: ldaddal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]2561; CHECK-NOT: dmb2562 2563 ret i32 %old2564}2565 2566define dso_local i64 @test_atomic_load_add_i64_seq_cst(i64 %offset) nounwind {2567; CHECK-LABEL: test_atomic_load_add_i64_seq_cst:2568; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_seq_cst:2569; OUTLINE-ATOMICS: // %bb.0:2570; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2571; OUTLINE-ATOMICS-NEXT: adrp x1, var642572; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642573; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel2574; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2575; OUTLINE-ATOMICS-NEXT: ret2576 %old = atomicrmw add ptr @var64, i64 %offset seq_cst2577; CHECK-NOT: dmb2578; CHECK: adrp [[TMPADDR:x[0-9]+]], var642579; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642580 2581; CHECK: ldaddal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]2582; CHECK-NOT: dmb2583 2584 ret i64 %old2585}2586 2587define dso_local void @test_atomic_load_add_i32_noret_seq_cst(i32 %offset) nounwind {2588; CHECK-LABEL: test_atomic_load_add_i32_noret_seq_cst:2589; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_seq_cst:2590; OUTLINE-ATOMICS: // %bb.0:2591; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2592; OUTLINE-ATOMICS-NEXT: adrp x1, var322593; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322594; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel2595; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2596; OUTLINE-ATOMICS-NEXT: ret2597 atomicrmw add ptr @var32, i32 %offset seq_cst2598; CHECK-NOT: dmb2599; CHECK: adrp [[TMPADDR:x[0-9]+]], var322600; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322601 2602; CHECK: ldaddal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]2603; CHECK-NOT: dmb2604 ret void2605}2606 2607define dso_local void @test_atomic_load_add_i64_noret_seq_cst(i64 %offset) nounwind {2608; CHECK-LABEL: test_atomic_load_add_i64_noret_seq_cst:2609; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_seq_cst:2610; OUTLINE-ATOMICS: // %bb.0:2611; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2612; OUTLINE-ATOMICS-NEXT: adrp x1, var642613; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642614; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel2615; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2616; OUTLINE-ATOMICS-NEXT: ret2617 atomicrmw add ptr @var64, i64 %offset seq_cst2618; CHECK-NOT: dmb2619; CHECK: adrp [[TMPADDR:x[0-9]+]], var642620; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642621 2622; CHECK: ldaddal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]2623; CHECK-NOT: dmb2624 ret void2625}2626 2627define dso_local i8 @test_atomic_load_and_i8_acq_rel(i8 %offset) nounwind {2628; CHECK-LABEL: test_atomic_load_and_i8_acq_rel:2629; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_acq_rel:2630; OUTLINE-ATOMICS: // %bb.0:2631; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2632; OUTLINE-ATOMICS-NEXT: adrp x1, var82633; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var82634; OUTLINE-ATOMICS-NEXT: mvn w0, w02635; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel2636; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2637; OUTLINE-ATOMICS-NEXT: ret2638 %old = atomicrmw and ptr @var8, i8 %offset acq_rel2639; CHECK-NOT: dmb2640; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]2641; CHECK: adrp [[TMPADDR:x[0-9]+]], var82642; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var82643 2644; CHECK: ldclralb w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]2645; CHECK-NOT: dmb2646 ret i8 %old2647}2648 2649define dso_local i16 @test_atomic_load_and_i16_acq_rel(i16 %offset) nounwind {2650; CHECK-LABEL: test_atomic_load_and_i16_acq_rel:2651; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_acq_rel:2652; OUTLINE-ATOMICS: // %bb.0:2653; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2654; OUTLINE-ATOMICS-NEXT: adrp x1, var162655; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var162656; OUTLINE-ATOMICS-NEXT: mvn w0, w02657; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel2658; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2659; OUTLINE-ATOMICS-NEXT: ret2660 %old = atomicrmw and ptr @var16, i16 %offset acq_rel2661; CHECK-NOT: dmb2662; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]2663; CHECK: adrp [[TMPADDR:x[0-9]+]], var162664; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var162665 2666; CHECK: ldclralh w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]2667; CHECK-NOT: dmb2668 ret i16 %old2669}2670 2671define dso_local i32 @test_atomic_load_and_i32_acq_rel(i32 %offset) nounwind {2672; CHECK-LABEL: test_atomic_load_and_i32_acq_rel:2673; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_acq_rel:2674; OUTLINE-ATOMICS: // %bb.0:2675; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2676; OUTLINE-ATOMICS-NEXT: adrp x1, var322677; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322678; OUTLINE-ATOMICS-NEXT: mvn w0, w02679; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel2680; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2681; OUTLINE-ATOMICS-NEXT: ret2682 %old = atomicrmw and ptr @var32, i32 %offset acq_rel2683; CHECK-NOT: dmb2684; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]2685; CHECK: adrp [[TMPADDR:x[0-9]+]], var322686; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322687 2688; CHECK: ldclral w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]2689; CHECK-NOT: dmb2690 ret i32 %old2691}2692 2693define dso_local i64 @test_atomic_load_and_i64_acq_rel(i64 %offset) nounwind {2694; CHECK-LABEL: test_atomic_load_and_i64_acq_rel:2695; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_acq_rel:2696; OUTLINE-ATOMICS: // %bb.0:2697; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2698; OUTLINE-ATOMICS-NEXT: adrp x1, var642699; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642700; OUTLINE-ATOMICS-NEXT: mvn x0, x02701; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel2702; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2703; OUTLINE-ATOMICS-NEXT: ret2704 %old = atomicrmw and ptr @var64, i64 %offset acq_rel2705; CHECK-NOT: dmb2706; CHECK: mvn x[[NOT:[0-9]+]], x[[OLD:[0-9]+]]2707; CHECK: adrp [[TMPADDR:x[0-9]+]], var642708; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642709 2710; CHECK: ldclral x[[NOT]], x[[NEW:[0-9]+]], [x[[ADDR]]]2711; CHECK-NOT: dmb2712 ret i64 %old2713}2714 2715define dso_local void @test_atomic_load_and_i32_noret_acq_rel(i32 %offset) nounwind {2716; CHECK-LABEL: test_atomic_load_and_i32_noret_acq_rel:2717; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_acq_rel:2718; OUTLINE-ATOMICS: // %bb.0:2719; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2720; OUTLINE-ATOMICS-NEXT: adrp x1, var322721; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322722; OUTLINE-ATOMICS-NEXT: mvn w0, w02723; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel2724; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2725; OUTLINE-ATOMICS-NEXT: ret2726 atomicrmw and ptr @var32, i32 %offset acq_rel2727; CHECK-NOT: dmb2728; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]2729; CHECK: adrp [[TMPADDR:x[0-9]+]], var322730; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322731 2732; CHECK: ldclral w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]2733; CHECK-NOT: dmb2734 ret void2735}2736 2737define dso_local void @test_atomic_load_and_i64_noret_acq_rel(i64 %offset) nounwind {2738; CHECK-LABEL: test_atomic_load_and_i64_noret_acq_rel:2739; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_acq_rel:2740; OUTLINE-ATOMICS: // %bb.0:2741; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2742; OUTLINE-ATOMICS-NEXT: adrp x1, var642743; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642744; OUTLINE-ATOMICS-NEXT: mvn x0, x02745; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel2746; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2747; OUTLINE-ATOMICS-NEXT: ret2748 atomicrmw and ptr @var64, i64 %offset acq_rel2749; CHECK-NOT: dmb2750; CHECK: mvn x[[NOT:[0-9]+]], x[[OLD:[0-9]+]]2751; CHECK: adrp [[TMPADDR:x[0-9]+]], var642752; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642753 2754; CHECK: ldclral x[[NOT]], x[[NEW:[0-9]+]], [x[[ADDR]]]2755; CHECK-NOT: dmb2756 ret void2757}2758 2759define dso_local i8 @test_atomic_load_and_i8_acquire(i8 %offset) nounwind {2760; CHECK-LABEL: test_atomic_load_and_i8_acquire:2761; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_acquire:2762; OUTLINE-ATOMICS: // %bb.0:2763; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2764; OUTLINE-ATOMICS-NEXT: adrp x1, var82765; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var82766; OUTLINE-ATOMICS-NEXT: mvn w0, w02767; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq2768; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2769; OUTLINE-ATOMICS-NEXT: ret2770 %old = atomicrmw and ptr @var8, i8 %offset acquire2771; CHECK-NOT: dmb2772; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]2773; CHECK: adrp [[TMPADDR:x[0-9]+]], var82774; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var82775 2776; CHECK: ldclrab w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]2777; CHECK-NOT: dmb2778 ret i8 %old2779}2780 2781define dso_local i16 @test_atomic_load_and_i16_acquire(i16 %offset) nounwind {2782; CHECK-LABEL: test_atomic_load_and_i16_acquire:2783; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_acquire:2784; OUTLINE-ATOMICS: // %bb.0:2785; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2786; OUTLINE-ATOMICS-NEXT: adrp x1, var162787; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var162788; OUTLINE-ATOMICS-NEXT: mvn w0, w02789; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq2790; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2791; OUTLINE-ATOMICS-NEXT: ret2792 %old = atomicrmw and ptr @var16, i16 %offset acquire2793; CHECK-NOT: dmb2794; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]2795; CHECK: adrp [[TMPADDR:x[0-9]+]], var162796; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var162797 2798; CHECK: ldclrah w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]2799; CHECK-NOT: dmb2800 ret i16 %old2801}2802 2803define dso_local i32 @test_atomic_load_and_i32_acquire(i32 %offset) nounwind {2804; CHECK-LABEL: test_atomic_load_and_i32_acquire:2805; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_acquire:2806; OUTLINE-ATOMICS: // %bb.0:2807; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2808; OUTLINE-ATOMICS-NEXT: adrp x1, var322809; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322810; OUTLINE-ATOMICS-NEXT: mvn w0, w02811; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq2812; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2813; OUTLINE-ATOMICS-NEXT: ret2814 %old = atomicrmw and ptr @var32, i32 %offset acquire2815; CHECK-NOT: dmb2816; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]2817; CHECK: adrp [[TMPADDR:x[0-9]+]], var322818; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322819 2820; CHECK: ldclra w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]2821; CHECK-NOT: dmb2822 ret i32 %old2823}2824 2825define dso_local i64 @test_atomic_load_and_i64_acquire(i64 %offset) nounwind {2826; CHECK-LABEL: test_atomic_load_and_i64_acquire:2827; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_acquire:2828; OUTLINE-ATOMICS: // %bb.0:2829; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2830; OUTLINE-ATOMICS-NEXT: adrp x1, var642831; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642832; OUTLINE-ATOMICS-NEXT: mvn x0, x02833; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq2834; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2835; OUTLINE-ATOMICS-NEXT: ret2836 %old = atomicrmw and ptr @var64, i64 %offset acquire2837; CHECK-NOT: dmb2838; CHECK: mvn x[[NOT:[0-9]+]], x[[OLD:[0-9]+]]2839; CHECK: adrp [[TMPADDR:x[0-9]+]], var642840; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642841 2842; CHECK: ldclra x[[NOT]], x[[NEW:[0-9]+]], [x[[ADDR]]]2843; CHECK-NOT: dmb2844 ret i64 %old2845}2846 2847define dso_local void @test_atomic_load_and_i32_noret_acquire(i32 %offset) nounwind {2848; CHECK-LABEL: test_atomic_load_and_i32_noret_acquire:2849; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_acquire:2850; OUTLINE-ATOMICS: // %bb.0:2851; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2852; OUTLINE-ATOMICS-NEXT: adrp x1, var322853; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322854; OUTLINE-ATOMICS-NEXT: mvn w0, w02855; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq2856; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2857; OUTLINE-ATOMICS-NEXT: ret2858 atomicrmw and ptr @var32, i32 %offset acquire2859; CHECK-NOT: dmb2860; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]2861; CHECK: adrp [[TMPADDR:x[0-9]+]], var322862; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322863 2864; CHECK: ldclra w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]2865; CHECK-NOT: dmb2866 ret void2867}2868 2869define dso_local void @test_atomic_load_and_i64_noret_acquire(i64 %offset) nounwind {2870; CHECK-LABEL: test_atomic_load_and_i64_noret_acquire:2871; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_acquire:2872; OUTLINE-ATOMICS: // %bb.0:2873; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2874; OUTLINE-ATOMICS-NEXT: adrp x1, var642875; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642876; OUTLINE-ATOMICS-NEXT: mvn x0, x02877; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq2878; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2879; OUTLINE-ATOMICS-NEXT: ret2880 atomicrmw and ptr @var64, i64 %offset acquire2881; CHECK-NOT: dmb2882; CHECK: mvn x[[NOT:[0-9]+]], x[[OLD:[0-9]+]]2883; CHECK: adrp [[TMPADDR:x[0-9]+]], var642884; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642885 2886; CHECK: ldclra x[[NOT]], x[[NEW:[0-9]+]], [x[[ADDR]]]2887; CHECK-NOT: dmb2888 ret void2889}2890 2891define dso_local i8 @test_atomic_load_and_i8_monotonic(i8 %offset) nounwind {2892; CHECK-LABEL: test_atomic_load_and_i8_monotonic:2893; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_monotonic:2894; OUTLINE-ATOMICS: // %bb.0:2895; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2896; OUTLINE-ATOMICS-NEXT: adrp x1, var82897; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var82898; OUTLINE-ATOMICS-NEXT: mvn w0, w02899; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_relax2900; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2901; OUTLINE-ATOMICS-NEXT: ret2902 %old = atomicrmw and ptr @var8, i8 %offset monotonic2903; CHECK-NOT: dmb2904; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]2905; CHECK: adrp [[TMPADDR:x[0-9]+]], var82906; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var82907 2908; CHECK: ldclrb w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]2909; CHECK-NOT: dmb2910 ret i8 %old2911}2912 2913define dso_local i16 @test_atomic_load_and_i16_monotonic(i16 %offset) nounwind {2914; CHECK-LABEL: test_atomic_load_and_i16_monotonic:2915; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_monotonic:2916; OUTLINE-ATOMICS: // %bb.0:2917; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2918; OUTLINE-ATOMICS-NEXT: adrp x1, var162919; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var162920; OUTLINE-ATOMICS-NEXT: mvn w0, w02921; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_relax2922; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2923; OUTLINE-ATOMICS-NEXT: ret2924 %old = atomicrmw and ptr @var16, i16 %offset monotonic2925; CHECK-NOT: dmb2926; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]2927; CHECK: adrp [[TMPADDR:x[0-9]+]], var162928; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var162929 2930; CHECK: ldclrh w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]2931; CHECK-NOT: dmb2932 ret i16 %old2933}2934 2935define dso_local i32 @test_atomic_load_and_i32_monotonic(i32 %offset) nounwind {2936; CHECK-LABEL: test_atomic_load_and_i32_monotonic:2937; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_monotonic:2938; OUTLINE-ATOMICS: // %bb.0:2939; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2940; OUTLINE-ATOMICS-NEXT: adrp x1, var322941; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322942; OUTLINE-ATOMICS-NEXT: mvn w0, w02943; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_relax2944; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2945; OUTLINE-ATOMICS-NEXT: ret2946 %old = atomicrmw and ptr @var32, i32 %offset monotonic2947; CHECK-NOT: dmb2948; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]2949; CHECK: adrp [[TMPADDR:x[0-9]+]], var322950; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322951 2952; CHECK: ldclr w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]2953; CHECK-NOT: dmb2954 ret i32 %old2955}2956 2957define dso_local i64 @test_atomic_load_and_i64_monotonic(i64 %offset) nounwind {2958; CHECK-LABEL: test_atomic_load_and_i64_monotonic:2959; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_monotonic:2960; OUTLINE-ATOMICS: // %bb.0:2961; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2962; OUTLINE-ATOMICS-NEXT: adrp x1, var642963; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var642964; OUTLINE-ATOMICS-NEXT: mvn x0, x02965; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_relax2966; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2967; OUTLINE-ATOMICS-NEXT: ret2968 %old = atomicrmw and ptr @var64, i64 %offset monotonic2969; CHECK-NOT: dmb2970; CHECK: mvn x[[NOT:[0-9]+]], x[[OLD:[0-9]+]]2971; CHECK: adrp [[TMPADDR:x[0-9]+]], var642972; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var642973 2974; CHECK: ldclr x[[NOT]], x[[NEW:[0-9]+]], [x[[ADDR]]]2975; CHECK-NOT: dmb2976 ret i64 %old2977}2978 2979define dso_local void @test_atomic_load_and_i32_noret_monotonic(i32 %offset) nounwind {2980; CHECK-LABEL: test_atomic_load_and_i32_noret_monotonic:2981; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_monotonic:2982; OUTLINE-ATOMICS: // %bb.0:2983; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill2984; OUTLINE-ATOMICS-NEXT: adrp x1, var322985; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var322986; OUTLINE-ATOMICS-NEXT: mvn w0, w02987; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_relax2988; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload2989; OUTLINE-ATOMICS-NEXT: ret2990 atomicrmw and ptr @var32, i32 %offset monotonic2991; CHECK-NOT: dmb2992; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]2993; CHECK: adrp [[TMPADDR:x[0-9]+]], var322994; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var322995 2996; CHECK: ldclr w{{[0-9]+}}, w[[NEW:[1-9][0-9]*]], [x[[ADDR]]]2997; CHECK-NOT: dmb2998 ret void2999}3000 3001define dso_local void @test_atomic_load_and_i64_noret_monotonic(i64 %offset) nounwind {3002; CHECK-LABEL: test_atomic_load_and_i64_noret_monotonic:3003; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_monotonic:3004; OUTLINE-ATOMICS: // %bb.0:3005; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3006; OUTLINE-ATOMICS-NEXT: adrp x1, var643007; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var643008; OUTLINE-ATOMICS-NEXT: mvn x0, x03009; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_relax3010; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3011; OUTLINE-ATOMICS-NEXT: ret3012 atomicrmw and ptr @var64, i64 %offset monotonic3013; CHECK-NOT: dmb3014; CHECK: mvn x[[NOT:[0-9]+]], x[[OLD:[0-9]+]]3015; CHECK: adrp [[TMPADDR:x[0-9]+]], var643016; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var643017 3018; CHECK: ldclr x{{[0-9]+}}, x[[NEW:[1-9][0-9]*]], [x[[ADDR]]]3019; CHECK-NOT: dmb3020 ret void3021}3022 3023define dso_local i8 @test_atomic_load_and_i8_release(i8 %offset) nounwind {3024; CHECK-LABEL: test_atomic_load_and_i8_release:3025; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_release:3026; OUTLINE-ATOMICS: // %bb.0:3027; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3028; OUTLINE-ATOMICS-NEXT: adrp x1, var83029; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var83030; OUTLINE-ATOMICS-NEXT: mvn w0, w03031; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_rel3032; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3033; OUTLINE-ATOMICS-NEXT: ret3034 %old = atomicrmw and ptr @var8, i8 %offset release3035; CHECK-NOT: dmb3036; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]3037; CHECK: adrp [[TMPADDR:x[0-9]+]], var83038; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var83039 3040; CHECK: ldclrlb w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]3041; CHECK-NOT: dmb3042 ret i8 %old3043}3044 3045define dso_local i16 @test_atomic_load_and_i16_release(i16 %offset) nounwind {3046; CHECK-LABEL: test_atomic_load_and_i16_release:3047; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_release:3048; OUTLINE-ATOMICS: // %bb.0:3049; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3050; OUTLINE-ATOMICS-NEXT: adrp x1, var163051; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var163052; OUTLINE-ATOMICS-NEXT: mvn w0, w03053; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_rel3054; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3055; OUTLINE-ATOMICS-NEXT: ret3056 %old = atomicrmw and ptr @var16, i16 %offset release3057; CHECK-NOT: dmb3058; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]3059; CHECK: adrp [[TMPADDR:x[0-9]+]], var163060; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var163061 3062; CHECK: ldclrlh w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]3063; CHECK-NOT: dmb3064 ret i16 %old3065}3066 3067define dso_local i32 @test_atomic_load_and_i32_release(i32 %offset) nounwind {3068; CHECK-LABEL: test_atomic_load_and_i32_release:3069; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_release:3070; OUTLINE-ATOMICS: // %bb.0:3071; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3072; OUTLINE-ATOMICS-NEXT: adrp x1, var323073; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var323074; OUTLINE-ATOMICS-NEXT: mvn w0, w03075; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_rel3076; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3077; OUTLINE-ATOMICS-NEXT: ret3078 %old = atomicrmw and ptr @var32, i32 %offset release3079; CHECK-NOT: dmb3080; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]3081; CHECK: adrp [[TMPADDR:x[0-9]+]], var323082; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var323083 3084; CHECK: ldclrl w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]3085; CHECK-NOT: dmb3086 ret i32 %old3087}3088 3089define dso_local i64 @test_atomic_load_and_i64_release(i64 %offset) nounwind {3090; CHECK-LABEL: test_atomic_load_and_i64_release:3091; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_release:3092; OUTLINE-ATOMICS: // %bb.0:3093; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3094; OUTLINE-ATOMICS-NEXT: adrp x1, var643095; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var643096; OUTLINE-ATOMICS-NEXT: mvn x0, x03097; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_rel3098; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3099; OUTLINE-ATOMICS-NEXT: ret3100 %old = atomicrmw and ptr @var64, i64 %offset release3101; CHECK-NOT: dmb3102; CHECK: mvn x[[NOT:[0-9]+]], x[[OLD:[0-9]+]]3103; CHECK: adrp [[TMPADDR:x[0-9]+]], var643104; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var643105 3106; CHECK: ldclrl x[[NOT]], x[[NEW:[0-9]+]], [x[[ADDR]]]3107; CHECK-NOT: dmb3108 ret i64 %old3109}3110 3111define dso_local void @test_atomic_load_and_i32_noret_release(i32 %offset) nounwind {3112; CHECK-LABEL: test_atomic_load_and_i32_noret_release:3113; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_release:3114; OUTLINE-ATOMICS: // %bb.0:3115; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3116; OUTLINE-ATOMICS-NEXT: adrp x1, var323117; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var323118; OUTLINE-ATOMICS-NEXT: mvn w0, w03119; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_rel3120; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3121; OUTLINE-ATOMICS-NEXT: ret3122 atomicrmw and ptr @var32, i32 %offset release3123; CHECK-NOT: dmb3124; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]3125; CHECK: adrp [[TMPADDR:x[0-9]+]], var323126; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var323127 3128; CHECK: ldclrl w{{[0-9]*}}, w[[NEW:[1-9][0-9]*]], [x[[ADDR]]]3129; CHECK-NOT: dmb3130 ret void3131}3132 3133define dso_local void @test_atomic_load_and_i64_noret_release(i64 %offset) nounwind {3134; CHECK-LABEL: test_atomic_load_and_i64_noret_release:3135; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_release:3136; OUTLINE-ATOMICS: // %bb.0:3137; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3138; OUTLINE-ATOMICS-NEXT: adrp x1, var643139; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var643140; OUTLINE-ATOMICS-NEXT: mvn x0, x03141; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_rel3142; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3143; OUTLINE-ATOMICS-NEXT: ret3144 atomicrmw and ptr @var64, i64 %offset release3145; CHECK-NOT: dmb3146; CHECK: mvn x[[NOT:[0-9]+]], x[[OLD:[0-9]+]]3147; CHECK: adrp [[TMPADDR:x[0-9]+]], var643148; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var643149 3150; CHECK: ldclrl x{{[0-9]*}}, x[[NEW:[1-9][0-9]*]], [x[[ADDR]]]3151; CHECK-NOT: dmb3152 ret void3153}3154 3155define dso_local i8 @test_atomic_load_and_i8_seq_cst(i8 %offset) nounwind {3156; CHECK-LABEL: test_atomic_load_and_i8_seq_cst:3157; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_seq_cst:3158; OUTLINE-ATOMICS: // %bb.0:3159; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3160; OUTLINE-ATOMICS-NEXT: adrp x1, var83161; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var83162; OUTLINE-ATOMICS-NEXT: mvn w0, w03163; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel3164; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3165; OUTLINE-ATOMICS-NEXT: ret3166 %old = atomicrmw and ptr @var8, i8 %offset seq_cst3167; CHECK-NOT: dmb3168; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]3169; CHECK: adrp [[TMPADDR:x[0-9]+]], var83170; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var83171 3172; CHECK: ldclralb w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]3173; CHECK-NOT: dmb3174 ret i8 %old3175}3176 3177define dso_local i16 @test_atomic_load_and_i16_seq_cst(i16 %offset) nounwind {3178; CHECK-LABEL: test_atomic_load_and_i16_seq_cst:3179; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_seq_cst:3180; OUTLINE-ATOMICS: // %bb.0:3181; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3182; OUTLINE-ATOMICS-NEXT: adrp x1, var163183; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var163184; OUTLINE-ATOMICS-NEXT: mvn w0, w03185; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel3186; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3187; OUTLINE-ATOMICS-NEXT: ret3188 %old = atomicrmw and ptr @var16, i16 %offset seq_cst3189; CHECK-NOT: dmb3190; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]3191; CHECK: adrp [[TMPADDR:x[0-9]+]], var163192; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var163193 3194; CHECK: ldclralh w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]3195; CHECK-NOT: dmb3196 ret i16 %old3197}3198 3199define dso_local i32 @test_atomic_load_and_i32_seq_cst(i32 %offset) nounwind {3200; CHECK-LABEL: test_atomic_load_and_i32_seq_cst:3201; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_seq_cst:3202; OUTLINE-ATOMICS: // %bb.0:3203; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3204; OUTLINE-ATOMICS-NEXT: adrp x1, var323205; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var323206; OUTLINE-ATOMICS-NEXT: mvn w0, w03207; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel3208; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3209; OUTLINE-ATOMICS-NEXT: ret3210 %old = atomicrmw and ptr @var32, i32 %offset seq_cst3211; CHECK-NOT: dmb3212; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]3213; CHECK: adrp [[TMPADDR:x[0-9]+]], var323214; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var323215 3216; CHECK: ldclral w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]3217; CHECK-NOT: dmb3218 ret i32 %old3219}3220 3221define dso_local i64 @test_atomic_load_and_i64_seq_cst(i64 %offset) nounwind {3222; CHECK-LABEL: test_atomic_load_and_i64_seq_cst:3223; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_seq_cst:3224; OUTLINE-ATOMICS: // %bb.0:3225; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3226; OUTLINE-ATOMICS-NEXT: adrp x1, var643227; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var643228; OUTLINE-ATOMICS-NEXT: mvn x0, x03229; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel3230; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3231; OUTLINE-ATOMICS-NEXT: ret3232 %old = atomicrmw and ptr @var64, i64 %offset seq_cst3233; CHECK-NOT: dmb3234; CHECK: mvn x[[NOT:[0-9]+]], x[[OLD:[0-9]+]]3235; CHECK: adrp [[TMPADDR:x[0-9]+]], var643236; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var643237 3238; CHECK: ldclral x[[NOT]], x[[NEW:[0-9]+]], [x[[ADDR]]]3239; CHECK-NOT: dmb3240 ret i64 %old3241}3242 3243define dso_local void @test_atomic_load_and_i32_noret_seq_cst(i32 %offset) nounwind {3244; CHECK-LABEL: test_atomic_load_and_i32_noret_seq_cst:3245; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_seq_cst:3246; OUTLINE-ATOMICS: // %bb.0:3247; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3248; OUTLINE-ATOMICS-NEXT: adrp x1, var323249; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var323250; OUTLINE-ATOMICS-NEXT: mvn w0, w03251; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel3252; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3253; OUTLINE-ATOMICS-NEXT: ret3254 atomicrmw and ptr @var32, i32 %offset seq_cst3255; CHECK-NOT: dmb3256; CHECK: mvn w[[NOT:[0-9]+]], w[[OLD:[0-9]+]]3257; CHECK: adrp [[TMPADDR:x[0-9]+]], var323258; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var323259 3260; CHECK: ldclral w[[NOT]], w[[NEW:[0-9]+]], [x[[ADDR]]]3261; CHECK-NOT: dmb3262 ret void3263}3264 3265define dso_local void @test_atomic_load_and_i64_noret_seq_cst(i64 %offset) nounwind {3266; CHECK-LABEL: test_atomic_load_and_i64_noret_seq_cst:3267; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_seq_cst:3268; OUTLINE-ATOMICS: // %bb.0:3269; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3270; OUTLINE-ATOMICS-NEXT: adrp x1, var643271; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var643272; OUTLINE-ATOMICS-NEXT: mvn x0, x03273; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel3274; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3275; OUTLINE-ATOMICS-NEXT: ret3276 atomicrmw and ptr @var64, i64 %offset seq_cst3277; CHECK-NOT: dmb3278; CHECK: mvn x[[NOT:[0-9]+]], x[[OLD:[0-9]+]]3279; CHECK: adrp [[TMPADDR:x[0-9]+]], var643280; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var643281 3282; CHECK: ldclral x[[NOT]], x[[NEW:[0-9]+]], [x[[ADDR]]]3283; CHECK-NOT: dmb3284 ret void3285}3286 3287define dso_local i8 @test_atomic_cmpxchg_i8_acquire(i8 %wanted, i8 %new) nounwind {3288; CHECK-LABEL: test_atomic_cmpxchg_i8_acquire:3289; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8_acquire:3290; OUTLINE-ATOMICS: // %bb.0:3291; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3292; OUTLINE-ATOMICS-NEXT: adrp x2, var83293; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var83294; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_acq3295; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3296; OUTLINE-ATOMICS-NEXT: ret3297 %pair = cmpxchg ptr @var8, i8 %wanted, i8 %new acquire acquire3298 %old = extractvalue { i8, i1 } %pair, 03299 3300; CHECK-NOT: dmb3301; CHECK: adrp [[TMPADDR:x[0-9]+]], var83302; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var83303 3304; CHECK: casab w[[NEW:[0-9]+]], w[[OLD:[0-9]+]], [x[[ADDR]]]3305; CHECK-NOT: dmb3306 3307 ret i8 %old3308}3309 3310define dso_local i16 @test_atomic_cmpxchg_i16_acquire(i16 %wanted, i16 %new) nounwind {3311; CHECK-LABEL: test_atomic_cmpxchg_i16_acquire:3312; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16_acquire:3313; OUTLINE-ATOMICS: // %bb.0:3314; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3315; OUTLINE-ATOMICS-NEXT: adrp x2, var163316; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var163317; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_acq3318; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3319; OUTLINE-ATOMICS-NEXT: ret3320 %pair = cmpxchg ptr @var16, i16 %wanted, i16 %new acquire acquire3321 %old = extractvalue { i16, i1 } %pair, 03322 3323; CHECK-NOT: dmb3324; CHECK: adrp [[TMPADDR:x[0-9]+]], var163325; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var163326 3327; CHECK: casah w0, w1, [x[[ADDR]]]3328; CHECK-NOT: dmb3329 3330 ret i16 %old3331}3332 3333define dso_local i32 @test_atomic_cmpxchg_i32_acquire(i32 %wanted, i32 %new) nounwind {3334; CHECK-LABEL: test_atomic_cmpxchg_i32_acquire:3335; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_acquire:3336; OUTLINE-ATOMICS: // %bb.0:3337; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3338; OUTLINE-ATOMICS-NEXT: adrp x2, var323339; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var323340; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq3341; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3342; OUTLINE-ATOMICS-NEXT: ret3343 %pair = cmpxchg ptr @var32, i32 %wanted, i32 %new acquire acquire3344 %old = extractvalue { i32, i1 } %pair, 03345 3346; CHECK-NOT: dmb3347; CHECK: adrp [[TMPADDR:x[0-9]+]], var323348; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var323349 3350; CHECK: casa w0, w1, [x[[ADDR]]]3351; CHECK-NOT: dmb3352 3353 ret i32 %old3354}3355 3356define dso_local i64 @test_atomic_cmpxchg_i64_acquire(i64 %wanted, i64 %new) nounwind {3357; CHECK-LABEL: test_atomic_cmpxchg_i64_acquire:3358; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i64_acquire:3359; OUTLINE-ATOMICS: // %bb.0:3360; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3361; OUTLINE-ATOMICS-NEXT: adrp x2, var643362; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var643363; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas8_acq3364; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3365; OUTLINE-ATOMICS-NEXT: ret3366 %pair = cmpxchg ptr @var64, i64 %wanted, i64 %new acquire acquire3367 %old = extractvalue { i64, i1 } %pair, 03368 3369; CHECK-NOT: dmb3370; CHECK: adrp [[TMPADDR:x[0-9]+]], var643371; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var643372 3373; CHECK: casa x0, x1, [x[[ADDR]]]3374; CHECK-NOT: dmb3375 3376 ret i64 %old3377}3378 3379define dso_local i128 @test_atomic_cmpxchg_i128_acquire(i128 %wanted, i128 %new) nounwind {3380; CHECK-LABEL: test_atomic_cmpxchg_i128_acquire:3381; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_acquire:3382; OUTLINE-ATOMICS: // %bb.0:3383; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3384; OUTLINE-ATOMICS-NEXT: adrp x4, var1283385; OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var1283386; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq3387; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3388; OUTLINE-ATOMICS-NEXT: ret3389 %pair = cmpxchg ptr @var128, i128 %wanted, i128 %new acquire acquire3390 %old = extractvalue { i128, i1 } %pair, 03391 3392; CHECK-NOT: dmb3393; CHECK: adrp [[TMPADDR:x[0-9]+]], var1283394; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var1283395 3396; CHECK: caspa x0, x1, x2, x3, [x[[ADDR]]]3397; CHECK-NOT: dmb3398 3399 ret i128 %old3400}3401 3402define dso_local i8 @test_atomic_cmpxchg_i8_monotonic(i8 %wanted, i8 %new) nounwind {3403; CHECK-LABEL: test_atomic_cmpxchg_i8_monotonic:3404; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8_monotonic:3405; OUTLINE-ATOMICS: // %bb.0:3406; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3407; OUTLINE-ATOMICS-NEXT: adrp x2, var83408; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var83409; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_relax3410; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3411; OUTLINE-ATOMICS-NEXT: ret3412 %pair = cmpxchg ptr @var8, i8 %wanted, i8 %new monotonic monotonic3413 %old = extractvalue { i8, i1 } %pair, 03414 3415; CHECK-NOT: dmb3416; CHECK: adrp [[TMPADDR:x[0-9]+]], var83417; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var83418 3419; CHECK: casb w[[NEW:[0-9]+]], w[[OLD:[0-9]+]], [x[[ADDR]]]3420; CHECK-NOT: dmb3421 3422 ret i8 %old3423}3424 3425define dso_local i16 @test_atomic_cmpxchg_i16_monotonic(i16 %wanted, i16 %new) nounwind {3426; CHECK-LABEL: test_atomic_cmpxchg_i16_monotonic:3427; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16_monotonic:3428; OUTLINE-ATOMICS: // %bb.0:3429; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3430; OUTLINE-ATOMICS-NEXT: adrp x2, var163431; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var163432; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_relax3433; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3434; OUTLINE-ATOMICS-NEXT: ret3435 %pair = cmpxchg ptr @var16, i16 %wanted, i16 %new monotonic monotonic3436 %old = extractvalue { i16, i1 } %pair, 03437 3438; CHECK-NOT: dmb3439; CHECK: adrp [[TMPADDR:x[0-9]+]], var163440; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var163441 3442; CHECK: cash w0, w1, [x[[ADDR]]]3443; CHECK-NOT: dmb3444 3445 ret i16 %old3446}3447 3448define dso_local i32 @test_atomic_cmpxchg_i32_monotonic(i32 %wanted, i32 %new) nounwind {3449; CHECK-LABEL: test_atomic_cmpxchg_i32_monotonic:3450; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_monotonic:3451; OUTLINE-ATOMICS: // %bb.0:3452; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3453; OUTLINE-ATOMICS-NEXT: adrp x2, var323454; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var323455; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_relax3456; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3457; OUTLINE-ATOMICS-NEXT: ret3458 %pair = cmpxchg ptr @var32, i32 %wanted, i32 %new monotonic monotonic3459 %old = extractvalue { i32, i1 } %pair, 03460 3461; CHECK-NOT: dmb3462; CHECK: adrp [[TMPADDR:x[0-9]+]], var323463; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var323464 3465; CHECK: cas w0, w1, [x[[ADDR]]]3466; CHECK-NOT: dmb3467 3468 ret i32 %old3469}3470 3471define dso_local i64 @test_atomic_cmpxchg_i64_monotonic(i64 %wanted, i64 %new) nounwind {3472; CHECK-LABEL: test_atomic_cmpxchg_i64_monotonic:3473; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i64_monotonic:3474; OUTLINE-ATOMICS: // %bb.0:3475; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3476; OUTLINE-ATOMICS-NEXT: adrp x2, var643477; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var643478; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas8_relax3479; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3480; OUTLINE-ATOMICS-NEXT: ret3481 %pair = cmpxchg ptr @var64, i64 %wanted, i64 %new monotonic monotonic3482 %old = extractvalue { i64, i1 } %pair, 03483 3484; CHECK-NOT: dmb3485; CHECK: adrp [[TMPADDR:x[0-9]+]], var643486; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var643487 3488; CHECK: cas x0, x1, [x[[ADDR]]]3489; CHECK-NOT: dmb3490 3491 ret i64 %old3492}3493 3494define dso_local i128 @test_atomic_cmpxchg_i128_monotonic(i128 %wanted, i128 %new) nounwind {3495; CHECK-LABEL: test_atomic_cmpxchg_i128_monotonic:3496; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_monotonic:3497; OUTLINE-ATOMICS: // %bb.0:3498; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3499; OUTLINE-ATOMICS-NEXT: adrp x4, var1283500; OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var1283501; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_relax3502; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3503; OUTLINE-ATOMICS-NEXT: ret3504 %pair = cmpxchg ptr @var128, i128 %wanted, i128 %new monotonic monotonic3505 %old = extractvalue { i128, i1 } %pair, 03506 3507; CHECK-NOT: dmb3508; CHECK: adrp [[TMPADDR:x[0-9]+]], var1283509; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var1283510 3511; CHECK: casp x0, x1, x2, x3, [x[[ADDR]]]3512; CHECK-NOT: dmb3513 3514 ret i128 %old3515}3516 3517define dso_local i8 @test_atomic_cmpxchg_i8_seq_cst(i8 %wanted, i8 %new) nounwind {3518; CHECK-LABEL: test_atomic_cmpxchg_i8_seq_cst:3519; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8_seq_cst:3520; OUTLINE-ATOMICS: // %bb.0:3521; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3522; OUTLINE-ATOMICS-NEXT: adrp x2, var83523; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var83524; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_acq_rel3525; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3526; OUTLINE-ATOMICS-NEXT: ret3527 %pair = cmpxchg ptr @var8, i8 %wanted, i8 %new seq_cst seq_cst3528 %old = extractvalue { i8, i1 } %pair, 03529 3530; CHECK-NOT: dmb3531; CHECK: adrp [[TMPADDR:x[0-9]+]], var83532; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var83533 3534; CHECK: casalb w[[NEW:[0-9]+]], w[[OLD:[0-9]+]], [x[[ADDR]]]3535; CHECK-NOT: dmb3536 3537 ret i8 %old3538}3539 3540define dso_local i16 @test_atomic_cmpxchg_i16_seq_cst(i16 %wanted, i16 %new) nounwind {3541; CHECK-LABEL: test_atomic_cmpxchg_i16_seq_cst:3542; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16_seq_cst:3543; OUTLINE-ATOMICS: // %bb.0:3544; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3545; OUTLINE-ATOMICS-NEXT: adrp x2, var163546; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var163547; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_acq_rel3548; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3549; OUTLINE-ATOMICS-NEXT: ret3550 %pair = cmpxchg ptr @var16, i16 %wanted, i16 %new seq_cst seq_cst3551 %old = extractvalue { i16, i1 } %pair, 03552 3553; CHECK-NOT: dmb3554; CHECK: adrp [[TMPADDR:x[0-9]+]], var163555; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var163556 3557; CHECK: casalh w0, w1, [x[[ADDR]]]3558; CHECK-NOT: dmb3559 3560 ret i16 %old3561}3562 3563define dso_local i32 @test_atomic_cmpxchg_i32_seq_cst(i32 %wanted, i32 %new) nounwind {3564; CHECK-LABEL: test_atomic_cmpxchg_i32_seq_cst:3565; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_seq_cst:3566; OUTLINE-ATOMICS: // %bb.0:3567; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3568; OUTLINE-ATOMICS-NEXT: adrp x2, var323569; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var323570; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq_rel3571; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3572; OUTLINE-ATOMICS-NEXT: ret3573 %pair = cmpxchg ptr @var32, i32 %wanted, i32 %new seq_cst seq_cst3574 %old = extractvalue { i32, i1 } %pair, 03575 3576; CHECK-NOT: dmb3577; CHECK: adrp [[TMPADDR:x[0-9]+]], var323578; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var323579 3580; CHECK: casal w0, w1, [x[[ADDR]]]3581; CHECK-NOT: dmb3582 3583 ret i32 %old3584}3585 3586define dso_local i32 @test_atomic_cmpxchg_i32_monotonic_seq_cst(i32 %wanted, i32 %new) nounwind {3587; CHECK-LABEL: test_atomic_cmpxchg_i32_monotonic_seq_cst:3588; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_monotonic_seq_cst:3589; OUTLINE-ATOMICS: // %bb.0:3590; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3591; OUTLINE-ATOMICS-NEXT: adrp x2, var323592; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var323593; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq_rel3594; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3595; OUTLINE-ATOMICS-NEXT: ret3596 %pair = cmpxchg ptr @var32, i32 %wanted, i32 %new monotonic seq_cst3597 %old = extractvalue { i32, i1 } %pair, 03598 3599; CHECK-NOT: dmb3600; CHECK: adrp [[TMPADDR:x[0-9]+]], var323601; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var323602 3603; CHECK: casal w0, w1, [x[[ADDR]]]3604; CHECK-NOT: dmb3605 3606 ret i32 %old3607}3608 3609define dso_local i32 @test_atomic_cmpxchg_i32_release_acquire(i32 %wanted, i32 %new) nounwind {3610; CHECK-LABEL: test_atomic_cmpxchg_i32_release_acquire:3611; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_release_acquire:3612; OUTLINE-ATOMICS: // %bb.0:3613; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3614; OUTLINE-ATOMICS-NEXT: adrp x2, var323615; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var323616; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq_rel3617; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3618; OUTLINE-ATOMICS-NEXT: ret3619 %pair = cmpxchg ptr @var32, i32 %wanted, i32 %new release acquire3620 %old = extractvalue { i32, i1 } %pair, 03621 3622; CHECK-NOT: dmb3623; CHECK: adrp [[TMPADDR:x[0-9]+]], var323624; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var323625 3626; CHECK: casal w0, w1, [x[[ADDR]]]3627; CHECK-NOT: dmb3628 3629 ret i32 %old3630}3631 3632define dso_local i64 @test_atomic_cmpxchg_i64_seq_cst(i64 %wanted, i64 %new) nounwind {3633; CHECK-LABEL: test_atomic_cmpxchg_i64_seq_cst:3634; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i64_seq_cst:3635; OUTLINE-ATOMICS: // %bb.0:3636; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3637; OUTLINE-ATOMICS-NEXT: adrp x2, var643638; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var643639; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas8_acq_rel3640; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3641; OUTLINE-ATOMICS-NEXT: ret3642 %pair = cmpxchg ptr @var64, i64 %wanted, i64 %new seq_cst seq_cst3643 %old = extractvalue { i64, i1 } %pair, 03644 3645; CHECK-NOT: dmb3646; CHECK: adrp [[TMPADDR:x[0-9]+]], var643647; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var643648 3649; CHECK: casal x0, x1, [x[[ADDR]]]3650; CHECK-NOT: dmb3651 3652 ret i64 %old3653}3654 3655define dso_local i128 @test_atomic_cmpxchg_i128_seq_cst(i128 %wanted, i128 %new) nounwind {3656; CHECK-LABEL: test_atomic_cmpxchg_i128_seq_cst:3657; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_seq_cst:3658; OUTLINE-ATOMICS: // %bb.0:3659; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill3660; OUTLINE-ATOMICS-NEXT: adrp x4, var1283661; OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var1283662; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq_rel3663; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload3664; OUTLINE-ATOMICS-NEXT: ret3665 %pair = cmpxchg ptr @var128, i128 %wanted, i128 %new seq_cst seq_cst3666 %old = extractvalue { i128, i1 } %pair, 03667 3668; CHECK-NOT: dmb3669; CHECK: adrp [[TMPADDR:x[0-9]+]], var1283670; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var1283671 3672; CHECK: caspal x0, x1, x2, x3, [x[[ADDR]]]3673; CHECK-NOT: dmb3674 3675 ret i128 %old3676}3677 3678define dso_local i8 @test_atomic_load_max_i8_acq_rel(i8 %offset) nounwind {3679; CHECK-LABEL: test_atomic_load_max_i8_acq_rel:3680; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_acq_rel:3681; OUTLINE-ATOMICS: // %bb.0:3682; OUTLINE-ATOMICS-NEXT: adrp x9, var83683; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var83684; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start3685; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=13686; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]3687; OUTLINE-ATOMICS-NEXT: sxtb w8, w103688; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb3689; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt3690; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]3691; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]3692; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end3693; OUTLINE-ATOMICS-NEXT: mov w0, w83694; OUTLINE-ATOMICS-NEXT: ret3695 %old = atomicrmw max ptr @var8, i8 %offset acq_rel3696; CHECK-NOT: dmb3697; CHECK: adrp [[TMPADDR:x[0-9]+]], var83698; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var83699 3700; CHECK: ldsmaxalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]3701; CHECK-NOT: dmb3702 3703 ret i8 %old3704}3705 3706define dso_local i16 @test_atomic_load_max_i16_acq_rel(i16 %offset) nounwind {3707; CHECK-LABEL: test_atomic_load_max_i16_acq_rel:3708; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_acq_rel:3709; OUTLINE-ATOMICS: // %bb.0:3710; OUTLINE-ATOMICS-NEXT: adrp x9, var163711; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var163712; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start3713; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=13714; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]3715; OUTLINE-ATOMICS-NEXT: sxth w8, w103716; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth3717; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt3718; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]3719; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]3720; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end3721; OUTLINE-ATOMICS-NEXT: mov w0, w83722; OUTLINE-ATOMICS-NEXT: ret3723 %old = atomicrmw max ptr @var16, i16 %offset acq_rel3724; CHECK-NOT: dmb3725; CHECK: adrp [[TMPADDR:x[0-9]+]], var163726; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var163727 3728; CHECK: ldsmaxalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]3729; CHECK-NOT: dmb3730 3731 ret i16 %old3732}3733 3734define dso_local i32 @test_atomic_load_max_i32_acq_rel(i32 %offset) nounwind {3735; CHECK-LABEL: test_atomic_load_max_i32_acq_rel:3736; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_acq_rel:3737; OUTLINE-ATOMICS: // %bb.0:3738; OUTLINE-ATOMICS-NEXT: adrp x9, var323739; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var323740; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start3741; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=13742; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]3743; OUTLINE-ATOMICS-NEXT: cmp w8, w03744; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt3745; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]3746; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]3747; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end3748; OUTLINE-ATOMICS-NEXT: mov w0, w83749; OUTLINE-ATOMICS-NEXT: ret3750 %old = atomicrmw max ptr @var32, i32 %offset acq_rel3751; CHECK-NOT: dmb3752; CHECK: adrp [[TMPADDR:x[0-9]+]], var323753; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var323754 3755; CHECK: ldsmaxal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]3756; CHECK-NOT: dmb3757 3758 ret i32 %old3759}3760 3761define dso_local i64 @test_atomic_load_max_i64_acq_rel(i64 %offset) nounwind {3762; CHECK-LABEL: test_atomic_load_max_i64_acq_rel:3763; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_acq_rel:3764; OUTLINE-ATOMICS: // %bb.0:3765; OUTLINE-ATOMICS-NEXT: adrp x9, var643766; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var643767; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start3768; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=13769; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]3770; OUTLINE-ATOMICS-NEXT: cmp x8, x03771; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt3772; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]3773; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]3774; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end3775; OUTLINE-ATOMICS-NEXT: mov x0, x83776; OUTLINE-ATOMICS-NEXT: ret3777 %old = atomicrmw max ptr @var64, i64 %offset acq_rel3778; CHECK-NOT: dmb3779; CHECK: adrp [[TMPADDR:x[0-9]+]], var643780; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var643781 3782; CHECK: ldsmaxal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]3783; CHECK-NOT: dmb3784 3785 ret i64 %old3786}3787 3788define dso_local void @test_atomic_load_max_i32_noret_acq_rel(i32 %offset) nounwind {3789; CHECK-LABEL: test_atomic_load_max_i32_noret_acq_rel:3790; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_acq_rel:3791; OUTLINE-ATOMICS: // %bb.0:3792; OUTLINE-ATOMICS-NEXT: adrp x8, var323793; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var323794; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start3795; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=13796; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]3797; OUTLINE-ATOMICS-NEXT: cmp w9, w03798; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt3799; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]3800; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]3801; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end3802; OUTLINE-ATOMICS-NEXT: ret3803 atomicrmw max ptr @var32, i32 %offset acq_rel3804; CHECK-NOT: dmb3805; CHECK: adrp [[TMPADDR:x[0-9]+]], var323806; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var323807 3808; CHECK: ldsmaxal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]3809; CHECK-NOT: dmb3810 ret void3811}3812 3813define dso_local void @test_atomic_load_max_i64_noret_acq_rel(i64 %offset) nounwind {3814; CHECK-LABEL: test_atomic_load_max_i64_noret_acq_rel:3815; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_acq_rel:3816; OUTLINE-ATOMICS: // %bb.0:3817; OUTLINE-ATOMICS-NEXT: adrp x8, var643818; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var643819; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start3820; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=13821; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]3822; OUTLINE-ATOMICS-NEXT: cmp x9, x03823; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt3824; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]3825; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]3826; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end3827; OUTLINE-ATOMICS-NEXT: ret3828 atomicrmw max ptr @var64, i64 %offset acq_rel3829; CHECK-NOT: dmb3830; CHECK: adrp [[TMPADDR:x[0-9]+]], var643831; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var643832 3833; CHECK: ldsmaxal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]3834; CHECK-NOT: dmb3835 ret void3836}3837 3838define dso_local i8 @test_atomic_load_max_i8_acquire(i8 %offset) nounwind {3839; CHECK-LABEL: test_atomic_load_max_i8_acquire:3840; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_acquire:3841; OUTLINE-ATOMICS: // %bb.0:3842; OUTLINE-ATOMICS-NEXT: adrp x9, var83843; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var83844; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start3845; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=13846; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]3847; OUTLINE-ATOMICS-NEXT: sxtb w8, w103848; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb3849; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt3850; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x9]3851; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]3852; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end3853; OUTLINE-ATOMICS-NEXT: mov w0, w83854; OUTLINE-ATOMICS-NEXT: ret3855 %old = atomicrmw max ptr @var8, i8 %offset acquire3856; CHECK-NOT: dmb3857; CHECK: adrp [[TMPADDR:x[0-9]+]], var83858; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var83859 3860; CHECK: ldsmaxab w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]3861; CHECK-NOT: dmb3862 3863 ret i8 %old3864}3865 3866define dso_local i16 @test_atomic_load_max_i16_acquire(i16 %offset) nounwind {3867; CHECK-LABEL: test_atomic_load_max_i16_acquire:3868; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_acquire:3869; OUTLINE-ATOMICS: // %bb.0:3870; OUTLINE-ATOMICS-NEXT: adrp x9, var163871; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var163872; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start3873; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=13874; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]3875; OUTLINE-ATOMICS-NEXT: sxth w8, w103876; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth3877; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt3878; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x9]3879; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]3880; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end3881; OUTLINE-ATOMICS-NEXT: mov w0, w83882; OUTLINE-ATOMICS-NEXT: ret3883 %old = atomicrmw max ptr @var16, i16 %offset acquire3884; CHECK-NOT: dmb3885; CHECK: adrp [[TMPADDR:x[0-9]+]], var163886; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var163887 3888; CHECK: ldsmaxah w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]3889; CHECK-NOT: dmb3890 3891 ret i16 %old3892}3893 3894define dso_local i32 @test_atomic_load_max_i32_acquire(i32 %offset) nounwind {3895; CHECK-LABEL: test_atomic_load_max_i32_acquire:3896; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_acquire:3897; OUTLINE-ATOMICS: // %bb.0:3898; OUTLINE-ATOMICS-NEXT: adrp x9, var323899; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var323900; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start3901; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=13902; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]3903; OUTLINE-ATOMICS-NEXT: cmp w8, w03904; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt3905; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]3906; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]3907; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end3908; OUTLINE-ATOMICS-NEXT: mov w0, w83909; OUTLINE-ATOMICS-NEXT: ret3910 %old = atomicrmw max ptr @var32, i32 %offset acquire3911; CHECK-NOT: dmb3912; CHECK: adrp [[TMPADDR:x[0-9]+]], var323913; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var323914 3915; CHECK: ldsmaxa w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]3916; CHECK-NOT: dmb3917 3918 ret i32 %old3919}3920 3921define dso_local i64 @test_atomic_load_max_i64_acquire(i64 %offset) nounwind {3922; CHECK-LABEL: test_atomic_load_max_i64_acquire:3923; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_acquire:3924; OUTLINE-ATOMICS: // %bb.0:3925; OUTLINE-ATOMICS-NEXT: adrp x9, var643926; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var643927; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start3928; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=13929; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]3930; OUTLINE-ATOMICS-NEXT: cmp x8, x03931; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt3932; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]3933; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]3934; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end3935; OUTLINE-ATOMICS-NEXT: mov x0, x83936; OUTLINE-ATOMICS-NEXT: ret3937 %old = atomicrmw max ptr @var64, i64 %offset acquire3938; CHECK-NOT: dmb3939; CHECK: adrp [[TMPADDR:x[0-9]+]], var643940; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var643941 3942; CHECK: ldsmaxa x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]3943; CHECK-NOT: dmb3944 3945 ret i64 %old3946}3947 3948define dso_local void @test_atomic_load_max_i32_noret_acquire(i32 %offset) nounwind {3949; CHECK-LABEL: test_atomic_load_max_i32_noret_acquire:3950; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_acquire:3951; OUTLINE-ATOMICS: // %bb.0:3952; OUTLINE-ATOMICS-NEXT: adrp x8, var323953; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var323954; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start3955; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=13956; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]3957; OUTLINE-ATOMICS-NEXT: cmp w9, w03958; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt3959; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]3960; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]3961; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end3962; OUTLINE-ATOMICS-NEXT: ret3963 atomicrmw max ptr @var32, i32 %offset acquire3964; CHECK-NOT: dmb3965; CHECK: adrp [[TMPADDR:x[0-9]+]], var323966; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var323967 3968; CHECK: ldsmaxa w0, w[[NEW:[0-9]+]], [x[[ADDR]]]3969; CHECK-NOT: dmb3970 ret void3971}3972 3973define dso_local void @test_atomic_load_max_i64_noret_acquire(i64 %offset) nounwind {3974; CHECK-LABEL: test_atomic_load_max_i64_noret_acquire:3975; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_acquire:3976; OUTLINE-ATOMICS: // %bb.0:3977; OUTLINE-ATOMICS-NEXT: adrp x8, var643978; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var643979; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start3980; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=13981; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]3982; OUTLINE-ATOMICS-NEXT: cmp x9, x03983; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt3984; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]3985; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]3986; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end3987; OUTLINE-ATOMICS-NEXT: ret3988 atomicrmw max ptr @var64, i64 %offset acquire3989; CHECK-NOT: dmb3990; CHECK: adrp [[TMPADDR:x[0-9]+]], var643991; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var643992 3993; CHECK: ldsmaxa x0, x[[NEW:[0-9]+]], [x[[ADDR]]]3994; CHECK-NOT: dmb3995 ret void3996}3997 3998define dso_local i8 @test_atomic_load_max_i8_monotonic(i8 %offset) nounwind {3999; CHECK-LABEL: test_atomic_load_max_i8_monotonic:4000; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_monotonic:4001; OUTLINE-ATOMICS: // %bb.0:4002; OUTLINE-ATOMICS-NEXT: adrp x9, var84003; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var84004; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4005; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14006; OUTLINE-ATOMICS-NEXT: ldxrb w10, [x9]4007; OUTLINE-ATOMICS-NEXT: sxtb w8, w104008; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb4009; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt4010; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x9]4011; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4012; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4013; OUTLINE-ATOMICS-NEXT: mov w0, w84014; OUTLINE-ATOMICS-NEXT: ret4015 %old = atomicrmw max ptr @var8, i8 %offset monotonic4016; CHECK-NOT: dmb4017; CHECK: adrp [[TMPADDR:x[0-9]+]], var84018; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var84019 4020; CHECK: ldsmaxb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4021; CHECK-NOT: dmb4022 4023 ret i8 %old4024}4025 4026define dso_local i16 @test_atomic_load_max_i16_monotonic(i16 %offset) nounwind {4027; CHECK-LABEL: test_atomic_load_max_i16_monotonic:4028; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_monotonic:4029; OUTLINE-ATOMICS: // %bb.0:4030; OUTLINE-ATOMICS-NEXT: adrp x9, var164031; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var164032; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4033; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14034; OUTLINE-ATOMICS-NEXT: ldxrh w10, [x9]4035; OUTLINE-ATOMICS-NEXT: sxth w8, w104036; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth4037; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt4038; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x9]4039; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4040; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4041; OUTLINE-ATOMICS-NEXT: mov w0, w84042; OUTLINE-ATOMICS-NEXT: ret4043 %old = atomicrmw max ptr @var16, i16 %offset monotonic4044; CHECK-NOT: dmb4045; CHECK: adrp [[TMPADDR:x[0-9]+]], var164046; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var164047 4048; CHECK: ldsmaxh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4049; CHECK-NOT: dmb4050 4051 ret i16 %old4052}4053 4054define dso_local i32 @test_atomic_load_max_i32_monotonic(i32 %offset) nounwind {4055; CHECK-LABEL: test_atomic_load_max_i32_monotonic:4056; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_monotonic:4057; OUTLINE-ATOMICS: // %bb.0:4058; OUTLINE-ATOMICS-NEXT: adrp x9, var324059; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var324060; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4061; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14062; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]4063; OUTLINE-ATOMICS-NEXT: cmp w8, w04064; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt4065; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]4066; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4067; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4068; OUTLINE-ATOMICS-NEXT: mov w0, w84069; OUTLINE-ATOMICS-NEXT: ret4070 %old = atomicrmw max ptr @var32, i32 %offset monotonic4071; CHECK-NOT: dmb4072; CHECK: adrp [[TMPADDR:x[0-9]+]], var324073; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var324074 4075; CHECK: ldsmax w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4076; CHECK-NOT: dmb4077 4078 ret i32 %old4079}4080 4081define dso_local i64 @test_atomic_load_max_i64_monotonic(i64 %offset) nounwind {4082; CHECK-LABEL: test_atomic_load_max_i64_monotonic:4083; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_monotonic:4084; OUTLINE-ATOMICS: // %bb.0:4085; OUTLINE-ATOMICS-NEXT: adrp x9, var644086; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var644087; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4088; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14089; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]4090; OUTLINE-ATOMICS-NEXT: cmp x8, x04091; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt4092; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]4093; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4094; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4095; OUTLINE-ATOMICS-NEXT: mov x0, x84096; OUTLINE-ATOMICS-NEXT: ret4097 %old = atomicrmw max ptr @var64, i64 %offset monotonic4098; CHECK-NOT: dmb4099; CHECK: adrp [[TMPADDR:x[0-9]+]], var644100; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var644101 4102; CHECK: ldsmax x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]4103; CHECK-NOT: dmb4104 4105 ret i64 %old4106}4107 4108define dso_local void @test_atomic_load_max_i32_noret_monotonic(i32 %offset) nounwind {4109; CHECK-LABEL: test_atomic_load_max_i32_noret_monotonic:4110; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_monotonic:4111; OUTLINE-ATOMICS: // %bb.0:4112; OUTLINE-ATOMICS-NEXT: adrp x8, var324113; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var324114; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4115; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14116; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]4117; OUTLINE-ATOMICS-NEXT: cmp w9, w04118; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt4119; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]4120; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]4121; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4122; OUTLINE-ATOMICS-NEXT: ret4123 atomicrmw max ptr @var32, i32 %offset monotonic4124; CHECK-NOT: dmb4125; CHECK: adrp [[TMPADDR:x[0-9]+]], var324126; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var324127 4128; CHECK: ldsmax w{{[0-9]+}}, w{{[1-9][0-9]*}}, [x[[ADDR]]]4129; CHECK-NOT: dmb4130 ret void4131}4132 4133define dso_local void @test_atomic_load_max_i64_noret_monotonic(i64 %offset) nounwind {4134; CHECK-LABEL: test_atomic_load_max_i64_noret_monotonic:4135; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_monotonic:4136; OUTLINE-ATOMICS: // %bb.0:4137; OUTLINE-ATOMICS-NEXT: adrp x8, var644138; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var644139; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4140; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14141; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]4142; OUTLINE-ATOMICS-NEXT: cmp x9, x04143; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt4144; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]4145; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]4146; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4147; OUTLINE-ATOMICS-NEXT: ret4148 atomicrmw max ptr @var64, i64 %offset monotonic4149; CHECK-NOT: dmb4150; CHECK: adrp [[TMPADDR:x[0-9]+]], var644151; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var644152 4153; CHECK: ldsmax x{{[0-9]+}}, x{{[1-9][0-9]*}}, [x[[ADDR]]]4154; CHECK-NOT: dmb4155 ret void4156}4157 4158define dso_local i8 @test_atomic_load_max_i8_release(i8 %offset) nounwind {4159; CHECK-LABEL: test_atomic_load_max_i8_release:4160; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_release:4161; OUTLINE-ATOMICS: // %bb.0:4162; OUTLINE-ATOMICS-NEXT: adrp x9, var84163; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var84164; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4165; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14166; OUTLINE-ATOMICS-NEXT: ldxrb w10, [x9]4167; OUTLINE-ATOMICS-NEXT: sxtb w8, w104168; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb4169; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt4170; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]4171; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4172; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4173; OUTLINE-ATOMICS-NEXT: mov w0, w84174; OUTLINE-ATOMICS-NEXT: ret4175 %old = atomicrmw max ptr @var8, i8 %offset release4176; CHECK-NOT: dmb4177; CHECK: adrp [[TMPADDR:x[0-9]+]], var84178; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var84179 4180; CHECK: ldsmaxlb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4181; CHECK-NOT: dmb4182 4183 ret i8 %old4184}4185 4186define dso_local i16 @test_atomic_load_max_i16_release(i16 %offset) nounwind {4187; CHECK-LABEL: test_atomic_load_max_i16_release:4188; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_release:4189; OUTLINE-ATOMICS: // %bb.0:4190; OUTLINE-ATOMICS-NEXT: adrp x9, var164191; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var164192; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4193; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14194; OUTLINE-ATOMICS-NEXT: ldxrh w10, [x9]4195; OUTLINE-ATOMICS-NEXT: sxth w8, w104196; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth4197; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt4198; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]4199; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4200; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4201; OUTLINE-ATOMICS-NEXT: mov w0, w84202; OUTLINE-ATOMICS-NEXT: ret4203 %old = atomicrmw max ptr @var16, i16 %offset release4204; CHECK-NOT: dmb4205; CHECK: adrp [[TMPADDR:x[0-9]+]], var164206; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var164207 4208; CHECK: ldsmaxlh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4209; CHECK-NOT: dmb4210 4211 ret i16 %old4212}4213 4214define dso_local i32 @test_atomic_load_max_i32_release(i32 %offset) nounwind {4215; CHECK-LABEL: test_atomic_load_max_i32_release:4216; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_release:4217; OUTLINE-ATOMICS: // %bb.0:4218; OUTLINE-ATOMICS-NEXT: adrp x9, var324219; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var324220; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4221; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14222; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]4223; OUTLINE-ATOMICS-NEXT: cmp w8, w04224; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt4225; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]4226; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4227; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4228; OUTLINE-ATOMICS-NEXT: mov w0, w84229; OUTLINE-ATOMICS-NEXT: ret4230 %old = atomicrmw max ptr @var32, i32 %offset release4231; CHECK-NOT: dmb4232; CHECK: adrp [[TMPADDR:x[0-9]+]], var324233; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var324234 4235; CHECK: ldsmaxl w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4236; CHECK-NOT: dmb4237 4238 ret i32 %old4239}4240 4241define dso_local i64 @test_atomic_load_max_i64_release(i64 %offset) nounwind {4242; CHECK-LABEL: test_atomic_load_max_i64_release:4243; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_release:4244; OUTLINE-ATOMICS: // %bb.0:4245; OUTLINE-ATOMICS-NEXT: adrp x9, var644246; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var644247; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4248; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14249; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]4250; OUTLINE-ATOMICS-NEXT: cmp x8, x04251; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt4252; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]4253; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4254; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4255; OUTLINE-ATOMICS-NEXT: mov x0, x84256; OUTLINE-ATOMICS-NEXT: ret4257 %old = atomicrmw max ptr @var64, i64 %offset release4258; CHECK-NOT: dmb4259; CHECK: adrp [[TMPADDR:x[0-9]+]], var644260; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var644261 4262; CHECK: ldsmaxl x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]4263; CHECK-NOT: dmb4264 4265 ret i64 %old4266}4267 4268define dso_local void @test_atomic_load_max_i32_noret_release(i32 %offset) nounwind {4269; CHECK-LABEL: test_atomic_load_max_i32_noret_release:4270; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_release:4271; OUTLINE-ATOMICS: // %bb.0:4272; OUTLINE-ATOMICS-NEXT: adrp x8, var324273; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var324274; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4275; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14276; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]4277; OUTLINE-ATOMICS-NEXT: cmp w9, w04278; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt4279; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]4280; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]4281; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4282; OUTLINE-ATOMICS-NEXT: ret4283 atomicrmw max ptr @var32, i32 %offset release4284; CHECK-NOT: dmb4285; CHECK: adrp [[TMPADDR:x[0-9]+]], var324286; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var324287 4288; CHECK: ldsmaxl w{{[0-9]+}}, w{{[1-9][0-9]*}}, [x[[ADDR]]]4289; CHECK-NOT: dmb4290 ret void4291}4292 4293define dso_local void @test_atomic_load_max_i64_noret_release(i64 %offset) nounwind {4294; CHECK-LABEL: test_atomic_load_max_i64_noret_release:4295; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_release:4296; OUTLINE-ATOMICS: // %bb.0:4297; OUTLINE-ATOMICS-NEXT: adrp x8, var644298; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var644299; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4300; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14301; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]4302; OUTLINE-ATOMICS-NEXT: cmp x9, x04303; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt4304; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]4305; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]4306; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4307; OUTLINE-ATOMICS-NEXT: ret4308 atomicrmw max ptr @var64, i64 %offset release4309; CHECK-NOT: dmb4310; CHECK: adrp [[TMPADDR:x[0-9]+]], var644311; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var644312 4313; CHECK: ldsmaxl x{{[0-9]+}}, x{{[1-9][0-9]*}}, [x[[ADDR]]]4314; CHECK-NOT: dmb4315 ret void4316}4317 4318define dso_local i8 @test_atomic_load_max_i8_seq_cst(i8 %offset) nounwind {4319; CHECK-LABEL: test_atomic_load_max_i8_seq_cst:4320; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_seq_cst:4321; OUTLINE-ATOMICS: // %bb.0:4322; OUTLINE-ATOMICS-NEXT: adrp x9, var84323; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var84324; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4325; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14326; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]4327; OUTLINE-ATOMICS-NEXT: sxtb w8, w104328; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb4329; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt4330; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]4331; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4332; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4333; OUTLINE-ATOMICS-NEXT: mov w0, w84334; OUTLINE-ATOMICS-NEXT: ret4335 %old = atomicrmw max ptr @var8, i8 %offset seq_cst4336; CHECK-NOT: dmb4337; CHECK: adrp [[TMPADDR:x[0-9]+]], var84338; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var84339 4340; CHECK: ldsmaxalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4341; CHECK-NOT: dmb4342 4343 ret i8 %old4344}4345 4346define dso_local i16 @test_atomic_load_max_i16_seq_cst(i16 %offset) nounwind {4347; CHECK-LABEL: test_atomic_load_max_i16_seq_cst:4348; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_seq_cst:4349; OUTLINE-ATOMICS: // %bb.0:4350; OUTLINE-ATOMICS-NEXT: adrp x9, var164351; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var164352; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4353; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14354; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]4355; OUTLINE-ATOMICS-NEXT: sxth w8, w104356; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth4357; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt4358; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]4359; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4360; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4361; OUTLINE-ATOMICS-NEXT: mov w0, w84362; OUTLINE-ATOMICS-NEXT: ret4363 %old = atomicrmw max ptr @var16, i16 %offset seq_cst4364; CHECK-NOT: dmb4365; CHECK: adrp [[TMPADDR:x[0-9]+]], var164366; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var164367 4368; CHECK: ldsmaxalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4369; CHECK-NOT: dmb4370 4371 ret i16 %old4372}4373 4374define dso_local i32 @test_atomic_load_max_i32_seq_cst(i32 %offset) nounwind {4375; CHECK-LABEL: test_atomic_load_max_i32_seq_cst:4376; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_seq_cst:4377; OUTLINE-ATOMICS: // %bb.0:4378; OUTLINE-ATOMICS-NEXT: adrp x9, var324379; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var324380; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4381; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14382; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]4383; OUTLINE-ATOMICS-NEXT: cmp w8, w04384; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt4385; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]4386; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4387; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4388; OUTLINE-ATOMICS-NEXT: mov w0, w84389; OUTLINE-ATOMICS-NEXT: ret4390 %old = atomicrmw max ptr @var32, i32 %offset seq_cst4391; CHECK-NOT: dmb4392; CHECK: adrp [[TMPADDR:x[0-9]+]], var324393; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var324394 4395; CHECK: ldsmaxal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4396; CHECK-NOT: dmb4397 4398 ret i32 %old4399}4400 4401define dso_local i64 @test_atomic_load_max_i64_seq_cst(i64 %offset) nounwind {4402; CHECK-LABEL: test_atomic_load_max_i64_seq_cst:4403; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_seq_cst:4404; OUTLINE-ATOMICS: // %bb.0:4405; OUTLINE-ATOMICS-NEXT: adrp x9, var644406; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var644407; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4408; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14409; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]4410; OUTLINE-ATOMICS-NEXT: cmp x8, x04411; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt4412; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]4413; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4414; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4415; OUTLINE-ATOMICS-NEXT: mov x0, x84416; OUTLINE-ATOMICS-NEXT: ret4417 %old = atomicrmw max ptr @var64, i64 %offset seq_cst4418; CHECK-NOT: dmb4419; CHECK: adrp [[TMPADDR:x[0-9]+]], var644420; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var644421 4422; CHECK: ldsmaxal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]4423; CHECK-NOT: dmb4424 4425 ret i64 %old4426}4427 4428define dso_local void @test_atomic_load_max_i32_noret_seq_cst(i32 %offset) nounwind {4429; CHECK-LABEL: test_atomic_load_max_i32_noret_seq_cst:4430; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_seq_cst:4431; OUTLINE-ATOMICS: // %bb.0:4432; OUTLINE-ATOMICS-NEXT: adrp x8, var324433; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var324434; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4435; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14436; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]4437; OUTLINE-ATOMICS-NEXT: cmp w9, w04438; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt4439; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]4440; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]4441; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4442; OUTLINE-ATOMICS-NEXT: ret4443 atomicrmw max ptr @var32, i32 %offset seq_cst4444; CHECK-NOT: dmb4445; CHECK: adrp [[TMPADDR:x[0-9]+]], var324446; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var324447 4448; CHECK: ldsmaxal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]4449; CHECK-NOT: dmb4450 ret void4451}4452 4453define dso_local void @test_atomic_load_max_i64_noret_seq_cst(i64 %offset) nounwind {4454; CHECK-LABEL: test_atomic_load_max_i64_noret_seq_cst:4455; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_seq_cst:4456; OUTLINE-ATOMICS: // %bb.0:4457; OUTLINE-ATOMICS-NEXT: adrp x8, var644458; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var644459; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4460; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14461; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]4462; OUTLINE-ATOMICS-NEXT: cmp x9, x04463; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt4464; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]4465; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]4466; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4467; OUTLINE-ATOMICS-NEXT: ret4468 atomicrmw max ptr @var64, i64 %offset seq_cst4469; CHECK-NOT: dmb4470; CHECK: adrp [[TMPADDR:x[0-9]+]], var644471; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var644472 4473; CHECK: ldsmaxal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]4474; CHECK-NOT: dmb4475 ret void4476}4477 4478define dso_local i8 @test_atomic_load_min_i8_acq_rel(i8 %offset) nounwind {4479; CHECK-LABEL: test_atomic_load_min_i8_acq_rel:4480; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_acq_rel:4481; OUTLINE-ATOMICS: // %bb.0:4482; OUTLINE-ATOMICS-NEXT: adrp x9, var84483; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var84484; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4485; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14486; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]4487; OUTLINE-ATOMICS-NEXT: sxtb w8, w104488; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb4489; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le4490; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]4491; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4492; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4493; OUTLINE-ATOMICS-NEXT: mov w0, w84494; OUTLINE-ATOMICS-NEXT: ret4495 %old = atomicrmw min ptr @var8, i8 %offset acq_rel4496; CHECK-NOT: dmb4497; CHECK: adrp [[TMPADDR:x[0-9]+]], var84498; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var84499 4500; CHECK: ldsminalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4501; CHECK-NOT: dmb4502 4503 ret i8 %old4504}4505 4506define dso_local i16 @test_atomic_load_min_i16_acq_rel(i16 %offset) nounwind {4507; CHECK-LABEL: test_atomic_load_min_i16_acq_rel:4508; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_acq_rel:4509; OUTLINE-ATOMICS: // %bb.0:4510; OUTLINE-ATOMICS-NEXT: adrp x9, var164511; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var164512; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4513; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14514; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]4515; OUTLINE-ATOMICS-NEXT: sxth w8, w104516; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth4517; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le4518; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]4519; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4520; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4521; OUTLINE-ATOMICS-NEXT: mov w0, w84522; OUTLINE-ATOMICS-NEXT: ret4523 %old = atomicrmw min ptr @var16, i16 %offset acq_rel4524; CHECK-NOT: dmb4525; CHECK: adrp [[TMPADDR:x[0-9]+]], var164526; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var164527 4528; CHECK: ldsminalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4529; CHECK-NOT: dmb4530 4531 ret i16 %old4532}4533 4534define dso_local i32 @test_atomic_load_min_i32_acq_rel(i32 %offset) nounwind {4535; CHECK-LABEL: test_atomic_load_min_i32_acq_rel:4536; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_acq_rel:4537; OUTLINE-ATOMICS: // %bb.0:4538; OUTLINE-ATOMICS-NEXT: adrp x9, var324539; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var324540; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4541; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14542; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]4543; OUTLINE-ATOMICS-NEXT: cmp w8, w04544; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le4545; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]4546; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4547; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4548; OUTLINE-ATOMICS-NEXT: mov w0, w84549; OUTLINE-ATOMICS-NEXT: ret4550 %old = atomicrmw min ptr @var32, i32 %offset acq_rel4551; CHECK-NOT: dmb4552; CHECK: adrp [[TMPADDR:x[0-9]+]], var324553; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var324554 4555; CHECK: ldsminal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4556; CHECK-NOT: dmb4557 4558 ret i32 %old4559}4560 4561define dso_local i64 @test_atomic_load_min_i64_acq_rel(i64 %offset) nounwind {4562; CHECK-LABEL: test_atomic_load_min_i64_acq_rel:4563; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_acq_rel:4564; OUTLINE-ATOMICS: // %bb.0:4565; OUTLINE-ATOMICS-NEXT: adrp x9, var644566; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var644567; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4568; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14569; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]4570; OUTLINE-ATOMICS-NEXT: cmp x8, x04571; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le4572; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]4573; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4574; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4575; OUTLINE-ATOMICS-NEXT: mov x0, x84576; OUTLINE-ATOMICS-NEXT: ret4577 %old = atomicrmw min ptr @var64, i64 %offset acq_rel4578; CHECK-NOT: dmb4579; CHECK: adrp [[TMPADDR:x[0-9]+]], var644580; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var644581 4582; CHECK: ldsminal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]4583; CHECK-NOT: dmb4584 4585 ret i64 %old4586}4587 4588define dso_local void @test_atomic_load_min_i32_noret_acq_rel(i32 %offset) nounwind {4589; CHECK-LABEL: test_atomic_load_min_i32_noret_acq_rel:4590; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_acq_rel:4591; OUTLINE-ATOMICS: // %bb.0:4592; OUTLINE-ATOMICS-NEXT: adrp x8, var324593; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var324594; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4595; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14596; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]4597; OUTLINE-ATOMICS-NEXT: cmp w9, w04598; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le4599; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]4600; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]4601; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4602; OUTLINE-ATOMICS-NEXT: ret4603 atomicrmw min ptr @var32, i32 %offset acq_rel4604; CHECK-NOT: dmb4605; CHECK: adrp [[TMPADDR:x[0-9]+]], var324606; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var324607 4608; CHECK: ldsminal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]4609; CHECK-NOT: dmb4610 ret void4611}4612 4613define dso_local void @test_atomic_load_min_i64_noret_acq_rel(i64 %offset) nounwind {4614; CHECK-LABEL: test_atomic_load_min_i64_noret_acq_rel:4615; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_acq_rel:4616; OUTLINE-ATOMICS: // %bb.0:4617; OUTLINE-ATOMICS-NEXT: adrp x8, var644618; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var644619; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4620; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14621; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]4622; OUTLINE-ATOMICS-NEXT: cmp x9, x04623; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le4624; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]4625; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]4626; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4627; OUTLINE-ATOMICS-NEXT: ret4628 atomicrmw min ptr @var64, i64 %offset acq_rel4629; CHECK-NOT: dmb4630; CHECK: adrp [[TMPADDR:x[0-9]+]], var644631; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var644632 4633; CHECK: ldsminal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]4634; CHECK-NOT: dmb4635 ret void4636}4637 4638define dso_local i8 @test_atomic_load_min_i8_acquire(i8 %offset) nounwind {4639; CHECK-LABEL: test_atomic_load_min_i8_acquire:4640; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_acquire:4641; OUTLINE-ATOMICS: // %bb.0:4642; OUTLINE-ATOMICS-NEXT: adrp x9, var84643; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var84644; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4645; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14646; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]4647; OUTLINE-ATOMICS-NEXT: sxtb w8, w104648; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb4649; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le4650; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x9]4651; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4652; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4653; OUTLINE-ATOMICS-NEXT: mov w0, w84654; OUTLINE-ATOMICS-NEXT: ret4655 %old = atomicrmw min ptr @var8, i8 %offset acquire4656; CHECK-NOT: dmb4657; CHECK: adrp [[TMPADDR:x[0-9]+]], var84658; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var84659 4660; CHECK: ldsminab w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4661; CHECK-NOT: dmb4662 4663 ret i8 %old4664}4665 4666define dso_local i16 @test_atomic_load_min_i16_acquire(i16 %offset) nounwind {4667; CHECK-LABEL: test_atomic_load_min_i16_acquire:4668; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_acquire:4669; OUTLINE-ATOMICS: // %bb.0:4670; OUTLINE-ATOMICS-NEXT: adrp x9, var164671; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var164672; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4673; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14674; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]4675; OUTLINE-ATOMICS-NEXT: sxth w8, w104676; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth4677; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le4678; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x9]4679; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4680; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4681; OUTLINE-ATOMICS-NEXT: mov w0, w84682; OUTLINE-ATOMICS-NEXT: ret4683 %old = atomicrmw min ptr @var16, i16 %offset acquire4684; CHECK-NOT: dmb4685; CHECK: adrp [[TMPADDR:x[0-9]+]], var164686; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var164687 4688; CHECK: ldsminah w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4689; CHECK-NOT: dmb4690 4691 ret i16 %old4692}4693 4694define dso_local i32 @test_atomic_load_min_i32_acquire(i32 %offset) nounwind {4695; CHECK-LABEL: test_atomic_load_min_i32_acquire:4696; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_acquire:4697; OUTLINE-ATOMICS: // %bb.0:4698; OUTLINE-ATOMICS-NEXT: adrp x9, var324699; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var324700; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4701; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14702; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]4703; OUTLINE-ATOMICS-NEXT: cmp w8, w04704; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le4705; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]4706; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4707; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4708; OUTLINE-ATOMICS-NEXT: mov w0, w84709; OUTLINE-ATOMICS-NEXT: ret4710 %old = atomicrmw min ptr @var32, i32 %offset acquire4711; CHECK-NOT: dmb4712; CHECK: adrp [[TMPADDR:x[0-9]+]], var324713; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var324714 4715; CHECK: ldsmina w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4716; CHECK-NOT: dmb4717 4718 ret i32 %old4719}4720 4721define dso_local i64 @test_atomic_load_min_i64_acquire(i64 %offset) nounwind {4722; CHECK-LABEL: test_atomic_load_min_i64_acquire:4723; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_acquire:4724; OUTLINE-ATOMICS: // %bb.0:4725; OUTLINE-ATOMICS-NEXT: adrp x9, var644726; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var644727; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4728; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14729; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]4730; OUTLINE-ATOMICS-NEXT: cmp x8, x04731; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le4732; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]4733; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4734; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4735; OUTLINE-ATOMICS-NEXT: mov x0, x84736; OUTLINE-ATOMICS-NEXT: ret4737 %old = atomicrmw min ptr @var64, i64 %offset acquire4738; CHECK-NOT: dmb4739; CHECK: adrp [[TMPADDR:x[0-9]+]], var644740; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var644741 4742; CHECK: ldsmina x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]4743; CHECK-NOT: dmb4744 4745 ret i64 %old4746}4747 4748define dso_local void @test_atomic_load_min_i32_noret_acquire(i32 %offset) nounwind {4749; CHECK-LABEL: test_atomic_load_min_i32_noret_acquire:4750; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_acquire:4751; OUTLINE-ATOMICS: // %bb.0:4752; OUTLINE-ATOMICS-NEXT: adrp x8, var324753; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var324754; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4755; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14756; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]4757; OUTLINE-ATOMICS-NEXT: cmp w9, w04758; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le4759; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]4760; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]4761; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4762; OUTLINE-ATOMICS-NEXT: ret4763 atomicrmw min ptr @var32, i32 %offset acquire4764; CHECK-NOT: dmb4765; CHECK: adrp [[TMPADDR:x[0-9]+]], var324766; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var324767 4768; CHECK: ldsmina w0, w[[NEW:[0-9]+]], [x[[ADDR]]]4769; CHECK-NOT: dmb4770 ret void4771}4772 4773define dso_local void @test_atomic_load_min_i64_noret_acquire(i64 %offset) nounwind {4774; CHECK-LABEL: test_atomic_load_min_i64_noret_acquire:4775; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_acquire:4776; OUTLINE-ATOMICS: // %bb.0:4777; OUTLINE-ATOMICS-NEXT: adrp x8, var644778; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var644779; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4780; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14781; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]4782; OUTLINE-ATOMICS-NEXT: cmp x9, x04783; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le4784; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]4785; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]4786; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4787; OUTLINE-ATOMICS-NEXT: ret4788 atomicrmw min ptr @var64, i64 %offset acquire4789; CHECK-NOT: dmb4790; CHECK: adrp [[TMPADDR:x[0-9]+]], var644791; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var644792 4793; CHECK: ldsmina x0, x[[NEW:[0-9]+]], [x[[ADDR]]]4794; CHECK-NOT: dmb4795 ret void4796}4797 4798define dso_local i8 @test_atomic_load_min_i8_monotonic(i8 %offset) nounwind {4799; CHECK-LABEL: test_atomic_load_min_i8_monotonic:4800; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_monotonic:4801; OUTLINE-ATOMICS: // %bb.0:4802; OUTLINE-ATOMICS-NEXT: adrp x9, var84803; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var84804; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4805; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14806; OUTLINE-ATOMICS-NEXT: ldxrb w10, [x9]4807; OUTLINE-ATOMICS-NEXT: sxtb w8, w104808; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb4809; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le4810; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x9]4811; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4812; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4813; OUTLINE-ATOMICS-NEXT: mov w0, w84814; OUTLINE-ATOMICS-NEXT: ret4815 %old = atomicrmw min ptr @var8, i8 %offset monotonic4816; CHECK-NOT: dmb4817; CHECK: adrp [[TMPADDR:x[0-9]+]], var84818; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var84819 4820; CHECK: ldsminb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4821; CHECK-NOT: dmb4822 4823 ret i8 %old4824}4825 4826define dso_local i16 @test_atomic_load_min_i16_monotonic(i16 %offset) nounwind {4827; CHECK-LABEL: test_atomic_load_min_i16_monotonic:4828; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_monotonic:4829; OUTLINE-ATOMICS: // %bb.0:4830; OUTLINE-ATOMICS-NEXT: adrp x9, var164831; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var164832; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4833; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14834; OUTLINE-ATOMICS-NEXT: ldxrh w10, [x9]4835; OUTLINE-ATOMICS-NEXT: sxth w8, w104836; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth4837; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le4838; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x9]4839; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4840; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4841; OUTLINE-ATOMICS-NEXT: mov w0, w84842; OUTLINE-ATOMICS-NEXT: ret4843 %old = atomicrmw min ptr @var16, i16 %offset monotonic4844; CHECK-NOT: dmb4845; CHECK: adrp [[TMPADDR:x[0-9]+]], var164846; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var164847 4848; CHECK: ldsminh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4849; CHECK-NOT: dmb4850 4851 ret i16 %old4852}4853 4854define dso_local i32 @test_atomic_load_min_i32_monotonic(i32 %offset) nounwind {4855; CHECK-LABEL: test_atomic_load_min_i32_monotonic:4856; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_monotonic:4857; OUTLINE-ATOMICS: // %bb.0:4858; OUTLINE-ATOMICS-NEXT: adrp x9, var324859; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var324860; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4861; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14862; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]4863; OUTLINE-ATOMICS-NEXT: cmp w8, w04864; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le4865; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]4866; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4867; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4868; OUTLINE-ATOMICS-NEXT: mov w0, w84869; OUTLINE-ATOMICS-NEXT: ret4870 %old = atomicrmw min ptr @var32, i32 %offset monotonic4871; CHECK-NOT: dmb4872; CHECK: adrp [[TMPADDR:x[0-9]+]], var324873; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var324874 4875; CHECK: ldsmin w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4876; CHECK-NOT: dmb4877 4878 ret i32 %old4879}4880 4881define dso_local i64 @test_atomic_load_min_i64_monotonic(i64 %offset) nounwind {4882; CHECK-LABEL: test_atomic_load_min_i64_monotonic:4883; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_monotonic:4884; OUTLINE-ATOMICS: // %bb.0:4885; OUTLINE-ATOMICS-NEXT: adrp x9, var644886; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var644887; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4888; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14889; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]4890; OUTLINE-ATOMICS-NEXT: cmp x8, x04891; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le4892; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]4893; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4894; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4895; OUTLINE-ATOMICS-NEXT: mov x0, x84896; OUTLINE-ATOMICS-NEXT: ret4897 %old = atomicrmw min ptr @var64, i64 %offset monotonic4898; CHECK-NOT: dmb4899; CHECK: adrp [[TMPADDR:x[0-9]+]], var644900; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var644901 4902; CHECK: ldsmin x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]4903; CHECK-NOT: dmb4904 4905 ret i64 %old4906}4907 4908define dso_local void @test_atomic_load_min_i32_noret_monotonic(i32 %offset) nounwind {4909; CHECK-LABEL: test_atomic_load_min_i32_noret_monotonic:4910; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_monotonic:4911; OUTLINE-ATOMICS: // %bb.0:4912; OUTLINE-ATOMICS-NEXT: adrp x8, var324913; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var324914; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4915; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14916; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]4917; OUTLINE-ATOMICS-NEXT: cmp w9, w04918; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le4919; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]4920; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]4921; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4922; OUTLINE-ATOMICS-NEXT: ret4923 atomicrmw min ptr @var32, i32 %offset monotonic4924; CHECK-NOT: dmb4925; CHECK: adrp [[TMPADDR:x[0-9]+]], var324926; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var324927 4928; CHECK: ldsmin w{{[0-9]+}}, w{{[1-9][0-9]*}}, [x[[ADDR]]]4929; CHECK-NOT: dmb4930 ret void4931}4932 4933define dso_local void @test_atomic_load_min_i64_noret_monotonic(i64 %offset) nounwind {4934; CHECK-LABEL: test_atomic_load_min_i64_noret_monotonic:4935; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_monotonic:4936; OUTLINE-ATOMICS: // %bb.0:4937; OUTLINE-ATOMICS-NEXT: adrp x8, var644938; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var644939; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4940; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14941; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]4942; OUTLINE-ATOMICS-NEXT: cmp x9, x04943; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le4944; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]4945; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]4946; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4947; OUTLINE-ATOMICS-NEXT: ret4948 atomicrmw min ptr @var64, i64 %offset monotonic4949; CHECK-NOT: dmb4950; CHECK: adrp [[TMPADDR:x[0-9]+]], var644951; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var644952 4953; CHECK: ldsmin x{{[0-9]+}}, x{{[1-9][0-9]*}}, [x[[ADDR]]]4954; CHECK-NOT: dmb4955 ret void4956}4957 4958define dso_local i8 @test_atomic_load_min_i8_release(i8 %offset) nounwind {4959; CHECK-LABEL: test_atomic_load_min_i8_release:4960; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_release:4961; OUTLINE-ATOMICS: // %bb.0:4962; OUTLINE-ATOMICS-NEXT: adrp x9, var84963; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var84964; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4965; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14966; OUTLINE-ATOMICS-NEXT: ldxrb w10, [x9]4967; OUTLINE-ATOMICS-NEXT: sxtb w8, w104968; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb4969; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le4970; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]4971; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]4972; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end4973; OUTLINE-ATOMICS-NEXT: mov w0, w84974; OUTLINE-ATOMICS-NEXT: ret4975 %old = atomicrmw min ptr @var8, i8 %offset release4976; CHECK-NOT: dmb4977; CHECK: adrp [[TMPADDR:x[0-9]+]], var84978; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var84979 4980; CHECK: ldsminlb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]4981; CHECK-NOT: dmb4982 4983 ret i8 %old4984}4985 4986define dso_local i16 @test_atomic_load_min_i16_release(i16 %offset) nounwind {4987; CHECK-LABEL: test_atomic_load_min_i16_release:4988; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_release:4989; OUTLINE-ATOMICS: // %bb.0:4990; OUTLINE-ATOMICS-NEXT: adrp x9, var164991; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var164992; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start4993; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=14994; OUTLINE-ATOMICS-NEXT: ldxrh w10, [x9]4995; OUTLINE-ATOMICS-NEXT: sxth w8, w104996; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth4997; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le4998; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]4999; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]5000; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end5001; OUTLINE-ATOMICS-NEXT: mov w0, w85002; OUTLINE-ATOMICS-NEXT: ret5003 %old = atomicrmw min ptr @var16, i16 %offset release5004; CHECK-NOT: dmb5005; CHECK: adrp [[TMPADDR:x[0-9]+]], var165006; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var165007 5008; CHECK: ldsminlh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5009; CHECK-NOT: dmb5010 5011 ret i16 %old5012}5013 5014define dso_local i32 @test_atomic_load_min_i32_release(i32 %offset) nounwind {5015; CHECK-LABEL: test_atomic_load_min_i32_release:5016; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_release:5017; OUTLINE-ATOMICS: // %bb.0:5018; OUTLINE-ATOMICS-NEXT: adrp x9, var325019; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var325020; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start5021; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=15022; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]5023; OUTLINE-ATOMICS-NEXT: cmp w8, w05024; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le5025; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]5026; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]5027; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end5028; OUTLINE-ATOMICS-NEXT: mov w0, w85029; OUTLINE-ATOMICS-NEXT: ret5030 %old = atomicrmw min ptr @var32, i32 %offset release5031; CHECK-NOT: dmb5032; CHECK: adrp [[TMPADDR:x[0-9]+]], var325033; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325034 5035; CHECK: ldsminl w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5036; CHECK-NOT: dmb5037 5038 ret i32 %old5039}5040 5041define dso_local i64 @test_atomic_load_min_i64_release(i64 %offset) nounwind {5042; CHECK-LABEL: test_atomic_load_min_i64_release:5043; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_release:5044; OUTLINE-ATOMICS: // %bb.0:5045; OUTLINE-ATOMICS-NEXT: adrp x9, var645046; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var645047; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start5048; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=15049; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]5050; OUTLINE-ATOMICS-NEXT: cmp x8, x05051; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le5052; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]5053; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]5054; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end5055; OUTLINE-ATOMICS-NEXT: mov x0, x85056; OUTLINE-ATOMICS-NEXT: ret5057 %old = atomicrmw min ptr @var64, i64 %offset release5058; CHECK-NOT: dmb5059; CHECK: adrp [[TMPADDR:x[0-9]+]], var645060; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645061 5062; CHECK: ldsminl x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]5063; CHECK-NOT: dmb5064 5065 ret i64 %old5066}5067 5068define dso_local void @test_atomic_load_min_i32_noret_release(i32 %offset) nounwind {5069; CHECK-LABEL: test_atomic_load_min_i32_noret_release:5070; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_release:5071; OUTLINE-ATOMICS: // %bb.0:5072; OUTLINE-ATOMICS-NEXT: adrp x8, var325073; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var325074; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start5075; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=15076; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]5077; OUTLINE-ATOMICS-NEXT: cmp w9, w05078; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le5079; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]5080; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]5081; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end5082; OUTLINE-ATOMICS-NEXT: ret5083 atomicrmw min ptr @var32, i32 %offset release5084; CHECK-NOT: dmb5085; CHECK: adrp [[TMPADDR:x[0-9]+]], var325086; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325087 5088; CHECK: ldsminl w{{[0-9]+}}, w{{[1-9][0-9]*}}, [x[[ADDR]]]5089; CHECK-NOT: dmb5090 ret void5091}5092 5093define dso_local void @test_atomic_load_min_i64_noret_release(i64 %offset) nounwind {5094; CHECK-LABEL: test_atomic_load_min_i64_noret_release:5095; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_release:5096; OUTLINE-ATOMICS: // %bb.0:5097; OUTLINE-ATOMICS-NEXT: adrp x8, var645098; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var645099; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start5100; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=15101; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]5102; OUTLINE-ATOMICS-NEXT: cmp x9, x05103; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le5104; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]5105; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]5106; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end5107; OUTLINE-ATOMICS-NEXT: ret5108 atomicrmw min ptr @var64, i64 %offset release5109; CHECK-NOT: dmb5110; CHECK: adrp [[TMPADDR:x[0-9]+]], var645111; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645112 5113; CHECK: ldsminl x{{[0-9]+}}, x{{[1-9][0-9]*}}, [x[[ADDR]]]5114; CHECK-NOT: dmb5115 ret void5116}5117 5118define dso_local i8 @test_atomic_load_min_i8_seq_cst(i8 %offset) nounwind {5119; CHECK-LABEL: test_atomic_load_min_i8_seq_cst:5120; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_seq_cst:5121; OUTLINE-ATOMICS: // %bb.0:5122; OUTLINE-ATOMICS-NEXT: adrp x9, var85123; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var85124; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start5125; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=15126; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]5127; OUTLINE-ATOMICS-NEXT: sxtb w8, w105128; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb5129; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le5130; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]5131; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]5132; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end5133; OUTLINE-ATOMICS-NEXT: mov w0, w85134; OUTLINE-ATOMICS-NEXT: ret5135 %old = atomicrmw min ptr @var8, i8 %offset seq_cst5136; CHECK-NOT: dmb5137; CHECK: adrp [[TMPADDR:x[0-9]+]], var85138; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var85139 5140; CHECK: ldsminalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5141; CHECK-NOT: dmb5142 5143 ret i8 %old5144}5145 5146define dso_local i16 @test_atomic_load_min_i16_seq_cst(i16 %offset) nounwind {5147; CHECK-LABEL: test_atomic_load_min_i16_seq_cst:5148; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_seq_cst:5149; OUTLINE-ATOMICS: // %bb.0:5150; OUTLINE-ATOMICS-NEXT: adrp x9, var165151; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var165152; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start5153; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=15154; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]5155; OUTLINE-ATOMICS-NEXT: sxth w8, w105156; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth5157; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le5158; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]5159; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]5160; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end5161; OUTLINE-ATOMICS-NEXT: mov w0, w85162; OUTLINE-ATOMICS-NEXT: ret5163 %old = atomicrmw min ptr @var16, i16 %offset seq_cst5164; CHECK-NOT: dmb5165; CHECK: adrp [[TMPADDR:x[0-9]+]], var165166; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var165167 5168; CHECK: ldsminalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5169; CHECK-NOT: dmb5170 5171 ret i16 %old5172}5173 5174define dso_local i32 @test_atomic_load_min_i32_seq_cst(i32 %offset) nounwind {5175; CHECK-LABEL: test_atomic_load_min_i32_seq_cst:5176; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_seq_cst:5177; OUTLINE-ATOMICS: // %bb.0:5178; OUTLINE-ATOMICS-NEXT: adrp x9, var325179; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var325180; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start5181; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=15182; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]5183; OUTLINE-ATOMICS-NEXT: cmp w8, w05184; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le5185; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]5186; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]5187; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end5188; OUTLINE-ATOMICS-NEXT: mov w0, w85189; OUTLINE-ATOMICS-NEXT: ret5190 %old = atomicrmw min ptr @var32, i32 %offset seq_cst5191; CHECK-NOT: dmb5192; CHECK: adrp [[TMPADDR:x[0-9]+]], var325193; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325194 5195; CHECK: ldsminal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5196; CHECK-NOT: dmb5197 5198 ret i32 %old5199}5200 5201define dso_local i64 @test_atomic_load_min_i64_seq_cst(i64 %offset) nounwind {5202; CHECK-LABEL: test_atomic_load_min_i64_seq_cst:5203; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_seq_cst:5204; OUTLINE-ATOMICS: // %bb.0:5205; OUTLINE-ATOMICS-NEXT: adrp x9, var645206; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var645207; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start5208; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=15209; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]5210; OUTLINE-ATOMICS-NEXT: cmp x8, x05211; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le5212; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]5213; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]5214; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end5215; OUTLINE-ATOMICS-NEXT: mov x0, x85216; OUTLINE-ATOMICS-NEXT: ret5217 %old = atomicrmw min ptr @var64, i64 %offset seq_cst5218; CHECK-NOT: dmb5219; CHECK: adrp [[TMPADDR:x[0-9]+]], var645220; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645221 5222; CHECK: ldsminal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]5223; CHECK-NOT: dmb5224 5225 ret i64 %old5226}5227 5228define dso_local void @test_atomic_load_min_i32_noret_seq_cst(i32 %offset) nounwind {5229; CHECK-LABEL: test_atomic_load_min_i32_noret_seq_cst:5230; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_seq_cst:5231; OUTLINE-ATOMICS: // %bb.0:5232; OUTLINE-ATOMICS-NEXT: adrp x8, var325233; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var325234; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start5235; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=15236; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]5237; OUTLINE-ATOMICS-NEXT: cmp w9, w05238; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le5239; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]5240; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]5241; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end5242; OUTLINE-ATOMICS-NEXT: ret5243 atomicrmw min ptr @var32, i32 %offset seq_cst5244; CHECK-NOT: dmb5245; CHECK: adrp [[TMPADDR:x[0-9]+]], var325246; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325247 5248; CHECK: ldsminal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]5249; CHECK-NOT: dmb5250 ret void5251}5252 5253define dso_local void @test_atomic_load_min_i64_noret_seq_cst(i64 %offset) nounwind {5254; CHECK-LABEL: test_atomic_load_min_i64_noret_seq_cst:5255; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_seq_cst:5256; OUTLINE-ATOMICS: // %bb.0:5257; OUTLINE-ATOMICS-NEXT: adrp x8, var645258; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var645259; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start5260; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=15261; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]5262; OUTLINE-ATOMICS-NEXT: cmp x9, x05263; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le5264; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]5265; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]5266; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end5267; OUTLINE-ATOMICS-NEXT: ret5268 atomicrmw min ptr @var64, i64 %offset seq_cst5269; CHECK-NOT: dmb5270; CHECK: adrp [[TMPADDR:x[0-9]+]], var645271; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645272 5273; CHECK: ldsminal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]5274; CHECK-NOT: dmb5275 ret void5276}5277 5278define dso_local i8 @test_atomic_load_or_i8_acq_rel(i8 %offset) nounwind {5279; CHECK-LABEL: test_atomic_load_or_i8_acq_rel:5280; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_acq_rel:5281; OUTLINE-ATOMICS: // %bb.0:5282; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5283; OUTLINE-ATOMICS-NEXT: adrp x1, var85284; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var85285; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_acq_rel5286; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5287; OUTLINE-ATOMICS-NEXT: ret5288 %old = atomicrmw or ptr @var8, i8 %offset acq_rel5289; CHECK-NOT: dmb5290; CHECK: adrp [[TMPADDR:x[0-9]+]], var85291; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var85292 5293; CHECK: ldsetalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5294; CHECK-NOT: dmb5295 5296 ret i8 %old5297}5298 5299define dso_local i16 @test_atomic_load_or_i16_acq_rel(i16 %offset) nounwind {5300; CHECK-LABEL: test_atomic_load_or_i16_acq_rel:5301; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_acq_rel:5302; OUTLINE-ATOMICS: // %bb.0:5303; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5304; OUTLINE-ATOMICS-NEXT: adrp x1, var165305; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var165306; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_acq_rel5307; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5308; OUTLINE-ATOMICS-NEXT: ret5309 %old = atomicrmw or ptr @var16, i16 %offset acq_rel5310; CHECK-NOT: dmb5311; CHECK: adrp [[TMPADDR:x[0-9]+]], var165312; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var165313 5314; CHECK: ldsetalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5315; CHECK-NOT: dmb5316 5317 ret i16 %old5318}5319 5320define dso_local i32 @test_atomic_load_or_i32_acq_rel(i32 %offset) nounwind {5321; CHECK-LABEL: test_atomic_load_or_i32_acq_rel:5322; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_acq_rel:5323; OUTLINE-ATOMICS: // %bb.0:5324; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5325; OUTLINE-ATOMICS-NEXT: adrp x1, var325326; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var325327; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel5328; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5329; OUTLINE-ATOMICS-NEXT: ret5330 %old = atomicrmw or ptr @var32, i32 %offset acq_rel5331; CHECK-NOT: dmb5332; CHECK: adrp [[TMPADDR:x[0-9]+]], var325333; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325334 5335; CHECK: ldsetal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5336; CHECK-NOT: dmb5337 5338 ret i32 %old5339}5340 5341define dso_local i64 @test_atomic_load_or_i64_acq_rel(i64 %offset) nounwind {5342; CHECK-LABEL: test_atomic_load_or_i64_acq_rel:5343; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_acq_rel:5344; OUTLINE-ATOMICS: // %bb.0:5345; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5346; OUTLINE-ATOMICS-NEXT: adrp x1, var645347; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var645348; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel5349; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5350; OUTLINE-ATOMICS-NEXT: ret5351 %old = atomicrmw or ptr @var64, i64 %offset acq_rel5352; CHECK-NOT: dmb5353; CHECK: adrp [[TMPADDR:x[0-9]+]], var645354; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645355 5356; CHECK: ldsetal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]5357; CHECK-NOT: dmb5358 5359 ret i64 %old5360}5361 5362define dso_local void @test_atomic_load_or_i32_noret_acq_rel(i32 %offset) nounwind {5363; CHECK-LABEL: test_atomic_load_or_i32_noret_acq_rel:5364; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_acq_rel:5365; OUTLINE-ATOMICS: // %bb.0:5366; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5367; OUTLINE-ATOMICS-NEXT: adrp x1, var325368; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var325369; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel5370; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5371; OUTLINE-ATOMICS-NEXT: ret5372 atomicrmw or ptr @var32, i32 %offset acq_rel5373; CHECK-NOT: dmb5374; CHECK: adrp [[TMPADDR:x[0-9]+]], var325375; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325376 5377; CHECK: ldsetal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]5378; CHECK-NOT: dmb5379 ret void5380}5381 5382define dso_local void @test_atomic_load_or_i64_noret_acq_rel(i64 %offset) nounwind {5383; CHECK-LABEL: test_atomic_load_or_i64_noret_acq_rel:5384; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_acq_rel:5385; OUTLINE-ATOMICS: // %bb.0:5386; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5387; OUTLINE-ATOMICS-NEXT: adrp x1, var645388; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var645389; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel5390; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5391; OUTLINE-ATOMICS-NEXT: ret5392 atomicrmw or ptr @var64, i64 %offset acq_rel5393; CHECK-NOT: dmb5394; CHECK: adrp [[TMPADDR:x[0-9]+]], var645395; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645396 5397; CHECK: ldsetal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]5398; CHECK-NOT: dmb5399 ret void5400}5401 5402define dso_local i8 @test_atomic_load_or_i8_acquire(i8 %offset) nounwind {5403; CHECK-LABEL: test_atomic_load_or_i8_acquire:5404; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_acquire:5405; OUTLINE-ATOMICS: // %bb.0:5406; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5407; OUTLINE-ATOMICS-NEXT: adrp x1, var85408; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var85409; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_acq5410; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5411; OUTLINE-ATOMICS-NEXT: ret5412 %old = atomicrmw or ptr @var8, i8 %offset acquire5413; CHECK-NOT: dmb5414; CHECK: adrp [[TMPADDR:x[0-9]+]], var85415; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var85416 5417; CHECK: ldsetab w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5418; CHECK-NOT: dmb5419 5420 ret i8 %old5421}5422 5423define dso_local i16 @test_atomic_load_or_i16_acquire(i16 %offset) nounwind {5424; CHECK-LABEL: test_atomic_load_or_i16_acquire:5425; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_acquire:5426; OUTLINE-ATOMICS: // %bb.0:5427; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5428; OUTLINE-ATOMICS-NEXT: adrp x1, var165429; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var165430; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_acq5431; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5432; OUTLINE-ATOMICS-NEXT: ret5433 %old = atomicrmw or ptr @var16, i16 %offset acquire5434; CHECK-NOT: dmb5435; CHECK: adrp [[TMPADDR:x[0-9]+]], var165436; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var165437 5438; CHECK: ldsetah w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5439; CHECK-NOT: dmb5440 5441 ret i16 %old5442}5443 5444define dso_local i32 @test_atomic_load_or_i32_acquire(i32 %offset) nounwind {5445; CHECK-LABEL: test_atomic_load_or_i32_acquire:5446; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_acquire:5447; OUTLINE-ATOMICS: // %bb.0:5448; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5449; OUTLINE-ATOMICS-NEXT: adrp x1, var325450; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var325451; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq5452; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5453; OUTLINE-ATOMICS-NEXT: ret5454 %old = atomicrmw or ptr @var32, i32 %offset acquire5455; CHECK-NOT: dmb5456; CHECK: adrp [[TMPADDR:x[0-9]+]], var325457; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325458 5459; CHECK: ldseta w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5460; CHECK-NOT: dmb5461 5462 ret i32 %old5463}5464 5465define dso_local i64 @test_atomic_load_or_i64_acquire(i64 %offset) nounwind {5466; CHECK-LABEL: test_atomic_load_or_i64_acquire:5467; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_acquire:5468; OUTLINE-ATOMICS: // %bb.0:5469; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5470; OUTLINE-ATOMICS-NEXT: adrp x1, var645471; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var645472; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq5473; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5474; OUTLINE-ATOMICS-NEXT: ret5475 %old = atomicrmw or ptr @var64, i64 %offset acquire5476; CHECK-NOT: dmb5477; CHECK: adrp [[TMPADDR:x[0-9]+]], var645478; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645479 5480; CHECK: ldseta x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]5481; CHECK-NOT: dmb5482 5483 ret i64 %old5484}5485 5486define dso_local void @test_atomic_load_or_i32_noret_acquire(i32 %offset) nounwind {5487; CHECK-LABEL: test_atomic_load_or_i32_noret_acquire:5488; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_acquire:5489; OUTLINE-ATOMICS: // %bb.0:5490; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5491; OUTLINE-ATOMICS-NEXT: adrp x1, var325492; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var325493; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq5494; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5495; OUTLINE-ATOMICS-NEXT: ret5496 atomicrmw or ptr @var32, i32 %offset acquire5497; CHECK-NOT: dmb5498; CHECK: adrp [[TMPADDR:x[0-9]+]], var325499; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325500 5501; CHECK: ldseta w0, w[[NEW:[0-9]+]], [x[[ADDR]]]5502; CHECK-NOT: dmb5503 ret void5504}5505 5506define dso_local void @test_atomic_load_or_i64_noret_acquire(i64 %offset) nounwind {5507; CHECK-LABEL: test_atomic_load_or_i64_noret_acquire:5508; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_acquire:5509; OUTLINE-ATOMICS: // %bb.0:5510; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5511; OUTLINE-ATOMICS-NEXT: adrp x1, var645512; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var645513; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq5514; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5515; OUTLINE-ATOMICS-NEXT: ret5516 atomicrmw or ptr @var64, i64 %offset acquire5517; CHECK-NOT: dmb5518; CHECK: adrp [[TMPADDR:x[0-9]+]], var645519; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645520 5521; CHECK: ldseta x0, x[[NEW:[0-9]+]], [x[[ADDR]]]5522; CHECK-NOT: dmb5523 ret void5524}5525 5526define dso_local i8 @test_atomic_load_or_i8_monotonic(i8 %offset) nounwind {5527; CHECK-LABEL: test_atomic_load_or_i8_monotonic:5528; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_monotonic:5529; OUTLINE-ATOMICS: // %bb.0:5530; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5531; OUTLINE-ATOMICS-NEXT: adrp x1, var85532; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var85533; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_relax5534; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5535; OUTLINE-ATOMICS-NEXT: ret5536 %old = atomicrmw or ptr @var8, i8 %offset monotonic5537; CHECK-NOT: dmb5538; CHECK: adrp [[TMPADDR:x[0-9]+]], var85539; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var85540 5541; CHECK: ldsetb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5542; CHECK-NOT: dmb5543 5544 ret i8 %old5545}5546 5547define dso_local i16 @test_atomic_load_or_i16_monotonic(i16 %offset) nounwind {5548; CHECK-LABEL: test_atomic_load_or_i16_monotonic:5549; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_monotonic:5550; OUTLINE-ATOMICS: // %bb.0:5551; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5552; OUTLINE-ATOMICS-NEXT: adrp x1, var165553; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var165554; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_relax5555; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5556; OUTLINE-ATOMICS-NEXT: ret5557 %old = atomicrmw or ptr @var16, i16 %offset monotonic5558; CHECK-NOT: dmb5559; CHECK: adrp [[TMPADDR:x[0-9]+]], var165560; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var165561 5562; CHECK: ldseth w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5563; CHECK-NOT: dmb5564 5565 ret i16 %old5566}5567 5568define dso_local i32 @test_atomic_load_or_i32_monotonic(i32 %offset) nounwind {5569; CHECK-LABEL: test_atomic_load_or_i32_monotonic:5570; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_monotonic:5571; OUTLINE-ATOMICS: // %bb.0:5572; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5573; OUTLINE-ATOMICS-NEXT: adrp x1, var325574; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var325575; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_relax5576; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5577; OUTLINE-ATOMICS-NEXT: ret5578 %old = atomicrmw or ptr @var32, i32 %offset monotonic5579; CHECK-NOT: dmb5580; CHECK: adrp [[TMPADDR:x[0-9]+]], var325581; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325582 5583; CHECK: ldset w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5584; CHECK-NOT: dmb5585 5586 ret i32 %old5587}5588 5589define dso_local i64 @test_atomic_load_or_i64_monotonic(i64 %offset) nounwind {5590; CHECK-LABEL: test_atomic_load_or_i64_monotonic:5591; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_monotonic:5592; OUTLINE-ATOMICS: // %bb.0:5593; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5594; OUTLINE-ATOMICS-NEXT: adrp x1, var645595; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var645596; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_relax5597; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5598; OUTLINE-ATOMICS-NEXT: ret5599 %old = atomicrmw or ptr @var64, i64 %offset monotonic5600; CHECK-NOT: dmb5601; CHECK: adrp [[TMPADDR:x[0-9]+]], var645602; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645603 5604; CHECK: ldset x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]5605; CHECK-NOT: dmb5606 5607 ret i64 %old5608}5609 5610define dso_local void @test_atomic_load_or_i32_noret_monotonic(i32 %offset) nounwind {5611; CHECK-LABEL: test_atomic_load_or_i32_noret_monotonic:5612; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_monotonic:5613; OUTLINE-ATOMICS: // %bb.0:5614; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5615; OUTLINE-ATOMICS-NEXT: adrp x1, var325616; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var325617; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_relax5618; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5619; OUTLINE-ATOMICS-NEXT: ret5620 atomicrmw or ptr @var32, i32 %offset monotonic5621; CHECK-NOT: dmb5622; CHECK: adrp [[TMPADDR:x[0-9]+]], var325623; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325624 5625; CHECK: ldset w{{[0-9]+}}, w{{[1-9][0-9]*}}, [x[[ADDR]]]5626; CHECK-NOT: dmb5627 ret void5628}5629 5630define dso_local void @test_atomic_load_or_i64_noret_monotonic(i64 %offset) nounwind {5631; CHECK-LABEL: test_atomic_load_or_i64_noret_monotonic:5632; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_monotonic:5633; OUTLINE-ATOMICS: // %bb.0:5634; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5635; OUTLINE-ATOMICS-NEXT: adrp x1, var645636; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var645637; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_relax5638; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5639; OUTLINE-ATOMICS-NEXT: ret5640 atomicrmw or ptr @var64, i64 %offset monotonic5641; CHECK-NOT: dmb5642; CHECK: adrp [[TMPADDR:x[0-9]+]], var645643; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645644 5645; CHECK: ldset x{{[0-9]+}}, x{{[1-9][0-9]*}}, [x[[ADDR]]]5646; CHECK-NOT: dmb5647 ret void5648}5649 5650define dso_local i8 @test_atomic_load_or_i8_release(i8 %offset) nounwind {5651; CHECK-LABEL: test_atomic_load_or_i8_release:5652; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_release:5653; OUTLINE-ATOMICS: // %bb.0:5654; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5655; OUTLINE-ATOMICS-NEXT: adrp x1, var85656; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var85657; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_rel5658; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5659; OUTLINE-ATOMICS-NEXT: ret5660 %old = atomicrmw or ptr @var8, i8 %offset release5661; CHECK-NOT: dmb5662; CHECK: adrp [[TMPADDR:x[0-9]+]], var85663; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var85664 5665; CHECK: ldsetlb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5666; CHECK-NOT: dmb5667 5668 ret i8 %old5669}5670 5671define dso_local i16 @test_atomic_load_or_i16_release(i16 %offset) nounwind {5672; CHECK-LABEL: test_atomic_load_or_i16_release:5673; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_release:5674; OUTLINE-ATOMICS: // %bb.0:5675; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5676; OUTLINE-ATOMICS-NEXT: adrp x1, var165677; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var165678; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_rel5679; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5680; OUTLINE-ATOMICS-NEXT: ret5681 %old = atomicrmw or ptr @var16, i16 %offset release5682; CHECK-NOT: dmb5683; CHECK: adrp [[TMPADDR:x[0-9]+]], var165684; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var165685 5686; CHECK: ldsetlh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5687; CHECK-NOT: dmb5688 5689 ret i16 %old5690}5691 5692define dso_local i32 @test_atomic_load_or_i32_release(i32 %offset) nounwind {5693; CHECK-LABEL: test_atomic_load_or_i32_release:5694; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_release:5695; OUTLINE-ATOMICS: // %bb.0:5696; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5697; OUTLINE-ATOMICS-NEXT: adrp x1, var325698; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var325699; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_rel5700; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5701; OUTLINE-ATOMICS-NEXT: ret5702 %old = atomicrmw or ptr @var32, i32 %offset release5703; CHECK-NOT: dmb5704; CHECK: adrp [[TMPADDR:x[0-9]+]], var325705; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325706 5707; CHECK: ldsetl w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5708; CHECK-NOT: dmb5709 5710 ret i32 %old5711}5712 5713define dso_local i64 @test_atomic_load_or_i64_release(i64 %offset) nounwind {5714; CHECK-LABEL: test_atomic_load_or_i64_release:5715; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_release:5716; OUTLINE-ATOMICS: // %bb.0:5717; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5718; OUTLINE-ATOMICS-NEXT: adrp x1, var645719; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var645720; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_rel5721; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5722; OUTLINE-ATOMICS-NEXT: ret5723 %old = atomicrmw or ptr @var64, i64 %offset release5724; CHECK-NOT: dmb5725; CHECK: adrp [[TMPADDR:x[0-9]+]], var645726; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645727 5728; CHECK: ldsetl x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]5729; CHECK-NOT: dmb5730 5731 ret i64 %old5732}5733 5734define dso_local void @test_atomic_load_or_i32_noret_release(i32 %offset) nounwind {5735; CHECK-LABEL: test_atomic_load_or_i32_noret_release:5736; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_release:5737; OUTLINE-ATOMICS: // %bb.0:5738; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5739; OUTLINE-ATOMICS-NEXT: adrp x1, var325740; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var325741; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_rel5742; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5743; OUTLINE-ATOMICS-NEXT: ret5744 atomicrmw or ptr @var32, i32 %offset release5745; CHECK-NOT: dmb5746; CHECK: adrp [[TMPADDR:x[0-9]+]], var325747; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325748 5749; CHECK: ldsetl w{{[0-9]+}}, w{{[1-9][0-9]*}}, [x[[ADDR]]]5750; CHECK-NOT: dmb5751 ret void5752}5753 5754define dso_local void @test_atomic_load_or_i64_noret_release(i64 %offset) nounwind {5755; CHECK-LABEL: test_atomic_load_or_i64_noret_release:5756; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_release:5757; OUTLINE-ATOMICS: // %bb.0:5758; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5759; OUTLINE-ATOMICS-NEXT: adrp x1, var645760; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var645761; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_rel5762; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5763; OUTLINE-ATOMICS-NEXT: ret5764 atomicrmw or ptr @var64, i64 %offset release5765; CHECK-NOT: dmb5766; CHECK: adrp [[TMPADDR:x[0-9]+]], var645767; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645768 5769; CHECK: ldsetl x{{[0-9]+}}, x{{[1-9][0-9]*}}, [x[[ADDR]]]5770; CHECK-NOT: dmb5771 ret void5772}5773 5774define dso_local i8 @test_atomic_load_or_i8_seq_cst(i8 %offset) nounwind {5775; CHECK-LABEL: test_atomic_load_or_i8_seq_cst:5776; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_seq_cst:5777; OUTLINE-ATOMICS: // %bb.0:5778; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5779; OUTLINE-ATOMICS-NEXT: adrp x1, var85780; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var85781; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_acq_rel5782; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5783; OUTLINE-ATOMICS-NEXT: ret5784 %old = atomicrmw or ptr @var8, i8 %offset seq_cst5785; CHECK-NOT: dmb5786; CHECK: adrp [[TMPADDR:x[0-9]+]], var85787; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var85788 5789; CHECK: ldsetalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5790; CHECK-NOT: dmb5791 5792 ret i8 %old5793}5794 5795define dso_local i16 @test_atomic_load_or_i16_seq_cst(i16 %offset) nounwind {5796; CHECK-LABEL: test_atomic_load_or_i16_seq_cst:5797; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_seq_cst:5798; OUTLINE-ATOMICS: // %bb.0:5799; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5800; OUTLINE-ATOMICS-NEXT: adrp x1, var165801; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var165802; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_acq_rel5803; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5804; OUTLINE-ATOMICS-NEXT: ret5805 %old = atomicrmw or ptr @var16, i16 %offset seq_cst5806; CHECK-NOT: dmb5807; CHECK: adrp [[TMPADDR:x[0-9]+]], var165808; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var165809 5810; CHECK: ldsetalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5811; CHECK-NOT: dmb5812 5813 ret i16 %old5814}5815 5816define dso_local i32 @test_atomic_load_or_i32_seq_cst(i32 %offset) nounwind {5817; CHECK-LABEL: test_atomic_load_or_i32_seq_cst:5818; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_seq_cst:5819; OUTLINE-ATOMICS: // %bb.0:5820; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5821; OUTLINE-ATOMICS-NEXT: adrp x1, var325822; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var325823; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel5824; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5825; OUTLINE-ATOMICS-NEXT: ret5826 %old = atomicrmw or ptr @var32, i32 %offset seq_cst5827; CHECK-NOT: dmb5828; CHECK: adrp [[TMPADDR:x[0-9]+]], var325829; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325830 5831; CHECK: ldsetal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]5832; CHECK-NOT: dmb5833 5834 ret i32 %old5835}5836 5837define dso_local i64 @test_atomic_load_or_i64_seq_cst(i64 %offset) nounwind {5838; CHECK-LABEL: test_atomic_load_or_i64_seq_cst:5839; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_seq_cst:5840; OUTLINE-ATOMICS: // %bb.0:5841; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5842; OUTLINE-ATOMICS-NEXT: adrp x1, var645843; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var645844; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel5845; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5846; OUTLINE-ATOMICS-NEXT: ret5847 %old = atomicrmw or ptr @var64, i64 %offset seq_cst5848; CHECK-NOT: dmb5849; CHECK: adrp [[TMPADDR:x[0-9]+]], var645850; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645851 5852; CHECK: ldsetal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]5853; CHECK-NOT: dmb5854 5855 ret i64 %old5856}5857 5858define dso_local void @test_atomic_load_or_i32_noret_seq_cst(i32 %offset) nounwind {5859; CHECK-LABEL: test_atomic_load_or_i32_noret_seq_cst:5860; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_seq_cst:5861; OUTLINE-ATOMICS: // %bb.0:5862; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5863; OUTLINE-ATOMICS-NEXT: adrp x1, var325864; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var325865; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel5866; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5867; OUTLINE-ATOMICS-NEXT: ret5868 atomicrmw or ptr @var32, i32 %offset seq_cst5869; CHECK-NOT: dmb5870; CHECK: adrp [[TMPADDR:x[0-9]+]], var325871; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325872 5873; CHECK: ldsetal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]5874; CHECK-NOT: dmb5875 ret void5876}5877 5878define dso_local void @test_atomic_load_or_i64_noret_seq_cst(i64 %offset) nounwind {5879; CHECK-LABEL: test_atomic_load_or_i64_noret_seq_cst:5880; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_seq_cst:5881; OUTLINE-ATOMICS: // %bb.0:5882; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5883; OUTLINE-ATOMICS-NEXT: adrp x1, var645884; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var645885; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel5886; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5887; OUTLINE-ATOMICS-NEXT: ret5888 atomicrmw or ptr @var64, i64 %offset seq_cst5889; CHECK-NOT: dmb5890; CHECK: adrp [[TMPADDR:x[0-9]+]], var645891; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645892 5893; CHECK: ldsetal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]5894; CHECK-NOT: dmb5895 ret void5896}5897 5898define dso_local i8 @test_atomic_load_sub_i8_acq_rel(i8 %offset) nounwind {5899; CHECK-LABEL: test_atomic_load_sub_i8_acq_rel:5900; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_acq_rel:5901; OUTLINE-ATOMICS: // %bb.0:5902; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5903; OUTLINE-ATOMICS-NEXT: neg w0, w05904; OUTLINE-ATOMICS-NEXT: adrp x1, var85905; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var85906; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel5907; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5908; OUTLINE-ATOMICS-NEXT: ret5909 %old = atomicrmw sub ptr @var8, i8 %offset acq_rel5910; CHECK-NOT: dmb5911; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]5912; CHECK: adrp [[TMPADDR:x[0-9]+]], var85913; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var85914 5915; CHECK: ldaddalb w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]5916; CHECK-NOT: dmb5917 5918 ret i8 %old5919}5920 5921define dso_local i16 @test_atomic_load_sub_i16_acq_rel(i16 %offset) nounwind {5922; CHECK-LABEL: test_atomic_load_sub_i16_acq_rel:5923; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_acq_rel:5924; OUTLINE-ATOMICS: // %bb.0:5925; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5926; OUTLINE-ATOMICS-NEXT: neg w0, w05927; OUTLINE-ATOMICS-NEXT: adrp x1, var165928; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var165929; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel5930; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5931; OUTLINE-ATOMICS-NEXT: ret5932 %old = atomicrmw sub ptr @var16, i16 %offset acq_rel5933; CHECK-NOT: dmb5934; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]5935; CHECK: adrp [[TMPADDR:x[0-9]+]], var165936; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var165937 5938; CHECK: ldaddalh w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]5939; CHECK-NOT: dmb5940 5941 ret i16 %old5942}5943 5944define dso_local i32 @test_atomic_load_sub_i32_acq_rel(i32 %offset) nounwind {5945; CHECK-LABEL: test_atomic_load_sub_i32_acq_rel:5946; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_acq_rel:5947; OUTLINE-ATOMICS: // %bb.0:5948; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5949; OUTLINE-ATOMICS-NEXT: neg w0, w05950; OUTLINE-ATOMICS-NEXT: adrp x1, var325951; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var325952; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel5953; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5954; OUTLINE-ATOMICS-NEXT: ret5955 %old = atomicrmw sub ptr @var32, i32 %offset acq_rel5956; CHECK-NOT: dmb5957; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]5958; CHECK: adrp [[TMPADDR:x[0-9]+]], var325959; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var325960 5961; CHECK: ldaddal w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]5962; CHECK-NOT: dmb5963 5964 ret i32 %old5965}5966 5967define dso_local i64 @test_atomic_load_sub_i64_acq_rel(i64 %offset) nounwind {5968; CHECK-LABEL: test_atomic_load_sub_i64_acq_rel:5969; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_acq_rel:5970; OUTLINE-ATOMICS: // %bb.0:5971; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5972; OUTLINE-ATOMICS-NEXT: neg x0, x05973; OUTLINE-ATOMICS-NEXT: adrp x1, var645974; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var645975; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel5976; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload5977; OUTLINE-ATOMICS-NEXT: ret5978 %old = atomicrmw sub ptr @var64, i64 %offset acq_rel5979; CHECK-NOT: dmb5980; CHECK: neg x[[NEG:[0-9]+]], x[[OLD:[0-9]+]]5981; CHECK: adrp [[TMPADDR:x[0-9]+]], var645982; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var645983 5984; CHECK: ldaddal x[[NEG]], x[[NEW:[0-9]+]], [x[[ADDR]]]5985; CHECK-NOT: dmb5986 5987 ret i64 %old5988}5989 5990define dso_local void @test_atomic_load_sub_i32_noret_acq_rel(i32 %offset) nounwind {5991; CHECK-LABEL: test_atomic_load_sub_i32_noret_acq_rel:5992; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_acq_rel:5993; OUTLINE-ATOMICS: // %bb.0:5994; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill5995; OUTLINE-ATOMICS-NEXT: neg w0, w05996; OUTLINE-ATOMICS-NEXT: adrp x1, var325997; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var325998; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel5999; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6000; OUTLINE-ATOMICS-NEXT: ret6001 atomicrmw sub ptr @var32, i32 %offset acq_rel6002; CHECK-NOT: dmb6003; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6004; CHECK: adrp [[TMPADDR:x[0-9]+]], var326005; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326006 6007; CHECK: ldaddal w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6008; CHECK-NOT: dmb6009 6010 ret void6011}6012 6013define dso_local void @test_atomic_load_sub_i64_noret_acq_rel(i64 %offset) nounwind {6014; CHECK-LABEL: test_atomic_load_sub_i64_noret_acq_rel:6015; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_acq_rel:6016; OUTLINE-ATOMICS: // %bb.0:6017; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6018; OUTLINE-ATOMICS-NEXT: neg x0, x06019; OUTLINE-ATOMICS-NEXT: adrp x1, var646020; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646021; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel6022; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6023; OUTLINE-ATOMICS-NEXT: ret6024 atomicrmw sub ptr @var64, i64 %offset acq_rel6025; CHECK-NOT: dmb6026; CHECK: neg x[[NEG:[0-9]+]], x[[OLD:[0-9]+]]6027; CHECK: adrp [[TMPADDR:x[0-9]+]], var646028; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646029 6030; CHECK: ldaddal x[[NEG]], x[[NEW:[0-9]+]], [x[[ADDR]]]6031; CHECK-NOT: dmb6032 6033 ret void6034}6035 6036define dso_local i8 @test_atomic_load_sub_i8_acquire(i8 %offset) nounwind {6037; CHECK-LABEL: test_atomic_load_sub_i8_acquire:6038; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_acquire:6039; OUTLINE-ATOMICS: // %bb.0:6040; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6041; OUTLINE-ATOMICS-NEXT: neg w0, w06042; OUTLINE-ATOMICS-NEXT: adrp x1, var86043; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var86044; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq6045; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6046; OUTLINE-ATOMICS-NEXT: ret6047 %old = atomicrmw sub ptr @var8, i8 %offset acquire6048; CHECK-NOT: dmb6049; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6050; CHECK: adrp [[TMPADDR:x[0-9]+]], var86051; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var86052 6053; CHECK: ldaddab w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6054; CHECK-NOT: dmb6055 6056 ret i8 %old6057}6058 6059define dso_local i16 @test_atomic_load_sub_i16_acquire(i16 %offset) nounwind {6060; CHECK-LABEL: test_atomic_load_sub_i16_acquire:6061; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_acquire:6062; OUTLINE-ATOMICS: // %bb.0:6063; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6064; OUTLINE-ATOMICS-NEXT: neg w0, w06065; OUTLINE-ATOMICS-NEXT: adrp x1, var166066; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var166067; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq6068; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6069; OUTLINE-ATOMICS-NEXT: ret6070 %old = atomicrmw sub ptr @var16, i16 %offset acquire6071; CHECK-NOT: dmb6072; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6073; CHECK: adrp [[TMPADDR:x[0-9]+]], var166074; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var166075 6076; CHECK: ldaddah w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6077; CHECK-NOT: dmb6078 6079 ret i16 %old6080}6081 6082define dso_local i32 @test_atomic_load_sub_i32_acquire(i32 %offset) nounwind {6083; CHECK-LABEL: test_atomic_load_sub_i32_acquire:6084; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_acquire:6085; OUTLINE-ATOMICS: // %bb.0:6086; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6087; OUTLINE-ATOMICS-NEXT: neg w0, w06088; OUTLINE-ATOMICS-NEXT: adrp x1, var326089; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var326090; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq6091; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6092; OUTLINE-ATOMICS-NEXT: ret6093 %old = atomicrmw sub ptr @var32, i32 %offset acquire6094; CHECK-NOT: dmb6095; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6096; CHECK: adrp [[TMPADDR:x[0-9]+]], var326097; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326098 6099; CHECK: ldadda w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6100; CHECK-NOT: dmb6101 6102 ret i32 %old6103}6104 6105define dso_local i64 @test_atomic_load_sub_i64_acquire(i64 %offset) nounwind {6106; CHECK-LABEL: test_atomic_load_sub_i64_acquire:6107; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_acquire:6108; OUTLINE-ATOMICS: // %bb.0:6109; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6110; OUTLINE-ATOMICS-NEXT: neg x0, x06111; OUTLINE-ATOMICS-NEXT: adrp x1, var646112; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646113; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq6114; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6115; OUTLINE-ATOMICS-NEXT: ret6116 %old = atomicrmw sub ptr @var64, i64 %offset acquire6117; CHECK-NOT: dmb6118; CHECK: neg x[[NEG:[0-9]+]], x[[OLD:[0-9]+]]6119; CHECK: adrp [[TMPADDR:x[0-9]+]], var646120; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646121 6122; CHECK: ldadda x[[NEG]], x[[NEW:[0-9]+]], [x[[ADDR]]]6123; CHECK-NOT: dmb6124 6125 ret i64 %old6126}6127 6128define dso_local void @test_atomic_load_sub_i32_noret_acquire(i32 %offset) nounwind {6129; CHECK-LABEL: test_atomic_load_sub_i32_noret_acquire:6130; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_acquire:6131; OUTLINE-ATOMICS: // %bb.0:6132; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6133; OUTLINE-ATOMICS-NEXT: neg w0, w06134; OUTLINE-ATOMICS-NEXT: adrp x1, var326135; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var326136; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq6137; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6138; OUTLINE-ATOMICS-NEXT: ret6139 atomicrmw sub ptr @var32, i32 %offset acquire6140; CHECK-NOT: dmb6141; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6142; CHECK: adrp [[TMPADDR:x[0-9]+]], var326143; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326144 6145; CHECK: ldadda w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6146; CHECK-NOT: dmb6147 6148 ret void6149}6150 6151define dso_local void @test_atomic_load_sub_i64_noret_acquire(i64 %offset) nounwind {6152; CHECK-LABEL: test_atomic_load_sub_i64_noret_acquire:6153; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_acquire:6154; OUTLINE-ATOMICS: // %bb.0:6155; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6156; OUTLINE-ATOMICS-NEXT: neg x0, x06157; OUTLINE-ATOMICS-NEXT: adrp x1, var646158; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646159; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq6160; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6161; OUTLINE-ATOMICS-NEXT: ret6162 atomicrmw sub ptr @var64, i64 %offset acquire6163; CHECK-NOT: dmb6164; CHECK: neg x[[NEG:[0-9]+]], x[[OLD:[0-9]+]]6165; CHECK: adrp [[TMPADDR:x[0-9]+]], var646166; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646167 6168; CHECK: ldadda x[[NEG]], x[[NEW:[0-9]+]], [x[[ADDR]]]6169; CHECK-NOT: dmb6170 6171 ret void6172}6173 6174define dso_local i8 @test_atomic_load_sub_i8_monotonic(i8 %offset) nounwind {6175; CHECK-LABEL: test_atomic_load_sub_i8_monotonic:6176; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_monotonic:6177; OUTLINE-ATOMICS: // %bb.0:6178; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6179; OUTLINE-ATOMICS-NEXT: neg w0, w06180; OUTLINE-ATOMICS-NEXT: adrp x1, var86181; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var86182; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_relax6183; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6184; OUTLINE-ATOMICS-NEXT: ret6185 %old = atomicrmw sub ptr @var8, i8 %offset monotonic6186; CHECK-NOT: dmb6187; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6188; CHECK: adrp [[TMPADDR:x[0-9]+]], var86189; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var86190 6191; CHECK: ldaddb w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6192; CHECK-NOT: dmb6193 6194 ret i8 %old6195}6196 6197define dso_local i16 @test_atomic_load_sub_i16_monotonic(i16 %offset) nounwind {6198; CHECK-LABEL: test_atomic_load_sub_i16_monotonic:6199; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_monotonic:6200; OUTLINE-ATOMICS: // %bb.0:6201; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6202; OUTLINE-ATOMICS-NEXT: neg w0, w06203; OUTLINE-ATOMICS-NEXT: adrp x1, var166204; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var166205; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_relax6206; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6207; OUTLINE-ATOMICS-NEXT: ret6208 %old = atomicrmw sub ptr @var16, i16 %offset monotonic6209; CHECK-NOT: dmb6210; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6211; CHECK: adrp [[TMPADDR:x[0-9]+]], var166212; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var166213 6214; CHECK: ldaddh w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6215; CHECK-NOT: dmb6216 6217 ret i16 %old6218}6219 6220define dso_local i32 @test_atomic_load_sub_i32_monotonic(i32 %offset) nounwind {6221; CHECK-LABEL: test_atomic_load_sub_i32_monotonic:6222; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_monotonic:6223; OUTLINE-ATOMICS: // %bb.0:6224; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6225; OUTLINE-ATOMICS-NEXT: neg w0, w06226; OUTLINE-ATOMICS-NEXT: adrp x1, var326227; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var326228; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_relax6229; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6230; OUTLINE-ATOMICS-NEXT: ret6231 %old = atomicrmw sub ptr @var32, i32 %offset monotonic6232; CHECK-NOT: dmb6233; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6234; CHECK: adrp [[TMPADDR:x[0-9]+]], var326235; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326236 6237; CHECK: ldadd w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6238; CHECK-NOT: dmb6239 6240 ret i32 %old6241}6242 6243define dso_local i64 @test_atomic_load_sub_i64_monotonic(i64 %offset) nounwind {6244; CHECK-LABEL: test_atomic_load_sub_i64_monotonic:6245; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_monotonic:6246; OUTLINE-ATOMICS: // %bb.0:6247; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6248; OUTLINE-ATOMICS-NEXT: neg x0, x06249; OUTLINE-ATOMICS-NEXT: adrp x1, var646250; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646251; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_relax6252; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6253; OUTLINE-ATOMICS-NEXT: ret6254 %old = atomicrmw sub ptr @var64, i64 %offset monotonic6255; CHECK-NOT: dmb6256; CHECK: neg x[[NEG:[0-9]+]], x[[OLD:[0-9]+]]6257; CHECK: adrp [[TMPADDR:x[0-9]+]], var646258; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646259 6260; CHECK: ldadd x[[NEG]], x[[NEW:[0-9]+]], [x[[ADDR]]]6261; CHECK-NOT: dmb6262 6263 ret i64 %old6264}6265 6266define dso_local void @test_atomic_load_sub_i32_noret_monotonic(i32 %offset) nounwind {6267; CHECK-LABEL: test_atomic_load_sub_i32_noret_monotonic:6268; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_monotonic:6269; OUTLINE-ATOMICS: // %bb.0:6270; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6271; OUTLINE-ATOMICS-NEXT: neg w0, w06272; OUTLINE-ATOMICS-NEXT: adrp x1, var326273; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var326274; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_relax6275; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6276; OUTLINE-ATOMICS-NEXT: ret6277 atomicrmw sub ptr @var32, i32 %offset monotonic6278; CHECK-NOT: dmb6279; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6280; CHECK: adrp [[TMPADDR:x[0-9]+]], var326281; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326282 6283; CHECK: ldadd w{{[0-9]+}}, w[[NEW:[1-9][0-9]*]], [x[[ADDR]]]6284; CHECK-NOT: dmb6285 6286 ret void6287}6288 6289define dso_local void @test_atomic_load_sub_i64_noret_monotonic(i64 %offset) nounwind {6290; CHECK-LABEL: test_atomic_load_sub_i64_noret_monotonic:6291; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_monotonic:6292; OUTLINE-ATOMICS: // %bb.0:6293; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6294; OUTLINE-ATOMICS-NEXT: neg x0, x06295; OUTLINE-ATOMICS-NEXT: adrp x1, var646296; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646297; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_relax6298; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6299; OUTLINE-ATOMICS-NEXT: ret6300 atomicrmw sub ptr @var64, i64 %offset monotonic6301; CHECK-NOT: dmb6302; CHECK: neg x[[NEG:[0-9]+]], x[[OLD:[0-9]+]]6303; CHECK: adrp [[TMPADDR:x[0-9]+]], var646304; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646305 6306; CHECK: ldadd x{{[0-9]+}}, x[[NEW:[1-9][0-9]*]], [x[[ADDR]]]6307; CHECK-NOT: dmb6308 6309 ret void6310}6311 6312define dso_local i8 @test_atomic_load_sub_i8_release(i8 %offset) nounwind {6313; CHECK-LABEL: test_atomic_load_sub_i8_release:6314; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_release:6315; OUTLINE-ATOMICS: // %bb.0:6316; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6317; OUTLINE-ATOMICS-NEXT: neg w0, w06318; OUTLINE-ATOMICS-NEXT: adrp x1, var86319; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var86320; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_rel6321; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6322; OUTLINE-ATOMICS-NEXT: ret6323 %old = atomicrmw sub ptr @var8, i8 %offset release6324; CHECK-NOT: dmb6325; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6326; CHECK: adrp [[TMPADDR:x[0-9]+]], var86327; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var86328 6329; CHECK: ldaddlb w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6330; CHECK-NOT: dmb6331 6332 ret i8 %old6333}6334 6335define dso_local i16 @test_atomic_load_sub_i16_release(i16 %offset) nounwind {6336; CHECK-LABEL: test_atomic_load_sub_i16_release:6337; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_release:6338; OUTLINE-ATOMICS: // %bb.0:6339; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6340; OUTLINE-ATOMICS-NEXT: neg w0, w06341; OUTLINE-ATOMICS-NEXT: adrp x1, var166342; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var166343; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_rel6344; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6345; OUTLINE-ATOMICS-NEXT: ret6346 %old = atomicrmw sub ptr @var16, i16 %offset release6347; CHECK-NOT: dmb6348; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6349; CHECK: adrp [[TMPADDR:x[0-9]+]], var166350; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var166351 6352; CHECK: ldaddlh w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6353; CHECK-NOT: dmb6354 6355 ret i16 %old6356}6357 6358define dso_local i32 @test_atomic_load_sub_i32_release(i32 %offset) nounwind {6359; CHECK-LABEL: test_atomic_load_sub_i32_release:6360; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_release:6361; OUTLINE-ATOMICS: // %bb.0:6362; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6363; OUTLINE-ATOMICS-NEXT: neg w0, w06364; OUTLINE-ATOMICS-NEXT: adrp x1, var326365; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var326366; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_rel6367; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6368; OUTLINE-ATOMICS-NEXT: ret6369 %old = atomicrmw sub ptr @var32, i32 %offset release6370; CHECK-NOT: dmb6371; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6372; CHECK: adrp [[TMPADDR:x[0-9]+]], var326373; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326374 6375; CHECK: ldaddl w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6376; CHECK-NOT: dmb6377 6378 ret i32 %old6379}6380 6381define dso_local i64 @test_atomic_load_sub_i64_release(i64 %offset) nounwind {6382; CHECK-LABEL: test_atomic_load_sub_i64_release:6383; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_release:6384; OUTLINE-ATOMICS: // %bb.0:6385; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6386; OUTLINE-ATOMICS-NEXT: neg x0, x06387; OUTLINE-ATOMICS-NEXT: adrp x1, var646388; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646389; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_rel6390; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6391; OUTLINE-ATOMICS-NEXT: ret6392 %old = atomicrmw sub ptr @var64, i64 %offset release6393; CHECK-NOT: dmb6394; CHECK: neg x[[NEG:[0-9]+]], x[[OLD:[0-9]+]]6395; CHECK: adrp [[TMPADDR:x[0-9]+]], var646396; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646397 6398; CHECK: ldaddl x[[NEG]], x[[NEW:[0-9]+]], [x[[ADDR]]]6399; CHECK-NOT: dmb6400 6401 ret i64 %old6402}6403 6404define dso_local void @test_atomic_load_sub_i32_noret_release(i32 %offset) nounwind {6405; CHECK-LABEL: test_atomic_load_sub_i32_noret_release:6406; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_release:6407; OUTLINE-ATOMICS: // %bb.0:6408; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6409; OUTLINE-ATOMICS-NEXT: neg w0, w06410; OUTLINE-ATOMICS-NEXT: adrp x1, var326411; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var326412; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_rel6413; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6414; OUTLINE-ATOMICS-NEXT: ret6415 atomicrmw sub ptr @var32, i32 %offset release6416; CHECK-NOT: dmb6417; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6418; CHECK: adrp [[TMPADDR:x[0-9]+]], var326419; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326420 6421; CHECK: ldaddl w{{[0-9]*}}, w[[NEW:[1-9][0-9]*]], [x[[ADDR]]]6422; CHECK-NOT: dmb6423 6424 ret void6425}6426 6427define dso_local void @test_atomic_load_sub_i64_noret_release(i64 %offset) nounwind {6428; CHECK-LABEL: test_atomic_load_sub_i64_noret_release:6429; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_release:6430; OUTLINE-ATOMICS: // %bb.0:6431; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6432; OUTLINE-ATOMICS-NEXT: neg x0, x06433; OUTLINE-ATOMICS-NEXT: adrp x1, var646434; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646435; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_rel6436; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6437; OUTLINE-ATOMICS-NEXT: ret6438 atomicrmw sub ptr @var64, i64 %offset release6439; CHECK-NOT: dmb6440; CHECK: neg x[[NEG:[0-9]+]], x[[OLD:[0-9]+]]6441; CHECK: adrp [[TMPADDR:x[0-9]+]], var646442; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646443 6444; CHECK: ldaddl x{{[0-9]*}}, x[[NEW:[1-9][0-9]*]], [x[[ADDR]]]6445; CHECK-NOT: dmb6446 6447 ret void6448}6449 6450define dso_local i8 @test_atomic_load_sub_i8_seq_cst(i8 %offset) nounwind {6451; CHECK-LABEL: test_atomic_load_sub_i8_seq_cst:6452; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_seq_cst:6453; OUTLINE-ATOMICS: // %bb.0:6454; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6455; OUTLINE-ATOMICS-NEXT: neg w0, w06456; OUTLINE-ATOMICS-NEXT: adrp x1, var86457; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var86458; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel6459; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6460; OUTLINE-ATOMICS-NEXT: ret6461 %old = atomicrmw sub ptr @var8, i8 %offset seq_cst6462; CHECK-NOT: dmb6463; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6464; CHECK: adrp [[TMPADDR:x[0-9]+]], var86465; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var86466 6467; CHECK: ldaddalb w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6468; CHECK-NOT: dmb6469 6470 ret i8 %old6471}6472 6473define dso_local i16 @test_atomic_load_sub_i16_seq_cst(i16 %offset) nounwind {6474; CHECK-LABEL: test_atomic_load_sub_i16_seq_cst:6475; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_seq_cst:6476; OUTLINE-ATOMICS: // %bb.0:6477; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6478; OUTLINE-ATOMICS-NEXT: neg w0, w06479; OUTLINE-ATOMICS-NEXT: adrp x1, var166480; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var166481; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel6482; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6483; OUTLINE-ATOMICS-NEXT: ret6484 %old = atomicrmw sub ptr @var16, i16 %offset seq_cst6485; CHECK-NOT: dmb6486; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6487; CHECK: adrp [[TMPADDR:x[0-9]+]], var166488; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var166489 6490; CHECK: ldaddalh w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6491; CHECK-NOT: dmb6492 6493 ret i16 %old6494}6495 6496define dso_local i32 @test_atomic_load_sub_i32_seq_cst(i32 %offset) nounwind {6497; CHECK-LABEL: test_atomic_load_sub_i32_seq_cst:6498; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_seq_cst:6499; OUTLINE-ATOMICS: // %bb.0:6500; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6501; OUTLINE-ATOMICS-NEXT: neg w0, w06502; OUTLINE-ATOMICS-NEXT: adrp x1, var326503; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var326504; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel6505; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6506; OUTLINE-ATOMICS-NEXT: ret6507 %old = atomicrmw sub ptr @var32, i32 %offset seq_cst6508; CHECK-NOT: dmb6509; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6510; CHECK: adrp [[TMPADDR:x[0-9]+]], var326511; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326512 6513; CHECK: ldaddal w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6514; CHECK-NOT: dmb6515 6516 ret i32 %old6517}6518 6519define dso_local i64 @test_atomic_load_sub_i64_seq_cst(i64 %offset) nounwind {6520; CHECK-LABEL: test_atomic_load_sub_i64_seq_cst:6521; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_seq_cst:6522; OUTLINE-ATOMICS: // %bb.0:6523; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6524; OUTLINE-ATOMICS-NEXT: neg x0, x06525; OUTLINE-ATOMICS-NEXT: adrp x1, var646526; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646527; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel6528; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6529; OUTLINE-ATOMICS-NEXT: ret6530 %old = atomicrmw sub ptr @var64, i64 %offset seq_cst6531; CHECK-NOT: dmb6532; CHECK: neg x[[NEG:[0-9]+]], x[[OLD:[0-9]+]]6533; CHECK: adrp [[TMPADDR:x[0-9]+]], var646534; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646535 6536; CHECK: ldaddal x[[NEG]], x[[NEW:[0-9]+]], [x[[ADDR]]]6537; CHECK-NOT: dmb6538 6539 ret i64 %old6540}6541 6542define dso_local void @test_atomic_load_sub_i32_noret_seq_cst(i32 %offset) nounwind {6543; CHECK-LABEL: test_atomic_load_sub_i32_noret_seq_cst:6544; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_seq_cst:6545; OUTLINE-ATOMICS: // %bb.0:6546; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6547; OUTLINE-ATOMICS-NEXT: neg w0, w06548; OUTLINE-ATOMICS-NEXT: adrp x1, var326549; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var326550; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel6551; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6552; OUTLINE-ATOMICS-NEXT: ret6553 atomicrmw sub ptr @var32, i32 %offset seq_cst6554; CHECK-NOT: dmb6555; CHECK: neg w[[NEG:[0-9]+]], w[[OLD:[0-9]+]]6556; CHECK: adrp [[TMPADDR:x[0-9]+]], var326557; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326558 6559; CHECK: ldaddal w[[NEG]], w[[NEW:[0-9]+]], [x[[ADDR]]]6560; CHECK-NOT: dmb6561 6562 ret void6563}6564 6565define dso_local void @test_atomic_load_sub_i64_noret_seq_cst(i64 %offset) nounwind {6566; CHECK-LABEL: test_atomic_load_sub_i64_noret_seq_cst:6567; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_seq_cst:6568; OUTLINE-ATOMICS: // %bb.0:6569; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6570; OUTLINE-ATOMICS-NEXT: neg x0, x06571; OUTLINE-ATOMICS-NEXT: adrp x1, var646572; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646573; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel6574; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6575; OUTLINE-ATOMICS-NEXT: ret6576 atomicrmw sub ptr @var64, i64 %offset seq_cst6577; CHECK-NOT: dmb6578; CHECK: neg x[[NEG:[0-9]+]], x[[OLD:[0-9]+]]6579; CHECK: adrp [[TMPADDR:x[0-9]+]], var646580; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646581 6582; CHECK: ldaddal x[[NEG]], x[[NEW:[0-9]+]], [x[[ADDR]]]6583; CHECK-NOT: dmb6584 6585 ret void6586}6587 6588define dso_local i8 @test_atomic_load_xchg_i8_acq_rel(i8 %offset) nounwind {6589; CHECK-LABEL: test_atomic_load_xchg_i8_acq_rel:6590; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_acq_rel:6591; OUTLINE-ATOMICS: // %bb.0:6592; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6593; OUTLINE-ATOMICS-NEXT: adrp x1, var86594; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var86595; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_acq_rel6596; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6597; OUTLINE-ATOMICS-NEXT: ret6598 %old = atomicrmw xchg ptr @var8, i8 %offset acq_rel6599; CHECK-NOT: dmb6600; CHECK: adrp [[TMPADDR:x[0-9]+]], var86601; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var86602 6603; CHECK: swpalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]6604; CHECK-NOT: dmb6605 6606 ret i8 %old6607}6608 6609define dso_local i16 @test_atomic_load_xchg_i16_acq_rel(i16 %offset) nounwind {6610; CHECK-LABEL: test_atomic_load_xchg_i16_acq_rel:6611; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_acq_rel:6612; OUTLINE-ATOMICS: // %bb.0:6613; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6614; OUTLINE-ATOMICS-NEXT: adrp x1, var166615; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var166616; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_acq_rel6617; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6618; OUTLINE-ATOMICS-NEXT: ret6619 %old = atomicrmw xchg ptr @var16, i16 %offset acq_rel6620; CHECK-NOT: dmb6621; CHECK: adrp [[TMPADDR:x[0-9]+]], var166622; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var166623 6624; CHECK: swpalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]6625; CHECK-NOT: dmb6626 6627 ret i16 %old6628}6629 6630define dso_local i32 @test_atomic_load_xchg_i32_acq_rel(i32 %offset) nounwind {6631; CHECK-LABEL: test_atomic_load_xchg_i32_acq_rel:6632; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_acq_rel:6633; OUTLINE-ATOMICS: // %bb.0:6634; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6635; OUTLINE-ATOMICS-NEXT: adrp x1, var326636; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var326637; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel6638; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6639; OUTLINE-ATOMICS-NEXT: ret6640 %old = atomicrmw xchg ptr @var32, i32 %offset acq_rel6641; CHECK-NOT: dmb6642; CHECK: adrp [[TMPADDR:x[0-9]+]], var326643; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326644 6645; CHECK: swpal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]6646; CHECK-NOT: dmb6647 6648 ret i32 %old6649}6650 6651define dso_local i64 @test_atomic_load_xchg_i64_acq_rel(i64 %offset) nounwind {6652; CHECK-LABEL: test_atomic_load_xchg_i64_acq_rel:6653; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_acq_rel:6654; OUTLINE-ATOMICS: // %bb.0:6655; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6656; OUTLINE-ATOMICS-NEXT: adrp x1, var646657; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646658; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel6659; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6660; OUTLINE-ATOMICS-NEXT: ret6661 %old = atomicrmw xchg ptr @var64, i64 %offset acq_rel6662; CHECK-NOT: dmb6663; CHECK: adrp [[TMPADDR:x[0-9]+]], var646664; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646665 6666; CHECK: swpal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]6667; CHECK-NOT: dmb6668 6669 ret i64 %old6670}6671 6672define dso_local void @test_atomic_load_xchg_i32_noret_acq_rel(i32 %offset) nounwind {6673; CHECK-LABEL: test_atomic_load_xchg_i32_noret_acq_rel:6674; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_acq_rel:6675; OUTLINE-ATOMICS: // %bb.0:6676; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6677; OUTLINE-ATOMICS-NEXT: adrp x1, var326678; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var326679; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel6680; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6681; OUTLINE-ATOMICS-NEXT: ret6682 atomicrmw xchg ptr @var32, i32 %offset acq_rel6683; CHECK-NOT: dmb6684; CHECK: adrp [[TMPADDR:x[0-9]+]], var326685; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326686 6687; CHECK: swpal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]6688; CHECK-NOT: dmb6689 6690 ret void6691}6692 6693define dso_local void @test_atomic_load_xchg_i64_noret_acq_rel(i64 %offset) nounwind {6694; CHECK-LABEL: test_atomic_load_xchg_i64_noret_acq_rel:6695; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_acq_rel:6696; OUTLINE-ATOMICS: // %bb.0:6697; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6698; OUTLINE-ATOMICS-NEXT: adrp x1, var646699; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646700; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel6701; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6702; OUTLINE-ATOMICS-NEXT: ret6703 atomicrmw xchg ptr @var64, i64 %offset acq_rel6704; CHECK-NOT: dmb6705; CHECK: adrp [[TMPADDR:x[0-9]+]], var646706; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646707 6708; CHECK: swpal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]6709; CHECK-NOT: dmb6710 6711 ret void6712}6713 6714define dso_local i8 @test_atomic_load_xchg_i8_acquire(i8 %offset) nounwind {6715; CHECK-LABEL: test_atomic_load_xchg_i8_acquire:6716; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_acquire:6717; OUTLINE-ATOMICS: // %bb.0:6718; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6719; OUTLINE-ATOMICS-NEXT: adrp x1, var86720; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var86721; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_acq6722; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6723; OUTLINE-ATOMICS-NEXT: ret6724 %old = atomicrmw xchg ptr @var8, i8 %offset acquire6725; CHECK-NOT: dmb6726; CHECK: adrp [[TMPADDR:x[0-9]+]], var86727; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var86728 6729; CHECK: swpab w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]6730; CHECK-NOT: dmb6731 6732 ret i8 %old6733}6734 6735define dso_local i16 @test_atomic_load_xchg_i16_acquire(i16 %offset) nounwind {6736; CHECK-LABEL: test_atomic_load_xchg_i16_acquire:6737; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_acquire:6738; OUTLINE-ATOMICS: // %bb.0:6739; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6740; OUTLINE-ATOMICS-NEXT: adrp x1, var166741; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var166742; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_acq6743; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6744; OUTLINE-ATOMICS-NEXT: ret6745 %old = atomicrmw xchg ptr @var16, i16 %offset acquire6746; CHECK-NOT: dmb6747; CHECK: adrp [[TMPADDR:x[0-9]+]], var166748; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var166749 6750; CHECK: swpah w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]6751; CHECK-NOT: dmb6752 6753 ret i16 %old6754}6755 6756define dso_local i32 @test_atomic_load_xchg_i32_acquire(i32 %offset) nounwind {6757; CHECK-LABEL: test_atomic_load_xchg_i32_acquire:6758; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_acquire:6759; OUTLINE-ATOMICS: // %bb.0:6760; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6761; OUTLINE-ATOMICS-NEXT: adrp x1, var326762; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var326763; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq6764; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6765; OUTLINE-ATOMICS-NEXT: ret6766 %old = atomicrmw xchg ptr @var32, i32 %offset acquire6767; CHECK-NOT: dmb6768; CHECK: adrp [[TMPADDR:x[0-9]+]], var326769; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326770 6771; CHECK: swpa w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]6772; CHECK-NOT: dmb6773 6774 ret i32 %old6775}6776 6777define dso_local i64 @test_atomic_load_xchg_i64_acquire(i64 %offset) nounwind {6778; CHECK-LABEL: test_atomic_load_xchg_i64_acquire:6779; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_acquire:6780; OUTLINE-ATOMICS: // %bb.0:6781; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6782; OUTLINE-ATOMICS-NEXT: adrp x1, var646783; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646784; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq6785; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6786; OUTLINE-ATOMICS-NEXT: ret6787 %old = atomicrmw xchg ptr @var64, i64 %offset acquire6788; CHECK-NOT: dmb6789; CHECK: adrp [[TMPADDR:x[0-9]+]], var646790; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646791 6792; CHECK: swpa x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]6793; CHECK-NOT: dmb6794 6795 ret i64 %old6796}6797 6798define dso_local void @test_atomic_load_xchg_i32_noret_acquire(i32 %offset) nounwind {6799; CHECK-LABEL: test_atomic_load_xchg_i32_noret_acquire:6800; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_acquire:6801; OUTLINE-ATOMICS: // %bb.0:6802; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6803; OUTLINE-ATOMICS-NEXT: adrp x1, var326804; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var326805; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq6806; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6807; OUTLINE-ATOMICS-NEXT: ret6808 atomicrmw xchg ptr @var32, i32 %offset acquire6809; CHECK-NOT: dmb6810; CHECK: adrp [[TMPADDR:x[0-9]+]], var326811; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326812 6813; CHECK: swpa w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]6814; CHECK-NOT: dmb6815 6816 ret void6817}6818 6819define dso_local void @test_atomic_load_xchg_i64_noret_acquire(i64 %offset) nounwind {6820; CHECK-LABEL: test_atomic_load_xchg_i64_noret_acquire:6821; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_acquire:6822; OUTLINE-ATOMICS: // %bb.0:6823; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6824; OUTLINE-ATOMICS-NEXT: adrp x1, var646825; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646826; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq6827; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6828; OUTLINE-ATOMICS-NEXT: ret6829 atomicrmw xchg ptr @var64, i64 %offset acquire6830; CHECK-NOT: dmb6831; CHECK: adrp [[TMPADDR:x[0-9]+]], var646832; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646833 6834; CHECK: swpa x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]6835; CHECK-NOT: dmb6836 6837 ret void6838}6839 6840define dso_local i8 @test_atomic_load_xchg_i8_monotonic(i8 %offset) nounwind {6841; CHECK-LABEL: test_atomic_load_xchg_i8_monotonic:6842; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_monotonic:6843; OUTLINE-ATOMICS: // %bb.0:6844; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6845; OUTLINE-ATOMICS-NEXT: adrp x1, var86846; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var86847; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_relax6848; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6849; OUTLINE-ATOMICS-NEXT: ret6850 %old = atomicrmw xchg ptr @var8, i8 %offset monotonic6851; CHECK-NOT: dmb6852; CHECK: adrp [[TMPADDR:x[0-9]+]], var86853; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var86854 6855; CHECK: swpb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]6856; CHECK-NOT: dmb6857 6858 ret i8 %old6859}6860 6861define dso_local i16 @test_atomic_load_xchg_i16_monotonic(i16 %offset) nounwind {6862; CHECK-LABEL: test_atomic_load_xchg_i16_monotonic:6863; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_monotonic:6864; OUTLINE-ATOMICS: // %bb.0:6865; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6866; OUTLINE-ATOMICS-NEXT: adrp x1, var166867; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var166868; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_relax6869; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6870; OUTLINE-ATOMICS-NEXT: ret6871 %old = atomicrmw xchg ptr @var16, i16 %offset monotonic6872; CHECK-NOT: dmb6873; CHECK: adrp [[TMPADDR:x[0-9]+]], var166874; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var166875 6876; CHECK: swph w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]6877; CHECK-NOT: dmb6878 6879 ret i16 %old6880}6881 6882define dso_local i32 @test_atomic_load_xchg_i32_monotonic(i32 %offset) nounwind {6883; CHECK-LABEL: test_atomic_load_xchg_i32_monotonic:6884; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_monotonic:6885; OUTLINE-ATOMICS: // %bb.0:6886; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6887; OUTLINE-ATOMICS-NEXT: adrp x1, var326888; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var326889; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_relax6890; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6891; OUTLINE-ATOMICS-NEXT: ret6892 %old = atomicrmw xchg ptr @var32, i32 %offset monotonic6893; CHECK-NOT: dmb6894; CHECK: adrp [[TMPADDR:x[0-9]+]], var326895; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326896 6897; CHECK: swp w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]6898; CHECK-NOT: dmb6899 6900 ret i32 %old6901}6902 6903define dso_local i64 @test_atomic_load_xchg_i64_monotonic(i64 %offset) nounwind {6904; CHECK-LABEL: test_atomic_load_xchg_i64_monotonic:6905; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_monotonic:6906; OUTLINE-ATOMICS: // %bb.0:6907; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6908; OUTLINE-ATOMICS-NEXT: adrp x1, var646909; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646910; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_relax6911; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6912; OUTLINE-ATOMICS-NEXT: ret6913 %old = atomicrmw xchg ptr @var64, i64 %offset monotonic6914; CHECK-NOT: dmb6915; CHECK: adrp [[TMPADDR:x[0-9]+]], var646916; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646917 6918; CHECK: swp x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]6919; CHECK-NOT: dmb6920 6921 ret i64 %old6922}6923 6924define dso_local void @test_atomic_load_xchg_i32_noret_monotonic(i32 %offset) nounwind {6925; CHECK-LABEL: test_atomic_load_xchg_i32_noret_monotonic:6926; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_monotonic:6927; OUTLINE-ATOMICS: // %bb.0:6928; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6929; OUTLINE-ATOMICS-NEXT: adrp x1, var326930; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var326931; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_relax6932; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6933; OUTLINE-ATOMICS-NEXT: ret6934 atomicrmw xchg ptr @var32, i32 %offset monotonic6935; CHECK-NOT: dmb6936; CHECK: adrp [[TMPADDR:x[0-9]+]], var326937; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var326938 6939; CHECK: swp w[[OLD:[0-9]+]], w[[NEW:[0-9,a-z]+]], [x[[ADDR]]]6940; CHECK-NOT: dmb6941 6942 ret void6943}6944 6945define dso_local void @test_atomic_load_xchg_i64_noret_monotonic(i64 %offset) nounwind {6946; CHECK-LABEL: test_atomic_load_xchg_i64_noret_monotonic:6947; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_monotonic:6948; OUTLINE-ATOMICS: // %bb.0:6949; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6950; OUTLINE-ATOMICS-NEXT: adrp x1, var646951; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var646952; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_relax6953; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6954; OUTLINE-ATOMICS-NEXT: ret6955 atomicrmw xchg ptr @var64, i64 %offset monotonic6956; CHECK-NOT: dmb6957; CHECK: adrp [[TMPADDR:x[0-9]+]], var646958; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var646959 6960; CHECK: swp x[[OLD:[0-9]+]], x[[NEW:[0-9,a-z]+]], [x[[ADDR]]]6961; CHECK-NOT: dmb6962 6963 ret void6964}6965 6966define dso_local i8 @test_atomic_load_xchg_i8_release(i8 %offset) nounwind {6967; CHECK-LABEL: test_atomic_load_xchg_i8_release:6968; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_release:6969; OUTLINE-ATOMICS: // %bb.0:6970; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6971; OUTLINE-ATOMICS-NEXT: adrp x1, var86972; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var86973; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_rel6974; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6975; OUTLINE-ATOMICS-NEXT: ret6976 %old = atomicrmw xchg ptr @var8, i8 %offset release6977; CHECK-NOT: dmb6978; CHECK: adrp [[TMPADDR:x[0-9]+]], var86979; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var86980 6981; CHECK: swplb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]6982; CHECK-NOT: dmb6983 6984 ret i8 %old6985}6986 6987define dso_local i16 @test_atomic_load_xchg_i16_release(i16 %offset) nounwind {6988; CHECK-LABEL: test_atomic_load_xchg_i16_release:6989; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_release:6990; OUTLINE-ATOMICS: // %bb.0:6991; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill6992; OUTLINE-ATOMICS-NEXT: adrp x1, var166993; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var166994; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_rel6995; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload6996; OUTLINE-ATOMICS-NEXT: ret6997 %old = atomicrmw xchg ptr @var16, i16 %offset release6998; CHECK-NOT: dmb6999; CHECK: adrp [[TMPADDR:x[0-9]+]], var167000; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var167001 7002; CHECK: swplh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7003; CHECK-NOT: dmb7004 7005 ret i16 %old7006}7007 7008define dso_local i32 @test_atomic_load_xchg_i32_release(i32 %offset) nounwind {7009; CHECK-LABEL: test_atomic_load_xchg_i32_release:7010; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_release:7011; OUTLINE-ATOMICS: // %bb.0:7012; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill7013; OUTLINE-ATOMICS-NEXT: adrp x1, var327014; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var327015; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_rel7016; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload7017; OUTLINE-ATOMICS-NEXT: ret7018 %old = atomicrmw xchg ptr @var32, i32 %offset release7019; CHECK-NOT: dmb7020; CHECK: adrp [[TMPADDR:x[0-9]+]], var327021; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var327022 7023; CHECK: swpl w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7024; CHECK-NOT: dmb7025 7026 ret i32 %old7027}7028 7029define dso_local i64 @test_atomic_load_xchg_i64_release(i64 %offset) nounwind {7030; CHECK-LABEL: test_atomic_load_xchg_i64_release:7031; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_release:7032; OUTLINE-ATOMICS: // %bb.0:7033; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill7034; OUTLINE-ATOMICS-NEXT: adrp x1, var647035; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var647036; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_rel7037; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload7038; OUTLINE-ATOMICS-NEXT: ret7039 %old = atomicrmw xchg ptr @var64, i64 %offset release7040; CHECK-NOT: dmb7041; CHECK: adrp [[TMPADDR:x[0-9]+]], var647042; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var647043 7044; CHECK: swpl x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]7045; CHECK-NOT: dmb7046 7047 ret i64 %old7048}7049 7050define dso_local void @test_atomic_load_xchg_i32_noret_release(i32 %offset) nounwind {7051; CHECK-LABEL: test_atomic_load_xchg_i32_noret_release:7052; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_release:7053; OUTLINE-ATOMICS: // %bb.0:7054; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill7055; OUTLINE-ATOMICS-NEXT: adrp x1, var327056; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var327057; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_rel7058; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload7059; OUTLINE-ATOMICS-NEXT: ret7060 atomicrmw xchg ptr @var32, i32 %offset release7061; CHECK-NOT: dmb7062; CHECK: adrp [[TMPADDR:x[0-9]+]], var327063; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var327064 7065; CHECK: swpl w[[OLD:[0-9]+]], w[[NEW:[0-9,a-z]+]], [x[[ADDR]]]7066; CHECK-NOT: dmb7067 7068 ret void7069}7070 7071define dso_local void @test_atomic_load_xchg_i64_noret_release(i64 %offset) nounwind {7072; CHECK-LABEL: test_atomic_load_xchg_i64_noret_release:7073; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_release:7074; OUTLINE-ATOMICS: // %bb.0:7075; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill7076; OUTLINE-ATOMICS-NEXT: adrp x1, var647077; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var647078; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_rel7079; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload7080; OUTLINE-ATOMICS-NEXT: ret7081 atomicrmw xchg ptr @var64, i64 %offset release7082; CHECK-NOT: dmb7083; CHECK: adrp [[TMPADDR:x[0-9]+]], var647084; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var647085 7086; CHECK: swpl x[[OLD:[0-9]+]], x[[NEW:[0-9,a-z]+]], [x[[ADDR]]]7087; CHECK-NOT: dmb7088 7089 ret void7090}7091 7092define dso_local i8 @test_atomic_load_xchg_i8_seq_cst(i8 %offset) nounwind {7093; CHECK-LABEL: test_atomic_load_xchg_i8_seq_cst:7094; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_seq_cst:7095; OUTLINE-ATOMICS: // %bb.0:7096; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill7097; OUTLINE-ATOMICS-NEXT: adrp x1, var87098; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var87099; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_acq_rel7100; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload7101; OUTLINE-ATOMICS-NEXT: ret7102 %old = atomicrmw xchg ptr @var8, i8 %offset seq_cst7103; CHECK-NOT: dmb7104; CHECK: adrp [[TMPADDR:x[0-9]+]], var87105; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var87106 7107; CHECK: swpalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7108; CHECK-NOT: dmb7109 7110 ret i8 %old7111}7112 7113define dso_local i16 @test_atomic_load_xchg_i16_seq_cst(i16 %offset) nounwind {7114; CHECK-LABEL: test_atomic_load_xchg_i16_seq_cst:7115; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_seq_cst:7116; OUTLINE-ATOMICS: // %bb.0:7117; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill7118; OUTLINE-ATOMICS-NEXT: adrp x1, var167119; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var167120; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_acq_rel7121; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload7122; OUTLINE-ATOMICS-NEXT: ret7123 %old = atomicrmw xchg ptr @var16, i16 %offset seq_cst7124; CHECK-NOT: dmb7125; CHECK: adrp [[TMPADDR:x[0-9]+]], var167126; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var167127 7128; CHECK: swpalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7129; CHECK-NOT: dmb7130 7131 ret i16 %old7132}7133 7134define dso_local i32 @test_atomic_load_xchg_i32_seq_cst(i32 %offset) nounwind {7135; CHECK-LABEL: test_atomic_load_xchg_i32_seq_cst:7136; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_seq_cst:7137; OUTLINE-ATOMICS: // %bb.0:7138; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill7139; OUTLINE-ATOMICS-NEXT: adrp x1, var327140; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var327141; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel7142; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload7143; OUTLINE-ATOMICS-NEXT: ret7144 %old = atomicrmw xchg ptr @var32, i32 %offset seq_cst7145; CHECK-NOT: dmb7146; CHECK: adrp [[TMPADDR:x[0-9]+]], var327147; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var327148 7149; CHECK: swpal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7150; CHECK-NOT: dmb7151 7152 ret i32 %old7153}7154 7155define dso_local i64 @test_atomic_load_xchg_i64_seq_cst(i64 %offset) nounwind {7156; CHECK-LABEL: test_atomic_load_xchg_i64_seq_cst:7157; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_seq_cst:7158; OUTLINE-ATOMICS: // %bb.0:7159; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill7160; OUTLINE-ATOMICS-NEXT: adrp x1, var647161; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var647162; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel7163; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload7164; OUTLINE-ATOMICS-NEXT: ret7165 %old = atomicrmw xchg ptr @var64, i64 %offset seq_cst7166; CHECK-NOT: dmb7167; CHECK: adrp [[TMPADDR:x[0-9]+]], var647168; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var647169 7170; CHECK: swpal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]7171; CHECK-NOT: dmb7172 7173 ret i64 %old7174}7175 7176define dso_local void @test_atomic_load_xchg_i32_noret_seq_cst(i32 %offset) nounwind {7177; CHECK-LABEL: test_atomic_load_xchg_i32_noret_seq_cst:7178; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_seq_cst:7179; OUTLINE-ATOMICS: // %bb.0:7180; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill7181; OUTLINE-ATOMICS-NEXT: adrp x1, var327182; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var327183; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel7184; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload7185; OUTLINE-ATOMICS-NEXT: ret7186 atomicrmw xchg ptr @var32, i32 %offset seq_cst7187; CHECK-NOT: dmb7188; CHECK: adrp [[TMPADDR:x[0-9]+]], var327189; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var327190 7191; CHECK: swpal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7192; CHECK-NOT: dmb7193 7194 ret void7195}7196 7197define dso_local void @test_atomic_load_xchg_i64_noret_seq_cst(i64 %offset) nounwind {7198; CHECK-LABEL: test_atomic_load_xchg_i64_noret_seq_cst:7199; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_seq_cst:7200; OUTLINE-ATOMICS: // %bb.0:7201; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill7202; OUTLINE-ATOMICS-NEXT: adrp x1, var647203; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var647204; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel7205; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload7206; OUTLINE-ATOMICS-NEXT: ret7207 atomicrmw xchg ptr @var64, i64 %offset seq_cst7208; CHECK-NOT: dmb7209; CHECK: adrp [[TMPADDR:x[0-9]+]], var647210; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var647211 7212; CHECK: swpal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]7213; CHECK-NOT: dmb7214 7215 ret void7216}7217 7218define dso_local i8 @test_atomic_load_umax_i8_acq_rel(i8 %offset) nounwind {7219; CHECK-LABEL: test_atomic_load_umax_i8_acq_rel:7220; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_acq_rel:7221; OUTLINE-ATOMICS: // %bb.0:7222; OUTLINE-ATOMICS-NEXT: adrp x8, var87223; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var87224; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff7225; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7226; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17227; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]7228; OUTLINE-ATOMICS-NEXT: cmp w0, w97229; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi7230; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]7231; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7232; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7233; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x07234; OUTLINE-ATOMICS-NEXT: ret7235 %old = atomicrmw umax ptr @var8, i8 %offset acq_rel7236; CHECK-NOT: dmb7237; CHECK: adrp [[TMPADDR:x[0-9]+]], var87238; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var87239 7240; CHECK: ldumaxalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7241; CHECK-NOT: dmb7242 7243 ret i8 %old7244}7245 7246define dso_local i16 @test_atomic_load_umax_i16_acq_rel(i16 %offset) nounwind {7247; CHECK-LABEL: test_atomic_load_umax_i16_acq_rel:7248; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_acq_rel:7249; OUTLINE-ATOMICS: // %bb.0:7250; OUTLINE-ATOMICS-NEXT: adrp x8, var167251; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var167252; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff7253; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7254; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17255; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]7256; OUTLINE-ATOMICS-NEXT: cmp w0, w97257; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi7258; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]7259; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7260; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7261; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x07262; OUTLINE-ATOMICS-NEXT: ret7263 %old = atomicrmw umax ptr @var16, i16 %offset acq_rel7264; CHECK-NOT: dmb7265; CHECK: adrp [[TMPADDR:x[0-9]+]], var167266; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var167267 7268; CHECK: ldumaxalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7269; CHECK-NOT: dmb7270 7271 ret i16 %old7272}7273 7274define dso_local i32 @test_atomic_load_umax_i32_acq_rel(i32 %offset) nounwind {7275; CHECK-LABEL: test_atomic_load_umax_i32_acq_rel:7276; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_acq_rel:7277; OUTLINE-ATOMICS: // %bb.0:7278; OUTLINE-ATOMICS-NEXT: adrp x9, var327279; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var327280; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7281; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17282; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]7283; OUTLINE-ATOMICS-NEXT: cmp w8, w07284; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi7285; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]7286; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7287; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7288; OUTLINE-ATOMICS-NEXT: mov w0, w87289; OUTLINE-ATOMICS-NEXT: ret7290 %old = atomicrmw umax ptr @var32, i32 %offset acq_rel7291; CHECK-NOT: dmb7292; CHECK: adrp [[TMPADDR:x[0-9]+]], var327293; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var327294 7295; CHECK: ldumaxal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7296; CHECK-NOT: dmb7297 7298 ret i32 %old7299}7300 7301define dso_local i64 @test_atomic_load_umax_i64_acq_rel(i64 %offset) nounwind {7302; CHECK-LABEL: test_atomic_load_umax_i64_acq_rel:7303; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_acq_rel:7304; OUTLINE-ATOMICS: // %bb.0:7305; OUTLINE-ATOMICS-NEXT: adrp x9, var647306; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var647307; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7308; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17309; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]7310; OUTLINE-ATOMICS-NEXT: cmp x8, x07311; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi7312; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]7313; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7314; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7315; OUTLINE-ATOMICS-NEXT: mov x0, x87316; OUTLINE-ATOMICS-NEXT: ret7317 %old = atomicrmw umax ptr @var64, i64 %offset acq_rel7318; CHECK-NOT: dmb7319; CHECK: adrp [[TMPADDR:x[0-9]+]], var647320; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var647321 7322; CHECK: ldumaxal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]7323; CHECK-NOT: dmb7324 7325 ret i64 %old7326}7327 7328define dso_local void @test_atomic_load_umax_i32_noret_acq_rel(i32 %offset) nounwind {7329; CHECK-LABEL: test_atomic_load_umax_i32_noret_acq_rel:7330; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_acq_rel:7331; OUTLINE-ATOMICS: // %bb.0:7332; OUTLINE-ATOMICS-NEXT: adrp x8, var327333; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var327334; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7335; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17336; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]7337; OUTLINE-ATOMICS-NEXT: cmp w9, w07338; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi7339; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]7340; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]7341; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7342; OUTLINE-ATOMICS-NEXT: ret7343 atomicrmw umax ptr @var32, i32 %offset acq_rel7344; CHECK-NOT: dmb7345; CHECK: adrp [[TMPADDR:x[0-9]+]], var327346; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var327347 7348; CHECK: ldumaxal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]7349; CHECK-NOT: dmb7350 ret void7351}7352 7353define dso_local void @test_atomic_load_umax_i64_noret_acq_rel(i64 %offset) nounwind {7354; CHECK-LABEL: test_atomic_load_umax_i64_noret_acq_rel:7355; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_acq_rel:7356; OUTLINE-ATOMICS: // %bb.0:7357; OUTLINE-ATOMICS-NEXT: adrp x8, var647358; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var647359; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7360; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17361; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]7362; OUTLINE-ATOMICS-NEXT: cmp x9, x07363; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi7364; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]7365; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]7366; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7367; OUTLINE-ATOMICS-NEXT: ret7368 atomicrmw umax ptr @var64, i64 %offset acq_rel7369; CHECK-NOT: dmb7370; CHECK: adrp [[TMPADDR:x[0-9]+]], var647371; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var647372 7373; CHECK: ldumaxal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]7374; CHECK-NOT: dmb7375 ret void7376}7377 7378define dso_local i8 @test_atomic_load_umax_i8_acquire(i8 %offset) nounwind {7379; CHECK-LABEL: test_atomic_load_umax_i8_acquire:7380; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_acquire:7381; OUTLINE-ATOMICS: // %bb.0:7382; OUTLINE-ATOMICS-NEXT: adrp x8, var87383; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var87384; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff7385; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7386; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17387; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]7388; OUTLINE-ATOMICS-NEXT: cmp w0, w97389; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi7390; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x8]7391; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7392; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7393; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x07394; OUTLINE-ATOMICS-NEXT: ret7395 %old = atomicrmw umax ptr @var8, i8 %offset acquire7396; CHECK-NOT: dmb7397; CHECK: adrp [[TMPADDR:x[0-9]+]], var87398; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var87399 7400; CHECK: ldumaxab w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7401; CHECK-NOT: dmb7402 7403 ret i8 %old7404}7405 7406define dso_local i16 @test_atomic_load_umax_i16_acquire(i16 %offset) nounwind {7407; CHECK-LABEL: test_atomic_load_umax_i16_acquire:7408; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_acquire:7409; OUTLINE-ATOMICS: // %bb.0:7410; OUTLINE-ATOMICS-NEXT: adrp x8, var167411; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var167412; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff7413; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7414; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17415; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]7416; OUTLINE-ATOMICS-NEXT: cmp w0, w97417; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi7418; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x8]7419; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7420; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7421; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x07422; OUTLINE-ATOMICS-NEXT: ret7423 %old = atomicrmw umax ptr @var16, i16 %offset acquire7424; CHECK-NOT: dmb7425; CHECK: adrp [[TMPADDR:x[0-9]+]], var167426; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var167427 7428; CHECK: ldumaxah w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7429; CHECK-NOT: dmb7430 7431 ret i16 %old7432}7433 7434define dso_local i32 @test_atomic_load_umax_i32_acquire(i32 %offset) nounwind {7435; CHECK-LABEL: test_atomic_load_umax_i32_acquire:7436; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_acquire:7437; OUTLINE-ATOMICS: // %bb.0:7438; OUTLINE-ATOMICS-NEXT: adrp x9, var327439; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var327440; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7441; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17442; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]7443; OUTLINE-ATOMICS-NEXT: cmp w8, w07444; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi7445; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]7446; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7447; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7448; OUTLINE-ATOMICS-NEXT: mov w0, w87449; OUTLINE-ATOMICS-NEXT: ret7450 %old = atomicrmw umax ptr @var32, i32 %offset acquire7451; CHECK-NOT: dmb7452; CHECK: adrp [[TMPADDR:x[0-9]+]], var327453; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var327454 7455; CHECK: ldumaxa w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7456; CHECK-NOT: dmb7457 7458 ret i32 %old7459}7460 7461define dso_local i64 @test_atomic_load_umax_i64_acquire(i64 %offset) nounwind {7462; CHECK-LABEL: test_atomic_load_umax_i64_acquire:7463; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_acquire:7464; OUTLINE-ATOMICS: // %bb.0:7465; OUTLINE-ATOMICS-NEXT: adrp x9, var647466; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var647467; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7468; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17469; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]7470; OUTLINE-ATOMICS-NEXT: cmp x8, x07471; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi7472; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]7473; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7474; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7475; OUTLINE-ATOMICS-NEXT: mov x0, x87476; OUTLINE-ATOMICS-NEXT: ret7477 %old = atomicrmw umax ptr @var64, i64 %offset acquire7478; CHECK-NOT: dmb7479; CHECK: adrp [[TMPADDR:x[0-9]+]], var647480; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var647481 7482; CHECK: ldumaxa x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]7483; CHECK-NOT: dmb7484 7485 ret i64 %old7486}7487 7488define dso_local void @test_atomic_load_umax_i32_noret_acquire(i32 %offset) nounwind {7489; CHECK-LABEL: test_atomic_load_umax_i32_noret_acquire:7490; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_acquire:7491; OUTLINE-ATOMICS: // %bb.0:7492; OUTLINE-ATOMICS-NEXT: adrp x8, var327493; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var327494; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7495; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17496; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]7497; OUTLINE-ATOMICS-NEXT: cmp w9, w07498; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi7499; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]7500; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]7501; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7502; OUTLINE-ATOMICS-NEXT: ret7503 atomicrmw umax ptr @var32, i32 %offset acquire7504; CHECK-NOT: dmb7505; CHECK: adrp [[TMPADDR:x[0-9]+]], var327506; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var327507 7508; CHECK: ldumaxa w0, w[[NEW:[0-9]+]], [x[[ADDR]]]7509; CHECK-NOT: dmb7510 ret void7511}7512 7513define dso_local void @test_atomic_load_umax_i64_noret_acquire(i64 %offset) nounwind {7514; CHECK-LABEL: test_atomic_load_umax_i64_noret_acquire:7515; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_acquire:7516; OUTLINE-ATOMICS: // %bb.0:7517; OUTLINE-ATOMICS-NEXT: adrp x8, var647518; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var647519; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7520; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17521; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]7522; OUTLINE-ATOMICS-NEXT: cmp x9, x07523; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi7524; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]7525; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]7526; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7527; OUTLINE-ATOMICS-NEXT: ret7528 atomicrmw umax ptr @var64, i64 %offset acquire7529; CHECK-NOT: dmb7530; CHECK: adrp [[TMPADDR:x[0-9]+]], var647531; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var647532 7533; CHECK: ldumaxa x0, x[[NEW:[0-9]+]], [x[[ADDR]]]7534; CHECK-NOT: dmb7535 ret void7536}7537 7538define dso_local i8 @test_atomic_load_umax_i8_monotonic(i8 %offset) nounwind {7539; CHECK-LABEL: test_atomic_load_umax_i8_monotonic:7540; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_monotonic:7541; OUTLINE-ATOMICS: // %bb.0:7542; OUTLINE-ATOMICS-NEXT: adrp x8, var87543; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var87544; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff7545; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7546; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17547; OUTLINE-ATOMICS-NEXT: ldxrb w0, [x8]7548; OUTLINE-ATOMICS-NEXT: cmp w0, w97549; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi7550; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x8]7551; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7552; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7553; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x07554; OUTLINE-ATOMICS-NEXT: ret7555 %old = atomicrmw umax ptr @var8, i8 %offset monotonic7556; CHECK-NOT: dmb7557; CHECK: adrp [[TMPADDR:x[0-9]+]], var87558; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var87559 7560; CHECK: ldumaxb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7561; CHECK-NOT: dmb7562 7563 ret i8 %old7564}7565 7566define dso_local i16 @test_atomic_load_umax_i16_monotonic(i16 %offset) nounwind {7567; CHECK-LABEL: test_atomic_load_umax_i16_monotonic:7568; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_monotonic:7569; OUTLINE-ATOMICS: // %bb.0:7570; OUTLINE-ATOMICS-NEXT: adrp x8, var167571; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var167572; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff7573; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7574; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17575; OUTLINE-ATOMICS-NEXT: ldxrh w0, [x8]7576; OUTLINE-ATOMICS-NEXT: cmp w0, w97577; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi7578; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x8]7579; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7580; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7581; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x07582; OUTLINE-ATOMICS-NEXT: ret7583 %old = atomicrmw umax ptr @var16, i16 %offset monotonic7584; CHECK-NOT: dmb7585; CHECK: adrp [[TMPADDR:x[0-9]+]], var167586; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var167587 7588; CHECK: ldumaxh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7589; CHECK-NOT: dmb7590 7591 ret i16 %old7592}7593 7594define dso_local i32 @test_atomic_load_umax_i32_monotonic(i32 %offset) nounwind {7595; CHECK-LABEL: test_atomic_load_umax_i32_monotonic:7596; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_monotonic:7597; OUTLINE-ATOMICS: // %bb.0:7598; OUTLINE-ATOMICS-NEXT: adrp x9, var327599; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var327600; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7601; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17602; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]7603; OUTLINE-ATOMICS-NEXT: cmp w8, w07604; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi7605; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]7606; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7607; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7608; OUTLINE-ATOMICS-NEXT: mov w0, w87609; OUTLINE-ATOMICS-NEXT: ret7610 %old = atomicrmw umax ptr @var32, i32 %offset monotonic7611; CHECK-NOT: dmb7612; CHECK: adrp [[TMPADDR:x[0-9]+]], var327613; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var327614 7615; CHECK: ldumax w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7616; CHECK-NOT: dmb7617 7618 ret i32 %old7619}7620 7621define dso_local i64 @test_atomic_load_umax_i64_monotonic(i64 %offset) nounwind {7622; CHECK-LABEL: test_atomic_load_umax_i64_monotonic:7623; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_monotonic:7624; OUTLINE-ATOMICS: // %bb.0:7625; OUTLINE-ATOMICS-NEXT: adrp x9, var647626; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var647627; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7628; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17629; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]7630; OUTLINE-ATOMICS-NEXT: cmp x8, x07631; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi7632; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]7633; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7634; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7635; OUTLINE-ATOMICS-NEXT: mov x0, x87636; OUTLINE-ATOMICS-NEXT: ret7637 %old = atomicrmw umax ptr @var64, i64 %offset monotonic7638; CHECK-NOT: dmb7639; CHECK: adrp [[TMPADDR:x[0-9]+]], var647640; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var647641 7642; CHECK: ldumax x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]7643; CHECK-NOT: dmb7644 7645 ret i64 %old7646}7647 7648define dso_local void @test_atomic_load_umax_i32_noret_monotonic(i32 %offset) nounwind {7649; CHECK-LABEL: test_atomic_load_umax_i32_noret_monotonic:7650; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_monotonic:7651; OUTLINE-ATOMICS: // %bb.0:7652; OUTLINE-ATOMICS-NEXT: adrp x8, var327653; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var327654; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7655; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17656; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]7657; OUTLINE-ATOMICS-NEXT: cmp w9, w07658; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi7659; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]7660; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]7661; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7662; OUTLINE-ATOMICS-NEXT: ret7663 atomicrmw umax ptr @var32, i32 %offset monotonic7664; CHECK-NOT: dmb7665; CHECK: adrp [[TMPADDR:x[0-9]+]], var327666; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var327667 7668; CHECK: ldumax w{{[0-9]+}}, w{{[1-9][0-9]*}}, [x[[ADDR]]]7669; CHECK-NOT: dmb7670 ret void7671}7672 7673define dso_local void @test_atomic_load_umax_i64_noret_monotonic(i64 %offset) nounwind {7674; CHECK-LABEL: test_atomic_load_umax_i64_noret_monotonic:7675; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_monotonic:7676; OUTLINE-ATOMICS: // %bb.0:7677; OUTLINE-ATOMICS-NEXT: adrp x8, var647678; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var647679; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7680; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17681; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]7682; OUTLINE-ATOMICS-NEXT: cmp x9, x07683; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi7684; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]7685; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]7686; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7687; OUTLINE-ATOMICS-NEXT: ret7688 atomicrmw umax ptr @var64, i64 %offset monotonic7689; CHECK-NOT: dmb7690; CHECK: adrp [[TMPADDR:x[0-9]+]], var647691; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var647692 7693; CHECK: ldumax x{{[0-9]+}}, x{{[1-9][0-9]*}}, [x[[ADDR]]]7694; CHECK-NOT: dmb7695 ret void7696}7697 7698define dso_local i8 @test_atomic_load_umax_i8_release(i8 %offset) nounwind {7699; CHECK-LABEL: test_atomic_load_umax_i8_release:7700; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_release:7701; OUTLINE-ATOMICS: // %bb.0:7702; OUTLINE-ATOMICS-NEXT: adrp x8, var87703; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var87704; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff7705; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7706; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17707; OUTLINE-ATOMICS-NEXT: ldxrb w0, [x8]7708; OUTLINE-ATOMICS-NEXT: cmp w0, w97709; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi7710; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]7711; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7712; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7713; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x07714; OUTLINE-ATOMICS-NEXT: ret7715 %old = atomicrmw umax ptr @var8, i8 %offset release7716; CHECK-NOT: dmb7717; CHECK: adrp [[TMPADDR:x[0-9]+]], var87718; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var87719 7720; CHECK: ldumaxlb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7721; CHECK-NOT: dmb7722 7723 ret i8 %old7724}7725 7726define dso_local i16 @test_atomic_load_umax_i16_release(i16 %offset) nounwind {7727; CHECK-LABEL: test_atomic_load_umax_i16_release:7728; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_release:7729; OUTLINE-ATOMICS: // %bb.0:7730; OUTLINE-ATOMICS-NEXT: adrp x8, var167731; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var167732; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff7733; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7734; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17735; OUTLINE-ATOMICS-NEXT: ldxrh w0, [x8]7736; OUTLINE-ATOMICS-NEXT: cmp w0, w97737; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi7738; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]7739; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7740; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7741; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x07742; OUTLINE-ATOMICS-NEXT: ret7743 %old = atomicrmw umax ptr @var16, i16 %offset release7744; CHECK-NOT: dmb7745; CHECK: adrp [[TMPADDR:x[0-9]+]], var167746; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var167747 7748; CHECK: ldumaxlh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7749; CHECK-NOT: dmb7750 7751 ret i16 %old7752}7753 7754define dso_local i32 @test_atomic_load_umax_i32_release(i32 %offset) nounwind {7755; CHECK-LABEL: test_atomic_load_umax_i32_release:7756; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_release:7757; OUTLINE-ATOMICS: // %bb.0:7758; OUTLINE-ATOMICS-NEXT: adrp x9, var327759; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var327760; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7761; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17762; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]7763; OUTLINE-ATOMICS-NEXT: cmp w8, w07764; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi7765; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]7766; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7767; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7768; OUTLINE-ATOMICS-NEXT: mov w0, w87769; OUTLINE-ATOMICS-NEXT: ret7770 %old = atomicrmw umax ptr @var32, i32 %offset release7771; CHECK-NOT: dmb7772; CHECK: adrp [[TMPADDR:x[0-9]+]], var327773; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var327774 7775; CHECK: ldumaxl w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7776; CHECK-NOT: dmb7777 7778 ret i32 %old7779}7780 7781define dso_local i64 @test_atomic_load_umax_i64_release(i64 %offset) nounwind {7782; CHECK-LABEL: test_atomic_load_umax_i64_release:7783; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_release:7784; OUTLINE-ATOMICS: // %bb.0:7785; OUTLINE-ATOMICS-NEXT: adrp x9, var647786; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var647787; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7788; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17789; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]7790; OUTLINE-ATOMICS-NEXT: cmp x8, x07791; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi7792; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]7793; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7794; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7795; OUTLINE-ATOMICS-NEXT: mov x0, x87796; OUTLINE-ATOMICS-NEXT: ret7797 %old = atomicrmw umax ptr @var64, i64 %offset release7798; CHECK-NOT: dmb7799; CHECK: adrp [[TMPADDR:x[0-9]+]], var647800; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var647801 7802; CHECK: ldumaxl x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]7803; CHECK-NOT: dmb7804 7805 ret i64 %old7806}7807 7808define dso_local void @test_atomic_load_umax_i32_noret_release(i32 %offset) nounwind {7809; CHECK-LABEL: test_atomic_load_umax_i32_noret_release:7810; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_release:7811; OUTLINE-ATOMICS: // %bb.0:7812; OUTLINE-ATOMICS-NEXT: adrp x8, var327813; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var327814; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7815; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17816; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]7817; OUTLINE-ATOMICS-NEXT: cmp w9, w07818; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi7819; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]7820; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]7821; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7822; OUTLINE-ATOMICS-NEXT: ret7823 atomicrmw umax ptr @var32, i32 %offset release7824; CHECK-NOT: dmb7825; CHECK: adrp [[TMPADDR:x[0-9]+]], var327826; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var327827 7828; CHECK: ldumaxl w{{[0-9]+}}, w{{[1-9][0-9]*}}, [x[[ADDR]]]7829; CHECK-NOT: dmb7830 ret void7831}7832 7833define dso_local void @test_atomic_load_umax_i64_noret_release(i64 %offset) nounwind {7834; CHECK-LABEL: test_atomic_load_umax_i64_noret_release:7835; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_release:7836; OUTLINE-ATOMICS: // %bb.0:7837; OUTLINE-ATOMICS-NEXT: adrp x8, var647838; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var647839; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7840; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17841; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]7842; OUTLINE-ATOMICS-NEXT: cmp x9, x07843; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi7844; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]7845; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]7846; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7847; OUTLINE-ATOMICS-NEXT: ret7848 atomicrmw umax ptr @var64, i64 %offset release7849; CHECK-NOT: dmb7850; CHECK: adrp [[TMPADDR:x[0-9]+]], var647851; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var647852 7853; CHECK: ldumaxl x{{[0-9]+}}, x{{[1-9][0-9]*}}, [x[[ADDR]]]7854; CHECK-NOT: dmb7855 ret void7856}7857 7858define dso_local i8 @test_atomic_load_umax_i8_seq_cst(i8 %offset) nounwind {7859; CHECK-LABEL: test_atomic_load_umax_i8_seq_cst:7860; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_seq_cst:7861; OUTLINE-ATOMICS: // %bb.0:7862; OUTLINE-ATOMICS-NEXT: adrp x8, var87863; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var87864; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff7865; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7866; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17867; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]7868; OUTLINE-ATOMICS-NEXT: cmp w0, w97869; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi7870; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]7871; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7872; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7873; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x07874; OUTLINE-ATOMICS-NEXT: ret7875 %old = atomicrmw umax ptr @var8, i8 %offset seq_cst7876; CHECK-NOT: dmb7877; CHECK: adrp [[TMPADDR:x[0-9]+]], var87878; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var87879 7880; CHECK: ldumaxalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7881; CHECK-NOT: dmb7882 7883 ret i8 %old7884}7885 7886define dso_local i16 @test_atomic_load_umax_i16_seq_cst(i16 %offset) nounwind {7887; CHECK-LABEL: test_atomic_load_umax_i16_seq_cst:7888; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_seq_cst:7889; OUTLINE-ATOMICS: // %bb.0:7890; OUTLINE-ATOMICS-NEXT: adrp x8, var167891; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var167892; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff7893; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7894; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17895; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]7896; OUTLINE-ATOMICS-NEXT: cmp w0, w97897; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi7898; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]7899; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7900; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7901; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x07902; OUTLINE-ATOMICS-NEXT: ret7903 %old = atomicrmw umax ptr @var16, i16 %offset seq_cst7904; CHECK-NOT: dmb7905; CHECK: adrp [[TMPADDR:x[0-9]+]], var167906; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var167907 7908; CHECK: ldumaxalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7909; CHECK-NOT: dmb7910 7911 ret i16 %old7912}7913 7914define dso_local i32 @test_atomic_load_umax_i32_seq_cst(i32 %offset) nounwind {7915; CHECK-LABEL: test_atomic_load_umax_i32_seq_cst:7916; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_seq_cst:7917; OUTLINE-ATOMICS: // %bb.0:7918; OUTLINE-ATOMICS-NEXT: adrp x9, var327919; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var327920; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7921; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17922; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]7923; OUTLINE-ATOMICS-NEXT: cmp w8, w07924; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi7925; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]7926; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7927; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7928; OUTLINE-ATOMICS-NEXT: mov w0, w87929; OUTLINE-ATOMICS-NEXT: ret7930 %old = atomicrmw umax ptr @var32, i32 %offset seq_cst7931; CHECK-NOT: dmb7932; CHECK: adrp [[TMPADDR:x[0-9]+]], var327933; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var327934 7935; CHECK: ldumaxal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]7936; CHECK-NOT: dmb7937 7938 ret i32 %old7939}7940 7941define dso_local i64 @test_atomic_load_umax_i64_seq_cst(i64 %offset) nounwind {7942; CHECK-LABEL: test_atomic_load_umax_i64_seq_cst:7943; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_seq_cst:7944; OUTLINE-ATOMICS: // %bb.0:7945; OUTLINE-ATOMICS-NEXT: adrp x9, var647946; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var647947; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7948; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17949; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]7950; OUTLINE-ATOMICS-NEXT: cmp x8, x07951; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi7952; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]7953; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]7954; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7955; OUTLINE-ATOMICS-NEXT: mov x0, x87956; OUTLINE-ATOMICS-NEXT: ret7957 %old = atomicrmw umax ptr @var64, i64 %offset seq_cst7958; CHECK-NOT: dmb7959; CHECK: adrp [[TMPADDR:x[0-9]+]], var647960; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var647961 7962; CHECK: ldumaxal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]7963; CHECK-NOT: dmb7964 7965 ret i64 %old7966}7967 7968define dso_local void @test_atomic_load_umax_i32_noret_seq_cst(i32 %offset) nounwind {7969; CHECK-LABEL: test_atomic_load_umax_i32_noret_seq_cst:7970; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_seq_cst:7971; OUTLINE-ATOMICS: // %bb.0:7972; OUTLINE-ATOMICS-NEXT: adrp x8, var327973; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var327974; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start7975; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=17976; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]7977; OUTLINE-ATOMICS-NEXT: cmp w9, w07978; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi7979; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]7980; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]7981; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end7982; OUTLINE-ATOMICS-NEXT: ret7983 atomicrmw umax ptr @var32, i32 %offset seq_cst7984; CHECK-NOT: dmb7985; CHECK: adrp [[TMPADDR:x[0-9]+]], var327986; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var327987 7988; CHECK: ldumaxal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]7989; CHECK-NOT: dmb7990 ret void7991}7992 7993define dso_local void @test_atomic_load_umax_i64_noret_seq_cst(i64 %offset) nounwind {7994; CHECK-LABEL: test_atomic_load_umax_i64_noret_seq_cst:7995; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_seq_cst:7996; OUTLINE-ATOMICS: // %bb.0:7997; OUTLINE-ATOMICS-NEXT: adrp x8, var647998; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var647999; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8000; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18001; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]8002; OUTLINE-ATOMICS-NEXT: cmp x9, x08003; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi8004; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]8005; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]8006; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8007; OUTLINE-ATOMICS-NEXT: ret8008 atomicrmw umax ptr @var64, i64 %offset seq_cst8009; CHECK-NOT: dmb8010; CHECK: adrp [[TMPADDR:x[0-9]+]], var648011; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var648012 8013; CHECK: ldumaxal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]8014; CHECK-NOT: dmb8015 ret void8016}8017 8018define dso_local i8 @test_atomic_load_umin_i8_acq_rel(i8 %offset) nounwind {8019; CHECK-LABEL: test_atomic_load_umin_i8_acq_rel:8020; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_acq_rel:8021; OUTLINE-ATOMICS: // %bb.0:8022; OUTLINE-ATOMICS-NEXT: adrp x8, var88023; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var88024; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff8025; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8026; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18027; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]8028; OUTLINE-ATOMICS-NEXT: cmp w0, w98029; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls8030; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]8031; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8032; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8033; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x08034; OUTLINE-ATOMICS-NEXT: ret8035 %old = atomicrmw umin ptr @var8, i8 %offset acq_rel8036; CHECK-NOT: dmb8037; CHECK: adrp [[TMPADDR:x[0-9]+]], var88038; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var88039 8040; CHECK: lduminalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8041; CHECK-NOT: dmb8042 8043 ret i8 %old8044}8045 8046define dso_local i16 @test_atomic_load_umin_i16_acq_rel(i16 %offset) nounwind {8047; CHECK-LABEL: test_atomic_load_umin_i16_acq_rel:8048; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_acq_rel:8049; OUTLINE-ATOMICS: // %bb.0:8050; OUTLINE-ATOMICS-NEXT: adrp x8, var168051; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var168052; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff8053; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8054; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18055; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]8056; OUTLINE-ATOMICS-NEXT: cmp w0, w98057; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls8058; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]8059; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8060; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8061; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x08062; OUTLINE-ATOMICS-NEXT: ret8063 %old = atomicrmw umin ptr @var16, i16 %offset acq_rel8064; CHECK-NOT: dmb8065; CHECK: adrp [[TMPADDR:x[0-9]+]], var168066; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var168067 8068; CHECK: lduminalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8069; CHECK-NOT: dmb8070 8071 ret i16 %old8072}8073 8074define dso_local i32 @test_atomic_load_umin_i32_acq_rel(i32 %offset) nounwind {8075; CHECK-LABEL: test_atomic_load_umin_i32_acq_rel:8076; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_acq_rel:8077; OUTLINE-ATOMICS: // %bb.0:8078; OUTLINE-ATOMICS-NEXT: adrp x9, var328079; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var328080; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8081; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18082; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]8083; OUTLINE-ATOMICS-NEXT: cmp w8, w08084; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls8085; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]8086; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8087; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8088; OUTLINE-ATOMICS-NEXT: mov w0, w88089; OUTLINE-ATOMICS-NEXT: ret8090 %old = atomicrmw umin ptr @var32, i32 %offset acq_rel8091; CHECK-NOT: dmb8092; CHECK: adrp [[TMPADDR:x[0-9]+]], var328093; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var328094 8095; CHECK: lduminal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8096; CHECK-NOT: dmb8097 8098 ret i32 %old8099}8100 8101define dso_local i64 @test_atomic_load_umin_i64_acq_rel(i64 %offset) nounwind {8102; CHECK-LABEL: test_atomic_load_umin_i64_acq_rel:8103; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_acq_rel:8104; OUTLINE-ATOMICS: // %bb.0:8105; OUTLINE-ATOMICS-NEXT: adrp x9, var648106; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var648107; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8108; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18109; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]8110; OUTLINE-ATOMICS-NEXT: cmp x8, x08111; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls8112; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]8113; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8114; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8115; OUTLINE-ATOMICS-NEXT: mov x0, x88116; OUTLINE-ATOMICS-NEXT: ret8117 %old = atomicrmw umin ptr @var64, i64 %offset acq_rel8118; CHECK-NOT: dmb8119; CHECK: adrp [[TMPADDR:x[0-9]+]], var648120; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var648121 8122; CHECK: lduminal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]8123; CHECK-NOT: dmb8124 8125 ret i64 %old8126}8127 8128define dso_local void @test_atomic_load_umin_i32_noret_acq_rel(i32 %offset) nounwind {8129; CHECK-LABEL: test_atomic_load_umin_i32_noret_acq_rel:8130; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_acq_rel:8131; OUTLINE-ATOMICS: // %bb.0:8132; OUTLINE-ATOMICS-NEXT: adrp x8, var328133; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var328134; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8135; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18136; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]8137; OUTLINE-ATOMICS-NEXT: cmp w9, w08138; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls8139; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]8140; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]8141; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8142; OUTLINE-ATOMICS-NEXT: ret8143 atomicrmw umin ptr @var32, i32 %offset acq_rel8144; CHECK-NOT: dmb8145; CHECK: adrp [[TMPADDR:x[0-9]+]], var328146; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var328147 8148; CHECK: lduminal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]8149; CHECK-NOT: dmb8150 ret void8151}8152 8153define dso_local void @test_atomic_load_umin_i64_noret_acq_rel(i64 %offset) nounwind {8154; CHECK-LABEL: test_atomic_load_umin_i64_noret_acq_rel:8155; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_acq_rel:8156; OUTLINE-ATOMICS: // %bb.0:8157; OUTLINE-ATOMICS-NEXT: adrp x8, var648158; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var648159; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8160; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18161; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]8162; OUTLINE-ATOMICS-NEXT: cmp x9, x08163; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls8164; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]8165; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]8166; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8167; OUTLINE-ATOMICS-NEXT: ret8168 atomicrmw umin ptr @var64, i64 %offset acq_rel8169; CHECK-NOT: dmb8170; CHECK: adrp [[TMPADDR:x[0-9]+]], var648171; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var648172 8173; CHECK: lduminal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]8174; CHECK-NOT: dmb8175 ret void8176}8177 8178define dso_local i8 @test_atomic_load_umin_i8_acquire(i8 %offset) nounwind {8179; CHECK-LABEL: test_atomic_load_umin_i8_acquire:8180; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_acquire:8181; OUTLINE-ATOMICS: // %bb.0:8182; OUTLINE-ATOMICS-NEXT: adrp x8, var88183; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var88184; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff8185; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8186; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18187; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]8188; OUTLINE-ATOMICS-NEXT: cmp w0, w98189; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls8190; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x8]8191; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8192; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8193; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x08194; OUTLINE-ATOMICS-NEXT: ret8195 %old = atomicrmw umin ptr @var8, i8 %offset acquire8196; CHECK-NOT: dmb8197; CHECK: adrp [[TMPADDR:x[0-9]+]], var88198; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var88199 8200; CHECK: lduminab w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8201; CHECK-NOT: dmb8202 8203 ret i8 %old8204}8205 8206define dso_local i16 @test_atomic_load_umin_i16_acquire(i16 %offset) nounwind {8207; CHECK-LABEL: test_atomic_load_umin_i16_acquire:8208; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_acquire:8209; OUTLINE-ATOMICS: // %bb.0:8210; OUTLINE-ATOMICS-NEXT: adrp x8, var168211; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var168212; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff8213; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8214; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18215; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]8216; OUTLINE-ATOMICS-NEXT: cmp w0, w98217; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls8218; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x8]8219; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8220; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8221; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x08222; OUTLINE-ATOMICS-NEXT: ret8223 %old = atomicrmw umin ptr @var16, i16 %offset acquire8224; CHECK-NOT: dmb8225; CHECK: adrp [[TMPADDR:x[0-9]+]], var168226; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var168227 8228; CHECK: lduminah w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8229; CHECK-NOT: dmb8230 8231 ret i16 %old8232}8233 8234define dso_local i32 @test_atomic_load_umin_i32_acquire(i32 %offset) nounwind {8235; CHECK-LABEL: test_atomic_load_umin_i32_acquire:8236; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_acquire:8237; OUTLINE-ATOMICS: // %bb.0:8238; OUTLINE-ATOMICS-NEXT: adrp x9, var328239; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var328240; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8241; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18242; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]8243; OUTLINE-ATOMICS-NEXT: cmp w8, w08244; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls8245; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]8246; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8247; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8248; OUTLINE-ATOMICS-NEXT: mov w0, w88249; OUTLINE-ATOMICS-NEXT: ret8250 %old = atomicrmw umin ptr @var32, i32 %offset acquire8251; CHECK-NOT: dmb8252; CHECK: adrp [[TMPADDR:x[0-9]+]], var328253; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var328254 8255; CHECK: ldumina w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8256; CHECK-NOT: dmb8257 8258 ret i32 %old8259}8260 8261define dso_local i64 @test_atomic_load_umin_i64_acquire(i64 %offset) nounwind {8262; CHECK-LABEL: test_atomic_load_umin_i64_acquire:8263; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_acquire:8264; OUTLINE-ATOMICS: // %bb.0:8265; OUTLINE-ATOMICS-NEXT: adrp x9, var648266; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var648267; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8268; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18269; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]8270; OUTLINE-ATOMICS-NEXT: cmp x8, x08271; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls8272; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]8273; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8274; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8275; OUTLINE-ATOMICS-NEXT: mov x0, x88276; OUTLINE-ATOMICS-NEXT: ret8277 %old = atomicrmw umin ptr @var64, i64 %offset acquire8278; CHECK-NOT: dmb8279; CHECK: adrp [[TMPADDR:x[0-9]+]], var648280; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var648281 8282; CHECK: ldumina x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]8283; CHECK-NOT: dmb8284 8285 ret i64 %old8286}8287 8288define dso_local void @test_atomic_load_umin_i32_noret_acquire(i32 %offset) nounwind {8289; CHECK-LABEL: test_atomic_load_umin_i32_noret_acquire:8290; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_acquire:8291; OUTLINE-ATOMICS: // %bb.0:8292; OUTLINE-ATOMICS-NEXT: adrp x8, var328293; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var328294; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8295; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18296; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]8297; OUTLINE-ATOMICS-NEXT: cmp w9, w08298; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls8299; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]8300; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]8301; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8302; OUTLINE-ATOMICS-NEXT: ret8303 atomicrmw umin ptr @var32, i32 %offset acquire8304; CHECK-NOT: dmb8305; CHECK: adrp [[TMPADDR:x[0-9]+]], var328306; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var328307 8308; CHECK: ldumina w0, w[[NEW:[0-9]+]], [x[[ADDR]]]8309; CHECK-NOT: dmb8310 ret void8311}8312 8313define dso_local void @test_atomic_load_umin_i64_noret_acquire(i64 %offset) nounwind {8314; CHECK-LABEL: test_atomic_load_umin_i64_noret_acquire:8315; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_acquire:8316; OUTLINE-ATOMICS: // %bb.0:8317; OUTLINE-ATOMICS-NEXT: adrp x8, var648318; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var648319; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8320; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18321; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]8322; OUTLINE-ATOMICS-NEXT: cmp x9, x08323; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls8324; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]8325; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]8326; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8327; OUTLINE-ATOMICS-NEXT: ret8328 atomicrmw umin ptr @var64, i64 %offset acquire8329; CHECK-NOT: dmb8330; CHECK: adrp [[TMPADDR:x[0-9]+]], var648331; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var648332 8333; CHECK: ldumina x0, x[[NEW:[0-9]+]], [x[[ADDR]]]8334; CHECK-NOT: dmb8335 ret void8336}8337 8338define dso_local i8 @test_atomic_load_umin_i8_monotonic(i8 %offset) nounwind {8339; CHECK-LABEL: test_atomic_load_umin_i8_monotonic:8340; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_monotonic:8341; OUTLINE-ATOMICS: // %bb.0:8342; OUTLINE-ATOMICS-NEXT: adrp x8, var88343; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var88344; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff8345; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8346; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18347; OUTLINE-ATOMICS-NEXT: ldxrb w0, [x8]8348; OUTLINE-ATOMICS-NEXT: cmp w0, w98349; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls8350; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x8]8351; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8352; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8353; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x08354; OUTLINE-ATOMICS-NEXT: ret8355 %old = atomicrmw umin ptr @var8, i8 %offset monotonic8356; CHECK-NOT: dmb8357; CHECK: adrp [[TMPADDR:x[0-9]+]], var88358; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var88359 8360; CHECK: lduminb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8361; CHECK-NOT: dmb8362 8363 ret i8 %old8364}8365 8366define dso_local i16 @test_atomic_load_umin_i16_monotonic(i16 %offset) nounwind {8367; CHECK-LABEL: test_atomic_load_umin_i16_monotonic:8368; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_monotonic:8369; OUTLINE-ATOMICS: // %bb.0:8370; OUTLINE-ATOMICS-NEXT: adrp x8, var168371; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var168372; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff8373; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8374; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18375; OUTLINE-ATOMICS-NEXT: ldxrh w0, [x8]8376; OUTLINE-ATOMICS-NEXT: cmp w0, w98377; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls8378; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x8]8379; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8380; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8381; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x08382; OUTLINE-ATOMICS-NEXT: ret8383 %old = atomicrmw umin ptr @var16, i16 %offset monotonic8384; CHECK-NOT: dmb8385; CHECK: adrp [[TMPADDR:x[0-9]+]], var168386; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var168387 8388; CHECK: lduminh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8389; CHECK-NOT: dmb8390 8391 ret i16 %old8392}8393 8394define dso_local i32 @test_atomic_load_umin_i32_monotonic(i32 %offset) nounwind {8395; CHECK-LABEL: test_atomic_load_umin_i32_monotonic:8396; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_monotonic:8397; OUTLINE-ATOMICS: // %bb.0:8398; OUTLINE-ATOMICS-NEXT: adrp x9, var328399; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var328400; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8401; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18402; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]8403; OUTLINE-ATOMICS-NEXT: cmp w8, w08404; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls8405; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]8406; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8407; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8408; OUTLINE-ATOMICS-NEXT: mov w0, w88409; OUTLINE-ATOMICS-NEXT: ret8410 %old = atomicrmw umin ptr @var32, i32 %offset monotonic8411; CHECK-NOT: dmb8412; CHECK: adrp [[TMPADDR:x[0-9]+]], var328413; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var328414 8415; CHECK: ldumin w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8416; CHECK-NOT: dmb8417 8418 ret i32 %old8419}8420 8421define dso_local i64 @test_atomic_load_umin_i64_monotonic(i64 %offset) nounwind {8422; CHECK-LABEL: test_atomic_load_umin_i64_monotonic:8423; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_monotonic:8424; OUTLINE-ATOMICS: // %bb.0:8425; OUTLINE-ATOMICS-NEXT: adrp x9, var648426; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var648427; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8428; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18429; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]8430; OUTLINE-ATOMICS-NEXT: cmp x8, x08431; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls8432; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]8433; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8434; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8435; OUTLINE-ATOMICS-NEXT: mov x0, x88436; OUTLINE-ATOMICS-NEXT: ret8437 %old = atomicrmw umin ptr @var64, i64 %offset monotonic8438; CHECK-NOT: dmb8439; CHECK: adrp [[TMPADDR:x[0-9]+]], var648440; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var648441 8442; CHECK: ldumin x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]8443; CHECK-NOT: dmb8444 8445 ret i64 %old8446}8447 8448define dso_local void @test_atomic_load_umin_i32_noret_monotonic(i32 %offset) nounwind {8449; CHECK-LABEL: test_atomic_load_umin_i32_noret_monotonic:8450; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_monotonic:8451; OUTLINE-ATOMICS: // %bb.0:8452; OUTLINE-ATOMICS-NEXT: adrp x8, var328453; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var328454; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8455; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18456; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]8457; OUTLINE-ATOMICS-NEXT: cmp w9, w08458; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls8459; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]8460; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]8461; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8462; OUTLINE-ATOMICS-NEXT: ret8463 atomicrmw umin ptr @var32, i32 %offset monotonic8464; CHECK-NOT: dmb8465; CHECK: adrp [[TMPADDR:x[0-9]+]], var328466; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var328467 8468; CHECK: ldumin w{{[0-9]+}}, w{{[1-9][0-9]*}}, [x[[ADDR]]]8469; CHECK-NOT: dmb8470 ret void8471}8472 8473define dso_local void @test_atomic_load_umin_i64_noret_monotonic(i64 %offset) nounwind {8474; CHECK-LABEL: test_atomic_load_umin_i64_noret_monotonic:8475; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_monotonic:8476; OUTLINE-ATOMICS: // %bb.0:8477; OUTLINE-ATOMICS-NEXT: adrp x8, var648478; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var648479; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8480; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18481; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]8482; OUTLINE-ATOMICS-NEXT: cmp x9, x08483; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls8484; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]8485; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]8486; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8487; OUTLINE-ATOMICS-NEXT: ret8488 atomicrmw umin ptr @var64, i64 %offset monotonic8489; CHECK-NOT: dmb8490; CHECK: adrp [[TMPADDR:x[0-9]+]], var648491; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var648492 8493; CHECK: ldumin x{{[0-9]+}}, x{{[1-9][0-9]*}}, [x[[ADDR]]]8494; CHECK-NOT: dmb8495 ret void8496}8497 8498define dso_local i8 @test_atomic_load_umin_i8_release(i8 %offset) nounwind {8499; CHECK-LABEL: test_atomic_load_umin_i8_release:8500; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_release:8501; OUTLINE-ATOMICS: // %bb.0:8502; OUTLINE-ATOMICS-NEXT: adrp x8, var88503; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var88504; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff8505; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8506; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18507; OUTLINE-ATOMICS-NEXT: ldxrb w0, [x8]8508; OUTLINE-ATOMICS-NEXT: cmp w0, w98509; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls8510; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]8511; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8512; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8513; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x08514; OUTLINE-ATOMICS-NEXT: ret8515 %old = atomicrmw umin ptr @var8, i8 %offset release8516; CHECK-NOT: dmb8517; CHECK: adrp [[TMPADDR:x[0-9]+]], var88518; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var88519 8520; CHECK: lduminlb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8521; CHECK-NOT: dmb8522 8523 ret i8 %old8524}8525 8526define dso_local i16 @test_atomic_load_umin_i16_release(i16 %offset) nounwind {8527; CHECK-LABEL: test_atomic_load_umin_i16_release:8528; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_release:8529; OUTLINE-ATOMICS: // %bb.0:8530; OUTLINE-ATOMICS-NEXT: adrp x8, var168531; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var168532; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff8533; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8534; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18535; OUTLINE-ATOMICS-NEXT: ldxrh w0, [x8]8536; OUTLINE-ATOMICS-NEXT: cmp w0, w98537; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls8538; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]8539; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8540; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8541; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x08542; OUTLINE-ATOMICS-NEXT: ret8543 %old = atomicrmw umin ptr @var16, i16 %offset release8544; CHECK-NOT: dmb8545; CHECK: adrp [[TMPADDR:x[0-9]+]], var168546; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var168547 8548; CHECK: lduminlh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8549; CHECK-NOT: dmb8550 8551 ret i16 %old8552}8553 8554define dso_local i32 @test_atomic_load_umin_i32_release(i32 %offset) nounwind {8555; CHECK-LABEL: test_atomic_load_umin_i32_release:8556; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_release:8557; OUTLINE-ATOMICS: // %bb.0:8558; OUTLINE-ATOMICS-NEXT: adrp x9, var328559; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var328560; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8561; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18562; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]8563; OUTLINE-ATOMICS-NEXT: cmp w8, w08564; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls8565; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]8566; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8567; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8568; OUTLINE-ATOMICS-NEXT: mov w0, w88569; OUTLINE-ATOMICS-NEXT: ret8570 %old = atomicrmw umin ptr @var32, i32 %offset release8571; CHECK-NOT: dmb8572; CHECK: adrp [[TMPADDR:x[0-9]+]], var328573; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var328574 8575; CHECK: lduminl w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8576; CHECK-NOT: dmb8577 8578 ret i32 %old8579}8580 8581define dso_local i64 @test_atomic_load_umin_i64_release(i64 %offset) nounwind {8582; CHECK-LABEL: test_atomic_load_umin_i64_release:8583; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_release:8584; OUTLINE-ATOMICS: // %bb.0:8585; OUTLINE-ATOMICS-NEXT: adrp x9, var648586; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var648587; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8588; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18589; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]8590; OUTLINE-ATOMICS-NEXT: cmp x8, x08591; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls8592; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]8593; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8594; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8595; OUTLINE-ATOMICS-NEXT: mov x0, x88596; OUTLINE-ATOMICS-NEXT: ret8597 %old = atomicrmw umin ptr @var64, i64 %offset release8598; CHECK-NOT: dmb8599; CHECK: adrp [[TMPADDR:x[0-9]+]], var648600; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var648601 8602; CHECK: lduminl x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]8603; CHECK-NOT: dmb8604 8605 ret i64 %old8606}8607 8608define dso_local void @test_atomic_load_umin_i32_noret_release(i32 %offset) nounwind {8609; CHECK-LABEL: test_atomic_load_umin_i32_noret_release:8610; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_release:8611; OUTLINE-ATOMICS: // %bb.0:8612; OUTLINE-ATOMICS-NEXT: adrp x8, var328613; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var328614; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8615; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18616; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]8617; OUTLINE-ATOMICS-NEXT: cmp w9, w08618; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls8619; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]8620; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]8621; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8622; OUTLINE-ATOMICS-NEXT: ret8623 atomicrmw umin ptr @var32, i32 %offset release8624; CHECK-NOT: dmb8625; CHECK: adrp [[TMPADDR:x[0-9]+]], var328626; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var328627 8628; CHECK: lduminl w{{[0-9]+}}, w{{[1-9][0-9]*}}, [x[[ADDR]]]8629; CHECK-NOT: dmb8630 ret void8631}8632 8633define dso_local void @test_atomic_load_umin_i64_noret_release(i64 %offset) nounwind {8634; CHECK-LABEL: test_atomic_load_umin_i64_noret_release:8635; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_release:8636; OUTLINE-ATOMICS: // %bb.0:8637; OUTLINE-ATOMICS-NEXT: adrp x8, var648638; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var648639; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8640; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18641; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]8642; OUTLINE-ATOMICS-NEXT: cmp x9, x08643; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls8644; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]8645; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]8646; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8647; OUTLINE-ATOMICS-NEXT: ret8648 atomicrmw umin ptr @var64, i64 %offset release8649; CHECK-NOT: dmb8650; CHECK: adrp [[TMPADDR:x[0-9]+]], var648651; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var648652 8653; CHECK: lduminl x{{[0-9]+}}, x{{[1-9][0-9]*}}, [x[[ADDR]]]8654; CHECK-NOT: dmb8655 ret void8656}8657 8658define dso_local i8 @test_atomic_load_umin_i8_seq_cst(i8 %offset) nounwind {8659; CHECK-LABEL: test_atomic_load_umin_i8_seq_cst:8660; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_seq_cst:8661; OUTLINE-ATOMICS: // %bb.0:8662; OUTLINE-ATOMICS-NEXT: adrp x8, var88663; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var88664; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff8665; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8666; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18667; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]8668; OUTLINE-ATOMICS-NEXT: cmp w0, w98669; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls8670; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]8671; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8672; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8673; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x08674; OUTLINE-ATOMICS-NEXT: ret8675 %old = atomicrmw umin ptr @var8, i8 %offset seq_cst8676; CHECK-NOT: dmb8677; CHECK: adrp [[TMPADDR:x[0-9]+]], var88678; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var88679 8680; CHECK: lduminalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8681; CHECK-NOT: dmb8682 8683 ret i8 %old8684}8685 8686define dso_local i16 @test_atomic_load_umin_i16_seq_cst(i16 %offset) nounwind {8687; CHECK-LABEL: test_atomic_load_umin_i16_seq_cst:8688; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_seq_cst:8689; OUTLINE-ATOMICS: // %bb.0:8690; OUTLINE-ATOMICS-NEXT: adrp x8, var168691; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var168692; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff8693; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8694; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18695; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]8696; OUTLINE-ATOMICS-NEXT: cmp w0, w98697; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls8698; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]8699; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8700; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8701; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x08702; OUTLINE-ATOMICS-NEXT: ret8703 %old = atomicrmw umin ptr @var16, i16 %offset seq_cst8704; CHECK-NOT: dmb8705; CHECK: adrp [[TMPADDR:x[0-9]+]], var168706; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var168707 8708; CHECK: lduminalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8709; CHECK-NOT: dmb8710 8711 ret i16 %old8712}8713 8714define dso_local i32 @test_atomic_load_umin_i32_seq_cst(i32 %offset) nounwind {8715; CHECK-LABEL: test_atomic_load_umin_i32_seq_cst:8716; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_seq_cst:8717; OUTLINE-ATOMICS: // %bb.0:8718; OUTLINE-ATOMICS-NEXT: adrp x9, var328719; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var328720; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8721; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18722; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]8723; OUTLINE-ATOMICS-NEXT: cmp w8, w08724; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls8725; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]8726; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8727; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8728; OUTLINE-ATOMICS-NEXT: mov w0, w88729; OUTLINE-ATOMICS-NEXT: ret8730 %old = atomicrmw umin ptr @var32, i32 %offset seq_cst8731; CHECK-NOT: dmb8732; CHECK: adrp [[TMPADDR:x[0-9]+]], var328733; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var328734 8735; CHECK: lduminal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8736; CHECK-NOT: dmb8737 8738 ret i32 %old8739}8740 8741define dso_local i64 @test_atomic_load_umin_i64_seq_cst(i64 %offset) nounwind {8742; CHECK-LABEL: test_atomic_load_umin_i64_seq_cst:8743; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_seq_cst:8744; OUTLINE-ATOMICS: // %bb.0:8745; OUTLINE-ATOMICS-NEXT: adrp x9, var648746; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var648747; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8748; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18749; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]8750; OUTLINE-ATOMICS-NEXT: cmp x8, x08751; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls8752; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]8753; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB[[LOOPSTART]]8754; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8755; OUTLINE-ATOMICS-NEXT: mov x0, x88756; OUTLINE-ATOMICS-NEXT: ret8757 %old = atomicrmw umin ptr @var64, i64 %offset seq_cst8758; CHECK-NOT: dmb8759; CHECK: adrp [[TMPADDR:x[0-9]+]], var648760; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var648761 8762; CHECK: lduminal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]8763; CHECK-NOT: dmb8764 8765 ret i64 %old8766}8767 8768define dso_local void @test_atomic_load_umin_i32_noret_seq_cst(i32 %offset) nounwind {8769; CHECK-LABEL: test_atomic_load_umin_i32_noret_seq_cst:8770; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_seq_cst:8771; OUTLINE-ATOMICS: // %bb.0:8772; OUTLINE-ATOMICS-NEXT: adrp x8, var328773; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var328774; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8775; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18776; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]8777; OUTLINE-ATOMICS-NEXT: cmp w9, w08778; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls8779; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]8780; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]8781; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8782; OUTLINE-ATOMICS-NEXT: ret8783 atomicrmw umin ptr @var32, i32 %offset seq_cst8784; CHECK-NOT: dmb8785; CHECK: adrp [[TMPADDR:x[0-9]+]], var328786; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var328787 8788; CHECK: lduminal w0, w[[NEW:[0-9]+]], [x[[ADDR]]]8789; CHECK-NOT: dmb8790 ret void8791}8792 8793define dso_local void @test_atomic_load_umin_i64_noret_seq_cst(i64 %offset) nounwind {8794; CHECK-LABEL: test_atomic_load_umin_i64_noret_seq_cst:8795; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_seq_cst:8796; OUTLINE-ATOMICS: // %bb.0:8797; OUTLINE-ATOMICS-NEXT: adrp x8, var648798; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var648799; OUTLINE-ATOMICS-NEXT: .LBB[[LOOPSTART:.*]]: // %atomicrmw.start8800; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=18801; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]8802; OUTLINE-ATOMICS-NEXT: cmp x9, x08803; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls8804; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]8805; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB[[LOOPSTART]]8806; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end8807; OUTLINE-ATOMICS-NEXT: ret8808 atomicrmw umin ptr @var64, i64 %offset seq_cst8809; CHECK-NOT: dmb8810; CHECK: adrp [[TMPADDR:x[0-9]+]], var648811; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var648812 8813; CHECK: lduminal x0, x[[NEW:[0-9]+]], [x[[ADDR]]]8814; CHECK-NOT: dmb8815 ret void8816}8817 8818define dso_local i8 @test_atomic_load_xor_i8_acq_rel(i8 %offset) nounwind {8819; CHECK-LABEL: test_atomic_load_xor_i8_acq_rel:8820; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_acq_rel:8821; OUTLINE-ATOMICS: // %bb.0:8822; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill8823; OUTLINE-ATOMICS-NEXT: adrp x1, var88824; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var88825; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_acq_rel8826; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload8827; OUTLINE-ATOMICS-NEXT: ret8828 %old = atomicrmw xor ptr @var8, i8 %offset acq_rel8829; CHECK-NOT: dmb8830; CHECK: adrp [[TMPADDR:x[0-9]+]], var88831; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var88832 8833; CHECK: ldeoralb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8834; CHECK-NOT: dmb8835 8836 ret i8 %old8837}8838 8839define dso_local i16 @test_atomic_load_xor_i16_acq_rel(i16 %offset) nounwind {8840; CHECK-LABEL: test_atomic_load_xor_i16_acq_rel:8841; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_acq_rel:8842; OUTLINE-ATOMICS: // %bb.0:8843; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill8844; OUTLINE-ATOMICS-NEXT: adrp x1, var168845; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var168846; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_acq_rel8847; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload8848; OUTLINE-ATOMICS-NEXT: ret8849 %old = atomicrmw xor ptr @var16, i16 %offset acq_rel8850; CHECK-NOT: dmb8851; CHECK: adrp [[TMPADDR:x[0-9]+]], var168852; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var168853 8854; CHECK: ldeoralh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8855; CHECK-NOT: dmb8856 8857 ret i16 %old8858}8859 8860define dso_local i32 @test_atomic_load_xor_i32_acq_rel(i32 %offset) nounwind {8861; CHECK-LABEL: test_atomic_load_xor_i32_acq_rel:8862; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_acq_rel:8863; OUTLINE-ATOMICS: // %bb.0:8864; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill8865; OUTLINE-ATOMICS-NEXT: adrp x1, var328866; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var328867; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel8868; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload8869; OUTLINE-ATOMICS-NEXT: ret8870 %old = atomicrmw xor ptr @var32, i32 %offset acq_rel8871; CHECK-NOT: dmb8872; CHECK: adrp [[TMPADDR:x[0-9]+]], var328873; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var328874 8875; CHECK: ldeoral w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8876; CHECK-NOT: dmb8877 8878 ret i32 %old8879}8880 8881define dso_local i64 @test_atomic_load_xor_i64_acq_rel(i64 %offset) nounwind {8882; CHECK-LABEL: test_atomic_load_xor_i64_acq_rel:8883; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_acq_rel:8884; OUTLINE-ATOMICS: // %bb.0:8885; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill8886; OUTLINE-ATOMICS-NEXT: adrp x1, var648887; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var648888; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel8889; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload8890; OUTLINE-ATOMICS-NEXT: ret8891 %old = atomicrmw xor ptr @var64, i64 %offset acq_rel8892; CHECK-NOT: dmb8893; CHECK: adrp [[TMPADDR:x[0-9]+]], var648894; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var648895 8896; CHECK: ldeoral x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]8897; CHECK-NOT: dmb8898 8899 ret i64 %old8900}8901 8902define dso_local void @test_atomic_load_xor_i32_noret_acq_rel(i32 %offset) nounwind {8903; CHECK-LABEL: test_atomic_load_xor_i32_noret_acq_rel:8904; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_acq_rel:8905; OUTLINE-ATOMICS: // %bb.0:8906; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill8907; OUTLINE-ATOMICS-NEXT: adrp x1, var328908; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var328909; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel8910; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload8911; OUTLINE-ATOMICS-NEXT: ret8912 atomicrmw xor ptr @var32, i32 %offset acq_rel8913; CHECK-NOT: dmb8914; CHECK: adrp [[TMPADDR:x[0-9]+]], var328915; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var328916 8917; CHECK: ldeoral w0, w[[NEW:[0-9]+]], [x[[ADDR]]]8918; CHECK-NOT: dmb8919 ret void8920}8921 8922define dso_local void @test_atomic_load_xor_i64_noret_acq_rel(i64 %offset) nounwind {8923; CHECK-LABEL: test_atomic_load_xor_i64_noret_acq_rel:8924; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_acq_rel:8925; OUTLINE-ATOMICS: // %bb.0:8926; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill8927; OUTLINE-ATOMICS-NEXT: adrp x1, var648928; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var648929; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel8930; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload8931; OUTLINE-ATOMICS-NEXT: ret8932 atomicrmw xor ptr @var64, i64 %offset acq_rel8933; CHECK-NOT: dmb8934; CHECK: adrp [[TMPADDR:x[0-9]+]], var648935; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var648936 8937; CHECK: ldeoral x0, x[[NEW:[0-9]+]], [x[[ADDR]]]8938; CHECK-NOT: dmb8939 ret void8940}8941 8942define dso_local i8 @test_atomic_load_xor_i8_acquire(i8 %offset) nounwind {8943; CHECK-LABEL: test_atomic_load_xor_i8_acquire:8944; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_acquire:8945; OUTLINE-ATOMICS: // %bb.0:8946; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill8947; OUTLINE-ATOMICS-NEXT: adrp x1, var88948; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var88949; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_acq8950; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload8951; OUTLINE-ATOMICS-NEXT: ret8952 %old = atomicrmw xor ptr @var8, i8 %offset acquire8953; CHECK-NOT: dmb8954; CHECK: adrp [[TMPADDR:x[0-9]+]], var88955; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var88956 8957; CHECK: ldeorab w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8958; CHECK-NOT: dmb8959 8960 ret i8 %old8961}8962 8963define dso_local i16 @test_atomic_load_xor_i16_acquire(i16 %offset) nounwind {8964; CHECK-LABEL: test_atomic_load_xor_i16_acquire:8965; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_acquire:8966; OUTLINE-ATOMICS: // %bb.0:8967; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill8968; OUTLINE-ATOMICS-NEXT: adrp x1, var168969; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var168970; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_acq8971; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload8972; OUTLINE-ATOMICS-NEXT: ret8973 %old = atomicrmw xor ptr @var16, i16 %offset acquire8974; CHECK-NOT: dmb8975; CHECK: adrp [[TMPADDR:x[0-9]+]], var168976; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var168977 8978; CHECK: ldeorah w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]8979; CHECK-NOT: dmb8980 8981 ret i16 %old8982}8983 8984define dso_local i32 @test_atomic_load_xor_i32_acquire(i32 %offset) nounwind {8985; CHECK-LABEL: test_atomic_load_xor_i32_acquire:8986; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_acquire:8987; OUTLINE-ATOMICS: // %bb.0:8988; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill8989; OUTLINE-ATOMICS-NEXT: adrp x1, var328990; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var328991; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq8992; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload8993; OUTLINE-ATOMICS-NEXT: ret8994 %old = atomicrmw xor ptr @var32, i32 %offset acquire8995; CHECK-NOT: dmb8996; CHECK: adrp [[TMPADDR:x[0-9]+]], var328997; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var328998 8999; CHECK: ldeora w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]9000; CHECK-NOT: dmb9001 9002 ret i32 %old9003}9004 9005define dso_local i64 @test_atomic_load_xor_i64_acquire(i64 %offset) nounwind {9006; CHECK-LABEL: test_atomic_load_xor_i64_acquire:9007; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_acquire:9008; OUTLINE-ATOMICS: // %bb.0:9009; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9010; OUTLINE-ATOMICS-NEXT: adrp x1, var649011; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var649012; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq9013; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9014; OUTLINE-ATOMICS-NEXT: ret9015 %old = atomicrmw xor ptr @var64, i64 %offset acquire9016; CHECK-NOT: dmb9017; CHECK: adrp [[TMPADDR:x[0-9]+]], var649018; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var649019 9020; CHECK: ldeora x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]9021; CHECK-NOT: dmb9022 9023 ret i64 %old9024}9025 9026define dso_local void @test_atomic_load_xor_i32_noret_acquire(i32 %offset) nounwind {9027; CHECK-LABEL: test_atomic_load_xor_i32_noret_acquire:9028; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_acquire:9029; OUTLINE-ATOMICS: // %bb.0:9030; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9031; OUTLINE-ATOMICS-NEXT: adrp x1, var329032; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var329033; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq9034; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9035; OUTLINE-ATOMICS-NEXT: ret9036 atomicrmw xor ptr @var32, i32 %offset acquire9037; CHECK-NOT: dmb9038; CHECK: adrp [[TMPADDR:x[0-9]+]], var329039; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var329040 9041; CHECK: ldeora w0, w[[NEW:[0-9]+]], [x[[ADDR]]]9042; CHECK-NOT: dmb9043 ret void9044}9045 9046define dso_local void @test_atomic_load_xor_i64_noret_acquire(i64 %offset) nounwind {9047; CHECK-LABEL: test_atomic_load_xor_i64_noret_acquire:9048; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_acquire:9049; OUTLINE-ATOMICS: // %bb.0:9050; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9051; OUTLINE-ATOMICS-NEXT: adrp x1, var649052; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var649053; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq9054; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9055; OUTLINE-ATOMICS-NEXT: ret9056 atomicrmw xor ptr @var64, i64 %offset acquire9057; CHECK-NOT: dmb9058; CHECK: adrp [[TMPADDR:x[0-9]+]], var649059; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var649060 9061; CHECK: ldeora x0, x[[NEW:[0-9]+]], [x[[ADDR]]]9062; CHECK-NOT: dmb9063 ret void9064}9065 9066define dso_local i8 @test_atomic_load_xor_i8_monotonic(i8 %offset) nounwind {9067; CHECK-LABEL: test_atomic_load_xor_i8_monotonic:9068; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_monotonic:9069; OUTLINE-ATOMICS: // %bb.0:9070; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9071; OUTLINE-ATOMICS-NEXT: adrp x1, var89072; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var89073; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_relax9074; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9075; OUTLINE-ATOMICS-NEXT: ret9076 %old = atomicrmw xor ptr @var8, i8 %offset monotonic9077; CHECK-NOT: dmb9078; CHECK: adrp [[TMPADDR:x[0-9]+]], var89079; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var89080 9081; CHECK: ldeorb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]9082; CHECK-NOT: dmb9083 9084 ret i8 %old9085}9086 9087define dso_local i16 @test_atomic_load_xor_i16_monotonic(i16 %offset) nounwind {9088; CHECK-LABEL: test_atomic_load_xor_i16_monotonic:9089; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_monotonic:9090; OUTLINE-ATOMICS: // %bb.0:9091; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9092; OUTLINE-ATOMICS-NEXT: adrp x1, var169093; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var169094; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_relax9095; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9096; OUTLINE-ATOMICS-NEXT: ret9097 %old = atomicrmw xor ptr @var16, i16 %offset monotonic9098; CHECK-NOT: dmb9099; CHECK: adrp [[TMPADDR:x[0-9]+]], var169100; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var169101 9102; CHECK: ldeorh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]9103; CHECK-NOT: dmb9104 9105 ret i16 %old9106}9107 9108define dso_local i32 @test_atomic_load_xor_i32_monotonic(i32 %offset) nounwind {9109; CHECK-LABEL: test_atomic_load_xor_i32_monotonic:9110; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_monotonic:9111; OUTLINE-ATOMICS: // %bb.0:9112; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9113; OUTLINE-ATOMICS-NEXT: adrp x1, var329114; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var329115; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_relax9116; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9117; OUTLINE-ATOMICS-NEXT: ret9118 %old = atomicrmw xor ptr @var32, i32 %offset monotonic9119; CHECK-NOT: dmb9120; CHECK: adrp [[TMPADDR:x[0-9]+]], var329121; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var329122 9123; CHECK: ldeor w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]9124; CHECK-NOT: dmb9125 9126 ret i32 %old9127}9128 9129define dso_local i64 @test_atomic_load_xor_i64_monotonic(i64 %offset) nounwind {9130; CHECK-LABEL: test_atomic_load_xor_i64_monotonic:9131; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_monotonic:9132; OUTLINE-ATOMICS: // %bb.0:9133; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9134; OUTLINE-ATOMICS-NEXT: adrp x1, var649135; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var649136; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_relax9137; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9138; OUTLINE-ATOMICS-NEXT: ret9139 %old = atomicrmw xor ptr @var64, i64 %offset monotonic9140; CHECK-NOT: dmb9141; CHECK: adrp [[TMPADDR:x[0-9]+]], var649142; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var649143 9144; CHECK: ldeor x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]9145; CHECK-NOT: dmb9146 9147 ret i64 %old9148}9149 9150define dso_local void @test_atomic_load_xor_i32_noret_monotonic(i32 %offset) nounwind {9151; CHECK-LABEL: test_atomic_load_xor_i32_noret_monotonic:9152; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_monotonic:9153; OUTLINE-ATOMICS: // %bb.0:9154; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9155; OUTLINE-ATOMICS-NEXT: adrp x1, var329156; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var329157; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_relax9158; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9159; OUTLINE-ATOMICS-NEXT: ret9160 atomicrmw xor ptr @var32, i32 %offset monotonic9161; CHECK-NOT: dmb9162; CHECK: adrp [[TMPADDR:x[0-9]+]], var329163; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var329164 9165; CHECK: ldeor w{{[0-9]+}}, w{{[1-9][0-9]*}}, [x[[ADDR]]]9166; CHECK-NOT: dmb9167 ret void9168}9169 9170define dso_local void @test_atomic_load_xor_i64_noret_monotonic(i64 %offset) nounwind {9171; CHECK-LABEL: test_atomic_load_xor_i64_noret_monotonic:9172; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_monotonic:9173; OUTLINE-ATOMICS: // %bb.0:9174; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9175; OUTLINE-ATOMICS-NEXT: adrp x1, var649176; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var649177; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_relax9178; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9179; OUTLINE-ATOMICS-NEXT: ret9180 atomicrmw xor ptr @var64, i64 %offset monotonic9181; CHECK-NOT: dmb9182; CHECK: adrp [[TMPADDR:x[0-9]+]], var649183; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var649184 9185; CHECK: ldeor x{{[0-9]+}}, x{{[1-9][0-9]*}}, [x[[ADDR]]]9186; CHECK-NOT: dmb9187 ret void9188}9189 9190define dso_local i8 @test_atomic_load_xor_i8_release(i8 %offset) nounwind {9191; CHECK-LABEL: test_atomic_load_xor_i8_release:9192; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_release:9193; OUTLINE-ATOMICS: // %bb.0:9194; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9195; OUTLINE-ATOMICS-NEXT: adrp x1, var89196; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var89197; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_rel9198; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9199; OUTLINE-ATOMICS-NEXT: ret9200 %old = atomicrmw xor ptr @var8, i8 %offset release9201; CHECK-NOT: dmb9202; CHECK: adrp [[TMPADDR:x[0-9]+]], var89203; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var89204 9205; CHECK: ldeorlb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]9206; CHECK-NOT: dmb9207 9208 ret i8 %old9209}9210 9211define dso_local i16 @test_atomic_load_xor_i16_release(i16 %offset) nounwind {9212; CHECK-LABEL: test_atomic_load_xor_i16_release:9213; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_release:9214; OUTLINE-ATOMICS: // %bb.0:9215; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9216; OUTLINE-ATOMICS-NEXT: adrp x1, var169217; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var169218; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_rel9219; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9220; OUTLINE-ATOMICS-NEXT: ret9221 %old = atomicrmw xor ptr @var16, i16 %offset release9222; CHECK-NOT: dmb9223; CHECK: adrp [[TMPADDR:x[0-9]+]], var169224; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var169225 9226; CHECK: ldeorlh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]9227; CHECK-NOT: dmb9228 9229 ret i16 %old9230}9231 9232define dso_local i32 @test_atomic_load_xor_i32_release(i32 %offset) nounwind {9233; CHECK-LABEL: test_atomic_load_xor_i32_release:9234; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_release:9235; OUTLINE-ATOMICS: // %bb.0:9236; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9237; OUTLINE-ATOMICS-NEXT: adrp x1, var329238; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var329239; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_rel9240; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9241; OUTLINE-ATOMICS-NEXT: ret9242 %old = atomicrmw xor ptr @var32, i32 %offset release9243; CHECK-NOT: dmb9244; CHECK: adrp [[TMPADDR:x[0-9]+]], var329245; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var329246 9247; CHECK: ldeorl w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]9248; CHECK-NOT: dmb9249 9250 ret i32 %old9251}9252 9253define dso_local i64 @test_atomic_load_xor_i64_release(i64 %offset) nounwind {9254; CHECK-LABEL: test_atomic_load_xor_i64_release:9255; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_release:9256; OUTLINE-ATOMICS: // %bb.0:9257; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9258; OUTLINE-ATOMICS-NEXT: adrp x1, var649259; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var649260; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_rel9261; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9262; OUTLINE-ATOMICS-NEXT: ret9263 %old = atomicrmw xor ptr @var64, i64 %offset release9264; CHECK-NOT: dmb9265; CHECK: adrp [[TMPADDR:x[0-9]+]], var649266; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var649267 9268; CHECK: ldeorl x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]9269; CHECK-NOT: dmb9270 9271 ret i64 %old9272}9273 9274define dso_local void @test_atomic_load_xor_i32_noret_release(i32 %offset) nounwind {9275; CHECK-LABEL: test_atomic_load_xor_i32_noret_release:9276; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_release:9277; OUTLINE-ATOMICS: // %bb.0:9278; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9279; OUTLINE-ATOMICS-NEXT: adrp x1, var329280; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var329281; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_rel9282; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9283; OUTLINE-ATOMICS-NEXT: ret9284 atomicrmw xor ptr @var32, i32 %offset release9285; CHECK-NOT: dmb9286; CHECK: adrp [[TMPADDR:x[0-9]+]], var329287; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var329288 9289; CHECK: ldeorl w{{[0-9]+}}, w{{[1-9][0-9]*}}, [x[[ADDR]]]9290; CHECK-NOT: dmb9291 ret void9292}9293 9294define dso_local void @test_atomic_load_xor_i64_noret_release(i64 %offset) nounwind {9295; CHECK-LABEL: test_atomic_load_xor_i64_noret_release:9296; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_release:9297; OUTLINE-ATOMICS: // %bb.0:9298; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9299; OUTLINE-ATOMICS-NEXT: adrp x1, var649300; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var649301; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_rel9302; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9303; OUTLINE-ATOMICS-NEXT: ret9304 atomicrmw xor ptr @var64, i64 %offset release9305; CHECK-NOT: dmb9306; CHECK: adrp [[TMPADDR:x[0-9]+]], var649307; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var649308 9309; CHECK: ldeorl x{{[0-9]+}}, x{{[1-9][0-9]*}}, [x[[ADDR]]]9310; CHECK-NOT: dmb9311 ret void9312}9313 9314define dso_local i8 @test_atomic_load_xor_i8_seq_cst(i8 %offset) nounwind {9315; CHECK-LABEL: test_atomic_load_xor_i8_seq_cst:9316; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_seq_cst:9317; OUTLINE-ATOMICS: // %bb.0:9318; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9319; OUTLINE-ATOMICS-NEXT: adrp x1, var89320; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var89321; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_acq_rel9322; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9323; OUTLINE-ATOMICS-NEXT: ret9324 %old = atomicrmw xor ptr @var8, i8 %offset seq_cst9325; CHECK-NOT: dmb9326; CHECK: adrp [[TMPADDR:x[0-9]+]], var89327; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var89328 9329; CHECK: ldeoralb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]9330; CHECK-NOT: dmb9331 9332 ret i8 %old9333}9334 9335define dso_local i16 @test_atomic_load_xor_i16_seq_cst(i16 %offset) nounwind {9336; CHECK-LABEL: test_atomic_load_xor_i16_seq_cst:9337; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_seq_cst:9338; OUTLINE-ATOMICS: // %bb.0:9339; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9340; OUTLINE-ATOMICS-NEXT: adrp x1, var169341; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var169342; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_acq_rel9343; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9344; OUTLINE-ATOMICS-NEXT: ret9345 %old = atomicrmw xor ptr @var16, i16 %offset seq_cst9346; CHECK-NOT: dmb9347; CHECK: adrp [[TMPADDR:x[0-9]+]], var169348; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var169349 9350; CHECK: ldeoralh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]9351; CHECK-NOT: dmb9352 9353 ret i16 %old9354}9355 9356define dso_local i32 @test_atomic_load_xor_i32_seq_cst(i32 %offset) nounwind {9357; CHECK-LABEL: test_atomic_load_xor_i32_seq_cst:9358; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_seq_cst:9359; OUTLINE-ATOMICS: // %bb.0:9360; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9361; OUTLINE-ATOMICS-NEXT: adrp x1, var329362; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var329363; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel9364; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9365; OUTLINE-ATOMICS-NEXT: ret9366 %old = atomicrmw xor ptr @var32, i32 %offset seq_cst9367; CHECK-NOT: dmb9368; CHECK: adrp [[TMPADDR:x[0-9]+]], var329369; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var329370 9371; CHECK: ldeoral w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]9372; CHECK-NOT: dmb9373 9374 ret i32 %old9375}9376 9377define dso_local i64 @test_atomic_load_xor_i64_seq_cst(i64 %offset) nounwind {9378; CHECK-LABEL: test_atomic_load_xor_i64_seq_cst:9379; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_seq_cst:9380; OUTLINE-ATOMICS: // %bb.0:9381; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9382; OUTLINE-ATOMICS-NEXT: adrp x1, var649383; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var649384; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel9385; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9386; OUTLINE-ATOMICS-NEXT: ret9387 %old = atomicrmw xor ptr @var64, i64 %offset seq_cst9388; CHECK-NOT: dmb9389; CHECK: adrp [[TMPADDR:x[0-9]+]], var649390; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var649391 9392; CHECK: ldeoral x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]]9393; CHECK-NOT: dmb9394 9395 ret i64 %old9396}9397 9398define dso_local void @test_atomic_load_xor_i32_noret_seq_cst(i32 %offset) nounwind {9399; CHECK-LABEL: test_atomic_load_xor_i32_noret_seq_cst:9400; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_seq_cst:9401; OUTLINE-ATOMICS: // %bb.0:9402; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9403; OUTLINE-ATOMICS-NEXT: adrp x1, var329404; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var329405; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel9406; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9407; OUTLINE-ATOMICS-NEXT: ret9408 atomicrmw xor ptr @var32, i32 %offset seq_cst9409; CHECK-NOT: dmb9410; CHECK: adrp [[TMPADDR:x[0-9]+]], var329411; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var329412 9413; CHECK: ldeoral w0, w[[NEW:[0-9]+]], [x[[ADDR]]]9414; CHECK-NOT: dmb9415 ret void9416}9417 9418define dso_local void @test_atomic_load_xor_i64_noret_seq_cst(i64 %offset) nounwind {9419; CHECK-LABEL: test_atomic_load_xor_i64_noret_seq_cst:9420; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_seq_cst:9421; OUTLINE-ATOMICS: // %bb.0:9422; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9423; OUTLINE-ATOMICS-NEXT: adrp x1, var649424; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var649425; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel9426; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload9427; OUTLINE-ATOMICS-NEXT: ret9428 atomicrmw xor ptr @var64, i64 %offset seq_cst9429; CHECK-NOT: dmb9430; CHECK: adrp [[TMPADDR:x[0-9]+]], var649431; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var649432 9433; CHECK: ldeoral x0, x[[NEW:[0-9]+]], [x[[ADDR]]]9434; CHECK-NOT: dmb9435 ret void9436}9437 9438define dso_local i128 @test_atomic_load_i128() nounwind {9439; CHECK-LABEL: test_atomic_load_i128:9440; CHECK: casp9441 9442; OUTLINE-ATOMICS-LABEL: test_atomic_load_i128:9443; OUTLINE-ATOMICS: ldxp9444; OUTLINE-ATOMICS: stxp9445 %pair = load atomic i128, ptr @var128 monotonic, align 169446 ret i128 %pair9447}9448