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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s3 4define i8 @atomicrmw_usub_cond_i8(ptr %ptr, i8 %val) {5; CHECK-LABEL: atomicrmw_usub_cond_i8:6; CHECK: // %bb.0:7; CHECK-NEXT: .LBB0_1: // %atomicrmw.start8; CHECK-NEXT: // =>This Inner Loop Header: Depth=19; CHECK-NEXT: ldaxrb w8, [x0]10; CHECK-NEXT: sub w9, w8, w111; CHECK-NEXT: cmp w8, w1, uxtb12; CHECK-NEXT: csel w9, w9, w8, hs13; CHECK-NEXT: stlxrb w10, w9, [x0]14; CHECK-NEXT: cbnz w10, .LBB0_115; CHECK-NEXT: // %bb.2: // %atomicrmw.end16; CHECK-NEXT: mov w0, w817; CHECK-NEXT: ret18 %result = atomicrmw usub_cond ptr %ptr, i8 %val seq_cst19 ret i8 %result20}21 22define i16 @atomicrmw_usub_cond_i16(ptr %ptr, i16 %val) {23; CHECK-LABEL: atomicrmw_usub_cond_i16:24; CHECK: // %bb.0:25; CHECK-NEXT: .LBB1_1: // %atomicrmw.start26; CHECK-NEXT: // =>This Inner Loop Header: Depth=127; CHECK-NEXT: ldaxrh w8, [x0]28; CHECK-NEXT: sub w9, w8, w129; CHECK-NEXT: cmp w8, w1, uxth30; CHECK-NEXT: csel w9, w9, w8, hs31; CHECK-NEXT: stlxrh w10, w9, [x0]32; CHECK-NEXT: cbnz w10, .LBB1_133; CHECK-NEXT: // %bb.2: // %atomicrmw.end34; CHECK-NEXT: mov w0, w835; CHECK-NEXT: ret36 %result = atomicrmw usub_cond ptr %ptr, i16 %val seq_cst37 ret i16 %result38}39 40define i32 @atomicrmw_usub_cond_i32(ptr %ptr, i32 %val) {41; CHECK-LABEL: atomicrmw_usub_cond_i32:42; CHECK: // %bb.0:43; CHECK-NEXT: .LBB2_1: // %atomicrmw.start44; CHECK-NEXT: // =>This Inner Loop Header: Depth=145; CHECK-NEXT: ldaxr w8, [x0]46; CHECK-NEXT: subs w9, w8, w147; CHECK-NEXT: csel w9, w9, w8, hs48; CHECK-NEXT: stlxr w10, w9, [x0]49; CHECK-NEXT: cbnz w10, .LBB2_150; CHECK-NEXT: // %bb.2: // %atomicrmw.end51; CHECK-NEXT: mov w0, w852; CHECK-NEXT: ret53 %result = atomicrmw usub_cond ptr %ptr, i32 %val seq_cst54 ret i32 %result55}56 57define i64 @atomicrmw_usub_cond_i64(ptr %ptr, i64 %val) {58; CHECK-LABEL: atomicrmw_usub_cond_i64:59; CHECK: // %bb.0:60; CHECK-NEXT: mov x8, x061; CHECK-NEXT: .LBB3_1: // %atomicrmw.start62; CHECK-NEXT: // =>This Inner Loop Header: Depth=163; CHECK-NEXT: ldaxr x0, [x8]64; CHECK-NEXT: subs x9, x0, x165; CHECK-NEXT: csel x9, x9, x0, hs66; CHECK-NEXT: stlxr w10, x9, [x8]67; CHECK-NEXT: cbnz w10, .LBB3_168; CHECK-NEXT: // %bb.2: // %atomicrmw.end69; CHECK-NEXT: ret70 %result = atomicrmw usub_cond ptr %ptr, i64 %val seq_cst71 ret i64 %result72}73 74define i8 @atomicrmw_usub_sat_i8(ptr %ptr, i8 %val) {75; CHECK-LABEL: atomicrmw_usub_sat_i8:76; CHECK: // %bb.0:77; CHECK-NEXT: .LBB4_1: // %atomicrmw.start78; CHECK-NEXT: // =>This Inner Loop Header: Depth=179; CHECK-NEXT: ldaxrb w8, [x0]80; CHECK-NEXT: subs w9, w8, w1, uxtb81; CHECK-NEXT: csel w9, wzr, w9, lo82; CHECK-NEXT: stlxrb w10, w9, [x0]83; CHECK-NEXT: cbnz w10, .LBB4_184; CHECK-NEXT: // %bb.2: // %atomicrmw.end85; CHECK-NEXT: mov w0, w886; CHECK-NEXT: ret87 %result = atomicrmw usub_sat ptr %ptr, i8 %val seq_cst88 ret i8 %result89}90 91define i16 @atomicrmw_usub_sat_i16(ptr %ptr, i16 %val) {92; CHECK-LABEL: atomicrmw_usub_sat_i16:93; CHECK: // %bb.0:94; CHECK-NEXT: .LBB5_1: // %atomicrmw.start95; CHECK-NEXT: // =>This Inner Loop Header: Depth=196; CHECK-NEXT: ldaxrh w8, [x0]97; CHECK-NEXT: subs w9, w8, w1, uxth98; CHECK-NEXT: csel w9, wzr, w9, lo99; CHECK-NEXT: stlxrh w10, w9, [x0]100; CHECK-NEXT: cbnz w10, .LBB5_1101; CHECK-NEXT: // %bb.2: // %atomicrmw.end102; CHECK-NEXT: mov w0, w8103; CHECK-NEXT: ret104 %result = atomicrmw usub_sat ptr %ptr, i16 %val seq_cst105 ret i16 %result106}107 108define i32 @atomicrmw_usub_sat_i32(ptr %ptr, i32 %val) {109; CHECK-LABEL: atomicrmw_usub_sat_i32:110; CHECK: // %bb.0:111; CHECK-NEXT: .LBB6_1: // %atomicrmw.start112; CHECK-NEXT: // =>This Inner Loop Header: Depth=1113; CHECK-NEXT: ldaxr w8, [x0]114; CHECK-NEXT: subs w9, w8, w1115; CHECK-NEXT: csel w9, wzr, w9, lo116; CHECK-NEXT: stlxr w10, w9, [x0]117; CHECK-NEXT: cbnz w10, .LBB6_1118; CHECK-NEXT: // %bb.2: // %atomicrmw.end119; CHECK-NEXT: mov w0, w8120; CHECK-NEXT: ret121 %result = atomicrmw usub_sat ptr %ptr, i32 %val seq_cst122 ret i32 %result123}124 125define i64 @atomicrmw_usub_sat_i64(ptr %ptr, i64 %val) {126; CHECK-LABEL: atomicrmw_usub_sat_i64:127; CHECK: // %bb.0:128; CHECK-NEXT: .LBB7_1: // %atomicrmw.start129; CHECK-NEXT: // =>This Inner Loop Header: Depth=1130; CHECK-NEXT: ldaxr x8, [x0]131; CHECK-NEXT: subs x9, x8, x1132; CHECK-NEXT: csel x9, xzr, x9, lo133; CHECK-NEXT: stlxr w10, x9, [x0]134; CHECK-NEXT: cbnz w10, .LBB7_1135; CHECK-NEXT: // %bb.2: // %atomicrmw.end136; CHECK-NEXT: mov x0, x8137; CHECK-NEXT: ret138 %result = atomicrmw usub_sat ptr %ptr, i64 %val seq_cst139 ret i64 %result140}141