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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64 -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5; CHECK-GI: warning: Instruction selection used fallback path for load_zext_i8_v4bf166; CHECK-GI-NEXT: warning: Instruction selection used fallback path for load_zext_i16_v4bf167; CHECK-GI-NEXT: warning: Instruction selection used fallback path for load_zext_i32_v4bf168 9define <4 x i16> @z_i32_v4i16(i32 %x) {10; CHECK-SD-LABEL: z_i32_v4i16:11; CHECK-SD: // %bb.0:12; CHECK-SD-NEXT: fmov s0, w013; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b14; CHECK-SD-NEXT: bic v0.4h, #255, lsl #815; CHECK-SD-NEXT: ret16;17; CHECK-GI-LABEL: z_i32_v4i16:18; CHECK-GI: // %bb.0:19; CHECK-GI-NEXT: fmov s0, w020; CHECK-GI-NEXT: mov b1, v0.b[1]21; CHECK-GI-NEXT: mov v2.b[0], v0.b[0]22; CHECK-GI-NEXT: mov b3, v0.b[2]23; CHECK-GI-NEXT: mov b0, v0.b[3]24; CHECK-GI-NEXT: mov v2.b[1], v1.b[0]25; CHECK-GI-NEXT: mov v2.b[2], v3.b[0]26; CHECK-GI-NEXT: mov v2.b[3], v0.b[0]27; CHECK-GI-NEXT: ushll v0.8h, v2.8b, #028; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q029; CHECK-GI-NEXT: ret30 %b = bitcast i32 %x to <4 x i8>31 %e = zext <4 x i8> %b to <4 x i16>32 ret <4 x i16> %e33}34 35define <4 x i32> @z_i32_v4i32(i32 %x) {36; CHECK-SD-LABEL: z_i32_v4i32:37; CHECK-SD: // %bb.0:38; CHECK-SD-NEXT: fmov s0, w039; CHECK-SD-NEXT: movi v1.2d, #0x0000ff000000ff40; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b41; CHECK-SD-NEXT: ushll v0.4s, v0.4h, #042; CHECK-SD-NEXT: and v0.16b, v0.16b, v1.16b43; CHECK-SD-NEXT: ret44;45; CHECK-GI-LABEL: z_i32_v4i32:46; CHECK-GI: // %bb.0:47; CHECK-GI-NEXT: fmov s0, w048; CHECK-GI-NEXT: mov b1, v0.b[2]49; CHECK-GI-NEXT: mov b2, v0.b[1]50; CHECK-GI-NEXT: mov b3, v0.b[3]51; CHECK-GI-NEXT: fmov w8, s052; CHECK-GI-NEXT: fmov w9, s153; CHECK-GI-NEXT: uxtb w8, w854; CHECK-GI-NEXT: fmov w10, s255; CHECK-GI-NEXT: fmov w11, s356; CHECK-GI-NEXT: fmov s0, w857; CHECK-GI-NEXT: uxtb w9, w958; CHECK-GI-NEXT: uxtb w10, w1059; CHECK-GI-NEXT: uxtb w11, w1160; CHECK-GI-NEXT: fmov s1, w961; CHECK-GI-NEXT: mov v0.h[1], w1062; CHECK-GI-NEXT: mov v1.h[1], w1163; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #064; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #065; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]66; CHECK-GI-NEXT: ret67 %b = bitcast i32 %x to <4 x i8>68 %e = zext <4 x i8> %b to <4 x i32>69 ret <4 x i32> %e70}71 72define <4 x i64> @z_i32_v4i64(i32 %x) {73; CHECK-SD-LABEL: z_i32_v4i64:74; CHECK-SD: // %bb.0:75; CHECK-SD-NEXT: fmov s0, w076; CHECK-SD-NEXT: movi v1.2d, #0x000000000000ff77; CHECK-SD-NEXT: mov b2, v0.b[0]78; CHECK-SD-NEXT: mov b3, v0.b[2]79; CHECK-SD-NEXT: mov v2.b[4], v0.b[1]80; CHECK-SD-NEXT: mov v3.b[4], v0.b[3]81; CHECK-SD-NEXT: ushll v0.2d, v2.2s, #082; CHECK-SD-NEXT: ushll v2.2d, v3.2s, #083; CHECK-SD-NEXT: and v0.16b, v0.16b, v1.16b84; CHECK-SD-NEXT: and v1.16b, v2.16b, v1.16b85; CHECK-SD-NEXT: ret86;87; CHECK-GI-LABEL: z_i32_v4i64:88; CHECK-GI: // %bb.0:89; CHECK-GI-NEXT: fmov s0, w090; CHECK-GI-NEXT: mov b1, v0.b[2]91; CHECK-GI-NEXT: mov b2, v0.b[1]92; CHECK-GI-NEXT: mov b3, v0.b[3]93; CHECK-GI-NEXT: fmov w8, s094; CHECK-GI-NEXT: fmov w9, s195; CHECK-GI-NEXT: ubfx x8, x8, #0, #896; CHECK-GI-NEXT: fmov w10, s297; CHECK-GI-NEXT: fmov w11, s398; CHECK-GI-NEXT: fmov d0, x899; CHECK-GI-NEXT: ubfx x9, x9, #0, #8100; CHECK-GI-NEXT: ubfx x10, x10, #0, #8101; CHECK-GI-NEXT: ubfx x11, x11, #0, #8102; CHECK-GI-NEXT: fmov d1, x9103; CHECK-GI-NEXT: mov v0.d[1], x10104; CHECK-GI-NEXT: mov v1.d[1], x11105; CHECK-GI-NEXT: ret106 %b = bitcast i32 %x to <4 x i8>107 %e = zext <4 x i8> %b to <4 x i64>108 ret <4 x i64> %e109}110 111define <4 x i16> @s_i32_v4i16(i32 %x) {112; CHECK-SD-LABEL: s_i32_v4i16:113; CHECK-SD: // %bb.0:114; CHECK-SD-NEXT: fmov s0, w0115; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b116; CHECK-SD-NEXT: shl v0.4h, v0.4h, #8117; CHECK-SD-NEXT: sshr v0.4h, v0.4h, #8118; CHECK-SD-NEXT: ret119;120; CHECK-GI-LABEL: s_i32_v4i16:121; CHECK-GI: // %bb.0:122; CHECK-GI-NEXT: fmov s0, w0123; CHECK-GI-NEXT: mov b1, v0.b[1]124; CHECK-GI-NEXT: mov v2.b[0], v0.b[0]125; CHECK-GI-NEXT: mov b3, v0.b[2]126; CHECK-GI-NEXT: mov b0, v0.b[3]127; CHECK-GI-NEXT: mov v2.b[1], v1.b[0]128; CHECK-GI-NEXT: mov v2.b[2], v3.b[0]129; CHECK-GI-NEXT: mov v2.b[3], v0.b[0]130; CHECK-GI-NEXT: sshll v0.8h, v2.8b, #0131; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0132; CHECK-GI-NEXT: ret133 %b = bitcast i32 %x to <4 x i8>134 %e = sext <4 x i8> %b to <4 x i16>135 ret <4 x i16> %e136}137 138define <4 x i32> @s_i32_v4i32(i32 %x) {139; CHECK-SD-LABEL: s_i32_v4i32:140; CHECK-SD: // %bb.0:141; CHECK-SD-NEXT: fmov s0, w0142; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b143; CHECK-SD-NEXT: ushll v0.4s, v0.4h, #0144; CHECK-SD-NEXT: shl v0.4s, v0.4s, #24145; CHECK-SD-NEXT: sshr v0.4s, v0.4s, #24146; CHECK-SD-NEXT: ret147;148; CHECK-GI-LABEL: s_i32_v4i32:149; CHECK-GI: // %bb.0:150; CHECK-GI-NEXT: fmov s0, w0151; CHECK-GI-NEXT: mov b1, v0.b[2]152; CHECK-GI-NEXT: mov b2, v0.b[1]153; CHECK-GI-NEXT: mov b3, v0.b[3]154; CHECK-GI-NEXT: fmov w8, s0155; CHECK-GI-NEXT: fmov w9, s1156; CHECK-GI-NEXT: sxtb w8, w8157; CHECK-GI-NEXT: fmov w10, s2158; CHECK-GI-NEXT: fmov w11, s3159; CHECK-GI-NEXT: fmov s0, w8160; CHECK-GI-NEXT: sxtb w9, w9161; CHECK-GI-NEXT: sxtb w10, w10162; CHECK-GI-NEXT: sxtb w11, w11163; CHECK-GI-NEXT: fmov s1, w9164; CHECK-GI-NEXT: mov v0.h[1], w10165; CHECK-GI-NEXT: mov v1.h[1], w11166; CHECK-GI-NEXT: sshll v0.4s, v0.4h, #0167; CHECK-GI-NEXT: sshll v1.4s, v1.4h, #0168; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]169; CHECK-GI-NEXT: ret170 %b = bitcast i32 %x to <4 x i8>171 %e = sext <4 x i8> %b to <4 x i32>172 ret <4 x i32> %e173}174 175define <4 x i64> @s_i32_v4i64(i32 %x) {176; CHECK-SD-LABEL: s_i32_v4i64:177; CHECK-SD: // %bb.0:178; CHECK-SD-NEXT: fmov s0, w0179; CHECK-SD-NEXT: mov b1, v0.b[0]180; CHECK-SD-NEXT: mov b2, v0.b[2]181; CHECK-SD-NEXT: mov v1.b[4], v0.b[1]182; CHECK-SD-NEXT: mov v2.b[4], v0.b[3]183; CHECK-SD-NEXT: ushll v0.2d, v1.2s, #0184; CHECK-SD-NEXT: ushll v1.2d, v2.2s, #0185; CHECK-SD-NEXT: shl v0.2d, v0.2d, #56186; CHECK-SD-NEXT: shl v1.2d, v1.2d, #56187; CHECK-SD-NEXT: sshr v0.2d, v0.2d, #56188; CHECK-SD-NEXT: sshr v1.2d, v1.2d, #56189; CHECK-SD-NEXT: ret190;191; CHECK-GI-LABEL: s_i32_v4i64:192; CHECK-GI: // %bb.0:193; CHECK-GI-NEXT: fmov s0, w0194; CHECK-GI-NEXT: mov b1, v0.b[2]195; CHECK-GI-NEXT: mov b2, v0.b[1]196; CHECK-GI-NEXT: mov b3, v0.b[3]197; CHECK-GI-NEXT: fmov w8, s0198; CHECK-GI-NEXT: fmov w9, s1199; CHECK-GI-NEXT: sxtb x8, w8200; CHECK-GI-NEXT: fmov w10, s2201; CHECK-GI-NEXT: fmov w11, s3202; CHECK-GI-NEXT: fmov d0, x8203; CHECK-GI-NEXT: sxtb x9, w9204; CHECK-GI-NEXT: sxtb x10, w10205; CHECK-GI-NEXT: sxtb x11, w11206; CHECK-GI-NEXT: fmov d1, x9207; CHECK-GI-NEXT: mov v0.d[1], x10208; CHECK-GI-NEXT: mov v1.d[1], x11209; CHECK-GI-NEXT: ret210 %b = bitcast i32 %x to <4 x i8>211 %e = sext <4 x i8> %b to <4 x i64>212 ret <4 x i64> %e213}214 215define void @extractbitcastext(i32 %bytes, ptr %output) {216; CHECK-SD-LABEL: extractbitcastext:217; CHECK-SD: // %bb.0:218; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0219; CHECK-SD-NEXT: fmov d0, x0220; CHECK-SD-NEXT: ushll v0.8h, v0.8b, #0221; CHECK-SD-NEXT: ushll v0.4s, v0.4h, #0222; CHECK-SD-NEXT: ushll v1.2d, v0.2s, #0223; CHECK-SD-NEXT: ushll2 v0.2d, v0.4s, #0224; CHECK-SD-NEXT: stp q1, q0, [x1]225; CHECK-SD-NEXT: ret226;227; CHECK-GI-LABEL: extractbitcastext:228; CHECK-GI: // %bb.0:229; CHECK-GI-NEXT: // kill: def $w0 killed $w0 def $x0230; CHECK-GI-NEXT: sxtw x8, w0231; CHECK-GI-NEXT: fmov d0, x8232; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0233; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0234; CHECK-GI-NEXT: ushll v1.2d, v0.2s, #0235; CHECK-GI-NEXT: ushll2 v0.2d, v0.4s, #0236; CHECK-GI-NEXT: stp q1, q0, [x1]237; CHECK-GI-NEXT: ret238 %conv = sext i32 %bytes to i64239 %b0 = bitcast i64 %conv to <8 x i8>240 %b1 = zext <8 x i8> %b0 to <8 x i16>241 %shuffle.i = shufflevector <8 x i16> %b1, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>242 %z2 = zext nneg <4 x i16> %shuffle.i to <4 x i32>243 %shuffle.i23 = shufflevector <4 x i32> %z2, <4 x i32> poison, <2 x i32> <i32 0, i32 1>244 %z3 = zext nneg <2 x i32> %shuffle.i23 to <2 x i64>245 %shuffle.i24 = shufflevector <4 x i32> %z2, <4 x i32> poison, <2 x i32> <i32 2, i32 3>246 %z4 = zext nneg <2 x i32> %shuffle.i24 to <2 x i64>247 store <2 x i64> %z3, ptr %output, align 8248 %add.ptr = getelementptr inbounds nuw i8, ptr %output, i64 16249 store <2 x i64> %z4, ptr %add.ptr, align 8250 ret void251}252 253define void @extractbitcastext_s(i32 %bytes, ptr %output) {254; CHECK-SD-LABEL: extractbitcastext_s:255; CHECK-SD: // %bb.0:256; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0257; CHECK-SD-NEXT: fmov d0, x0258; CHECK-SD-NEXT: sshll v0.8h, v0.8b, #0259; CHECK-SD-NEXT: sshll v0.4s, v0.4h, #0260; CHECK-SD-NEXT: sshll v1.2d, v0.2s, #0261; CHECK-SD-NEXT: sshll2 v0.2d, v0.4s, #0262; CHECK-SD-NEXT: stp q1, q0, [x1]263; CHECK-SD-NEXT: ret264;265; CHECK-GI-LABEL: extractbitcastext_s:266; CHECK-GI: // %bb.0:267; CHECK-GI-NEXT: // kill: def $w0 killed $w0 def $x0268; CHECK-GI-NEXT: sxtw x8, w0269; CHECK-GI-NEXT: fmov d0, x8270; CHECK-GI-NEXT: sshll v0.8h, v0.8b, #0271; CHECK-GI-NEXT: sshll v0.4s, v0.4h, #0272; CHECK-GI-NEXT: sshll v1.2d, v0.2s, #0273; CHECK-GI-NEXT: sshll2 v0.2d, v0.4s, #0274; CHECK-GI-NEXT: stp q1, q0, [x1]275; CHECK-GI-NEXT: ret276 %conv = sext i32 %bytes to i64277 %b0 = bitcast i64 %conv to <8 x i8>278 %b1 = sext <8 x i8> %b0 to <8 x i16>279 %shuffle.i = shufflevector <8 x i16> %b1, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>280 %s2 = sext <4 x i16> %shuffle.i to <4 x i32>281 %shuffle.i23 = shufflevector <4 x i32> %s2, <4 x i32> poison, <2 x i32> <i32 0, i32 1>282 %s3 = sext <2 x i32> %shuffle.i23 to <2 x i64>283 %shuffle.i24 = shufflevector <4 x i32> %s2, <4 x i32> poison, <2 x i32> <i32 2, i32 3>284 %s4 = sext <2 x i32> %shuffle.i24 to <2 x i64>285 store <2 x i64> %s3, ptr %output, align 8286 %add.ptr = getelementptr inbounds nuw i8, ptr %output, i64 16287 store <2 x i64> %s4, ptr %add.ptr, align 8288 ret void289}290 291define <8 x i8> @load_zext_i8_v8i8(ptr %p) {292; CHECK-LABEL: load_zext_i8_v8i8:293; CHECK: // %bb.0:294; CHECK-NEXT: ldrb w8, [x0]295; CHECK-NEXT: fmov d0, x8296; CHECK-NEXT: ret297 %l = load i8, ptr %p298 %z = zext i8 %l to i64299 %b = bitcast i64 %z to <8 x i8>300 ret <8 x i8> %b301}302 303define <8 x i8> @load_zext_i16_v8i8(ptr %p) {304; CHECK-LABEL: load_zext_i16_v8i8:305; CHECK: // %bb.0:306; CHECK-NEXT: ldrh w8, [x0]307; CHECK-NEXT: fmov d0, x8308; CHECK-NEXT: ret309 %l = load i16, ptr %p310 %z = zext i16 %l to i64311 %b = bitcast i64 %z to <8 x i8>312 ret <8 x i8> %b313}314 315define <8 x i8> @load_zext_i32_v8i8(ptr %p) {316; CHECK-LABEL: load_zext_i32_v8i8:317; CHECK: // %bb.0:318; CHECK-NEXT: ldr w8, [x0]319; CHECK-NEXT: fmov d0, x8320; CHECK-NEXT: ret321 %l = load i32, ptr %p322 %z = zext i32 %l to i64323 %b = bitcast i64 %z to <8 x i8>324 ret <8 x i8> %b325}326 327define <8 x i8> @load_sext_i32_v8i8(ptr %p) {328; CHECK-LABEL: load_sext_i32_v8i8:329; CHECK: // %bb.0:330; CHECK-NEXT: ldrsw x8, [x0]331; CHECK-NEXT: fmov d0, x8332; CHECK-NEXT: ret333 %l = load i32, ptr %p334 %z = sext i32 %l to i64335 %b = bitcast i64 %z to <8 x i8>336 ret <8 x i8> %b337}338 339define <16 x i8> @load_zext_v16i8(ptr %p) {340; CHECK-SD-LABEL: load_zext_v16i8:341; CHECK-SD: // %bb.0:342; CHECK-SD-NEXT: movi v0.2d, #0000000000000000343; CHECK-SD-NEXT: ldr w8, [x0]344; CHECK-SD-NEXT: mov v0.d[0], x8345; CHECK-SD-NEXT: ret346;347; CHECK-GI-LABEL: load_zext_v16i8:348; CHECK-GI: // %bb.0:349; CHECK-GI-NEXT: ldr w8, [x0]350; CHECK-GI-NEXT: mov v0.d[0], x8351; CHECK-GI-NEXT: mov v0.d[1], xzr352; CHECK-GI-NEXT: ret353 %l = load i32, ptr %p354 %z = zext i32 %l to i128355 %b = bitcast i128 %z to <16 x i8>356 ret <16 x i8> %b357}358 359 360define <4 x i16> @load_zext_i8_v4i16(ptr %p) {361; CHECK-LABEL: load_zext_i8_v4i16:362; CHECK: // %bb.0:363; CHECK-NEXT: ldrb w8, [x0]364; CHECK-NEXT: fmov d0, x8365; CHECK-NEXT: ret366 %l = load i8, ptr %p367 %z = zext i8 %l to i64368 %b = bitcast i64 %z to <4 x i16>369 ret <4 x i16> %b370}371 372define <4 x i16> @load_zext_i16_v4i16(ptr %p) {373; CHECK-LABEL: load_zext_i16_v4i16:374; CHECK: // %bb.0:375; CHECK-NEXT: ldrh w8, [x0]376; CHECK-NEXT: fmov d0, x8377; CHECK-NEXT: ret378 %l = load i16, ptr %p379 %z = zext i16 %l to i64380 %b = bitcast i64 %z to <4 x i16>381 ret <4 x i16> %b382}383 384define <4 x i16> @load_zext_i32_v4i16(ptr %p) {385; CHECK-LABEL: load_zext_i32_v4i16:386; CHECK: // %bb.0:387; CHECK-NEXT: ldr w8, [x0]388; CHECK-NEXT: fmov d0, x8389; CHECK-NEXT: ret390 %l = load i32, ptr %p391 %z = zext i32 %l to i64392 %b = bitcast i64 %z to <4 x i16>393 ret <4 x i16> %b394}395 396define <2 x i32> @load_zext_i8_v2i32(ptr %p) {397; CHECK-LABEL: load_zext_i8_v2i32:398; CHECK: // %bb.0:399; CHECK-NEXT: ldrb w8, [x0]400; CHECK-NEXT: fmov d0, x8401; CHECK-NEXT: ret402 %l = load i8, ptr %p403 %z = zext i8 %l to i64404 %b = bitcast i64 %z to <2 x i32>405 ret <2 x i32> %b406}407 408define <2 x i32> @load_zext_i16_v2i32(ptr %p) {409; CHECK-LABEL: load_zext_i16_v2i32:410; CHECK: // %bb.0:411; CHECK-NEXT: ldrh w8, [x0]412; CHECK-NEXT: fmov d0, x8413; CHECK-NEXT: ret414 %l = load i16, ptr %p415 %z = zext i16 %l to i64416 %b = bitcast i64 %z to <2 x i32>417 ret <2 x i32> %b418}419 420define <2 x i32> @load_zext_i32_v2i32(ptr %p) {421; CHECK-LABEL: load_zext_i32_v2i32:422; CHECK: // %bb.0:423; CHECK-NEXT: ldr w8, [x0]424; CHECK-NEXT: fmov d0, x8425; CHECK-NEXT: ret426 %l = load i32, ptr %p427 %z = zext i32 %l to i64428 %b = bitcast i64 %z to <2 x i32>429 ret <2 x i32> %b430}431 432define <1 x i64> @load_zext_i8_v1i64(ptr %p) {433; CHECK-LABEL: load_zext_i8_v1i64:434; CHECK: // %bb.0:435; CHECK-NEXT: ldrb w8, [x0]436; CHECK-NEXT: fmov d0, x8437; CHECK-NEXT: ret438 %l = load i8, ptr %p439 %z = zext i8 %l to i64440 %b = bitcast i64 %z to <1 x i64>441 ret <1 x i64> %b442}443 444define <1 x i64> @load_zext_i16_v1i64(ptr %p) {445; CHECK-LABEL: load_zext_i16_v1i64:446; CHECK: // %bb.0:447; CHECK-NEXT: ldrh w8, [x0]448; CHECK-NEXT: fmov d0, x8449; CHECK-NEXT: ret450 %l = load i16, ptr %p451 %z = zext i16 %l to i64452 %b = bitcast i64 %z to <1 x i64>453 ret <1 x i64> %b454}455 456define <1 x i64> @load_zext_i32_v1i64(ptr %p) {457; CHECK-LABEL: load_zext_i32_v1i64:458; CHECK: // %bb.0:459; CHECK-NEXT: ldr w8, [x0]460; CHECK-NEXT: fmov d0, x8461; CHECK-NEXT: ret462 %l = load i32, ptr %p463 %z = zext i32 %l to i64464 %b = bitcast i64 %z to <1 x i64>465 ret <1 x i64> %b466}467 468 469define <4 x half> @load_zext_i8_v4f16(ptr %p) {470; CHECK-LABEL: load_zext_i8_v4f16:471; CHECK: // %bb.0:472; CHECK-NEXT: ldrb w8, [x0]473; CHECK-NEXT: fmov d0, x8474; CHECK-NEXT: ret475 %l = load i8, ptr %p476 %z = zext i8 %l to i64477 %b = bitcast i64 %z to <4 x half>478 ret <4 x half> %b479}480 481define <4 x half> @load_zext_i16_v4f16(ptr %p) {482; CHECK-LABEL: load_zext_i16_v4f16:483; CHECK: // %bb.0:484; CHECK-NEXT: ldrh w8, [x0]485; CHECK-NEXT: fmov d0, x8486; CHECK-NEXT: ret487 %l = load i16, ptr %p488 %z = zext i16 %l to i64489 %b = bitcast i64 %z to <4 x half>490 ret <4 x half> %b491}492 493define <4 x half> @load_zext_i32_v4f16(ptr %p) {494; CHECK-LABEL: load_zext_i32_v4f16:495; CHECK: // %bb.0:496; CHECK-NEXT: ldr w8, [x0]497; CHECK-NEXT: fmov d0, x8498; CHECK-NEXT: ret499 %l = load i32, ptr %p500 %z = zext i32 %l to i64501 %b = bitcast i64 %z to <4 x half>502 ret <4 x half> %b503}504 505define <4 x bfloat> @load_zext_i8_v4bf16(ptr %p) {506; CHECK-LABEL: load_zext_i8_v4bf16:507; CHECK: // %bb.0:508; CHECK-NEXT: ldrb w8, [x0]509; CHECK-NEXT: fmov d0, x8510; CHECK-NEXT: ret511 %l = load i8, ptr %p512 %z = zext i8 %l to i64513 %b = bitcast i64 %z to <4 x bfloat>514 ret <4 x bfloat> %b515}516 517define <4 x bfloat> @load_zext_i16_v4bf16(ptr %p) {518; CHECK-LABEL: load_zext_i16_v4bf16:519; CHECK: // %bb.0:520; CHECK-NEXT: ldrh w8, [x0]521; CHECK-NEXT: fmov d0, x8522; CHECK-NEXT: ret523 %l = load i16, ptr %p524 %z = zext i16 %l to i64525 %b = bitcast i64 %z to <4 x bfloat>526 ret <4 x bfloat> %b527}528 529define <4 x bfloat> @load_zext_i32_v4bf16(ptr %p) {530; CHECK-LABEL: load_zext_i32_v4bf16:531; CHECK: // %bb.0:532; CHECK-NEXT: ldr w8, [x0]533; CHECK-NEXT: fmov d0, x8534; CHECK-NEXT: ret535 %l = load i32, ptr %p536 %z = zext i32 %l to i64537 %b = bitcast i64 %z to <4 x bfloat>538 ret <4 x bfloat> %b539}540 541define <2 x float> @load_zext_i8_v2f32(ptr %p) {542; CHECK-LABEL: load_zext_i8_v2f32:543; CHECK: // %bb.0:544; CHECK-NEXT: ldrb w8, [x0]545; CHECK-NEXT: fmov d0, x8546; CHECK-NEXT: ret547 %l = load i8, ptr %p548 %z = zext i8 %l to i64549 %b = bitcast i64 %z to <2 x float>550 ret <2 x float> %b551}552 553define <2 x float> @load_zext_i16_v2f32(ptr %p) {554; CHECK-LABEL: load_zext_i16_v2f32:555; CHECK: // %bb.0:556; CHECK-NEXT: ldrh w8, [x0]557; CHECK-NEXT: fmov d0, x8558; CHECK-NEXT: ret559 %l = load i16, ptr %p560 %z = zext i16 %l to i64561 %b = bitcast i64 %z to <2 x float>562 ret <2 x float> %b563}564 565define <2 x float> @load_zext_i32_v2f32(ptr %p) {566; CHECK-LABEL: load_zext_i32_v2f32:567; CHECK: // %bb.0:568; CHECK-NEXT: ldr w8, [x0]569; CHECK-NEXT: fmov d0, x8570; CHECK-NEXT: ret571 %l = load i32, ptr %p572 %z = zext i32 %l to i64573 %b = bitcast i64 %z to <2 x float>574 ret <2 x float> %b575}576 577define <1 x double> @load_zext_i8_v1f64(ptr %p) {578; CHECK-LABEL: load_zext_i8_v1f64:579; CHECK: // %bb.0:580; CHECK-NEXT: ldrb w8, [x0]581; CHECK-NEXT: fmov d0, x8582; CHECK-NEXT: ret583 %l = load i8, ptr %p584 %z = zext i8 %l to i64585 %b = bitcast i64 %z to <1 x double>586 ret <1 x double> %b587}588 589define <1 x double> @load_zext_i16_v1f64(ptr %p) {590; CHECK-LABEL: load_zext_i16_v1f64:591; CHECK: // %bb.0:592; CHECK-NEXT: ldrh w8, [x0]593; CHECK-NEXT: fmov d0, x8594; CHECK-NEXT: ret595 %l = load i16, ptr %p596 %z = zext i16 %l to i64597 %b = bitcast i64 %z to <1 x double>598 ret <1 x double> %b599}600 601define <1 x double> @load_zext_i32_v1f64(ptr %p) {602; CHECK-LABEL: load_zext_i32_v1f64:603; CHECK: // %bb.0:604; CHECK-NEXT: ldr w8, [x0]605; CHECK-NEXT: fmov d0, x8606; CHECK-NEXT: ret607 %l = load i32, ptr %p608 %z = zext i32 %l to i64609 %b = bitcast i64 %z to <1 x double>610 ret <1 x double> %b611}612