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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI4target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"5target triple = "arm64"6 7define i1 @test_EQ_IllEbT(i64 %a, i64 %b) {8; CHECK-SD-LABEL: test_EQ_IllEbT:9; CHECK-SD: // %bb.0: // %entry10; CHECK-SD-NEXT: cmn x0, x111; CHECK-SD-NEXT: cset w0, eq12; CHECK-SD-NEXT: ret13;14; CHECK-GI-LABEL: test_EQ_IllEbT:15; CHECK-GI: // %bb.0: // %entry16; CHECK-GI-NEXT: cmn x1, x017; CHECK-GI-NEXT: cset w0, eq18; CHECK-GI-NEXT: ret19entry:20 %add = sub i64 0, %b21 %cmp = icmp eq i64 %add, %a22 ret i1 %cmp23}24 25define i1 @test_EQ_IliEbT(i64 %a, i32 %b) {26; CHECK-SD-LABEL: test_EQ_IliEbT:27; CHECK-SD: // %bb.0: // %entry28; CHECK-SD-NEXT: cmn x0, w1, sxtw29; CHECK-SD-NEXT: cset w0, eq30; CHECK-SD-NEXT: ret31;32; CHECK-GI-LABEL: test_EQ_IliEbT:33; CHECK-GI: // %bb.0: // %entry34; CHECK-GI-NEXT: // kill: def $w1 killed $w1 def $x135; CHECK-GI-NEXT: sxtw x8, w136; CHECK-GI-NEXT: cmn x8, x037; CHECK-GI-NEXT: cset w0, eq38; CHECK-GI-NEXT: ret39entry:40 %conv = sext i32 %b to i6441 %add = sub i64 0, %a42 %cmp = icmp eq i64 %conv, %add43 ret i1 %cmp44}45 46define i1 @test_EQ_IlsEbT(i64 %a, i16 %b) {47; CHECK-LABEL: test_EQ_IlsEbT:48; CHECK: // %bb.0: // %entry49; CHECK-NEXT: cmn x0, w1, sxth50; CHECK-NEXT: cset w0, eq51; CHECK-NEXT: ret52entry:53 %conv = sext i16 %b to i6454 %add = sub i64 0, %a55 %cmp = icmp eq i64 %conv, %add56 ret i1 %cmp57}58 59define i1 @test_EQ_IlcEbT(i64 %a, i8 %b) {60; CHECK-LABEL: test_EQ_IlcEbT:61; CHECK: // %bb.0: // %entry62; CHECK-NEXT: cmn x0, w1, uxtb63; CHECK-NEXT: cset w0, eq64; CHECK-NEXT: ret65entry:66 %conv = zext i8 %b to i6467 %add = sub i64 0, %a68 %cmp = icmp eq i64 %conv, %add69 ret i1 %cmp70}71 72define i1 @test_EQ_IilEbT(i32 %a, i64 %b) {73; CHECK-SD-LABEL: test_EQ_IilEbT:74; CHECK-SD: // %bb.0: // %entry75; CHECK-SD-NEXT: cmn x1, w0, sxtw76; CHECK-SD-NEXT: cset w0, eq77; CHECK-SD-NEXT: ret78;79; CHECK-GI-LABEL: test_EQ_IilEbT:80; CHECK-GI: // %bb.0: // %entry81; CHECK-GI-NEXT: // kill: def $w0 killed $w0 def $x082; CHECK-GI-NEXT: sxtw x8, w083; CHECK-GI-NEXT: cmn x8, x184; CHECK-GI-NEXT: cset w0, eq85; CHECK-GI-NEXT: ret86entry:87 %conv = sext i32 %a to i6488 %add = sub i64 0, %b89 %cmp = icmp eq i64 %conv, %add90 ret i1 %cmp91}92 93define i1 @test_EQ_IiiEbT(i32 %a, i32 %b) {94; CHECK-SD-LABEL: test_EQ_IiiEbT:95; CHECK-SD: // %bb.0: // %entry96; CHECK-SD-NEXT: cmn w0, w197; CHECK-SD-NEXT: cset w0, eq98; CHECK-SD-NEXT: ret99;100; CHECK-GI-LABEL: test_EQ_IiiEbT:101; CHECK-GI: // %bb.0: // %entry102; CHECK-GI-NEXT: cmn w1, w0103; CHECK-GI-NEXT: cset w0, eq104; CHECK-GI-NEXT: ret105entry:106 %add = sub i32 0, %b107 %cmp = icmp eq i32 %add, %a108 ret i1 %cmp109}110 111define i1 @test_EQ_IisEbT(i32 %a, i16 %b) {112; CHECK-LABEL: test_EQ_IisEbT:113; CHECK: // %bb.0: // %entry114; CHECK-NEXT: cmn w0, w1, sxth115; CHECK-NEXT: cset w0, eq116; CHECK-NEXT: ret117entry:118 %conv = sext i16 %b to i32119 %add = sub i32 0, %a120 %cmp = icmp eq i32 %conv, %add121 ret i1 %cmp122}123 124define i1 @test_EQ_IicEbT(i32 %a, i8 %b) {125; CHECK-LABEL: test_EQ_IicEbT:126; CHECK: // %bb.0: // %entry127; CHECK-NEXT: cmn w0, w1, uxtb128; CHECK-NEXT: cset w0, eq129; CHECK-NEXT: ret130entry:131 %conv = zext i8 %b to i32132 %add = sub i32 0, %a133 %cmp = icmp eq i32 %conv, %add134 ret i1 %cmp135}136 137define i1 @test_EQ_IslEbT(i16 %a, i64 %b) {138; CHECK-LABEL: test_EQ_IslEbT:139; CHECK: // %bb.0: // %entry140; CHECK-NEXT: cmn x1, w0, sxth141; CHECK-NEXT: cset w0, eq142; CHECK-NEXT: ret143entry:144 %conv = sext i16 %a to i64145 %add = sub i64 0, %b146 %cmp = icmp eq i64 %conv, %add147 ret i1 %cmp148}149 150define i1 @test_EQ_IsiEbT(i16 %a, i32 %b) {151; CHECK-LABEL: test_EQ_IsiEbT:152; CHECK: // %bb.0: // %entry153; CHECK-NEXT: cmn w1, w0, sxth154; CHECK-NEXT: cset w0, eq155; CHECK-NEXT: ret156entry:157 %conv = sext i16 %a to i32158 %add = sub i32 0, %b159 %cmp = icmp eq i32 %conv, %add160 ret i1 %cmp161}162 163define i1 @test_EQ_IssEbT(i16 %a, i16 %b) {164; CHECK-LABEL: test_EQ_IssEbT:165; CHECK: // %bb.0: // %entry166; CHECK-NEXT: sxth w8, w0167; CHECK-NEXT: cmn w8, w1, sxth168; CHECK-NEXT: cset w0, eq169; CHECK-NEXT: ret170entry:171 %conv = sext i16 %a to i32172 %conv1 = sext i16 %b to i32173 %add = sub nsw i32 0, %conv1174 %cmp = icmp eq i32 %conv, %add175 ret i1 %cmp176}177 178define i1 @test_EQ_IscEbT(i16 %a, i8 %b) {179; CHECK-LABEL: test_EQ_IscEbT:180; CHECK: // %bb.0: // %entry181; CHECK-NEXT: sxth w8, w0182; CHECK-NEXT: cmn w8, w1, uxtb183; CHECK-NEXT: cset w0, eq184; CHECK-NEXT: ret185entry:186 %conv = sext i16 %a to i32187 %conv1 = zext i8 %b to i32188 %add = sub nsw i32 0, %conv1189 %cmp = icmp eq i32 %conv, %add190 ret i1 %cmp191}192 193define i1 @test_EQ_IclEbT(i8 %a, i64 %b) {194; CHECK-LABEL: test_EQ_IclEbT:195; CHECK: // %bb.0: // %entry196; CHECK-NEXT: cmn x1, w0, uxtb197; CHECK-NEXT: cset w0, eq198; CHECK-NEXT: ret199entry:200 %conv = zext i8 %a to i64201 %add = sub i64 0, %b202 %cmp = icmp eq i64 %conv, %add203 ret i1 %cmp204}205 206define i1 @test_EQ_IciEbT(i8 %a, i32 %b) {207; CHECK-LABEL: test_EQ_IciEbT:208; CHECK: // %bb.0: // %entry209; CHECK-NEXT: cmn w1, w0, uxtb210; CHECK-NEXT: cset w0, eq211; CHECK-NEXT: ret212entry:213 %conv = zext i8 %a to i32214 %add = sub i32 0, %b215 %cmp = icmp eq i32 %conv, %add216 ret i1 %cmp217}218 219define i1 @test_EQ_IcsEbT(i8 %a, i16 %b) {220; CHECK-LABEL: test_EQ_IcsEbT:221; CHECK: // %bb.0: // %entry222; CHECK-NEXT: and w8, w0, #0xff223; CHECK-NEXT: cmn w8, w1, sxth224; CHECK-NEXT: cset w0, eq225; CHECK-NEXT: ret226entry:227 %conv = zext i8 %a to i32228 %conv1 = sext i16 %b to i32229 %add = sub nsw i32 0, %conv1230 %cmp = icmp eq i32 %conv, %add231 ret i1 %cmp232}233 234define i1 @test_EQ_IccEbT(i8 %a, i8 %b) {235; CHECK-LABEL: test_EQ_IccEbT:236; CHECK: // %bb.0: // %entry237; CHECK-NEXT: and w8, w0, #0xff238; CHECK-NEXT: cmn w8, w1, uxtb239; CHECK-NEXT: cset w0, eq240; CHECK-NEXT: ret241entry:242 %conv = zext i8 %a to i32243 %conv1 = zext i8 %b to i32244 %add = sub nsw i32 0, %conv1245 %cmp = icmp eq i32 %conv, %add246 ret i1 %cmp247}248 249define i1 @test_NE_IllEbT(i64 %a, i64 %b) {250; CHECK-SD-LABEL: test_NE_IllEbT:251; CHECK-SD: // %bb.0: // %entry252; CHECK-SD-NEXT: cmn x0, x1253; CHECK-SD-NEXT: cset w0, ne254; CHECK-SD-NEXT: ret255;256; CHECK-GI-LABEL: test_NE_IllEbT:257; CHECK-GI: // %bb.0: // %entry258; CHECK-GI-NEXT: cmn x1, x0259; CHECK-GI-NEXT: cset w0, ne260; CHECK-GI-NEXT: ret261entry:262 %add = sub i64 0, %b263 %cmp = icmp ne i64 %add, %a264 ret i1 %cmp265}266 267define i1 @test_NE_IliEbT(i64 %a, i32 %b) {268; CHECK-SD-LABEL: test_NE_IliEbT:269; CHECK-SD: // %bb.0: // %entry270; CHECK-SD-NEXT: cmn x0, w1, sxtw271; CHECK-SD-NEXT: cset w0, ne272; CHECK-SD-NEXT: ret273;274; CHECK-GI-LABEL: test_NE_IliEbT:275; CHECK-GI: // %bb.0: // %entry276; CHECK-GI-NEXT: // kill: def $w1 killed $w1 def $x1277; CHECK-GI-NEXT: sxtw x8, w1278; CHECK-GI-NEXT: cmn x8, x0279; CHECK-GI-NEXT: cset w0, ne280; CHECK-GI-NEXT: ret281entry:282 %conv = sext i32 %b to i64283 %add = sub i64 0, %a284 %cmp = icmp ne i64 %conv, %add285 ret i1 %cmp286}287 288define i1 @test_NE_IlsEbT(i64 %a, i16 %b) {289; CHECK-LABEL: test_NE_IlsEbT:290; CHECK: // %bb.0: // %entry291; CHECK-NEXT: cmn x0, w1, sxth292; CHECK-NEXT: cset w0, ne293; CHECK-NEXT: ret294entry:295 %conv = sext i16 %b to i64296 %add = sub i64 0, %a297 %cmp = icmp ne i64 %conv, %add298 ret i1 %cmp299}300 301define i1 @test_NE_IlcEbT(i64 %a, i8 %b) {302; CHECK-LABEL: test_NE_IlcEbT:303; CHECK: // %bb.0: // %entry304; CHECK-NEXT: cmn x0, w1, uxtb305; CHECK-NEXT: cset w0, ne306; CHECK-NEXT: ret307entry:308 %conv = zext i8 %b to i64309 %add = sub i64 0, %a310 %cmp = icmp ne i64 %conv, %add311 ret i1 %cmp312}313 314define i1 @test_NE_IilEbT(i32 %a, i64 %b) {315; CHECK-SD-LABEL: test_NE_IilEbT:316; CHECK-SD: // %bb.0: // %entry317; CHECK-SD-NEXT: cmn x1, w0, sxtw318; CHECK-SD-NEXT: cset w0, ne319; CHECK-SD-NEXT: ret320;321; CHECK-GI-LABEL: test_NE_IilEbT:322; CHECK-GI: // %bb.0: // %entry323; CHECK-GI-NEXT: // kill: def $w0 killed $w0 def $x0324; CHECK-GI-NEXT: sxtw x8, w0325; CHECK-GI-NEXT: cmn x8, x1326; CHECK-GI-NEXT: cset w0, ne327; CHECK-GI-NEXT: ret328entry:329 %conv = sext i32 %a to i64330 %add = sub i64 0, %b331 %cmp = icmp ne i64 %conv, %add332 ret i1 %cmp333}334 335define i1 @test_NE_IiiEbT(i32 %a, i32 %b) {336; CHECK-SD-LABEL: test_NE_IiiEbT:337; CHECK-SD: // %bb.0: // %entry338; CHECK-SD-NEXT: cmn w0, w1339; CHECK-SD-NEXT: cset w0, ne340; CHECK-SD-NEXT: ret341;342; CHECK-GI-LABEL: test_NE_IiiEbT:343; CHECK-GI: // %bb.0: // %entry344; CHECK-GI-NEXT: cmn w1, w0345; CHECK-GI-NEXT: cset w0, ne346; CHECK-GI-NEXT: ret347entry:348 %add = sub i32 0, %b349 %cmp = icmp ne i32 %add, %a350 ret i1 %cmp351}352 353define i1 @test_NE_IisEbT(i32 %a, i16 %b) {354; CHECK-LABEL: test_NE_IisEbT:355; CHECK: // %bb.0: // %entry356; CHECK-NEXT: cmn w0, w1, sxth357; CHECK-NEXT: cset w0, ne358; CHECK-NEXT: ret359entry:360 %conv = sext i16 %b to i32361 %add = sub i32 0, %a362 %cmp = icmp ne i32 %conv, %add363 ret i1 %cmp364}365 366define i1 @test_NE_IicEbT(i32 %a, i8 %b) {367; CHECK-LABEL: test_NE_IicEbT:368; CHECK: // %bb.0: // %entry369; CHECK-NEXT: cmn w0, w1, uxtb370; CHECK-NEXT: cset w0, ne371; CHECK-NEXT: ret372entry:373 %conv = zext i8 %b to i32374 %add = sub i32 0, %a375 %cmp = icmp ne i32 %conv, %add376 ret i1 %cmp377}378 379define i1 @test_NE_IslEbT(i16 %a, i64 %b) {380; CHECK-LABEL: test_NE_IslEbT:381; CHECK: // %bb.0: // %entry382; CHECK-NEXT: cmn x1, w0, sxth383; CHECK-NEXT: cset w0, ne384; CHECK-NEXT: ret385entry:386 %conv = sext i16 %a to i64387 %add = sub i64 0, %b388 %cmp = icmp ne i64 %conv, %add389 ret i1 %cmp390}391 392define i1 @test_NE_IsiEbT(i16 %a, i32 %b) {393; CHECK-LABEL: test_NE_IsiEbT:394; CHECK: // %bb.0: // %entry395; CHECK-NEXT: cmn w1, w0, sxth396; CHECK-NEXT: cset w0, ne397; CHECK-NEXT: ret398entry:399 %conv = sext i16 %a to i32400 %add = sub i32 0, %b401 %cmp = icmp ne i32 %conv, %add402 ret i1 %cmp403}404 405define i1 @test_NE_IssEbT(i16 %a, i16 %b) {406; CHECK-LABEL: test_NE_IssEbT:407; CHECK: // %bb.0: // %entry408; CHECK-NEXT: sxth w8, w0409; CHECK-NEXT: cmn w8, w1, sxth410; CHECK-NEXT: cset w0, ne411; CHECK-NEXT: ret412entry:413 %conv = sext i16 %a to i32414 %conv1 = sext i16 %b to i32415 %add = sub nsw i32 0, %conv1416 %cmp = icmp ne i32 %conv, %add417 ret i1 %cmp418}419 420define i1 @test_NE_IscEbT(i16 %a, i8 %b) {421; CHECK-LABEL: test_NE_IscEbT:422; CHECK: // %bb.0: // %entry423; CHECK-NEXT: sxth w8, w0424; CHECK-NEXT: cmn w8, w1, uxtb425; CHECK-NEXT: cset w0, ne426; CHECK-NEXT: ret427entry:428 %conv = sext i16 %a to i32429 %conv1 = zext i8 %b to i32430 %add = sub nsw i32 0, %conv1431 %cmp = icmp ne i32 %conv, %add432 ret i1 %cmp433}434 435define i1 @test_NE_IclEbT(i8 %a, i64 %b) {436; CHECK-LABEL: test_NE_IclEbT:437; CHECK: // %bb.0: // %entry438; CHECK-NEXT: cmn x1, w0, uxtb439; CHECK-NEXT: cset w0, ne440; CHECK-NEXT: ret441entry:442 %conv = zext i8 %a to i64443 %add = sub i64 0, %b444 %cmp = icmp ne i64 %conv, %add445 ret i1 %cmp446}447 448define i1 @test_NE_IciEbT(i8 %a, i32 %b) {449; CHECK-LABEL: test_NE_IciEbT:450; CHECK: // %bb.0: // %entry451; CHECK-NEXT: cmn w1, w0, uxtb452; CHECK-NEXT: cset w0, ne453; CHECK-NEXT: ret454entry:455 %conv = zext i8 %a to i32456 %add = sub i32 0, %b457 %cmp = icmp ne i32 %conv, %add458 ret i1 %cmp459}460 461define i1 @test_NE_IcsEbT(i8 %a, i16 %b) {462; CHECK-LABEL: test_NE_IcsEbT:463; CHECK: // %bb.0: // %entry464; CHECK-NEXT: and w8, w0, #0xff465; CHECK-NEXT: cmn w8, w1, sxth466; CHECK-NEXT: cset w0, ne467; CHECK-NEXT: ret468entry:469 %conv = zext i8 %a to i32470 %conv1 = sext i16 %b to i32471 %add = sub nsw i32 0, %conv1472 %cmp = icmp ne i32 %conv, %add473 ret i1 %cmp474}475 476define i1 @test_NE_IccEbT(i8 %a, i8 %b) {477; CHECK-LABEL: test_NE_IccEbT:478; CHECK: // %bb.0: // %entry479; CHECK-NEXT: and w8, w0, #0xff480; CHECK-NEXT: cmn w8, w1, uxtb481; CHECK-NEXT: cset w0, ne482; CHECK-NEXT: ret483entry:484 %conv = zext i8 %a to i32485 %conv1 = zext i8 %b to i32486 %add = sub nsw i32 0, %conv1487 %cmp = icmp ne i32 %conv, %add488 ret i1 %cmp489}490 491define i1 @cmn_large_imm(i32 %a) {492; CHECK-LABEL: cmn_large_imm:493; CHECK: // %bb.0:494; CHECK-NEXT: mov w8, #64765 // =0xfcfd495; CHECK-NEXT: movk w8, #64764, lsl #16496; CHECK-NEXT: cmp w0, w8497; CHECK-NEXT: cset w0, gt498; CHECK-NEXT: ret499 %cmp = icmp sgt i32 %a, -50529027500 ret i1 %cmp501}502 503define i1 @almost_immediate_neg_slt(i32 %x) {504; CHECK-SD-LABEL: almost_immediate_neg_slt:505; CHECK-SD: // %bb.0:506; CHECK-SD-NEXT: cmn w0, #4079, lsl #12 // =16707584507; CHECK-SD-NEXT: cset w0, le508; CHECK-SD-NEXT: ret509;510; CHECK-GI-LABEL: almost_immediate_neg_slt:511; CHECK-GI: // %bb.0:512; CHECK-GI-NEXT: mov w8, #4097 // =0x1001513; CHECK-GI-NEXT: movk w8, #65281, lsl #16514; CHECK-GI-NEXT: cmp w0, w8515; CHECK-GI-NEXT: cset w0, lt516; CHECK-GI-NEXT: ret517 %cmp = icmp slt i32 %x, -16707583518 ret i1 %cmp519}520 521define i1 @almost_immediate_neg_slt_64(i64 %x) {522; CHECK-SD-LABEL: almost_immediate_neg_slt_64:523; CHECK-SD: // %bb.0:524; CHECK-SD-NEXT: cmn x0, #4079, lsl #12 // =16707584525; CHECK-SD-NEXT: cset w0, le526; CHECK-SD-NEXT: ret527;528; CHECK-GI-LABEL: almost_immediate_neg_slt_64:529; CHECK-GI: // %bb.0:530; CHECK-GI-NEXT: mov x8, #-61439 // =0xffffffffffff1001531; CHECK-GI-NEXT: movk x8, #65281, lsl #16532; CHECK-GI-NEXT: cmp x0, x8533; CHECK-GI-NEXT: cset w0, lt534; CHECK-GI-NEXT: ret535 %cmp = icmp slt i64 %x, -16707583536 ret i1 %cmp537}538 539define i1 @almost_immediate_neg_sge(i32 %x) {540; CHECK-SD-LABEL: almost_immediate_neg_sge:541; CHECK-SD: // %bb.0:542; CHECK-SD-NEXT: cmn w0, #4079, lsl #12 // =16707584543; CHECK-SD-NEXT: cset w0, gt544; CHECK-SD-NEXT: ret545;546; CHECK-GI-LABEL: almost_immediate_neg_sge:547; CHECK-GI: // %bb.0:548; CHECK-GI-NEXT: mov w8, #4097 // =0x1001549; CHECK-GI-NEXT: movk w8, #65281, lsl #16550; CHECK-GI-NEXT: cmp w0, w8551; CHECK-GI-NEXT: cset w0, ge552; CHECK-GI-NEXT: ret553 %cmp = icmp sge i32 %x, -16707583554 ret i1 %cmp555}556 557define i1 @almost_immediate_neg_sge_64(i64 %x) {558; CHECK-SD-LABEL: almost_immediate_neg_sge_64:559; CHECK-SD: // %bb.0:560; CHECK-SD-NEXT: cmn x0, #4079, lsl #12 // =16707584561; CHECK-SD-NEXT: cset w0, gt562; CHECK-SD-NEXT: ret563;564; CHECK-GI-LABEL: almost_immediate_neg_sge_64:565; CHECK-GI: // %bb.0:566; CHECK-GI-NEXT: mov x8, #-61439 // =0xffffffffffff1001567; CHECK-GI-NEXT: movk x8, #65281, lsl #16568; CHECK-GI-NEXT: cmp x0, x8569; CHECK-GI-NEXT: cset w0, ge570; CHECK-GI-NEXT: ret571 %cmp = icmp sge i64 %x, -16707583572 ret i1 %cmp573}574 575define i1 @almost_immediate_neg_uge(i32 %x) {576; CHECK-SD-LABEL: almost_immediate_neg_uge:577; CHECK-SD: // %bb.0:578; CHECK-SD-NEXT: cmn w0, #4079, lsl #12 // =16707584579; CHECK-SD-NEXT: cset w0, hi580; CHECK-SD-NEXT: ret581;582; CHECK-GI-LABEL: almost_immediate_neg_uge:583; CHECK-GI: // %bb.0:584; CHECK-GI-NEXT: mov w8, #4097 // =0x1001585; CHECK-GI-NEXT: movk w8, #65281, lsl #16586; CHECK-GI-NEXT: cmp w0, w8587; CHECK-GI-NEXT: cset w0, hs588; CHECK-GI-NEXT: ret589 %cmp = icmp uge i32 %x, -16707583590 ret i1 %cmp591}592 593define i1 @almost_immediate_neg_uge_64(i64 %x) {594; CHECK-SD-LABEL: almost_immediate_neg_uge_64:595; CHECK-SD: // %bb.0:596; CHECK-SD-NEXT: cmn x0, #4079, lsl #12 // =16707584597; CHECK-SD-NEXT: cset w0, hi598; CHECK-SD-NEXT: ret599;600; CHECK-GI-LABEL: almost_immediate_neg_uge_64:601; CHECK-GI: // %bb.0:602; CHECK-GI-NEXT: mov x8, #-61439 // =0xffffffffffff1001603; CHECK-GI-NEXT: movk x8, #65281, lsl #16604; CHECK-GI-NEXT: cmp x0, x8605; CHECK-GI-NEXT: cset w0, hs606; CHECK-GI-NEXT: ret607 %cmp = icmp uge i64 %x, -16707583608 ret i1 %cmp609}610 611define i1 @almost_immediate_neg_ult(i32 %x) {612; CHECK-SD-LABEL: almost_immediate_neg_ult:613; CHECK-SD: // %bb.0:614; CHECK-SD-NEXT: cmn w0, #4079, lsl #12 // =16707584615; CHECK-SD-NEXT: cset w0, ls616; CHECK-SD-NEXT: ret617;618; CHECK-GI-LABEL: almost_immediate_neg_ult:619; CHECK-GI: // %bb.0:620; CHECK-GI-NEXT: mov w8, #4097 // =0x1001621; CHECK-GI-NEXT: movk w8, #65281, lsl #16622; CHECK-GI-NEXT: cmp w0, w8623; CHECK-GI-NEXT: cset w0, lo624; CHECK-GI-NEXT: ret625 %cmp = icmp ult i32 %x, -16707583626 ret i1 %cmp627}628 629define i1 @almost_immediate_neg_ult_64(i64 %x) {630; CHECK-SD-LABEL: almost_immediate_neg_ult_64:631; CHECK-SD: // %bb.0:632; CHECK-SD-NEXT: cmn x0, #4079, lsl #12 // =16707584633; CHECK-SD-NEXT: cset w0, ls634; CHECK-SD-NEXT: ret635;636; CHECK-GI-LABEL: almost_immediate_neg_ult_64:637; CHECK-GI: // %bb.0:638; CHECK-GI-NEXT: mov x8, #-61439 // =0xffffffffffff1001639; CHECK-GI-NEXT: movk x8, #65281, lsl #16640; CHECK-GI-NEXT: cmp x0, x8641; CHECK-GI-NEXT: cset w0, lo642; CHECK-GI-NEXT: ret643 %cmp = icmp ult i64 %x, -16707583644 ret i1 %cmp645}646 647define i1 @almost_immediate_neg_sle(i32 %x) {648; CHECK-SD-LABEL: almost_immediate_neg_sle:649; CHECK-SD: // %bb.0:650; CHECK-SD-NEXT: cmn w0, #4095, lsl #12 // =16773120651; CHECK-SD-NEXT: cset w0, lt652; CHECK-SD-NEXT: ret653;654; CHECK-GI-LABEL: almost_immediate_neg_sle:655; CHECK-GI: // %bb.0:656; CHECK-GI-NEXT: mov w8, #-16773121 // =0xff000fff657; CHECK-GI-NEXT: cmp w0, w8658; CHECK-GI-NEXT: cset w0, le659; CHECK-GI-NEXT: ret660 %cmp = icmp sle i32 %x, -16773121661 ret i1 %cmp662}663 664define i1 @almost_immediate_neg_sle_64(i64 %x) {665; CHECK-SD-LABEL: almost_immediate_neg_sle_64:666; CHECK-SD: // %bb.0:667; CHECK-SD-NEXT: cmn x0, #4095, lsl #12 // =16773120668; CHECK-SD-NEXT: cset w0, lt669; CHECK-SD-NEXT: ret670;671; CHECK-GI-LABEL: almost_immediate_neg_sle_64:672; CHECK-GI: // %bb.0:673; CHECK-GI-NEXT: mov x8, #-16773121 // =0xffffffffff000fff674; CHECK-GI-NEXT: cmp x0, x8675; CHECK-GI-NEXT: cset w0, le676; CHECK-GI-NEXT: ret677 %cmp = icmp sle i64 %x, -16773121678 ret i1 %cmp679}680 681define i1 @almost_immediate_neg_sgt(i32 %x) {682; CHECK-SD-LABEL: almost_immediate_neg_sgt:683; CHECK-SD: // %bb.0:684; CHECK-SD-NEXT: cmn w0, #4095, lsl #12 // =16773120685; CHECK-SD-NEXT: cset w0, ge686; CHECK-SD-NEXT: ret687;688; CHECK-GI-LABEL: almost_immediate_neg_sgt:689; CHECK-GI: // %bb.0:690; CHECK-GI-NEXT: mov w8, #-16773121 // =0xff000fff691; CHECK-GI-NEXT: cmp w0, w8692; CHECK-GI-NEXT: cset w0, gt693; CHECK-GI-NEXT: ret694 %cmp = icmp sgt i32 %x, -16773121695 ret i1 %cmp696}697 698define i1 @almost_immediate_neg_sgt_64(i64 %x) {699; CHECK-SD-LABEL: almost_immediate_neg_sgt_64:700; CHECK-SD: // %bb.0:701; CHECK-SD-NEXT: cmn x0, #4095, lsl #12 // =16773120702; CHECK-SD-NEXT: cset w0, ge703; CHECK-SD-NEXT: ret704;705; CHECK-GI-LABEL: almost_immediate_neg_sgt_64:706; CHECK-GI: // %bb.0:707; CHECK-GI-NEXT: mov x8, #-16773121 // =0xffffffffff000fff708; CHECK-GI-NEXT: cmp x0, x8709; CHECK-GI-NEXT: cset w0, gt710; CHECK-GI-NEXT: ret711 %cmp = icmp sgt i64 %x, -16773121712 ret i1 %cmp713}714 715define i1 @almost_immediate_neg_ule(i32 %x) {716; CHECK-SD-LABEL: almost_immediate_neg_ule:717; CHECK-SD: // %bb.0:718; CHECK-SD-NEXT: cmn w0, #4095, lsl #12 // =16773120719; CHECK-SD-NEXT: cset w0, lo720; CHECK-SD-NEXT: ret721;722; CHECK-GI-LABEL: almost_immediate_neg_ule:723; CHECK-GI: // %bb.0:724; CHECK-GI-NEXT: mov w8, #-16773121 // =0xff000fff725; CHECK-GI-NEXT: cmp w0, w8726; CHECK-GI-NEXT: cset w0, ls727; CHECK-GI-NEXT: ret728 %cmp = icmp ule i32 %x, -16773121729 ret i1 %cmp730}731 732define i1 @almost_immediate_neg_ule_64(i64 %x) {733; CHECK-SD-LABEL: almost_immediate_neg_ule_64:734; CHECK-SD: // %bb.0:735; CHECK-SD-NEXT: cmn x0, #4095, lsl #12 // =16773120736; CHECK-SD-NEXT: cset w0, lo737; CHECK-SD-NEXT: ret738;739; CHECK-GI-LABEL: almost_immediate_neg_ule_64:740; CHECK-GI: // %bb.0:741; CHECK-GI-NEXT: mov x8, #-16773121 // =0xffffffffff000fff742; CHECK-GI-NEXT: cmp x0, x8743; CHECK-GI-NEXT: cset w0, ls744; CHECK-GI-NEXT: ret745 %cmp = icmp ule i64 %x, -16773121746 ret i1 %cmp747}748 749define i1 @almost_immediate_neg_ugt(i32 %x) {750; CHECK-SD-LABEL: almost_immediate_neg_ugt:751; CHECK-SD: // %bb.0:752; CHECK-SD-NEXT: cmn w0, #4095, lsl #12 // =16773120753; CHECK-SD-NEXT: cset w0, hs754; CHECK-SD-NEXT: ret755;756; CHECK-GI-LABEL: almost_immediate_neg_ugt:757; CHECK-GI: // %bb.0:758; CHECK-GI-NEXT: mov w8, #-16773121 // =0xff000fff759; CHECK-GI-NEXT: cmp w0, w8760; CHECK-GI-NEXT: cset w0, hi761; CHECK-GI-NEXT: ret762 %cmp = icmp ugt i32 %x, -16773121763 ret i1 %cmp764}765 766define i1 @almost_immediate_neg_ugt_64(i64 %x) {767; CHECK-SD-LABEL: almost_immediate_neg_ugt_64:768; CHECK-SD: // %bb.0:769; CHECK-SD-NEXT: cmn x0, #4095, lsl #12 // =16773120770; CHECK-SD-NEXT: cset w0, hs771; CHECK-SD-NEXT: ret772;773; CHECK-GI-LABEL: almost_immediate_neg_ugt_64:774; CHECK-GI: // %bb.0:775; CHECK-GI-NEXT: mov x8, #-16773121 // =0xffffffffff000fff776; CHECK-GI-NEXT: cmp x0, x8777; CHECK-GI-NEXT: cset w0, hi778; CHECK-GI-NEXT: ret779 %cmp = icmp ugt i64 %x, -16773121780 ret i1 %cmp781}782 783define i1 @cmn_nsw(i32 %a, i32 %b) {784; CHECK-LABEL: cmn_nsw:785; CHECK: // %bb.0:786; CHECK-NEXT: cmn w0, w1787; CHECK-NEXT: cset w0, gt788; CHECK-NEXT: ret789 %sub = sub nsw i32 0, %b790 %cmp = icmp sgt i32 %a, %sub791 ret i1 %cmp792}793 794define i1 @cmn_nsw_64(i64 %a, i64 %b) {795; CHECK-LABEL: cmn_nsw_64:796; CHECK: // %bb.0:797; CHECK-NEXT: cmn x0, x1798; CHECK-NEXT: cset w0, gt799; CHECK-NEXT: ret800 %sub = sub nsw i64 0, %b801 %cmp = icmp sgt i64 %a, %sub802 ret i1 %cmp803}804 805define i1 @cmn_nsw_neg(i32 %a, i32 %b) {806; CHECK-LABEL: cmn_nsw_neg:807; CHECK: // %bb.0:808; CHECK-NEXT: neg w8, w1809; CHECK-NEXT: cmp w0, w8810; CHECK-NEXT: cset w0, gt811; CHECK-NEXT: ret812 %sub = sub i32 0, %b813 %cmp = icmp sgt i32 %a, %sub814 ret i1 %cmp815}816 817define i1 @cmn_swap(i32 %a, i32 %b) {818; CHECK-SD-LABEL: cmn_swap:819; CHECK-SD: // %bb.0:820; CHECK-SD-NEXT: cmn w0, w1821; CHECK-SD-NEXT: cset w0, lt822; CHECK-SD-NEXT: ret823;824; CHECK-GI-LABEL: cmn_swap:825; CHECK-GI: // %bb.0:826; CHECK-GI-NEXT: cmn w1, w0827; CHECK-GI-NEXT: cset w0, lt828; CHECK-GI-NEXT: ret829 %sub = sub nsw i32 0, %b830 %cmp = icmp sgt i32 %sub, %a831 ret i1 %cmp832}833 834 835define i1 @cmn_nsw_neg_64(i64 %a, i64 %b) {836; CHECK-LABEL: cmn_nsw_neg_64:837; CHECK: // %bb.0:838; CHECK-NEXT: neg x8, x1839; CHECK-NEXT: cmp x0, x8840; CHECK-NEXT: cset w0, gt841; CHECK-NEXT: ret842 %sub = sub i64 0, %b843 %cmp = icmp sgt i64 %a, %sub844 ret i1 %cmp845}846