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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple=arm64-apple-ios -mattr +cmpbr -run-pass=early-ifcvt -verify-machineinstrs -simplify-mir -o - %s | FileCheck %s3---4name: cb_diamond5alignment: 46tracksRegLiveness: true7noPhis: false8isSSA: true9noVRegs: false10hasFakeUses: false11registers:12 - { id: 0, class: gpr64 }13 - { id: 1, class: gpr64 }14 - { id: 2, class: gpr64 }15 - { id: 3, class: gpr64 }16 - { id: 4, class: gpr64 }17 - { id: 5, class: gpr64 }18liveins:19 - { reg: '$x0', virtual-reg: '%0' }20 - { reg: '$x1', virtual-reg: '%1' }21frameInfo:22 maxAlignment: 123 maxCallFrameSize: 024machineFunctionInfo: {}25body: |26 ; CHECK-LABEL: name: cb_diamond27 ; CHECK: bb.0:28 ; CHECK-NEXT: liveins: $x0, $x129 ; CHECK-NEXT: {{ $}}30 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x031 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x132 ; CHECK-NEXT: [[ADDXrr:%[0-9]+]]:gpr64 = ADDXrr [[COPY]], [[COPY1]]33 ; CHECK-NEXT: [[MADDXrrr:%[0-9]+]]:gpr64 = MADDXrrr [[COPY]], [[COPY1]], $xzr34 ; CHECK-NEXT: $xzr = SUBSXrr [[COPY]], [[COPY1]], implicit-def $nzcv35 ; CHECK-NEXT: [[CSELXr:%[0-9]+]]:gpr64 = CSELXr [[ADDXrr]], [[MADDXrrr]], 11, implicit $nzcv36 ; CHECK-NEXT: [[ADDXrr1:%[0-9]+]]:gpr64 = ADDXrr killed [[CSELXr]], [[COPY]]37 ; CHECK-NEXT: $x0 = COPY [[ADDXrr1]]38 ; CHECK-NEXT: RET_ReallyLR implicit $x039 bb.0:40 successors: %bb.1, %bb.241 liveins: $x0, $x142 43 %0:gpr64 = COPY $x044 %1:gpr64 = COPY $x145 CBXPrr 11, %0, %1, %bb.146 B %bb.247 48 bb.1:49 successors: %bb.350 %2:gpr64 = ADDXrr %0, %151 B %bb.352 53 bb.2:54 successors: %bb.355 %3:gpr64 = MADDXrrr %0, %1, $xzr56 B %bb.357 58 bb.3:59 %4:gpr64 = PHI %2, %bb.1, %3, %bb.260 %5:gpr64 = ADDXrr killed %4, %061 $x0 = COPY %562 RET_ReallyLR implicit $x063...64---65name: cb_triangle66alignment: 467tracksRegLiveness: true68noPhis: false69isSSA: true70noVRegs: false71hasFakeUses: false72registers:73 - { id: 0, class: gpr64 }74 - { id: 1, class: gpr64 }75 - { id: 2, class: gpr64 }76 - { id: 3, class: gpr64 }77 - { id: 4, class: gpr64 }78liveins:79 - { reg: '$x0', virtual-reg: '%0' }80 - { reg: '$x1', virtual-reg: '%1' }81frameInfo:82 maxAlignment: 183 maxCallFrameSize: 084machineFunctionInfo: {}85body: |86 ; CHECK-LABEL: name: cb_triangle87 ; CHECK: bb.0:88 ; CHECK-NEXT: liveins: $x0, $x189 ; CHECK-NEXT: {{ $}}90 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x091 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x192 ; CHECK-NEXT: [[ADDXrr:%[0-9]+]]:gpr64 = ADDXrr [[COPY]], [[COPY1]]93 ; CHECK-NEXT: $xzr = SUBSXrr [[COPY]], [[COPY1]], implicit-def $nzcv94 ; CHECK-NEXT: [[CSELXr:%[0-9]+]]:gpr64 = CSELXr [[COPY1]], [[ADDXrr]], 10, implicit $nzcv95 ; CHECK-NEXT: [[ADDXrr1:%[0-9]+]]:gpr64 = ADDXrr killed [[CSELXr]], [[COPY]]96 ; CHECK-NEXT: $x0 = COPY [[ADDXrr1]]97 ; CHECK-NEXT: RET_ReallyLR implicit $x098 bb.0:99 successors: %bb.1, %bb.2100 liveins: $x0, $x1101 102 %0:gpr64 = COPY $x0103 %1:gpr64 = COPY $x1104 CBXPrr 10, %0, %1, %bb.2105 106 bb.1:107 successors: %bb.2108 %2:gpr64 = ADDXrr %0, %1109 110 bb.2:111 %3:gpr64 = PHI %1, %bb.0, %2, %bb.1112 %4:gpr64 = ADDXrr killed %3, %0113 $x0 = COPY %4114 RET_ReallyLR implicit $x0115...116---117name: cbb_diamond_no_ext118alignment: 4119tracksRegLiveness: true120noPhis: false121isSSA: true122noVRegs: false123hasFakeUses: false124registers:125 - { id: 0, class: gpr32 }126 - { id: 1, class: gpr32 }127 - { id: 2, class: gpr32 }128 - { id: 3, class: gpr32 }129 - { id: 4, class: gpr32 }130 - { id: 5, class: gpr32 }131liveins:132 - { reg: '$w0', virtual-reg: '%0' }133 - { reg: '$w1', virtual-reg: '%1' }134frameInfo:135 maxAlignment: 1136 maxCallFrameSize: 0137machineFunctionInfo: {}138body: |139 ; CHECK-LABEL: name: cbb_diamond_no_ext140 ; CHECK: bb.0:141 ; CHECK-NEXT: liveins: $w0, $w1142 ; CHECK-NEXT: {{ $}}143 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0144 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1145 ; CHECK-NEXT: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY1]]146 ; CHECK-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY]], [[COPY1]], $wzr147 ; CHECK-NEXT: $wzr = SUBSWrr [[COPY]], [[COPY1]], implicit-def $nzcv148 ; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[ADDWrr]], [[MADDWrrr]], 11, implicit $nzcv149 ; CHECK-NEXT: [[ADDWrr1:%[0-9]+]]:gpr32 = ADDWrr killed [[CSELWr]], [[COPY]]150 ; CHECK-NEXT: $w0 = COPY [[ADDWrr1]]151 ; CHECK-NEXT: RET_ReallyLR implicit $w0152 bb.0:153 successors: %bb.1, %bb.2154 liveins: $w0, $w1155 156 %0:gpr32 = COPY $w0157 %1:gpr32 = COPY $w1158 CBBAssertExt 11, %0, %1, %bb.1, -1, -1159 B %bb.2160 161 bb.1:162 successors: %bb.3163 %2:gpr32 = ADDWrr %0, %1164 B %bb.3165 166 bb.2:167 successors: %bb.3168 %3:gpr32 = MADDWrrr %0, %1, $wzr169 B %bb.3170 171 bb.3:172 %4:gpr32 = PHI %2, %bb.1, %3, %bb.2173 %5:gpr32 = ADDWrr killed %4, %0174 $w0 = COPY %5175 RET_ReallyLR implicit $w0176...177---178name: cbb_diamond_zext179alignment: 4180tracksRegLiveness: true181noPhis: false182isSSA: true183noVRegs: false184hasFakeUses: false185registers:186 - { id: 0, class: gpr32 }187 - { id: 1, class: gpr32 }188 - { id: 2, class: gpr32 }189 - { id: 3, class: gpr32 }190 - { id: 4, class: gpr32 }191 - { id: 5, class: gpr32 }192liveins:193 - { reg: '$w0', virtual-reg: '%0' }194 - { reg: '$w1', virtual-reg: '%1' }195frameInfo:196 maxAlignment: 1197 maxCallFrameSize: 0198machineFunctionInfo: {}199body: |200 ; CHECK-LABEL: name: cbb_diamond_zext201 ; CHECK: bb.0:202 ; CHECK-NEXT: liveins: $w0, $w1203 ; CHECK-NEXT: {{ $}}204 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0205 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1206 ; CHECK-NEXT: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY1]]207 ; CHECK-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY]], [[COPY1]], $wzr208 ; CHECK-NEXT: [[ANDWri:%[0-9]+]]:gpr32common = ANDWri [[COPY1]], 7209 ; CHECK-NEXT: $wzr = SUBSWrx [[COPY]], [[ANDWri]], 0, implicit-def $nzcv210 ; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[ADDWrr]], [[MADDWrrr]], 11, implicit $nzcv211 ; CHECK-NEXT: [[ADDWrr1:%[0-9]+]]:gpr32 = ADDWrr killed [[CSELWr]], [[COPY]]212 ; CHECK-NEXT: $w0 = COPY [[ADDWrr1]]213 ; CHECK-NEXT: RET_ReallyLR implicit $w0214 bb.0:215 successors: %bb.1, %bb.2216 liveins: $w0, $w1217 218 %0:gpr32 = COPY $w0219 %1:gpr32 = COPY $w1220 CBBAssertExt 11, %0, %1, %bb.1, 0, 0221 B %bb.2222 223 bb.1:224 successors: %bb.3225 %2:gpr32 = ADDWrr %0, %1226 B %bb.3227 228 bb.2:229 successors: %bb.3230 %3:gpr32 = MADDWrrr %0, %1, $wzr231 B %bb.3232 233 bb.3:234 %4:gpr32 = PHI %2, %bb.1, %3, %bb.2235 %5:gpr32 = ADDWrr killed %4, %0236 $w0 = COPY %5237 RET_ReallyLR implicit $w0238...239---240name: cbb_diamond_sext241alignment: 4242tracksRegLiveness: true243noPhis: false244isSSA: true245noVRegs: false246hasFakeUses: false247registers:248 - { id: 0, class: gpr32 }249 - { id: 1, class: gpr32 }250 - { id: 2, class: gpr32 }251 - { id: 3, class: gpr32 }252 - { id: 4, class: gpr32 }253 - { id: 5, class: gpr32 }254liveins:255 - { reg: '$w0', virtual-reg: '%0' }256 - { reg: '$w1', virtual-reg: '%1' }257frameInfo:258 maxAlignment: 1259 maxCallFrameSize: 0260machineFunctionInfo: {}261body: |262 ; CHECK-LABEL: name: cbb_diamond_sext263 ; CHECK: bb.0:264 ; CHECK-NEXT: liveins: $w0, $w1265 ; CHECK-NEXT: {{ $}}266 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0267 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1268 ; CHECK-NEXT: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY1]]269 ; CHECK-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY]], [[COPY1]], $wzr270 ; CHECK-NEXT: [[SBFMWri:%[0-9]+]]:gpr32common = SBFMWri [[COPY1]], 0, 7271 ; CHECK-NEXT: $wzr = SUBSWrx [[COPY]], [[SBFMWri]], 32, implicit-def $nzcv272 ; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[ADDWrr]], [[MADDWrrr]], 11, implicit $nzcv273 ; CHECK-NEXT: [[ADDWrr1:%[0-9]+]]:gpr32 = ADDWrr killed [[CSELWr]], [[COPY]]274 ; CHECK-NEXT: $w0 = COPY [[ADDWrr1]]275 ; CHECK-NEXT: RET_ReallyLR implicit $w0276 bb.0:277 successors: %bb.1, %bb.2278 liveins: $w0, $w1279 280 %0:gpr32 = COPY $w0281 %1:gpr32 = COPY $w1282 CBBAssertExt 11, %0, %1, %bb.1, 4, 4283 B %bb.2284 285 bb.1:286 successors: %bb.3287 %2:gpr32 = ADDWrr %0, %1288 B %bb.3289 290 bb.2:291 successors: %bb.3292 %3:gpr32 = MADDWrrr %0, %1, $wzr293 B %bb.3294 295 bb.3:296 %4:gpr32 = PHI %2, %bb.1, %3, %bb.2297 %5:gpr32 = ADDWrr killed %4, %0298 $w0 = COPY %5299 RET_ReallyLR implicit $w0300...301---302name: cbh_diamond_zext303alignment: 4304tracksRegLiveness: true305noPhis: false306isSSA: true307noVRegs: false308hasFakeUses: false309registers:310 - { id: 0, class: gpr32 }311 - { id: 1, class: gpr32 }312 - { id: 2, class: gpr32 }313 - { id: 3, class: gpr32 }314 - { id: 4, class: gpr32 }315 - { id: 5, class: gpr32 }316liveins:317 - { reg: '$w0', virtual-reg: '%0' }318 - { reg: '$w1', virtual-reg: '%1' }319frameInfo:320 maxAlignment: 1321 maxCallFrameSize: 0322machineFunctionInfo: {}323body: |324 ; CHECK-LABEL: name: cbh_diamond_zext325 ; CHECK: bb.0:326 ; CHECK-NEXT: liveins: $w0, $w1327 ; CHECK-NEXT: {{ $}}328 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0329 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1330 ; CHECK-NEXT: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY1]]331 ; CHECK-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY]], [[COPY1]], $wzr332 ; CHECK-NEXT: [[ANDWri:%[0-9]+]]:gpr32common = ANDWri [[COPY1]], 15333 ; CHECK-NEXT: $wzr = SUBSWrx [[COPY]], [[ANDWri]], 8, implicit-def $nzcv334 ; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[ADDWrr]], [[MADDWrrr]], 11, implicit $nzcv335 ; CHECK-NEXT: [[ADDWrr1:%[0-9]+]]:gpr32 = ADDWrr killed [[CSELWr]], [[COPY]]336 ; CHECK-NEXT: $w0 = COPY [[ADDWrr1]]337 ; CHECK-NEXT: RET_ReallyLR implicit $w0338 bb.0:339 successors: %bb.1, %bb.2340 liveins: $w0, $w1341 342 %0:gpr32 = COPY $w0343 %1:gpr32 = COPY $w1344 CBHAssertExt 11, %0, %1, %bb.1, 1, 1345 B %bb.2346 347 bb.1:348 successors: %bb.3349 %2:gpr32 = ADDWrr %0, %1350 B %bb.3351 352 bb.2:353 successors: %bb.3354 %3:gpr32 = MADDWrrr %0, %1, $wzr355 B %bb.3356 357 bb.3:358 %4:gpr32 = PHI %2, %bb.1, %3, %bb.2359 %5:gpr32 = ADDWrr killed %4, %0360 $w0 = COPY %5361 RET_ReallyLR implicit $w0362...363---364name: cbh_diamond_sext365alignment: 4366tracksRegLiveness: true367noPhis: false368isSSA: true369noVRegs: false370hasFakeUses: false371registers:372 - { id: 0, class: gpr32 }373 - { id: 1, class: gpr32 }374 - { id: 2, class: gpr32 }375 - { id: 3, class: gpr32 }376 - { id: 4, class: gpr32 }377 - { id: 5, class: gpr32 }378liveins:379 - { reg: '$w0', virtual-reg: '%0' }380 - { reg: '$w1', virtual-reg: '%1' }381frameInfo:382 maxAlignment: 1383 maxCallFrameSize: 0384machineFunctionInfo: {}385body: |386 ; CHECK-LABEL: name: cbh_diamond_sext387 ; CHECK: bb.0:388 ; CHECK-NEXT: liveins: $w0, $w1389 ; CHECK-NEXT: {{ $}}390 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0391 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1392 ; CHECK-NEXT: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY1]]393 ; CHECK-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY]], [[COPY1]], $wzr394 ; CHECK-NEXT: [[SBFMWri:%[0-9]+]]:gpr32common = SBFMWri [[COPY1]], 0, 15395 ; CHECK-NEXT: $wzr = SUBSWrx [[COPY]], [[SBFMWri]], 40, implicit-def $nzcv396 ; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[ADDWrr]], [[MADDWrrr]], 11, implicit $nzcv397 ; CHECK-NEXT: [[ADDWrr1:%[0-9]+]]:gpr32 = ADDWrr killed [[CSELWr]], [[COPY]]398 ; CHECK-NEXT: $w0 = COPY [[ADDWrr1]]399 ; CHECK-NEXT: RET_ReallyLR implicit $w0400 bb.0:401 successors: %bb.1, %bb.2402 liveins: $w0, $w1403 404 %0:gpr32 = COPY $w0405 %1:gpr32 = COPY $w1406 CBHAssertExt 11, %0, %1, %bb.1, 5, 5407 B %bb.2408 409 bb.1:410 successors: %bb.3411 %2:gpr32 = ADDWrr %0, %1412 B %bb.3413 414 bb.2:415 successors: %bb.3416 %3:gpr32 = MADDWrrr %0, %1, $wzr417 B %bb.3418 419 bb.3:420 %4:gpr32 = PHI %2, %bb.1, %3, %bb.2421 %5:gpr32 = ADDWrr killed %4, %0422 $w0 = COPY %5423 RET_ReallyLR implicit $w0424...425---426name: cbh_diamond_lhs_sext427alignment: 4428tracksRegLiveness: true429noPhis: false430isSSA: true431noVRegs: false432hasFakeUses: false433registers:434 - { id: 0, class: gpr32 }435 - { id: 1, class: gpr32 }436 - { id: 2, class: gpr32 }437 - { id: 3, class: gpr32 }438 - { id: 4, class: gpr32 }439 - { id: 5, class: gpr32 }440liveins:441 - { reg: '$w0', virtual-reg: '%0' }442 - { reg: '$w1', virtual-reg: '%1' }443frameInfo:444 maxAlignment: 1445 maxCallFrameSize: 0446machineFunctionInfo: {}447body: |448 ; CHECK-LABEL: name: cbh_diamond_lhs_sext449 ; CHECK: bb.0:450 ; CHECK-NEXT: liveins: $w0, $w1451 ; CHECK-NEXT: {{ $}}452 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0453 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1454 ; CHECK-NEXT: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY1]]455 ; CHECK-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY]], [[COPY1]], $wzr456 ; CHECK-NEXT: [[SBFMWri:%[0-9]+]]:gpr32common = SBFMWri [[COPY1]], 0, 15457 ; CHECK-NEXT: $wzr = SUBSWrr [[COPY]], [[SBFMWri]], implicit-def $nzcv458 ; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[ADDWrr]], [[MADDWrrr]], 11, implicit $nzcv459 ; CHECK-NEXT: [[ADDWrr1:%[0-9]+]]:gpr32 = ADDWrr killed [[CSELWr]], [[COPY]]460 ; CHECK-NEXT: $w0 = COPY [[ADDWrr1]]461 ; CHECK-NEXT: RET_ReallyLR implicit $w0462 bb.0:463 successors: %bb.1, %bb.2464 liveins: $w0, $w1465 466 %0:gpr32 = COPY $w0467 %1:gpr32 = COPY $w1468 CBHAssertExt 11, %0, %1, %bb.1, 5, -1469 B %bb.2470 471 bb.1:472 successors: %bb.3473 %2:gpr32 = ADDWrr %0, %1474 B %bb.3475 476 bb.2:477 successors: %bb.3478 %3:gpr32 = MADDWrrr %0, %1, $wzr479 B %bb.3480 481 bb.3:482 %4:gpr32 = PHI %2, %bb.1, %3, %bb.2483 %5:gpr32 = ADDWrr killed %4, %0484 $w0 = COPY %5485 RET_ReallyLR implicit $w0486...487---488name: cbh_diamond_rhs_sext489alignment: 4490tracksRegLiveness: true491noPhis: false492isSSA: true493noVRegs: false494hasFakeUses: false495registers:496 - { id: 0, class: gpr32 }497 - { id: 1, class: gpr32 }498 - { id: 2, class: gpr32 }499 - { id: 3, class: gpr32 }500 - { id: 4, class: gpr32 }501 - { id: 5, class: gpr32 }502liveins:503 - { reg: '$w0', virtual-reg: '%0' }504 - { reg: '$w1', virtual-reg: '%1' }505frameInfo:506 maxAlignment: 1507 maxCallFrameSize: 0508machineFunctionInfo: {}509body: |510 ; CHECK-LABEL: name: cbh_diamond_rhs_sext511 ; CHECK: bb.0:512 ; CHECK-NEXT: liveins: $w0, $w1513 ; CHECK-NEXT: {{ $}}514 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0515 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1516 ; CHECK-NEXT: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY1]]517 ; CHECK-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY]], [[COPY1]], $wzr518 ; CHECK-NEXT: $wzr = SUBSWrx [[COPY]], [[COPY1]], 40, implicit-def $nzcv519 ; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[ADDWrr]], [[MADDWrrr]], 11, implicit $nzcv520 ; CHECK-NEXT: [[ADDWrr1:%[0-9]+]]:gpr32 = ADDWrr killed [[CSELWr]], [[COPY]]521 ; CHECK-NEXT: $w0 = COPY [[ADDWrr1]]522 ; CHECK-NEXT: RET_ReallyLR implicit $w0523 bb.0:524 successors: %bb.1, %bb.2525 liveins: $w0, $w1526 527 %0:gpr32 = COPY $w0528 %1:gpr32 = COPY $w1529 CBHAssertExt 11, %0, %1, %bb.1, -1, 5530 B %bb.2531 532 bb.1:533 successors: %bb.3534 %2:gpr32 = ADDWrr %0, %1535 B %bb.3536 537 bb.2:538 successors: %bb.3539 %3:gpr32 = MADDWrrr %0, %1, $wzr540 B %bb.3541 542 bb.3:543 %4:gpr32 = PHI %2, %bb.1, %3, %bb.2544 %5:gpr32 = ADDWrr killed %4, %0545 $w0 = COPY %5546 RET_ReallyLR implicit $w0547...548