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1; RUN: llc -verify-machineinstrs -mtriple=aarch64-linux-gnu -O0 -fast-isel=0 -global-isel=false %s -o - | FileCheck -enable-var-scope %s2; RUN: llc -verify-machineinstrs -mtriple=aarch64-linux-gnu -O0 -fast-isel=0 -global-isel=false -mattr=+outline-atomics %s -o - | FileCheck -enable-var-scope %s --check-prefix=OUTLINE-ATOMICS3 4define { i8, i1 } @test_cmpxchg_8(ptr %addr, i8 %desired, i8 %new) nounwind {5; OUTLINE-ATOMICS: bl __aarch64_cas1_acq_rel6; CHECK-LABEL: test_cmpxchg_8:7; CHECK: mov [[ADDR:x[0-9]+]], x08; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:9; CHECK: ldaxrb [[OLD:w[0-9]+]], [[[ADDR]]]10; CHECK: cmp [[OLD]], w1, uxtb11; CHECK: b.ne [[DONE:.LBB[0-9]+_[0-9]+]]12; CHECK: stlxrb [[STATUS:w[0-9]+]], w2, [[[ADDR]]]13; CHECK: cbnz [[STATUS]], [[RETRY]]14; CHECK: [[DONE]]:15; CHECK: subs {{w[0-9]+}}, [[OLD]], w1, uxtb16; CHECK: cset {{w[0-9]+}}, eq17 %res = cmpxchg ptr %addr, i8 %desired, i8 %new seq_cst monotonic18 ret { i8, i1 } %res19}20 21define { i16, i1 } @test_cmpxchg_16(ptr %addr, i16 %desired, i16 %new) nounwind {22; OUTLINE-ATOMICS: bl __aarch64_cas2_acq_rel23; CHECK-LABEL: test_cmpxchg_16:24; CHECK: mov [[ADDR:x[0-9]+]], x025; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:26; CHECK: ldaxrh [[OLD:w[0-9]+]], [[[ADDR]]]27; CHECK: cmp [[OLD]], w1, uxth28; CHECK: b.ne [[DONE:.LBB[0-9]+_[0-9]+]]29; CHECK: stlxrh [[STATUS:w[3-9]]], w2, [[[ADDR]]]30; CHECK: cbnz [[STATUS]], [[RETRY]]31; CHECK: [[DONE]]:32; CHECK: subs {{w[0-9]+}}, [[OLD]], w133; CHECK: cset {{w[0-9]+}}, eq34 %res = cmpxchg ptr %addr, i16 %desired, i16 %new seq_cst monotonic35 ret { i16, i1 } %res36}37 38define { i32, i1 } @test_cmpxchg_32(ptr %addr, i32 %desired, i32 %new) nounwind {39; OUTLINE-ATOMICS: bl __aarch64_cas4_acq_rel40; CHECK-LABEL: test_cmpxchg_32:41; CHECK: mov [[ADDR:x[0-9]+]], x042; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:43; CHECK: ldaxr [[OLD:w[0-9]+]], [[[ADDR]]]44; CHECK: cmp [[OLD]], w145; CHECK: b.ne [[DONE:.LBB[0-9]+_[0-9]+]]46; CHECK: stlxr [[STATUS:w[0-9]+]], w2, [[[ADDR]]]47; CHECK: cbnz [[STATUS]], [[RETRY]]48; CHECK: [[DONE]]:49; CHECK: subs {{w[0-9]+}}, [[OLD]], w150; CHECK: cset {{w[0-9]+}}, eq51 %res = cmpxchg ptr %addr, i32 %desired, i32 %new seq_cst monotonic52 ret { i32, i1 } %res53}54 55define { i64, i1 } @test_cmpxchg_64(ptr %addr, i64 %desired, i64 %new) nounwind {56; OUTLINE-ATOMICS: bl __aarch64_cas8_acq_rel57; CHECK-LABEL: test_cmpxchg_64:58; CHECK: mov [[ADDR:x[0-9]+]], x059; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:60; CHECK: ldaxr [[OLD:x[0-9]+]], [[[ADDR]]]61; CHECK: cmp [[OLD]], x162; CHECK: b.ne [[DONE:.LBB[0-9]+_[0-9]+]]63; CHECK: stlxr [[STATUS:w[0-9]+]], x2, [[[ADDR]]]64; CHECK: cbnz [[STATUS]], [[RETRY]]65; CHECK: [[DONE]]:66; CHECK: subs {{x[0-9]+}}, [[OLD]], x167; CHECK: cset {{w[0-9]+}}, eq68 %res = cmpxchg ptr %addr, i64 %desired, i64 %new seq_cst monotonic69 ret { i64, i1 } %res70}71 72define { i128, i1 } @test_cmpxchg_128(ptr %addr, i128 %desired, i128 %new) nounwind {73; OUTLINE-ATOMICS: bl __aarch64_cas16_acq_rel74; CHECK-LABEL: test_cmpxchg_128:75; CHECK: mov [[ADDR:x[0-9]+]], x076; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:77; CHECK: ldaxp [[OLD_LO:x[0-9]+]], [[OLD_HI:x[0-9]+]], [[[ADDR]]]78; CHECK: cmp [[OLD_LO]], x279; CHECK: cset [[CMP_TMP:w[0-9]+]], ne80; CHECK: cmp [[OLD_HI]], x381; CHECK: cinc [[CMP:w[0-9]+]], [[CMP_TMP]], ne82; CHECK: cbnz [[CMP]], [[DONE:.LBB[0-9]+_[0-9]+]]83; CHECK: stlxp [[STATUS:w[0-9]+]], x4, x5, [[[ADDR]]]84; CHECK: cbnz [[STATUS]], [[RETRY]]85; CHECK: [[DONE]]:86 %res = cmpxchg ptr %addr, i128 %desired, i128 %new seq_cst monotonic87 ret { i128, i1 } %res88}89 90; Original implementation assumed the desired & new arguments had already been91; type-legalized into some kind of BUILD_PAIR operation and crashed when this92; was false.93@var128 = dso_local global i128 094define {i128, i1} @test_cmpxchg_128_unsplit(ptr %addr) {95; OUTLINE-ATOMICS: bl __aarch64_cas16_acq_rel96; CHECK-LABEL: test_cmpxchg_128_unsplit:97; CHECK: mov [[ADDR:x[0-9]+]], x098; CHECK: add x[[VAR128:[0-9]+]], {{x[0-9]+}}, :lo12:var12899; CHECK: ldp [[DESIRED_LO:x[0-9]+]], [[DESIRED_HI:x[0-9]+]], [x[[VAR128]]]100; CHECK: ldp [[NEW_LO:x[0-9]+]], [[NEW_HI:x[0-9]+]], [x[[VAR128]]]101; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:102; CHECK: ldaxp [[OLD_LO:x[0-9]+]], [[OLD_HI:x[0-9]+]], [[[ADDR]]]103; CHECK: cmp [[OLD_LO]], [[DESIRED_LO]]104; CHECK: cset [[CMP_TMP:w[0-9]+]], ne105; CHECK: cmp [[OLD_HI]], [[DESIRED_HI]]106; CHECK: cinc [[CMP:w[0-9]+]], [[CMP_TMP]], ne107; CHECK: cbnz [[CMP]], [[DONE:.LBB[0-9]+_[0-9]+]]108; CHECK: stlxp [[STATUS:w[0-9]+]], [[NEW_LO]], [[NEW_HI]], [[[ADDR]]]109; CHECK: cbnz [[STATUS]], [[RETRY]]110; CHECK: [[DONE]]:111 112 %desired = load volatile i128, ptr @var128113 %new = load volatile i128, ptr @var128114 %val = cmpxchg ptr %addr, i128 %desired, i128 %new seq_cst seq_cst115 ret { i128, i1 } %val116}117