457 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64 -o - | FileCheck %s3; RUN: llc < %s -mtriple=aarch64_be -o - | FileCheck %s --check-prefix=CHECKBE4 5define i64 @load32_and16_and(ptr %p, i64 %y) {6; CHECK-LABEL: load32_and16_and:7; CHECK: // %bb.0:8; CHECK-NEXT: ldr w8, [x0]9; CHECK-NEXT: and w8, w1, w810; CHECK-NEXT: and x0, x8, #0xffff11; CHECK-NEXT: ret12;13; CHECKBE-LABEL: load32_and16_and:14; CHECKBE: // %bb.0:15; CHECKBE-NEXT: ldr w8, [x0]16; CHECKBE-NEXT: and w8, w1, w817; CHECKBE-NEXT: and x0, x8, #0xffff18; CHECKBE-NEXT: ret19 %x = load i32, ptr %p, align 420 %xz = zext i32 %x to i6421 %ym = and i64 %y, 6553522 %r = and i64 %ym, %xz23 ret i64 %r24}25 26define i64 @load32_and16_andr(ptr %p, i64 %y) {27; CHECK-LABEL: load32_and16_andr:28; CHECK: // %bb.0:29; CHECK-NEXT: ldr w8, [x0]30; CHECK-NEXT: and w8, w1, w831; CHECK-NEXT: and x0, x8, #0xffff32; CHECK-NEXT: ret33;34; CHECKBE-LABEL: load32_and16_andr:35; CHECKBE: // %bb.0:36; CHECKBE-NEXT: ldr w8, [x0]37; CHECKBE-NEXT: and w8, w1, w838; CHECKBE-NEXT: and x0, x8, #0xffff39; CHECKBE-NEXT: ret40 %x = load i32, ptr %p, align 441 %xz = zext i32 %x to i6442 %a = and i64 %y, %xz43 %r = and i64 %a, 6553544 ret i64 %r45}46 47define i64 @load32_and16_and_sext(ptr %p, i64 %y) {48; CHECK-LABEL: load32_and16_and_sext:49; CHECK: // %bb.0:50; CHECK-NEXT: ldr w8, [x0]51; CHECK-NEXT: and w8, w1, w852; CHECK-NEXT: and x0, x8, #0xffff53; CHECK-NEXT: ret54;55; CHECKBE-LABEL: load32_and16_and_sext:56; CHECKBE: // %bb.0:57; CHECKBE-NEXT: ldr w8, [x0]58; CHECKBE-NEXT: and w8, w1, w859; CHECKBE-NEXT: and x0, x8, #0xffff60; CHECKBE-NEXT: ret61 %x = load i32, ptr %p, align 462 %xz = sext i32 %x to i6463 %a = and i64 %y, %xz64 %r = and i64 %a, 6553565 ret i64 %r66}67 68define i64 @load32_and16_or(ptr %p, i64 %y) {69; CHECK-LABEL: load32_and16_or:70; CHECK: // %bb.0:71; CHECK-NEXT: ldr w8, [x0]72; CHECK-NEXT: orr w8, w1, w873; CHECK-NEXT: and x0, x8, #0xffff74; CHECK-NEXT: ret75;76; CHECKBE-LABEL: load32_and16_or:77; CHECKBE: // %bb.0:78; CHECKBE-NEXT: ldr w8, [x0]79; CHECKBE-NEXT: orr w8, w1, w880; CHECKBE-NEXT: and x0, x8, #0xffff81; CHECKBE-NEXT: ret82 %x = load i32, ptr %p, align 483 %xz = zext i32 %x to i6484 %a = or i64 %y, %xz85 %r = and i64 %a, 6553586 ret i64 %r87}88 89define i64 @load32_and16_orr(ptr %p, i64 %y) {90; CHECK-LABEL: load32_and16_orr:91; CHECK: // %bb.0:92; CHECK-NEXT: ldr w8, [x0]93; CHECK-NEXT: and x9, x1, #0xffff94; CHECK-NEXT: orr x0, x9, x895; CHECK-NEXT: ret96;97; CHECKBE-LABEL: load32_and16_orr:98; CHECKBE: // %bb.0:99; CHECKBE-NEXT: ldr w8, [x0]100; CHECKBE-NEXT: and x9, x1, #0xffff101; CHECKBE-NEXT: orr x0, x9, x8102; CHECKBE-NEXT: ret103 %x = load i32, ptr %p, align 4104 %xz = zext i32 %x to i64105 %ym = and i64 %y, 65535106 %r = or i64 %ym, %xz107 ret i64 %r108}109 110define i64 @load32_and16_xorm1(ptr %p) {111; CHECK-LABEL: load32_and16_xorm1:112; CHECK: // %bb.0:113; CHECK-NEXT: ldr w8, [x0]114; CHECK-NEXT: mvn w8, w8115; CHECK-NEXT: and x0, x8, #0xffff116; CHECK-NEXT: ret117;118; CHECKBE-LABEL: load32_and16_xorm1:119; CHECKBE: // %bb.0:120; CHECKBE-NEXT: ldr w8, [x0]121; CHECKBE-NEXT: mvn w8, w8122; CHECKBE-NEXT: and x0, x8, #0xffff123; CHECKBE-NEXT: ret124 %x = load i32, ptr %p, align 4125 %xz = zext i32 %x to i64126 %a = xor i64 %xz, -1127 %r = and i64 %a, 65535128 ret i64 %r129}130 131define i64 @load64_and16(ptr %p, i128 %y) {132; CHECK-LABEL: load64_and16:133; CHECK: // %bb.0:134; CHECK-NEXT: ldrh w8, [x0]135; CHECK-NEXT: and x0, x2, x8136; CHECK-NEXT: ret137;138; CHECKBE-LABEL: load64_and16:139; CHECKBE: // %bb.0:140; CHECKBE-NEXT: ldrh w8, [x0, #6]141; CHECKBE-NEXT: and x0, x3, x8142; CHECKBE-NEXT: ret143 %x = load i64, ptr %p, align 4144 %xz = zext i64 %x to i128145 %a = and i128 %y, %xz146 %t = trunc i128 %a to i64147 %r = and i64 %t, 65535148 ret i64 %r149}150 151define i64 @load16_and16(ptr %p, i64 %y) {152; CHECK-LABEL: load16_and16:153; CHECK: // %bb.0:154; CHECK-NEXT: ldrh w8, [x0]155; CHECK-NEXT: and x0, x1, x8156; CHECK-NEXT: ret157;158; CHECKBE-LABEL: load16_and16:159; CHECKBE: // %bb.0:160; CHECKBE-NEXT: ldrh w8, [x0]161; CHECKBE-NEXT: and x0, x1, x8162; CHECKBE-NEXT: ret163 %x = load i16, ptr %p, align 4164 %xz = zext i16 %x to i64165 %a = and i64 %y, %xz166 %r = and i64 %a, 65535167 ret i64 %r168}169 170define i64 @load16_and8(ptr %p, i64 %y) {171; CHECK-LABEL: load16_and8:172; CHECK: // %bb.0:173; CHECK-NEXT: ldrh w8, [x0]174; CHECK-NEXT: and w8, w1, w8175; CHECK-NEXT: and x0, x8, #0xff176; CHECK-NEXT: ret177;178; CHECKBE-LABEL: load16_and8:179; CHECKBE: // %bb.0:180; CHECKBE-NEXT: ldrh w8, [x0]181; CHECKBE-NEXT: and w8, w1, w8182; CHECKBE-NEXT: and x0, x8, #0xff183; CHECKBE-NEXT: ret184 %x = load i16, ptr %p, align 4185 %xz = zext i16 %x to i64186 %a = and i64 %y, %xz187 %r = and i64 %a, 255188 ret i64 %r189}190 191define i64 @load16_and7(ptr %p, i64 %y) {192; CHECK-LABEL: load16_and7:193; CHECK: // %bb.0:194; CHECK-NEXT: ldrh w8, [x0]195; CHECK-NEXT: and w8, w1, w8196; CHECK-NEXT: and x0, x8, #0x7f197; CHECK-NEXT: ret198;199; CHECKBE-LABEL: load16_and7:200; CHECKBE: // %bb.0:201; CHECKBE-NEXT: ldrh w8, [x0]202; CHECKBE-NEXT: and w8, w1, w8203; CHECKBE-NEXT: and x0, x8, #0x7f204; CHECKBE-NEXT: ret205 %x = load i16, ptr %p, align 4206 %xz = zext i16 %x to i64207 %a = and i64 %y, %xz208 %r = and i64 %a, 127209 ret i64 %r210}211 212define i64 @load8_and16(ptr %p, i64 %y) {213; CHECK-LABEL: load8_and16:214; CHECK: // %bb.0:215; CHECK-NEXT: ldrb w8, [x0]216; CHECK-NEXT: and x0, x1, x8217; CHECK-NEXT: ret218;219; CHECKBE-LABEL: load8_and16:220; CHECKBE: // %bb.0:221; CHECKBE-NEXT: ldrb w8, [x0]222; CHECKBE-NEXT: and x0, x1, x8223; CHECKBE-NEXT: ret224 %x = load i8, ptr %p, align 4225 %xz = zext i8 %x to i64226 %a = and i64 %y, %xz227 %r = and i64 %a, 65535228 ret i64 %r229}230 231define i64 @load8_and16_zext(ptr %p, i8 %y) {232; CHECK-LABEL: load8_and16_zext:233; CHECK: // %bb.0:234; CHECK-NEXT: ldrb w8, [x0]235; CHECK-NEXT: and w8, w1, w8236; CHECK-NEXT: and x0, x8, #0xff237; CHECK-NEXT: ret238;239; CHECKBE-LABEL: load8_and16_zext:240; CHECKBE: // %bb.0:241; CHECKBE-NEXT: ldrb w8, [x0]242; CHECKBE-NEXT: and w8, w1, w8243; CHECKBE-NEXT: and x0, x8, #0xff244; CHECKBE-NEXT: ret245 %x = load i8, ptr %p, align 4246 %xz = zext i8 %x to i64247 %yz = zext i8 %y to i64248 %a = and i64 %yz, %xz249 %r = and i64 %a, 65535250 ret i64 %r251}252 253define i64 @load8_and16_sext(ptr %p, i8 %y) {254; CHECK-LABEL: load8_and16_sext:255; CHECK: // %bb.0:256; CHECK-NEXT: ldrb w8, [x0]257; CHECK-NEXT: // kill: def $w1 killed $w1 def $x1258; CHECK-NEXT: and x0, x1, x8259; CHECK-NEXT: ret260;261; CHECKBE-LABEL: load8_and16_sext:262; CHECKBE: // %bb.0:263; CHECKBE-NEXT: ldrb w8, [x0]264; CHECKBE-NEXT: // kill: def $w1 killed $w1 def $x1265; CHECKBE-NEXT: and x0, x1, x8266; CHECKBE-NEXT: ret267 %x = load i8, ptr %p, align 4268 %xz = zext i8 %x to i64269 %yz = sext i8 %y to i64270 %a = and i64 %yz, %xz271 %r = and i64 %a, 65535272 ret i64 %r273}274 275define i64 @load8_and16_or(ptr %p, i64 %y) {276; CHECK-LABEL: load8_and16_or:277; CHECK: // %bb.0:278; CHECK-NEXT: ldrb w8, [x0]279; CHECK-NEXT: orr w8, w1, w8280; CHECK-NEXT: and x0, x8, #0xffff281; CHECK-NEXT: ret282;283; CHECKBE-LABEL: load8_and16_or:284; CHECKBE: // %bb.0:285; CHECKBE-NEXT: ldrb w8, [x0]286; CHECKBE-NEXT: orr w8, w1, w8287; CHECKBE-NEXT: and x0, x8, #0xffff288; CHECKBE-NEXT: ret289 %x = load i8, ptr %p, align 4290 %xz = zext i8 %x to i64291 %a = or i64 %y, %xz292 %r = and i64 %a, 65535293 ret i64 %r294}295 296define i64 @load16_and8_manyext(ptr %p, i32 %y) {297; CHECK-LABEL: load16_and8_manyext:298; CHECK: // %bb.0:299; CHECK-NEXT: ldrh w8, [x0]300; CHECK-NEXT: and w8, w1, w8301; CHECK-NEXT: and x0, x8, #0xff302; CHECK-NEXT: ret303;304; CHECKBE-LABEL: load16_and8_manyext:305; CHECKBE: // %bb.0:306; CHECKBE-NEXT: ldrh w8, [x0]307; CHECKBE-NEXT: and w8, w1, w8308; CHECKBE-NEXT: and x0, x8, #0xff309; CHECKBE-NEXT: ret310 %x = load i16, ptr %p, align 4311 %xz = zext i16 %x to i32312 %a = and i32 %y, %xz313 %az = zext i32 %a to i64314 %r = and i64 %az, 255315 ret i64 %r316}317 318define i64 @multiple_load(ptr %p, ptr %q) {319; CHECK-LABEL: multiple_load:320; CHECK: // %bb.0:321; CHECK-NEXT: ldrh w8, [x0]322; CHECK-NEXT: ldr w9, [x1]323; CHECK-NEXT: and w8, w9, w8324; CHECK-NEXT: and x0, x8, #0xff325; CHECK-NEXT: ret326;327; CHECKBE-LABEL: multiple_load:328; CHECKBE: // %bb.0:329; CHECKBE-NEXT: ldrh w8, [x0]330; CHECKBE-NEXT: ldr w9, [x1]331; CHECKBE-NEXT: and w8, w9, w8332; CHECKBE-NEXT: and x0, x8, #0xff333; CHECKBE-NEXT: ret334 %x = load i16, ptr %p, align 4335 %xz = zext i16 %x to i64336 %y = load i32, ptr %q, align 4337 %yz = zext i32 %y to i64338 %a = and i64 %yz, %xz339 %r = and i64 %a, 255340 ret i64 %r341}342 343define i64 @multiple_load_or(ptr %p, ptr %q) {344; CHECK-LABEL: multiple_load_or:345; CHECK: // %bb.0:346; CHECK-NEXT: ldrh w8, [x0]347; CHECK-NEXT: ldr w9, [x1]348; CHECK-NEXT: orr w8, w9, w8349; CHECK-NEXT: and x0, x8, #0xff350; CHECK-NEXT: ret351;352; CHECKBE-LABEL: multiple_load_or:353; CHECKBE: // %bb.0:354; CHECKBE-NEXT: ldrh w8, [x0]355; CHECKBE-NEXT: ldr w9, [x1]356; CHECKBE-NEXT: orr w8, w9, w8357; CHECKBE-NEXT: and x0, x8, #0xff358; CHECKBE-NEXT: ret359 %x = load i16, ptr %p, align 4360 %xz = zext i16 %x to i64361 %y = load i32, ptr %q, align 4362 %yz = zext i32 %y to i64363 %a = or i64 %yz, %xz364 %r = and i64 %a, 255365 ret i64 %r366}367 368define i64 @load32_and16_zexty(ptr %p, i32 %y) {369; CHECK-LABEL: load32_and16_zexty:370; CHECK: // %bb.0:371; CHECK-NEXT: ldr w8, [x0]372; CHECK-NEXT: orr w8, w1, w8373; CHECK-NEXT: and x0, x8, #0xffff374; CHECK-NEXT: ret375;376; CHECKBE-LABEL: load32_and16_zexty:377; CHECKBE: // %bb.0:378; CHECKBE-NEXT: ldr w8, [x0]379; CHECKBE-NEXT: orr w8, w1, w8380; CHECKBE-NEXT: and x0, x8, #0xffff381; CHECKBE-NEXT: ret382 %x = load i32, ptr %p, align 4383 %xz = zext i32 %x to i64384 %yz = zext i32 %y to i64385 %a = or i64 %yz, %xz386 %r = and i64 %a, 65535387 ret i64 %r388}389 390define i64 @load32_and16_sexty(ptr %p, i32 %y) {391; CHECK-LABEL: load32_and16_sexty:392; CHECK: // %bb.0:393; CHECK-NEXT: ldr w8, [x0]394; CHECK-NEXT: orr w8, w1, w8395; CHECK-NEXT: and x0, x8, #0xffff396; CHECK-NEXT: ret397;398; CHECKBE-LABEL: load32_and16_sexty:399; CHECKBE: // %bb.0:400; CHECKBE-NEXT: ldr w8, [x0]401; CHECKBE-NEXT: orr w8, w1, w8402; CHECKBE-NEXT: and x0, x8, #0xffff403; CHECKBE-NEXT: ret404 %x = load i32, ptr %p, align 4405 %xz = zext i32 %x to i64406 %yz = sext i32 %y to i64407 %a = or i64 %yz, %xz408 %r = and i64 %a, 65535409 ret i64 %r410}411 412define zeroext i1 @bigger(ptr nocapture readonly %c, ptr nocapture readonly %e, i64 %d, i64 %p1) {413; CHECK-LABEL: bigger:414; CHECK: // %bb.0: // %entry415; CHECK-NEXT: ldrb w8, [x1, x2]416; CHECK-NEXT: ldrb w9, [x0, x2]417; CHECK-NEXT: and w10, w3, #0x7418; CHECK-NEXT: mov w11, #8 // =0x8419; CHECK-NEXT: sub w10, w11, w10420; CHECK-NEXT: eor w8, w8, w9421; CHECK-NEXT: mov w9, #5 // =0x5422; CHECK-NEXT: lsr w8, w8, w10423; CHECK-NEXT: tst w8, w9424; CHECK-NEXT: cset w0, eq425; CHECK-NEXT: ret426;427; CHECKBE-LABEL: bigger:428; CHECKBE: // %bb.0: // %entry429; CHECKBE-NEXT: ldrb w8, [x1, x2]430; CHECKBE-NEXT: ldrb w9, [x0, x2]431; CHECKBE-NEXT: and w10, w3, #0x7432; CHECKBE-NEXT: mov w11, #8 // =0x8433; CHECKBE-NEXT: sub w10, w11, w10434; CHECKBE-NEXT: eor w8, w8, w9435; CHECKBE-NEXT: mov w9, #5 // =0x5436; CHECKBE-NEXT: lsr w8, w8, w10437; CHECKBE-NEXT: tst w8, w9438; CHECKBE-NEXT: cset w0, eq439; CHECKBE-NEXT: ret440entry:441 %0 = trunc i64 %p1 to i16442 %1 = and i16 %0, 7443 %sh_prom = sub nuw nsw i16 8, %1444 %shl = shl nuw nsw i16 5, %sh_prom445 %arrayidx = getelementptr inbounds i8, ptr %c, i64 %d446 %2 = load i8, ptr %arrayidx, align 1447 %3 = and i16 %shl, 255448 %conv2 = zext i16 %3 to i32449 %arrayidx3 = getelementptr inbounds i8, ptr %e, i64 %d450 %4 = load i8, ptr %arrayidx3, align 1451 %5 = xor i8 %4, %2452 %6 = zext i8 %5 to i32453 %7 = and i32 %6, %conv2454 %cmp.not = icmp eq i32 %7, 0455 ret i1 %cmp.not456}457