121 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc %s --mattr=+complxnum -o - | FileCheck %s3 4target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-ni:1-p2:32:8:8:32-ni:2"5target triple = "aarch64-none-linux-gnu"6 7; Check that deinterleaving pass doesn't generate broken IR8define void @check_deinterleave_crash() #0 {9; CHECK-LABEL: check_deinterleave_crash:10; CHECK: // %bb.0: // %bb11; CHECK-NEXT: mov x8, xzr12; CHECK-NEXT: str wzr, [x8]13bb:14 br label %bb17315 16bb173: ; preds = %bb173, %bb17 %phi177 = phi <2 x i32> [ %add190, %bb173 ], [ zeroinitializer, %bb ]18 %phi178 = phi <2 x i32> [ %add187, %bb173 ], [ zeroinitializer, %bb ]19 %add185 = add <2 x i32> %phi178, <i32 1, i32 1>20 %add186 = add <2 x i32> %phi177, <i32 1, i32 1>21 %shufflevector = shufflevector <2 x i32> zeroinitializer, <2 x i32> zeroinitializer, <2 x i32> zeroinitializer22 %add187 = add <2 x i32> %add185, %shufflevector23 %shufflevector189 = shufflevector <2 x i32> zeroinitializer, <2 x i32> zeroinitializer, <2 x i32> zeroinitializer24 %add190 = add <2 x i32> %add186, %shufflevector18925 br i1 poison, label %bb193, label %bb17326 27bb193: ; preds = %bb17328 %add194 = or <2 x i32> %add190, %add18729 store volatile i32 0, ptr null, align 430 unreachable31}32 33; Check that the deinterleaving pass doesn't try to transform isolated patterns without a relevant deinterleaving pattern34define i32 @check_deinterleaving_has_deinterleave(ptr %a) {35; CHECK-LABEL: check_deinterleaving_has_deinterleave:36; CHECK: // %bb.0: // %entry37; CHECK-NEXT: movi v0.2d, #000000000000000038; CHECK-NEXT: movi v2.4s, #139; CHECK-NEXT: add x8, x0, #1640; CHECK-NEXT: movi v1.2d, #000000000000000041; CHECK-NEXT: movi v4.2d, #000000000000000042; CHECK-NEXT: mov w9, #32 // =0x2043; CHECK-NEXT: movi v3.2d, #000000000000000044; CHECK-NEXT: movi v5.2d, #000000000000000045; CHECK-NEXT: movi v6.2d, #000000000000000046; CHECK-NEXT: movi v7.2d, #000000000000000047; CHECK-NEXT: movi v16.2d, #000000000000000048; CHECK-NEXT: .LBB1_1: // %vector.body49; CHECK-NEXT: // =>This Inner Loop Header: Depth=150; CHECK-NEXT: ldp q17, q18, [x8, #-16]51; CHECK-NEXT: subs x9, x9, #3252; CHECK-NEXT: add x8, x8, #3253; CHECK-NEXT: cmeq v17.16b, v17.16b, #054; CHECK-NEXT: cmeq v18.16b, v18.16b, #055; CHECK-NEXT: ushll2 v19.8h, v17.16b, #056; CHECK-NEXT: ushll v17.8h, v17.8b, #057; CHECK-NEXT: ushll2 v20.8h, v18.16b, #058; CHECK-NEXT: ushll v18.8h, v18.8b, #059; CHECK-NEXT: ushll v21.4s, v19.4h, #060; CHECK-NEXT: ushll2 v19.4s, v19.8h, #061; CHECK-NEXT: ushll v22.4s, v17.4h, #062; CHECK-NEXT: ushll2 v17.4s, v17.8h, #063; CHECK-NEXT: ushll2 v23.4s, v20.8h, #064; CHECK-NEXT: ushll v24.4s, v18.4h, #065; CHECK-NEXT: ushll2 v18.4s, v18.8h, #066; CHECK-NEXT: ushll v20.4s, v20.4h, #067; CHECK-NEXT: and v21.16b, v21.16b, v2.16b68; CHECK-NEXT: and v19.16b, v19.16b, v2.16b69; CHECK-NEXT: and v22.16b, v22.16b, v2.16b70; CHECK-NEXT: and v17.16b, v17.16b, v2.16b71; CHECK-NEXT: and v23.16b, v23.16b, v2.16b72; CHECK-NEXT: and v24.16b, v24.16b, v2.16b73; CHECK-NEXT: and v18.16b, v18.16b, v2.16b74; CHECK-NEXT: and v20.16b, v20.16b, v2.16b75; CHECK-NEXT: add v5.4s, v5.4s, v19.4s76; CHECK-NEXT: add v3.4s, v3.4s, v21.4s77; CHECK-NEXT: add v1.4s, v1.4s, v22.4s78; CHECK-NEXT: add v4.4s, v4.4s, v17.4s79; CHECK-NEXT: add v16.4s, v16.4s, v23.4s80; CHECK-NEXT: add v6.4s, v6.4s, v24.4s81; CHECK-NEXT: add v7.4s, v7.4s, v20.4s82; CHECK-NEXT: add v0.4s, v0.4s, v18.4s83; CHECK-NEXT: b.ne .LBB1_184; CHECK-NEXT: // %bb.2: // %middle.block85; CHECK-NEXT: add v0.4s, v0.4s, v4.4s86; CHECK-NEXT: add v2.4s, v16.4s, v5.4s87; CHECK-NEXT: add v1.4s, v6.4s, v1.4s88; CHECK-NEXT: add v3.4s, v7.4s, v3.4s89; CHECK-NEXT: add v0.4s, v0.4s, v2.4s90; CHECK-NEXT: add v1.4s, v1.4s, v3.4s91; CHECK-NEXT: add v0.4s, v1.4s, v0.4s92; CHECK-NEXT: addv s0, v0.4s93; CHECK-NEXT: fmov w0, s094; CHECK-NEXT: ret95entry:96 br label %vector.body97 98vector.body: ; preds = %vector.body, %entry99 %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]100 %vec.phi = phi <16 x i32> [ zeroinitializer, %entry ], [ %9, %vector.body ]101 %vec.phi50 = phi <16 x i32> [ zeroinitializer, %entry ], [ %10, %vector.body ]102 %next.gep = getelementptr i8, ptr %a, i64 %index103 %4 = getelementptr i8, ptr %next.gep, i64 16104 %wide.load = load <16 x i8>, ptr %next.gep, align 1105 %wide.load51 = load <16 x i8>, ptr %4, align 1106 %5 = icmp eq <16 x i8> %wide.load, zeroinitializer107 %6 = icmp eq <16 x i8> %wide.load51, zeroinitializer108 %7 = zext <16 x i1> %5 to <16 x i32>109 %8 = zext <16 x i1> %6 to <16 x i32>110 %9 = add <16 x i32> %vec.phi, %7111 %10 = add <16 x i32> %vec.phi50, %8112 %index.next = add nuw i64 %index, 32113 %11 = icmp eq i64 %index.next, 32114 br i1 %11, label %middle.block, label %vector.body115 116middle.block:117 %bin.rdx = add <16 x i32> %10, %9118 %12 = tail call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %bin.rdx)119 ret i32 %12120}121