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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s --mattr=+sve -o - | FileCheck %s3 4target triple = "aarch64"5 6; Expected to transform7define <vscale x 4 x float> @complex_add_v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b) {8; CHECK-LABEL: complex_add_v4f32:9; CHECK: // %bb.0: // %entry10; CHECK-NEXT: ptrue p0.s11; CHECK-NEXT: fcadd z1.s, p0/m, z1.s, z0.s, #9012; CHECK-NEXT: mov z0.d, z1.d13; CHECK-NEXT: ret14entry:15 %a.deinterleaved = tail call { <vscale x 2 x float>, <vscale x 2 x float> } @llvm.vector.deinterleave2.nxv4f32(<vscale x 4 x float> %a)16 %a.real = extractvalue { <vscale x 2 x float>, <vscale x 2 x float> } %a.deinterleaved, 017 %a.imag = extractvalue { <vscale x 2 x float>, <vscale x 2 x float> } %a.deinterleaved, 118 %b.deinterleaved = tail call { <vscale x 2 x float>, <vscale x 2 x float> } @llvm.vector.deinterleave2.nxv4f32(<vscale x 4 x float> %b)19 %b.real = extractvalue { <vscale x 2 x float>, <vscale x 2 x float> } %b.deinterleaved, 020 %b.imag = extractvalue { <vscale x 2 x float>, <vscale x 2 x float> } %b.deinterleaved, 121 %0 = fsub fast <vscale x 2 x float> %b.real, %a.imag22 %1 = fadd fast <vscale x 2 x float> %b.imag, %a.real23 %interleaved.vec = tail call <vscale x 4 x float> @llvm.vector.interleave2.nxv4f32(<vscale x 2 x float> %0, <vscale x 2 x float> %1)24 ret <vscale x 4 x float> %interleaved.vec25}26 27; Expected to transform28define <vscale x 8 x float> @complex_add_v8f32(<vscale x 8 x float> %a, <vscale x 8 x float> %b) {29; CHECK-LABEL: complex_add_v8f32:30; CHECK: // %bb.0: // %entry31; CHECK-NEXT: ptrue p0.s32; CHECK-NEXT: fcadd z2.s, p0/m, z2.s, z0.s, #9033; CHECK-NEXT: fcadd z3.s, p0/m, z3.s, z1.s, #9034; CHECK-NEXT: mov z0.d, z2.d35; CHECK-NEXT: mov z1.d, z3.d36; CHECK-NEXT: ret37entry:38 %a.deinterleaved = tail call { <vscale x 4 x float>, <vscale x 4 x float> } @llvm.vector.deinterleave2.nxv8f32(<vscale x 8 x float> %a)39 %a.real = extractvalue { <vscale x 4 x float>, <vscale x 4 x float> } %a.deinterleaved, 040 %a.imag = extractvalue { <vscale x 4 x float>, <vscale x 4 x float> } %a.deinterleaved, 141 %b.deinterleaved = tail call { <vscale x 4 x float>, <vscale x 4 x float> } @llvm.vector.deinterleave2.nxv8f32(<vscale x 8 x float> %b)42 %b.real = extractvalue { <vscale x 4 x float>, <vscale x 4 x float> } %b.deinterleaved, 043 %b.imag = extractvalue { <vscale x 4 x float>, <vscale x 4 x float> } %b.deinterleaved, 144 %0 = fsub fast <vscale x 4 x float> %b.real, %a.imag45 %1 = fadd fast <vscale x 4 x float> %b.imag, %a.real46 %interleaved.vec = tail call <vscale x 8 x float> @llvm.vector.interleave2.nxv8f32(<vscale x 4 x float> %0, <vscale x 4 x float> %1)47 ret <vscale x 8 x float> %interleaved.vec48}49; Expected to transform50define <vscale x 16 x float> @complex_add_v16f32(<vscale x 16 x float> %a, <vscale x 16 x float> %b) {51; CHECK-LABEL: complex_add_v16f32:52; CHECK: // %bb.0: // %entry53; CHECK-NEXT: ptrue p0.s54; CHECK-NEXT: fcadd z4.s, p0/m, z4.s, z0.s, #9055; CHECK-NEXT: fcadd z5.s, p0/m, z5.s, z1.s, #9056; CHECK-NEXT: fcadd z6.s, p0/m, z6.s, z2.s, #9057; CHECK-NEXT: fcadd z7.s, p0/m, z7.s, z3.s, #9058; CHECK-NEXT: mov z0.d, z4.d59; CHECK-NEXT: mov z1.d, z5.d60; CHECK-NEXT: mov z2.d, z6.d61; CHECK-NEXT: mov z3.d, z7.d62; CHECK-NEXT: ret63entry:64 %a.deinterleaved = tail call { <vscale x 8 x float>, <vscale x 8 x float> } @llvm.vector.deinterleave2.nxv16f32(<vscale x 16 x float> %a)65 %a.real = extractvalue { <vscale x 8 x float>, <vscale x 8 x float> } %a.deinterleaved, 066 %a.imag = extractvalue { <vscale x 8 x float>, <vscale x 8 x float> } %a.deinterleaved, 167 %b.deinterleaved = tail call { <vscale x 8 x float>, <vscale x 8 x float> } @llvm.vector.deinterleave2.nxv16f32(<vscale x 16 x float> %b)68 %b.real = extractvalue { <vscale x 8 x float>, <vscale x 8 x float> } %b.deinterleaved, 069 %b.imag = extractvalue { <vscale x 8 x float>, <vscale x 8 x float> } %b.deinterleaved, 170 %0 = fsub fast <vscale x 8 x float> %b.real, %a.imag71 %1 = fadd fast <vscale x 8 x float> %b.imag, %a.real72 %interleaved.vec = tail call <vscale x 16 x float> @llvm.vector.interleave2.nxv16f32(<vscale x 8 x float> %0, <vscale x 8 x float> %1)73 ret <vscale x 16 x float> %interleaved.vec74}75 76declare { <vscale x 2 x float>, <vscale x 2 x float> } @llvm.vector.deinterleave2.nxv4f32(<vscale x 4 x float>)77declare <vscale x 4 x float> @llvm.vector.interleave2.nxv4f32(<vscale x 2 x float>, <vscale x 2 x float>)78 79declare { <vscale x 4 x float>, <vscale x 4 x float> } @llvm.vector.deinterleave2.nxv8f32(<vscale x 8 x float>)80declare <vscale x 8 x float> @llvm.vector.interleave2.nxv8f32(<vscale x 4 x float>, <vscale x 4 x float>)81 82declare { <vscale x 8 x float>, <vscale x 8 x float> } @llvm.vector.deinterleave2.nxv16f32(<vscale x 16 x float>)83declare <vscale x 16 x float> @llvm.vector.interleave2.nxv16f32(<vscale x 8 x float>, <vscale x 8 x float>)84