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1; RUN: llc -enable-machine-outliner=never -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mcpu=cyclone | FileCheck %s2; RUN: llc -enable-machine-outliner=never -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s3 4@var32 = global i32 05@var64 = global i64 06 7define void @test_csel(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {8; CHECK-LABEL: test_csel:9 10 %tst1 = icmp ugt i32 %lhs32, %rhs3211 %val1 = select i1 %tst1, i32 42, i32 5212 store i32 %val1, ptr @var3213; CHECK-DAG: mov [[W52:w[0-9]+]], #{{52|0x34}}14; CHECK-DAG: mov [[W42:w[0-9]+]], #{{42|0x2a}}15; CHECK: csel {{w[0-9]+}}, [[W42]], [[W52]], hi16 17 %rhs64 = sext i32 %rhs32 to i6418 %tst2 = icmp sle i64 %lhs64, %rhs6419 %val2 = select i1 %tst2, i64 %lhs64, i64 %rhs6420 store i64 %val2, ptr @var6421; CHECK: sxtw [[EXT_RHS:x[0-9]+]], {{[wx]}}[[RHS:[0-9]+]]22; CHECK: cmp [[LHS:x[0-9]+]], w[[RHS]], sxtw23; CHECK: csel {{x[0-9]+}}, [[LHS]], [[EXT_RHS]], le24 25 ret void26; CHECK: ret27}28 29define void @test_floatcsel(float %lhs32, float %rhs32, double %lhs64, double %rhs64) {30; CHECK-LABEL: test_floatcsel:31 32 %tst1 = fcmp one float %lhs32, %rhs3233; CHECK: fcmp {{s[0-9]+}}, {{s[0-9]+}}34; CHECK-NOFP-NOT: fcmp35 %val1 = select i1 %tst1, i32 42, i32 5236 store i32 %val1, ptr @var3237; CHECK: mov [[W52:w[0-9]+]], #{{52|0x34}}38; CHECK: mov [[W42:w[0-9]+]], #{{42|0x2a}}39; CHECK: csel [[MAYBETRUE:w[0-9]+]], [[W42]], [[W52]], mi40; CHECK: csel {{w[0-9]+}}, [[W42]], [[MAYBETRUE]], gt41 42 43 %tst2 = fcmp ueq double %lhs64, %rhs6444; CHECK: fcmp {{d[0-9]+}}, {{d[0-9]+}}45; CHECK-NOFP-NOT: fcmp46 %val2 = select i1 %tst2, i64 9, i64 1547 store i64 %val2, ptr @var6448; CHECK: mov w[[CONST15:[0-9]+]], #1549; CHECK: mov {{[wx]}}[[CONST9:[0-9]+]], #{{9|0x9}}50; CHECK: csel [[MAYBETRUE:x[0-9]+]], x[[CONST9]], x[[CONST15]], eq51; CHECK: csel {{x[0-9]+}}, x[[CONST9]], [[MAYBETRUE]], vs52 53 ret void54; CHECK: ret55}56 57 58define void @test_csinc(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {59; CHECK-LABEL: test_csinc:60 61; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).62 %tst1 = icmp ugt i32 %lhs32, %rhs3263 %inc1 = add i32 %rhs32, 164 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs3265 store volatile i32 %val1, ptr @var3266; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]67; CHECK: csinc {{w[0-9]+}}, [[LHS]], [[RHS]], ls68 69 %rhs2 = add i32 %rhs32, 4270 %tst2 = icmp sle i32 %lhs32, %rhs271 %inc2 = add i32 %rhs32, 172 %val2 = select i1 %tst2, i32 %lhs32, i32 %inc273 store volatile i32 %val2, ptr @var3274; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}}75; CHECK: csinc {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le76 77; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).78 %rhs3 = sext i32 %rhs32 to i6479 %tst3 = icmp ugt i64 %lhs64, %rhs380 %inc3 = add i64 %rhs3, 181 %val3 = select i1 %tst3, i64 %inc3, i64 %lhs6482 store volatile i64 %val3, ptr @var6483; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}84; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls85 86 %rhs4 = zext i32 %rhs32 to i6487 %tst4 = icmp sle i64 %lhs64, %rhs488 %inc4 = add i64 %rhs4, 189 %val4 = select i1 %tst4, i64 %lhs64, i64 %inc490 store volatile i64 %val4, ptr @var6491; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}92; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le93 94 ret void95; CHECK: ret96}97 98define void @test_csinv(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {99; CHECK-LABEL: test_csinv:100 101; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).102 %tst1 = icmp ugt i32 %lhs32, %rhs32103 %inc1 = xor i32 -1, %rhs32104 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32105 store volatile i32 %val1, ptr @var32106; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]107; CHECK: csinv {{w[0-9]+}}, [[LHS]], [[RHS]], ls108 109 %rhs2 = add i32 %rhs32, 42110 %tst2 = icmp sle i32 %lhs32, %rhs2111 %inc2 = xor i32 -1, %rhs32112 %val2 = select i1 %tst2, i32 %lhs32, i32 %inc2113 store volatile i32 %val2, ptr @var32114; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}}115; CHECK: csinv {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le116 117; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).118 %rhs3 = sext i32 %rhs32 to i64119 %tst3 = icmp ugt i64 %lhs64, %rhs3120 %inc3 = xor i64 -1, %rhs3121 %val3 = select i1 %tst3, i64 %inc3, i64 %lhs64122 store volatile i64 %val3, ptr @var64123; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}124; CHECK: csinv {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls125 126 %rhs4 = zext i32 %rhs32 to i64127 %tst4 = icmp sle i64 %lhs64, %rhs4128 %inc4 = xor i64 -1, %rhs4129 %val4 = select i1 %tst4, i64 %lhs64, i64 %inc4130 store volatile i64 %val4, ptr @var64131; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}132; CHECK: csinv {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le133 134 ret void135; CHECK: ret136}137 138define void @test_csinv0(i32 %lhs32, i32 %rhs32, i64 %lhs64, i64 %rhs64) minsize {139; CHECK-LABEL: test_csinv0:140 141 %tst1 = icmp ugt i32 %lhs32, %rhs32142 %val1 = select i1 %tst1, i32 0, i32 -1143 store volatile i32 %val1, ptr @var32144; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]145; CHECK: csetm {{w[0-9]+}}, ls146 147 %rhs2 = add i32 %rhs32, 42148 %tst2 = icmp sle i32 %lhs32, %rhs2149 %val2 = select i1 %tst2, i32 -1, i32 %rhs2150 store volatile i32 %val2, ptr @var32151; CHECK: cmp [[LHS2:w[0-9]+]], [[RHS2:w[0-9]+]]152; CHECK: csinv {{w[0-9]+}}, [[RHS2]], wzr, gt153 154; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).155 %rhs3 = mul i64 %rhs64, 19156 %tst3 = icmp ugt i64 %lhs64, %rhs3157 %val3 = select i1 %tst3, i64 %rhs3, i64 -1158 store volatile i64 %val3, ptr @var64159; CHECK: cmp [[LHS3:x[0-9]+]], [[RHS3:x[0-9]+]]160; CHECK: csinv {{x[0-9]+}}, [[RHS3]], xzr, hi161 162 ret void163; CHECK: ret164}165 166define void @test_csneg(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {167; CHECK-LABEL: test_csneg:168 169; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).170 %tst1 = icmp ugt i32 %lhs32, %rhs32171 %inc1 = sub i32 0, %rhs32172 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32173 store volatile i32 %val1, ptr @var32174; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]175; CHECK: csneg {{w[0-9]+}}, [[LHS]], [[RHS]], ls176 177 %rhs2 = add i32 %rhs32, 42178 %tst2 = icmp sle i32 %lhs32, %rhs2179 %inc2 = sub i32 0, %rhs32180 %val2 = select i1 %tst2, i32 %lhs32, i32 %inc2181 store volatile i32 %val2, ptr @var32182; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}}183; CHECK: csneg {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le184 185; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).186 %rhs3 = sext i32 %rhs32 to i64187 %tst3 = icmp ugt i64 %lhs64, %rhs3188 %inc3 = sub i64 0, %rhs3189 %val3 = select i1 %tst3, i64 %inc3, i64 %lhs64190 store volatile i64 %val3, ptr @var64191; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}192; CHECK: csneg {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls193 194 %rhs4 = zext i32 %rhs32 to i64195 %tst4 = icmp sle i64 %lhs64, %rhs4196 %inc4 = sub i64 0, %rhs4197 %val4 = select i1 %tst4, i64 %lhs64, i64 %inc4198 store volatile i64 %val4, ptr @var64199; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}200; CHECK: csneg {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le201 202 ret void203; CHECK: ret204}205 206define void @test_cset(i32 %lhs, i32 %rhs, i64 %lhs64) {207; CHECK-LABEL: test_cset:208 209; N.b. code is not optimal here (32-bit csinc would be better) but210; incoming DAG is too complex211 %tst1 = icmp eq i32 %lhs, %rhs212 %val1 = zext i1 %tst1 to i32213 store i32 %val1, ptr @var32214; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}}215; CHECK: cset {{w[0-9]+}}, eq216 217 %rhs64 = sext i32 %rhs to i64218 %tst2 = icmp ule i64 %lhs64, %rhs64219 %val2 = zext i1 %tst2 to i64220 store i64 %val2, ptr @var64221; CHECK: cset {{w[0-9]+}}, ls222 223 ret void224; CHECK: ret225}226 227define void @test_csetm(i32 %lhs, i32 %rhs, i64 %lhs64) {228; CHECK-LABEL: test_csetm:229 230 %tst1 = icmp eq i32 %lhs, %rhs231 %val1 = sext i1 %tst1 to i32232 store i32 %val1, ptr @var32233; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}}234; CHECK: csetm {{w[0-9]+}}, eq235 236 %rhs64 = sext i32 %rhs to i64237 %tst2 = icmp ule i64 %lhs64, %rhs64238 %val2 = sext i1 %tst2 to i64239 store i64 %val2, ptr @var64240; CHECK: csetm {{x[0-9]+}}, ls241 242 ret void243; CHECK: ret244}245 246define <1 x i1> @test_wide_comparison(i32 %in) {247; CHECK-LABEL: test_wide_comparison:248; CHECK: cmp w0, #1234249; CHECK: cset250 251 %tmp = icmp sgt i32 %in, 1234252 %res = select i1 %tmp, <1 x i1> <i1 1>, <1 x i1> zeroinitializer253 ret <1 x i1> %res254}255 256define i32 @test_select_undef() {257; CHECK-LABEL: test_select_undef:258; CHECK: ret259 %res = select i1 undef, i32 0, i32 42260 ret i32 %res261}262