165 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s3 4define i32 @ori32i32_eq(i32 %x, i32 %y) {5; CHECK-LABEL: ori32i32_eq:6; CHECK: // %bb.0:7; CHECK-NEXT: and w8, w0, #0x18; CHECK-NEXT: cmp w1, #09; CHECK-NEXT: csinc w0, w8, wzr, ne10; CHECK-NEXT: ret11 %xa = and i32 %x, 112 %c = icmp eq i32 %y, 013 %cz = zext i1 %c to i3214 %a = or i32 %xa, %cz15 ret i32 %a16}17 18define i32 @ori32_eq_c(i32 %x, i32 %y) {19; CHECK-LABEL: ori32_eq_c:20; CHECK: // %bb.0:21; CHECK-NEXT: and w8, w0, #0x122; CHECK-NEXT: cmp w1, #023; CHECK-NEXT: csinc w0, w8, wzr, ne24; CHECK-NEXT: ret25 %xa = and i32 %x, 126 %c = icmp eq i32 %y, 027 %cz = zext i1 %c to i3228 %a = or i32 %cz, %xa29 ret i32 %a30}31 32define i32 @ori32i64_eq(i32 %x, i64 %y) {33; CHECK-LABEL: ori32i64_eq:34; CHECK: // %bb.0:35; CHECK-NEXT: and w8, w0, #0x136; CHECK-NEXT: cmp x1, #037; CHECK-NEXT: csinc w0, w8, wzr, ne38; CHECK-NEXT: ret39 %xa = and i32 %x, 140 %c = icmp eq i64 %y, 041 %cz = zext i1 %c to i3242 %a = or i32 %xa, %cz43 ret i32 %a44}45 46define i32 @ori32_sgt(i32 %x, i32 %y) {47; CHECK-LABEL: ori32_sgt:48; CHECK: // %bb.0:49; CHECK-NEXT: and w8, w0, #0x150; CHECK-NEXT: cmp w1, #051; CHECK-NEXT: csinc w0, w8, wzr, le52; CHECK-NEXT: ret53 %xa = and i32 %x, 154 %c = icmp sgt i32 %y, 055 %cz = zext i1 %c to i3256 %a = or i32 %xa, %cz57 ret i32 %a58}59 60; Negative test - too many demanded bits61define i32 @ori32_toomanybits(i32 %x, i32 %y) {62; CHECK-LABEL: ori32_toomanybits:63; CHECK: // %bb.0:64; CHECK-NEXT: cmp w1, #065; CHECK-NEXT: and w8, w0, #0x366; CHECK-NEXT: cset w9, eq67; CHECK-NEXT: orr w0, w8, w968; CHECK-NEXT: ret69 %xa = and i32 %x, 370 %c = icmp eq i32 %y, 071 %cz = zext i1 %c to i3272 %a = or i32 %xa, %cz73 ret i32 %a74}75 76define i32 @andi32_ne(i8 %x, i8 %y) {77; CHECK-LABEL: andi32_ne:78; CHECK: // %bb.0:79; CHECK-NEXT: tst w0, #0xff80; CHECK-NEXT: cset w8, eq81; CHECK-NEXT: tst w1, #0xff82; CHECK-NEXT: csel w0, wzr, w8, eq83; CHECK-NEXT: ret84 %xc = icmp eq i8 %x, 085 %xa = zext i1 %xc to i3286 %c = icmp ne i8 %y, 087 %cz = zext i1 %c to i3288 %a = and i32 %xa, %cz89 ret i32 %a90}91 92define i32 @andi32_sgt(i8 %x, i8 %y) {93; CHECK-LABEL: andi32_sgt:94; CHECK: // %bb.0:95; CHECK-NEXT: sxtb w8, w196; CHECK-NEXT: tst w0, #0xff97; CHECK-NEXT: ccmp w8, #0, #4, eq98; CHECK-NEXT: cset w0, gt99; CHECK-NEXT: ret100 %xc = icmp eq i8 %x, 0101 %xa = zext i1 %xc to i32102 %c = icmp sgt i8 %y, 0103 %cz = zext i1 %c to i32104 %a = and i32 %xa, %cz105 ret i32 %a106}107 108define i64 @ori64i32_eq(i64 %x, i32 %y) {109; CHECK-LABEL: ori64i32_eq:110; CHECK: // %bb.0:111; CHECK-NEXT: and x8, x0, #0x1112; CHECK-NEXT: cmp w1, #0113; CHECK-NEXT: csinc x0, x8, xzr, ne114; CHECK-NEXT: ret115 %xa = and i64 %x, 1116 %c = icmp eq i32 %y, 0117 %cz = zext i1 %c to i64118 %a = or i64 %xa, %cz119 ret i64 %a120}121 122define i64 @ori64i64_eq(i64 %x, i64 %y) {123; CHECK-LABEL: ori64i64_eq:124; CHECK: // %bb.0:125; CHECK-NEXT: and x8, x0, #0x1126; CHECK-NEXT: cmp x1, #0127; CHECK-NEXT: csinc x0, x8, xzr, ne128; CHECK-NEXT: ret129 %xa = and i64 %x, 1130 %c = icmp eq i64 %y, 0131 %cz = zext i1 %c to i64132 %a = or i64 %xa, %cz133 ret i64 %a134}135 136define i64 @ori64_eq_c(i64 %x, i32 %y) {137; CHECK-LABEL: ori64_eq_c:138; CHECK: // %bb.0:139; CHECK-NEXT: and x8, x0, #0x1140; CHECK-NEXT: cmp w1, #0141; CHECK-NEXT: csinc x0, x8, xzr, ne142; CHECK-NEXT: ret143 %xa = and i64 %x, 1144 %c = icmp eq i32 %y, 0145 %cz = zext i1 %c to i64146 %a = or i64 %cz, %xa147 ret i64 %a148}149 150define i64 @andi64_ne(i8 %x, i8 %y) {151; CHECK-LABEL: andi64_ne:152; CHECK: // %bb.0:153; CHECK-NEXT: tst w0, #0xff154; CHECK-NEXT: cset w8, eq155; CHECK-NEXT: tst w1, #0xff156; CHECK-NEXT: csel w0, wzr, w8, eq157; CHECK-NEXT: ret158 %xc = icmp eq i8 %x, 0159 %xa = zext i1 %xc to i64160 %c = icmp ne i8 %y, 0161 %cz = zext i1 %c to i64162 %a = and i64 %xa, %cz163 ret i64 %a164}165