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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=aarch64-none-eabi -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64-none-eabi -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5 6define void @v2i8(ptr %p1) {7; CHECK-SD-LABEL: v2i8:8; CHECK-SD: // %bb.0: // %entry9; CHECK-SD-NEXT: ldr h0, [x0]10; CHECK-SD-NEXT: ushll v0.8h, v0.8b, #011; CHECK-SD-NEXT: ushll v0.4s, v0.4h, #012; CHECK-SD-NEXT: cnt v0.8b, v0.8b13; CHECK-SD-NEXT: uaddlp v0.4h, v0.8b14; CHECK-SD-NEXT: uaddlp v0.2s, v0.4h15; CHECK-SD-NEXT: mov s1, v0.s[1]16; CHECK-SD-NEXT: str b0, [x0]17; CHECK-SD-NEXT: stur b1, [x0, #1]18; CHECK-SD-NEXT: ret19;20; CHECK-GI-LABEL: v2i8:21; CHECK-GI: // %bb.0: // %entry22; CHECK-GI-NEXT: ldr b0, [x0]23; CHECK-GI-NEXT: add x8, x0, #124; CHECK-GI-NEXT: ld1 { v0.b }[1], [x8]25; CHECK-GI-NEXT: cnt v0.8b, v0.8b26; CHECK-GI-NEXT: st1 { v0.b }[0], [x0]27; CHECK-GI-NEXT: st1 { v0.b }[1], [x8]28; CHECK-GI-NEXT: ret29entry:30 %d = load <2 x i8>, ptr %p131 %s = call <2 x i8> @llvm.ctpop(<2 x i8> %d)32 store <2 x i8> %s, ptr %p133 ret void34}35 36define void @v3i8(ptr %p1) {37; CHECK-SD-LABEL: v3i8:38; CHECK-SD: // %bb.0: // %entry39; CHECK-SD-NEXT: sub sp, sp, #1640; CHECK-SD-NEXT: .cfi_def_cfa_offset 1641; CHECK-SD-NEXT: ldr s0, [x0]42; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b43; CHECK-SD-NEXT: bic v0.4h, #255, lsl #844; CHECK-SD-NEXT: cnt v0.8b, v0.8b45; CHECK-SD-NEXT: uaddlp v0.4h, v0.8b46; CHECK-SD-NEXT: uzp1 v1.8b, v0.8b, v0.8b47; CHECK-SD-NEXT: mov h0, v0.h[2]48; CHECK-SD-NEXT: ushll v1.4s, v1.4h, #049; CHECK-SD-NEXT: stur b0, [x0, #2]50; CHECK-SD-NEXT: str h1, [x0]51; CHECK-SD-NEXT: add sp, sp, #1652; CHECK-SD-NEXT: ret53;54; CHECK-GI-LABEL: v3i8:55; CHECK-GI: // %bb.0: // %entry56; CHECK-GI-NEXT: ldr w8, [x0]57; CHECK-GI-NEXT: add x9, x0, #258; CHECK-GI-NEXT: fmov s0, w859; CHECK-GI-NEXT: add x8, x0, #160; CHECK-GI-NEXT: mov b1, v0.b[1]61; CHECK-GI-NEXT: mov v2.b[0], v0.b[0]62; CHECK-GI-NEXT: mov b0, v0.b[2]63; CHECK-GI-NEXT: mov v2.b[1], v1.b[0]64; CHECK-GI-NEXT: mov v2.b[2], v0.b[0]65; CHECK-GI-NEXT: cnt v0.8b, v2.8b66; CHECK-GI-NEXT: st1 { v0.b }[0], [x0]67; CHECK-GI-NEXT: st1 { v0.b }[1], [x8]68; CHECK-GI-NEXT: st1 { v0.b }[2], [x9]69; CHECK-GI-NEXT: ret70entry:71 %d = load <3 x i8>, ptr %p172 %s = call <3 x i8> @llvm.ctpop(<3 x i8> %d)73 store <3 x i8> %s, ptr %p174 ret void75}76 77define void @v4i8(ptr %p1) {78; CHECK-SD-LABEL: v4i8:79; CHECK-SD: // %bb.0: // %entry80; CHECK-SD-NEXT: ldr s0, [x0]81; CHECK-SD-NEXT: ushll v0.8h, v0.8b, #082; CHECK-SD-NEXT: cnt v0.8b, v0.8b83; CHECK-SD-NEXT: uaddlp v0.4h, v0.8b84; CHECK-SD-NEXT: uzp1 v0.8b, v0.8b, v0.8b85; CHECK-SD-NEXT: str s0, [x0]86; CHECK-SD-NEXT: ret87;88; CHECK-GI-LABEL: v4i8:89; CHECK-GI: // %bb.0: // %entry90; CHECK-GI-NEXT: ldr w8, [x0]91; CHECK-GI-NEXT: fmov s0, w892; CHECK-GI-NEXT: mov b1, v0.b[1]93; CHECK-GI-NEXT: mov v2.b[0], v0.b[0]94; CHECK-GI-NEXT: mov b3, v0.b[2]95; CHECK-GI-NEXT: mov b0, v0.b[3]96; CHECK-GI-NEXT: mov v2.b[1], v1.b[0]97; CHECK-GI-NEXT: mov v2.b[2], v3.b[0]98; CHECK-GI-NEXT: mov v2.b[3], v0.b[0]99; CHECK-GI-NEXT: cnt v0.8b, v2.8b100; CHECK-GI-NEXT: fmov w8, s0101; CHECK-GI-NEXT: str w8, [x0]102; CHECK-GI-NEXT: ret103entry:104 %d = load <4 x i8>, ptr %p1105 %s = call <4 x i8> @llvm.ctpop(<4 x i8> %d)106 store <4 x i8> %s, ptr %p1107 ret void108}109 110define <8 x i8> @v8i8(<8 x i8> %d) {111; CHECK-LABEL: v8i8:112; CHECK: // %bb.0: // %entry113; CHECK-NEXT: cnt v0.8b, v0.8b114; CHECK-NEXT: ret115entry:116 %s = call <8 x i8> @llvm.ctpop(<8 x i8> %d)117 ret <8 x i8> %s118}119 120define <16 x i8> @v16i8(<16 x i8> %d) {121; CHECK-LABEL: v16i8:122; CHECK: // %bb.0: // %entry123; CHECK-NEXT: cnt v0.16b, v0.16b124; CHECK-NEXT: ret125entry:126 %s = call <16 x i8> @llvm.ctpop(<16 x i8> %d)127 ret <16 x i8> %s128}129 130define <32 x i8> @v32i8(<32 x i8> %d) {131; CHECK-LABEL: v32i8:132; CHECK: // %bb.0: // %entry133; CHECK-NEXT: cnt v0.16b, v0.16b134; CHECK-NEXT: cnt v1.16b, v1.16b135; CHECK-NEXT: ret136entry:137 %s = call <32 x i8> @llvm.ctpop(<32 x i8> %d)138 ret <32 x i8> %s139}140 141define void @v2i16(ptr %p1) {142; CHECK-SD-LABEL: v2i16:143; CHECK-SD: // %bb.0: // %entry144; CHECK-SD-NEXT: ldr s0, [x0]145; CHECK-SD-NEXT: ushll v0.4s, v0.4h, #0146; CHECK-SD-NEXT: cnt v0.8b, v0.8b147; CHECK-SD-NEXT: uaddlp v0.4h, v0.8b148; CHECK-SD-NEXT: uaddlp v0.2s, v0.4h149; CHECK-SD-NEXT: mov s1, v0.s[1]150; CHECK-SD-NEXT: str h0, [x0]151; CHECK-SD-NEXT: str h1, [x0, #2]152; CHECK-SD-NEXT: ret153;154; CHECK-GI-LABEL: v2i16:155; CHECK-GI: // %bb.0: // %entry156; CHECK-GI-NEXT: ldr h0, [x0]157; CHECK-GI-NEXT: add x8, x0, #2158; CHECK-GI-NEXT: ld1 { v0.h }[1], [x8]159; CHECK-GI-NEXT: cnt v0.8b, v0.8b160; CHECK-GI-NEXT: uaddlp v0.4h, v0.8b161; CHECK-GI-NEXT: str h0, [x0]162; CHECK-GI-NEXT: st1 { v0.h }[1], [x8]163; CHECK-GI-NEXT: ret164entry:165 %d = load <2 x i16>, ptr %p1166 %s = call <2 x i16> @llvm.ctpop(<2 x i16> %d)167 store <2 x i16> %s, ptr %p1168 ret void169}170 171define void @v3i16(ptr %p1) {172; CHECK-SD-LABEL: v3i16:173; CHECK-SD: // %bb.0: // %entry174; CHECK-SD-NEXT: ldr d0, [x0]175; CHECK-SD-NEXT: cnt v0.8b, v0.8b176; CHECK-SD-NEXT: uaddlp v0.4h, v0.8b177; CHECK-SD-NEXT: mov h1, v0.h[2]178; CHECK-SD-NEXT: str s0, [x0]179; CHECK-SD-NEXT: str h1, [x0, #4]180; CHECK-SD-NEXT: ret181;182; CHECK-GI-LABEL: v3i16:183; CHECK-GI: // %bb.0: // %entry184; CHECK-GI-NEXT: ldr d0, [x0]185; CHECK-GI-NEXT: add x8, x0, #2186; CHECK-GI-NEXT: add x9, x0, #4187; CHECK-GI-NEXT: cnt v0.8b, v0.8b188; CHECK-GI-NEXT: uaddlp v0.4h, v0.8b189; CHECK-GI-NEXT: str h0, [x0]190; CHECK-GI-NEXT: st1 { v0.h }[1], [x8]191; CHECK-GI-NEXT: st1 { v0.h }[2], [x9]192; CHECK-GI-NEXT: ret193entry:194 %d = load <3 x i16>, ptr %p1195 %s = call <3 x i16> @llvm.ctpop(<3 x i16> %d)196 store <3 x i16> %s, ptr %p1197 ret void198}199 200define <4 x i16> @v4i16(<4 x i16> %d) {201; CHECK-LABEL: v4i16:202; CHECK: // %bb.0: // %entry203; CHECK-NEXT: cnt v0.8b, v0.8b204; CHECK-NEXT: uaddlp v0.4h, v0.8b205; CHECK-NEXT: ret206entry:207 %s = call <4 x i16> @llvm.ctpop(<4 x i16> %d)208 ret <4 x i16> %s209}210 211define <8 x i16> @v8i16(<8 x i16> %d) {212; CHECK-LABEL: v8i16:213; CHECK: // %bb.0: // %entry214; CHECK-NEXT: cnt v0.16b, v0.16b215; CHECK-NEXT: uaddlp v0.8h, v0.16b216; CHECK-NEXT: ret217entry:218 %s = call <8 x i16> @llvm.ctpop(<8 x i16> %d)219 ret <8 x i16> %s220}221 222define <16 x i16> @v16i16(<16 x i16> %d) {223; CHECK-LABEL: v16i16:224; CHECK: // %bb.0: // %entry225; CHECK-NEXT: cnt v0.16b, v0.16b226; CHECK-NEXT: cnt v1.16b, v1.16b227; CHECK-NEXT: uaddlp v0.8h, v0.16b228; CHECK-NEXT: uaddlp v1.8h, v1.16b229; CHECK-NEXT: ret230entry:231 %s = call <16 x i16> @llvm.ctpop(<16 x i16> %d)232 ret <16 x i16> %s233}234 235define <2 x i32> @v2i32(<2 x i32> %d) {236; CHECK-LABEL: v2i32:237; CHECK: // %bb.0: // %entry238; CHECK-NEXT: cnt v0.8b, v0.8b239; CHECK-NEXT: uaddlp v0.4h, v0.8b240; CHECK-NEXT: uaddlp v0.2s, v0.4h241; CHECK-NEXT: ret242entry:243 %s = call <2 x i32> @llvm.ctpop(<2 x i32> %d)244 ret <2 x i32> %s245}246 247define <3 x i32> @v3i32(<3 x i32> %d) {248; CHECK-LABEL: v3i32:249; CHECK: // %bb.0: // %entry250; CHECK-NEXT: cnt v0.16b, v0.16b251; CHECK-NEXT: uaddlp v0.8h, v0.16b252; CHECK-NEXT: uaddlp v0.4s, v0.8h253; CHECK-NEXT: ret254entry:255 %s = call <3 x i32> @llvm.ctpop(<3 x i32> %d)256 ret <3 x i32> %s257}258 259define <4 x i32> @v4i32(<4 x i32> %d) {260; CHECK-LABEL: v4i32:261; CHECK: // %bb.0: // %entry262; CHECK-NEXT: cnt v0.16b, v0.16b263; CHECK-NEXT: uaddlp v0.8h, v0.16b264; CHECK-NEXT: uaddlp v0.4s, v0.8h265; CHECK-NEXT: ret266entry:267 %s = call <4 x i32> @llvm.ctpop(<4 x i32> %d)268 ret <4 x i32> %s269}270 271define <8 x i32> @v8i32(<8 x i32> %d) {272; CHECK-LABEL: v8i32:273; CHECK: // %bb.0: // %entry274; CHECK-NEXT: cnt v0.16b, v0.16b275; CHECK-NEXT: cnt v1.16b, v1.16b276; CHECK-NEXT: uaddlp v0.8h, v0.16b277; CHECK-NEXT: uaddlp v1.8h, v1.16b278; CHECK-NEXT: uaddlp v0.4s, v0.8h279; CHECK-NEXT: uaddlp v1.4s, v1.8h280; CHECK-NEXT: ret281entry:282 %s = call <8 x i32> @llvm.ctpop(<8 x i32> %d)283 ret <8 x i32> %s284}285 286define <2 x i64> @v2i64(<2 x i64> %d) {287; CHECK-LABEL: v2i64:288; CHECK: // %bb.0: // %entry289; CHECK-NEXT: cnt v0.16b, v0.16b290; CHECK-NEXT: uaddlp v0.8h, v0.16b291; CHECK-NEXT: uaddlp v0.4s, v0.8h292; CHECK-NEXT: uaddlp v0.2d, v0.4s293; CHECK-NEXT: ret294entry:295 %s = call <2 x i64> @llvm.ctpop(<2 x i64> %d)296 ret <2 x i64> %s297}298 299define <3 x i64> @v3i64(<3 x i64> %d) {300; CHECK-SD-LABEL: v3i64:301; CHECK-SD: // %bb.0: // %entry302; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0303; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1304; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2305; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]306; CHECK-SD-NEXT: cnt v1.16b, v2.16b307; CHECK-SD-NEXT: cnt v0.16b, v0.16b308; CHECK-SD-NEXT: uaddlp v1.8h, v1.16b309; CHECK-SD-NEXT: uaddlp v2.4s, v1.8h310; CHECK-SD-NEXT: uaddlp v0.8h, v0.16b311; CHECK-SD-NEXT: uaddlp v2.2d, v2.4s312; CHECK-SD-NEXT: uaddlp v0.4s, v0.8h313; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2314; CHECK-SD-NEXT: uaddlp v0.2d, v0.4s315; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8316; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0317; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1318; CHECK-SD-NEXT: ret319;320; CHECK-GI-LABEL: v3i64:321; CHECK-GI: // %bb.0: // %entry322; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0323; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1324; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]325; CHECK-GI-NEXT: cnt v1.8b, v2.8b326; CHECK-GI-NEXT: cnt v0.16b, v0.16b327; CHECK-GI-NEXT: uaddlv h1, v1.8b328; CHECK-GI-NEXT: uaddlp v0.8h, v0.16b329; CHECK-GI-NEXT: mov w8, v1.s[0]330; CHECK-GI-NEXT: uaddlp v0.4s, v0.8h331; CHECK-GI-NEXT: fmov d2, x8332; CHECK-GI-NEXT: uaddlp v0.2d, v0.4s333; CHECK-GI-NEXT: mov d1, v0.d[1]334; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0335; CHECK-GI-NEXT: ret336entry:337 %s = call <3 x i64> @llvm.ctpop(<3 x i64> %d)338 ret <3 x i64> %s339}340 341define <4 x i64> @v4i64(<4 x i64> %d) {342; CHECK-LABEL: v4i64:343; CHECK: // %bb.0: // %entry344; CHECK-NEXT: cnt v0.16b, v0.16b345; CHECK-NEXT: cnt v1.16b, v1.16b346; CHECK-NEXT: uaddlp v0.8h, v0.16b347; CHECK-NEXT: uaddlp v1.8h, v1.16b348; CHECK-NEXT: uaddlp v0.4s, v0.8h349; CHECK-NEXT: uaddlp v1.4s, v1.8h350; CHECK-NEXT: uaddlp v0.2d, v0.4s351; CHECK-NEXT: uaddlp v1.2d, v1.4s352; CHECK-NEXT: ret353entry:354 %s = call <4 x i64> @llvm.ctpop(<4 x i64> %d)355 ret <4 x i64> %s356}357 358define <2 x i128> @v2i128(<2 x i128> %d) {359; CHECK-SD-LABEL: v2i128:360; CHECK-SD: // %bb.0: // %entry361; CHECK-SD-NEXT: fmov d0, x2362; CHECK-SD-NEXT: fmov d1, x0363; CHECK-SD-NEXT: mov v1.d[1], x1364; CHECK-SD-NEXT: mov v0.d[1], x3365; CHECK-SD-NEXT: mov x1, xzr366; CHECK-SD-NEXT: mov x3, xzr367; CHECK-SD-NEXT: cnt v1.16b, v1.16b368; CHECK-SD-NEXT: cnt v0.16b, v0.16b369; CHECK-SD-NEXT: addv b1, v1.16b370; CHECK-SD-NEXT: addv b0, v0.16b371; CHECK-SD-NEXT: fmov x0, d1372; CHECK-SD-NEXT: fmov x2, d0373; CHECK-SD-NEXT: ret374;375; CHECK-GI-LABEL: v2i128:376; CHECK-GI: // %bb.0: // %entry377; CHECK-GI-NEXT: mov v0.d[0], x0378; CHECK-GI-NEXT: mov v1.d[0], x2379; CHECK-GI-NEXT: mov v0.d[1], x1380; CHECK-GI-NEXT: mov v1.d[1], x3381; CHECK-GI-NEXT: mov x1, xzr382; CHECK-GI-NEXT: mov x3, xzr383; CHECK-GI-NEXT: cnt v0.16b, v0.16b384; CHECK-GI-NEXT: cnt v1.16b, v1.16b385; CHECK-GI-NEXT: uaddlv h0, v0.16b386; CHECK-GI-NEXT: uaddlv h1, v1.16b387; CHECK-GI-NEXT: mov w0, v0.s[0]388; CHECK-GI-NEXT: mov w2, v1.s[0]389; CHECK-GI-NEXT: ret390entry:391 %s = call <2 x i128> @llvm.ctpop(<2 x i128> %d)392 ret <2 x i128> %s393}394 395define <3 x i128> @v3i128(<3 x i128> %d) {396; CHECK-SD-LABEL: v3i128:397; CHECK-SD: // %bb.0: // %entry398; CHECK-SD-NEXT: fmov d0, x4399; CHECK-SD-NEXT: fmov d1, x2400; CHECK-SD-NEXT: fmov d2, x0401; CHECK-SD-NEXT: mov v0.d[1], x5402; CHECK-SD-NEXT: mov v1.d[1], x3403; CHECK-SD-NEXT: mov v2.d[1], x1404; CHECK-SD-NEXT: mov x1, xzr405; CHECK-SD-NEXT: mov x3, xzr406; CHECK-SD-NEXT: mov x5, xzr407; CHECK-SD-NEXT: cnt v0.16b, v0.16b408; CHECK-SD-NEXT: cnt v1.16b, v1.16b409; CHECK-SD-NEXT: cnt v2.16b, v2.16b410; CHECK-SD-NEXT: addv b0, v0.16b411; CHECK-SD-NEXT: addv b1, v1.16b412; CHECK-SD-NEXT: addv b2, v2.16b413; CHECK-SD-NEXT: fmov x0, d2414; CHECK-SD-NEXT: fmov x2, d1415; CHECK-SD-NEXT: fmov x4, d0416; CHECK-SD-NEXT: ret417;418; CHECK-GI-LABEL: v3i128:419; CHECK-GI: // %bb.0: // %entry420; CHECK-GI-NEXT: mov v0.d[0], x0421; CHECK-GI-NEXT: mov v1.d[0], x2422; CHECK-GI-NEXT: mov v2.d[0], x4423; CHECK-GI-NEXT: mov v0.d[1], x1424; CHECK-GI-NEXT: mov v1.d[1], x3425; CHECK-GI-NEXT: mov v2.d[1], x5426; CHECK-GI-NEXT: mov x1, xzr427; CHECK-GI-NEXT: mov x3, xzr428; CHECK-GI-NEXT: mov x5, xzr429; CHECK-GI-NEXT: cnt v0.16b, v0.16b430; CHECK-GI-NEXT: cnt v1.16b, v1.16b431; CHECK-GI-NEXT: cnt v2.16b, v2.16b432; CHECK-GI-NEXT: uaddlv h0, v0.16b433; CHECK-GI-NEXT: uaddlv h1, v1.16b434; CHECK-GI-NEXT: uaddlv h2, v2.16b435; CHECK-GI-NEXT: mov w0, v0.s[0]436; CHECK-GI-NEXT: mov w2, v1.s[0]437; CHECK-GI-NEXT: mov w4, v2.s[0]438; CHECK-GI-NEXT: ret439entry:440 %s = call <3 x i128> @llvm.ctpop(<3 x i128> %d)441 ret <3 x i128> %s442}443 444define <4 x i128> @v4i128(<4 x i128> %d) {445; CHECK-SD-LABEL: v4i128:446; CHECK-SD: // %bb.0: // %entry447; CHECK-SD-NEXT: fmov d0, x6448; CHECK-SD-NEXT: fmov d1, x4449; CHECK-SD-NEXT: fmov d2, x2450; CHECK-SD-NEXT: fmov d3, x0451; CHECK-SD-NEXT: mov v1.d[1], x5452; CHECK-SD-NEXT: mov v2.d[1], x3453; CHECK-SD-NEXT: mov v0.d[1], x7454; CHECK-SD-NEXT: mov v3.d[1], x1455; CHECK-SD-NEXT: mov x1, xzr456; CHECK-SD-NEXT: mov x3, xzr457; CHECK-SD-NEXT: mov x5, xzr458; CHECK-SD-NEXT: mov x7, xzr459; CHECK-SD-NEXT: cnt v1.16b, v1.16b460; CHECK-SD-NEXT: cnt v2.16b, v2.16b461; CHECK-SD-NEXT: cnt v0.16b, v0.16b462; CHECK-SD-NEXT: cnt v3.16b, v3.16b463; CHECK-SD-NEXT: addv b1, v1.16b464; CHECK-SD-NEXT: addv b2, v2.16b465; CHECK-SD-NEXT: addv b0, v0.16b466; CHECK-SD-NEXT: addv b3, v3.16b467; CHECK-SD-NEXT: fmov x2, d2468; CHECK-SD-NEXT: fmov x4, d1469; CHECK-SD-NEXT: fmov x6, d0470; CHECK-SD-NEXT: fmov x0, d3471; CHECK-SD-NEXT: ret472;473; CHECK-GI-LABEL: v4i128:474; CHECK-GI: // %bb.0: // %entry475; CHECK-GI-NEXT: mov v0.d[0], x0476; CHECK-GI-NEXT: mov v1.d[0], x2477; CHECK-GI-NEXT: mov v2.d[0], x4478; CHECK-GI-NEXT: mov v3.d[0], x6479; CHECK-GI-NEXT: mov v0.d[1], x1480; CHECK-GI-NEXT: mov v1.d[1], x3481; CHECK-GI-NEXT: mov v2.d[1], x5482; CHECK-GI-NEXT: mov v3.d[1], x7483; CHECK-GI-NEXT: mov x1, xzr484; CHECK-GI-NEXT: mov x3, xzr485; CHECK-GI-NEXT: mov x5, xzr486; CHECK-GI-NEXT: mov x7, xzr487; CHECK-GI-NEXT: cnt v0.16b, v0.16b488; CHECK-GI-NEXT: cnt v1.16b, v1.16b489; CHECK-GI-NEXT: cnt v2.16b, v2.16b490; CHECK-GI-NEXT: cnt v3.16b, v3.16b491; CHECK-GI-NEXT: uaddlv h0, v0.16b492; CHECK-GI-NEXT: uaddlv h1, v1.16b493; CHECK-GI-NEXT: uaddlv h2, v2.16b494; CHECK-GI-NEXT: uaddlv h3, v3.16b495; CHECK-GI-NEXT: mov w0, v0.s[0]496; CHECK-GI-NEXT: mov w2, v1.s[0]497; CHECK-GI-NEXT: mov w4, v2.s[0]498; CHECK-GI-NEXT: mov w6, v3.s[0]499; CHECK-GI-NEXT: ret500entry:501 %s = call <4 x i128> @llvm.ctpop(<4 x i128> %d)502 ret <4 x i128> %s503}504 505define i8 @i8(i8 %x) {506; CHECK-SD-LABEL: i8:507; CHECK-SD: // %bb.0: // %entry508; CHECK-SD-NEXT: and w8, w0, #0xff509; CHECK-SD-NEXT: fmov s0, w8510; CHECK-SD-NEXT: cnt v0.8b, v0.8b511; CHECK-SD-NEXT: fmov w0, s0512; CHECK-SD-NEXT: ret513;514; CHECK-GI-LABEL: i8:515; CHECK-GI: // %bb.0: // %entry516; CHECK-GI-NEXT: // kill: def $w0 killed $w0 def $x0517; CHECK-GI-NEXT: and x8, x0, #0xff518; CHECK-GI-NEXT: fmov d0, x8519; CHECK-GI-NEXT: cnt v0.8b, v0.8b520; CHECK-GI-NEXT: uaddlv h0, v0.8b521; CHECK-GI-NEXT: fmov w0, s0522; CHECK-GI-NEXT: ret523entry:524 %s = call i8 @llvm.ctpop.i8(i8 %x)525 ret i8 %s526}527 528define i16 @i16_mask(i16 %x) {529; CHECK-SD-LABEL: i16_mask:530; CHECK-SD: // %bb.0: // %entry531; CHECK-SD-NEXT: and w8, w0, #0xff532; CHECK-SD-NEXT: fmov s0, w8533; CHECK-SD-NEXT: cnt v0.8b, v0.8b534; CHECK-SD-NEXT: fmov w0, s0535; CHECK-SD-NEXT: ret536;537; CHECK-GI-LABEL: i16_mask:538; CHECK-GI: // %bb.0: // %entry539; CHECK-GI-NEXT: and w8, w0, #0xff540; CHECK-GI-NEXT: and x8, x8, #0xffff541; CHECK-GI-NEXT: fmov d0, x8542; CHECK-GI-NEXT: cnt v0.8b, v0.8b543; CHECK-GI-NEXT: uaddlv h0, v0.8b544; CHECK-GI-NEXT: fmov w0, s0545; CHECK-GI-NEXT: ret546entry:547 %and = and i16 %x, 255548 %s = call i16 @llvm.ctpop.i16(i16 %and)549 ret i16 %s550}551 552define i32 @i32_mask(i32 %x) {553; CHECK-SD-LABEL: i32_mask:554; CHECK-SD: // %bb.0: // %entry555; CHECK-SD-NEXT: and w8, w0, #0xff556; CHECK-SD-NEXT: fmov s0, w8557; CHECK-SD-NEXT: cnt v0.8b, v0.8b558; CHECK-SD-NEXT: fmov w0, s0559; CHECK-SD-NEXT: ret560;561; CHECK-GI-LABEL: i32_mask:562; CHECK-GI: // %bb.0: // %entry563; CHECK-GI-NEXT: and w8, w0, #0xff564; CHECK-GI-NEXT: fmov s0, w8565; CHECK-GI-NEXT: cnt v0.8b, v0.8b566; CHECK-GI-NEXT: uaddlv h0, v0.8b567; CHECK-GI-NEXT: fmov w0, s0568; CHECK-GI-NEXT: ret569entry:570 %and = and i32 %x, 255571 %s = call i32 @llvm.ctpop.i32(i32 %and)572 ret i32 %s573}574 575define i32 @i32_mask_negative(i32 %x) {576; CHECK-SD-LABEL: i32_mask_negative:577; CHECK-SD: // %bb.0: // %entry578; CHECK-SD-NEXT: and w8, w0, #0xffff579; CHECK-SD-NEXT: fmov s0, w8580; CHECK-SD-NEXT: cnt v0.8b, v0.8b581; CHECK-SD-NEXT: addv b0, v0.8b582; CHECK-SD-NEXT: fmov w0, s0583; CHECK-SD-NEXT: ret584;585; CHECK-GI-LABEL: i32_mask_negative:586; CHECK-GI: // %bb.0: // %entry587; CHECK-GI-NEXT: and w8, w0, #0xffff588; CHECK-GI-NEXT: fmov s0, w8589; CHECK-GI-NEXT: cnt v0.8b, v0.8b590; CHECK-GI-NEXT: uaddlv h0, v0.8b591; CHECK-GI-NEXT: fmov w0, s0592; CHECK-GI-NEXT: ret593entry:594 %and = and i32 %x, 65535595 %s = call i32 @llvm.ctpop.i32(i32 %and)596 ret i32 %s597}598 599define i128 @i128_mask(i128 %x) {600; CHECK-SD-LABEL: i128_mask:601; CHECK-SD: // %bb.0: // %entry602; CHECK-SD-NEXT: movi v0.2d, #0000000000000000603; CHECK-SD-NEXT: and x8, x0, #0xff604; CHECK-SD-NEXT: mov x1, xzr605; CHECK-SD-NEXT: mov v0.d[0], x8606; CHECK-SD-NEXT: cnt v0.16b, v0.16b607; CHECK-SD-NEXT: addv b0, v0.16b608; CHECK-SD-NEXT: fmov x0, d0609; CHECK-SD-NEXT: ret610;611; CHECK-GI-LABEL: i128_mask:612; CHECK-GI: // %bb.0: // %entry613; CHECK-GI-NEXT: and x8, x0, #0xff614; CHECK-GI-NEXT: mov x1, xzr615; CHECK-GI-NEXT: mov v0.d[0], x8616; CHECK-GI-NEXT: mov v0.d[1], xzr617; CHECK-GI-NEXT: cnt v0.16b, v0.16b618; CHECK-GI-NEXT: uaddlv h0, v0.16b619; CHECK-GI-NEXT: mov w0, v0.s[0]620; CHECK-GI-NEXT: ret621entry:622 %and = and i128 %x, 255623 %s = call i128 @llvm.ctpop.i128(i128 %and)624 ret i128 %s625}626