824 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=aarch64-none-eabi -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64-none-eabi -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5 6define void @v2i8(ptr %p1) {7; CHECK-SD-LABEL: v2i8:8; CHECK-SD: // %bb.0: // %entry9; CHECK-SD-NEXT: ldr h0, [x0]10; CHECK-SD-NEXT: movi v1.2s, #111; CHECK-SD-NEXT: ushll v0.8h, v0.8b, #012; CHECK-SD-NEXT: ushll v0.4s, v0.4h, #013; CHECK-SD-NEXT: orr v0.2s, #1, lsl #814; CHECK-SD-NEXT: sub v1.2s, v0.2s, v1.2s15; CHECK-SD-NEXT: bic v0.8b, v1.8b, v0.8b16; CHECK-SD-NEXT: movi v1.2s, #3217; CHECK-SD-NEXT: clz v0.2s, v0.2s18; CHECK-SD-NEXT: sub v0.2s, v1.2s, v0.2s19; CHECK-SD-NEXT: mov s1, v0.s[1]20; CHECK-SD-NEXT: str b0, [x0]21; CHECK-SD-NEXT: stur b1, [x0, #1]22; CHECK-SD-NEXT: ret23;24; CHECK-GI-LABEL: v2i8:25; CHECK-GI: // %bb.0: // %entry26; CHECK-GI-NEXT: ld1 { v1.b }[0], [x0]27; CHECK-GI-NEXT: ldr b2, [x0, #1]28; CHECK-GI-NEXT: movi d0, #0xffffffffffffffff29; CHECK-GI-NEXT: mov v1.s[1], v2.s[0]30; CHECK-GI-NEXT: add v0.2s, v1.2s, v0.2s31; CHECK-GI-NEXT: bic v0.8b, v0.8b, v1.8b32; CHECK-GI-NEXT: mov w8, v0.s[1]33; CHECK-GI-NEXT: mov v0.b[1], w834; CHECK-GI-NEXT: add x8, x0, #135; CHECK-GI-NEXT: cnt v0.8b, v0.8b36; CHECK-GI-NEXT: st1 { v0.b }[0], [x0]37; CHECK-GI-NEXT: st1 { v0.b }[1], [x8]38; CHECK-GI-NEXT: ret39entry:40 %d = load <2 x i8>, ptr %p141 %s = call <2 x i8> @llvm.cttz(<2 x i8> %d, i1 false)42 store <2 x i8> %s, ptr %p143 ret void44}45 46define void @v3i8(ptr %p1) {47; CHECK-SD-LABEL: v3i8:48; CHECK-SD: // %bb.0: // %entry49; CHECK-SD-NEXT: sub sp, sp, #1650; CHECK-SD-NEXT: .cfi_def_cfa_offset 1651; CHECK-SD-NEXT: ldr s0, [x0]52; CHECK-SD-NEXT: movi v1.4h, #153; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b54; CHECK-SD-NEXT: orr v0.4h, #1, lsl #855; CHECK-SD-NEXT: sub v1.4h, v0.4h, v1.4h56; CHECK-SD-NEXT: bic v0.8b, v1.8b, v0.8b57; CHECK-SD-NEXT: movi v1.4h, #1658; CHECK-SD-NEXT: clz v0.4h, v0.4h59; CHECK-SD-NEXT: sub v0.4h, v1.4h, v0.4h60; CHECK-SD-NEXT: uzp1 v1.8b, v0.8b, v0.8b61; CHECK-SD-NEXT: mov h0, v0.h[2]62; CHECK-SD-NEXT: ushll v1.4s, v1.4h, #063; CHECK-SD-NEXT: stur b0, [x0, #2]64; CHECK-SD-NEXT: str h1, [x0]65; CHECK-SD-NEXT: add sp, sp, #1666; CHECK-SD-NEXT: ret67;68; CHECK-GI-LABEL: v3i8:69; CHECK-GI: // %bb.0: // %entry70; CHECK-GI-NEXT: ldr w9, [x0]71; CHECK-GI-NEXT: mov w8, #65535 // =0xffff72; CHECK-GI-NEXT: fmov s2, w873; CHECK-GI-NEXT: fmov s0, w974; CHECK-GI-NEXT: mov v2.h[1], w875; CHECK-GI-NEXT: mov b1, v0.b[1]76; CHECK-GI-NEXT: mov v2.h[2], w877; CHECK-GI-NEXT: add x8, x0, #178; CHECK-GI-NEXT: fmov w9, s179; CHECK-GI-NEXT: mov b1, v0.b[2]80; CHECK-GI-NEXT: mov v0.h[1], w981; CHECK-GI-NEXT: fmov w9, s182; CHECK-GI-NEXT: mov v0.h[2], w983; CHECK-GI-NEXT: add x9, x0, #284; CHECK-GI-NEXT: eor v1.8b, v0.8b, v2.8b85; CHECK-GI-NEXT: add v0.4h, v0.4h, v2.4h86; CHECK-GI-NEXT: and v0.8b, v1.8b, v0.8b87; CHECK-GI-NEXT: uzp1 v0.8b, v0.8b, v0.8b88; CHECK-GI-NEXT: cnt v0.8b, v0.8b89; CHECK-GI-NEXT: st1 { v0.b }[0], [x0]90; CHECK-GI-NEXT: st1 { v0.b }[1], [x8]91; CHECK-GI-NEXT: st1 { v0.b }[2], [x9]92; CHECK-GI-NEXT: ret93entry:94 %d = load <3 x i8>, ptr %p195 %s = call <3 x i8> @llvm.cttz(<3 x i8> %d, i1 false)96 store <3 x i8> %s, ptr %p197 ret void98}99 100define void @v4i8(ptr %p1) {101; CHECK-SD-LABEL: v4i8:102; CHECK-SD: // %bb.0: // %entry103; CHECK-SD-NEXT: ldr s0, [x0]104; CHECK-SD-NEXT: movi v1.4h, #1105; CHECK-SD-NEXT: ushll v0.8h, v0.8b, #0106; CHECK-SD-NEXT: orr v0.4h, #1, lsl #8107; CHECK-SD-NEXT: sub v1.4h, v0.4h, v1.4h108; CHECK-SD-NEXT: bic v0.8b, v1.8b, v0.8b109; CHECK-SD-NEXT: movi v1.4h, #16110; CHECK-SD-NEXT: clz v0.4h, v0.4h111; CHECK-SD-NEXT: sub v0.4h, v1.4h, v0.4h112; CHECK-SD-NEXT: uzp1 v0.8b, v0.8b, v0.8b113; CHECK-SD-NEXT: str s0, [x0]114; CHECK-SD-NEXT: ret115;116; CHECK-GI-LABEL: v4i8:117; CHECK-GI: // %bb.0: // %entry118; CHECK-GI-NEXT: ldr w9, [x0]119; CHECK-GI-NEXT: mov w8, #255 // =0xff120; CHECK-GI-NEXT: fmov s0, w9121; CHECK-GI-NEXT: mov b1, v0.b[1]122; CHECK-GI-NEXT: mov b2, v0.b[2]123; CHECK-GI-NEXT: mov b3, v0.b[3]124; CHECK-GI-NEXT: fmov w9, s1125; CHECK-GI-NEXT: fmov s1, w8126; CHECK-GI-NEXT: mov v0.h[1], w9127; CHECK-GI-NEXT: mov v1.h[1], w8128; CHECK-GI-NEXT: fmov w9, s2129; CHECK-GI-NEXT: mov v0.h[2], w9130; CHECK-GI-NEXT: mov v1.h[2], w8131; CHECK-GI-NEXT: fmov w9, s3132; CHECK-GI-NEXT: mov v0.h[3], w9133; CHECK-GI-NEXT: mov v1.h[3], w8134; CHECK-GI-NEXT: eor v2.8b, v0.8b, v1.8b135; CHECK-GI-NEXT: add v0.4h, v0.4h, v1.4h136; CHECK-GI-NEXT: and v0.8b, v2.8b, v0.8b137; CHECK-GI-NEXT: uzp1 v0.8b, v0.8b, v0.8b138; CHECK-GI-NEXT: cnt v0.8b, v0.8b139; CHECK-GI-NEXT: fmov w8, s0140; CHECK-GI-NEXT: str w8, [x0]141; CHECK-GI-NEXT: ret142entry:143 %d = load <4 x i8>, ptr %p1144 %s = call <4 x i8> @llvm.cttz(<4 x i8> %d, i1 false)145 store <4 x i8> %s, ptr %p1146 ret void147}148 149define <8 x i8> @v8i8(<8 x i8> %d) {150; CHECK-SD-LABEL: v8i8:151; CHECK-SD: // %bb.0: // %entry152; CHECK-SD-NEXT: movi v1.8b, #1153; CHECK-SD-NEXT: sub v1.8b, v0.8b, v1.8b154; CHECK-SD-NEXT: bic v0.8b, v1.8b, v0.8b155; CHECK-SD-NEXT: cnt v0.8b, v0.8b156; CHECK-SD-NEXT: ret157;158; CHECK-GI-LABEL: v8i8:159; CHECK-GI: // %bb.0: // %entry160; CHECK-GI-NEXT: movi d1, #0xffffffffffffffff161; CHECK-GI-NEXT: add v1.8b, v0.8b, v1.8b162; CHECK-GI-NEXT: bic v0.8b, v1.8b, v0.8b163; CHECK-GI-NEXT: cnt v0.8b, v0.8b164; CHECK-GI-NEXT: ret165entry:166 %s = call <8 x i8> @llvm.cttz(<8 x i8> %d, i1 false)167 ret <8 x i8> %s168}169 170define <16 x i8> @v16i8(<16 x i8> %d) {171; CHECK-SD-LABEL: v16i8:172; CHECK-SD: // %bb.0: // %entry173; CHECK-SD-NEXT: movi v1.16b, #1174; CHECK-SD-NEXT: sub v1.16b, v0.16b, v1.16b175; CHECK-SD-NEXT: bic v0.16b, v1.16b, v0.16b176; CHECK-SD-NEXT: cnt v0.16b, v0.16b177; CHECK-SD-NEXT: ret178;179; CHECK-GI-LABEL: v16i8:180; CHECK-GI: // %bb.0: // %entry181; CHECK-GI-NEXT: movi v1.2d, #0xffffffffffffffff182; CHECK-GI-NEXT: add v1.16b, v0.16b, v1.16b183; CHECK-GI-NEXT: bic v0.16b, v1.16b, v0.16b184; CHECK-GI-NEXT: cnt v0.16b, v0.16b185; CHECK-GI-NEXT: ret186entry:187 %s = call <16 x i8> @llvm.cttz(<16 x i8> %d, i1 false)188 ret <16 x i8> %s189}190 191define <32 x i8> @v32i8(<32 x i8> %d) {192; CHECK-SD-LABEL: v32i8:193; CHECK-SD: // %bb.0: // %entry194; CHECK-SD-NEXT: movi v2.16b, #1195; CHECK-SD-NEXT: sub v3.16b, v0.16b, v2.16b196; CHECK-SD-NEXT: sub v2.16b, v1.16b, v2.16b197; CHECK-SD-NEXT: bic v0.16b, v3.16b, v0.16b198; CHECK-SD-NEXT: bic v1.16b, v2.16b, v1.16b199; CHECK-SD-NEXT: cnt v0.16b, v0.16b200; CHECK-SD-NEXT: cnt v1.16b, v1.16b201; CHECK-SD-NEXT: ret202;203; CHECK-GI-LABEL: v32i8:204; CHECK-GI: // %bb.0: // %entry205; CHECK-GI-NEXT: movi v2.2d, #0xffffffffffffffff206; CHECK-GI-NEXT: add v3.16b, v0.16b, v2.16b207; CHECK-GI-NEXT: add v2.16b, v1.16b, v2.16b208; CHECK-GI-NEXT: bic v0.16b, v3.16b, v0.16b209; CHECK-GI-NEXT: bic v1.16b, v2.16b, v1.16b210; CHECK-GI-NEXT: cnt v0.16b, v0.16b211; CHECK-GI-NEXT: cnt v1.16b, v1.16b212; CHECK-GI-NEXT: ret213entry:214 %s = call <32 x i8> @llvm.cttz(<32 x i8> %d, i1 false)215 ret <32 x i8> %s216}217 218define void @v2i16(ptr %p1) {219; CHECK-SD-LABEL: v2i16:220; CHECK-SD: // %bb.0: // %entry221; CHECK-SD-NEXT: ldr s0, [x0]222; CHECK-SD-NEXT: movi v1.2s, #1223; CHECK-SD-NEXT: ushll v0.4s, v0.4h, #0224; CHECK-SD-NEXT: orr v0.2s, #1, lsl #16225; CHECK-SD-NEXT: sub v1.2s, v0.2s, v1.2s226; CHECK-SD-NEXT: bic v0.8b, v1.8b, v0.8b227; CHECK-SD-NEXT: movi v1.2s, #32228; CHECK-SD-NEXT: clz v0.2s, v0.2s229; CHECK-SD-NEXT: sub v0.2s, v1.2s, v0.2s230; CHECK-SD-NEXT: mov s1, v0.s[1]231; CHECK-SD-NEXT: str h0, [x0]232; CHECK-SD-NEXT: str h1, [x0, #2]233; CHECK-SD-NEXT: ret234;235; CHECK-GI-LABEL: v2i16:236; CHECK-GI: // %bb.0: // %entry237; CHECK-GI-NEXT: mov w8, #65535 // =0xffff238; CHECK-GI-NEXT: ld1 { v0.h }[0], [x0]239; CHECK-GI-NEXT: ldr h1, [x0, #2]240; CHECK-GI-NEXT: fmov s2, w8241; CHECK-GI-NEXT: mov v0.s[1], v1.s[0]242; CHECK-GI-NEXT: mov v2.s[1], w8243; CHECK-GI-NEXT: add x8, x0, #2244; CHECK-GI-NEXT: eor v1.8b, v0.8b, v2.8b245; CHECK-GI-NEXT: add v0.2s, v0.2s, v2.2s246; CHECK-GI-NEXT: and v0.8b, v1.8b, v0.8b247; CHECK-GI-NEXT: uzp1 v0.4h, v0.4h, v0.4h248; CHECK-GI-NEXT: cnt v0.8b, v0.8b249; CHECK-GI-NEXT: uaddlp v0.4h, v0.8b250; CHECK-GI-NEXT: str h0, [x0]251; CHECK-GI-NEXT: st1 { v0.h }[1], [x8]252; CHECK-GI-NEXT: ret253entry:254 %d = load <2 x i16>, ptr %p1255 %s = call <2 x i16> @llvm.cttz(<2 x i16> %d, i1 false)256 store <2 x i16> %s, ptr %p1257 ret void258}259 260define void @v3i16(ptr %p1) {261; CHECK-SD-LABEL: v3i16:262; CHECK-SD: // %bb.0: // %entry263; CHECK-SD-NEXT: movi v0.4h, #1264; CHECK-SD-NEXT: ldr d1, [x0]265; CHECK-SD-NEXT: sub v0.4h, v1.4h, v0.4h266; CHECK-SD-NEXT: bic v0.8b, v0.8b, v1.8b267; CHECK-SD-NEXT: movi v1.4h, #16268; CHECK-SD-NEXT: clz v0.4h, v0.4h269; CHECK-SD-NEXT: sub v0.4h, v1.4h, v0.4h270; CHECK-SD-NEXT: mov h1, v0.h[2]271; CHECK-SD-NEXT: str s0, [x0]272; CHECK-SD-NEXT: str h1, [x0, #4]273; CHECK-SD-NEXT: ret274;275; CHECK-GI-LABEL: v3i16:276; CHECK-GI: // %bb.0: // %entry277; CHECK-GI-NEXT: mov w8, #65535 // =0xffff278; CHECK-GI-NEXT: ldr d1, [x0]279; CHECK-GI-NEXT: add x9, x0, #4280; CHECK-GI-NEXT: fmov s0, w8281; CHECK-GI-NEXT: mov v0.h[1], w8282; CHECK-GI-NEXT: mov v0.h[2], w8283; CHECK-GI-NEXT: add x8, x0, #2284; CHECK-GI-NEXT: eor v2.8b, v1.8b, v0.8b285; CHECK-GI-NEXT: add v0.4h, v1.4h, v0.4h286; CHECK-GI-NEXT: and v0.8b, v2.8b, v0.8b287; CHECK-GI-NEXT: cnt v0.8b, v0.8b288; CHECK-GI-NEXT: uaddlp v0.4h, v0.8b289; CHECK-GI-NEXT: str h0, [x0]290; CHECK-GI-NEXT: st1 { v0.h }[1], [x8]291; CHECK-GI-NEXT: st1 { v0.h }[2], [x9]292; CHECK-GI-NEXT: ret293entry:294 %d = load <3 x i16>, ptr %p1295 %s = call <3 x i16> @llvm.cttz(<3 x i16> %d, i1 false)296 store <3 x i16> %s, ptr %p1297 ret void298}299 300define <4 x i16> @v4i16(<4 x i16> %d) {301; CHECK-SD-LABEL: v4i16:302; CHECK-SD: // %bb.0: // %entry303; CHECK-SD-NEXT: movi v1.4h, #1304; CHECK-SD-NEXT: sub v1.4h, v0.4h, v1.4h305; CHECK-SD-NEXT: bic v0.8b, v1.8b, v0.8b306; CHECK-SD-NEXT: movi v1.4h, #16307; CHECK-SD-NEXT: clz v0.4h, v0.4h308; CHECK-SD-NEXT: sub v0.4h, v1.4h, v0.4h309; CHECK-SD-NEXT: ret310;311; CHECK-GI-LABEL: v4i16:312; CHECK-GI: // %bb.0: // %entry313; CHECK-GI-NEXT: movi d1, #0xffffffffffffffff314; CHECK-GI-NEXT: add v1.4h, v0.4h, v1.4h315; CHECK-GI-NEXT: bic v0.8b, v1.8b, v0.8b316; CHECK-GI-NEXT: cnt v0.8b, v0.8b317; CHECK-GI-NEXT: uaddlp v0.4h, v0.8b318; CHECK-GI-NEXT: ret319entry:320 %s = call <4 x i16> @llvm.cttz(<4 x i16> %d, i1 false)321 ret <4 x i16> %s322}323 324define <8 x i16> @v8i16(<8 x i16> %d) {325; CHECK-SD-LABEL: v8i16:326; CHECK-SD: // %bb.0: // %entry327; CHECK-SD-NEXT: movi v1.8h, #1328; CHECK-SD-NEXT: sub v1.8h, v0.8h, v1.8h329; CHECK-SD-NEXT: bic v0.16b, v1.16b, v0.16b330; CHECK-SD-NEXT: movi v1.8h, #16331; CHECK-SD-NEXT: clz v0.8h, v0.8h332; CHECK-SD-NEXT: sub v0.8h, v1.8h, v0.8h333; CHECK-SD-NEXT: ret334;335; CHECK-GI-LABEL: v8i16:336; CHECK-GI: // %bb.0: // %entry337; CHECK-GI-NEXT: movi v1.2d, #0xffffffffffffffff338; CHECK-GI-NEXT: add v1.8h, v0.8h, v1.8h339; CHECK-GI-NEXT: bic v0.16b, v1.16b, v0.16b340; CHECK-GI-NEXT: cnt v0.16b, v0.16b341; CHECK-GI-NEXT: uaddlp v0.8h, v0.16b342; CHECK-GI-NEXT: ret343entry:344 %s = call <8 x i16> @llvm.cttz(<8 x i16> %d, i1 false)345 ret <8 x i16> %s346}347 348define <16 x i16> @v16i16(<16 x i16> %d) {349; CHECK-SD-LABEL: v16i16:350; CHECK-SD: // %bb.0: // %entry351; CHECK-SD-NEXT: movi v2.8h, #1352; CHECK-SD-NEXT: sub v3.8h, v0.8h, v2.8h353; CHECK-SD-NEXT: sub v2.8h, v1.8h, v2.8h354; CHECK-SD-NEXT: bic v0.16b, v3.16b, v0.16b355; CHECK-SD-NEXT: bic v1.16b, v2.16b, v1.16b356; CHECK-SD-NEXT: movi v2.8h, #16357; CHECK-SD-NEXT: clz v0.8h, v0.8h358; CHECK-SD-NEXT: clz v1.8h, v1.8h359; CHECK-SD-NEXT: sub v0.8h, v2.8h, v0.8h360; CHECK-SD-NEXT: sub v1.8h, v2.8h, v1.8h361; CHECK-SD-NEXT: ret362;363; CHECK-GI-LABEL: v16i16:364; CHECK-GI: // %bb.0: // %entry365; CHECK-GI-NEXT: movi v2.2d, #0xffffffffffffffff366; CHECK-GI-NEXT: add v3.8h, v0.8h, v2.8h367; CHECK-GI-NEXT: add v2.8h, v1.8h, v2.8h368; CHECK-GI-NEXT: bic v0.16b, v3.16b, v0.16b369; CHECK-GI-NEXT: bic v1.16b, v2.16b, v1.16b370; CHECK-GI-NEXT: cnt v0.16b, v0.16b371; CHECK-GI-NEXT: cnt v1.16b, v1.16b372; CHECK-GI-NEXT: uaddlp v0.8h, v0.16b373; CHECK-GI-NEXT: uaddlp v1.8h, v1.16b374; CHECK-GI-NEXT: ret375entry:376 %s = call <16 x i16> @llvm.cttz(<16 x i16> %d, i1 false)377 ret <16 x i16> %s378}379 380define <2 x i32> @v2i32(<2 x i32> %d) {381; CHECK-SD-LABEL: v2i32:382; CHECK-SD: // %bb.0: // %entry383; CHECK-SD-NEXT: movi v1.2s, #1384; CHECK-SD-NEXT: sub v1.2s, v0.2s, v1.2s385; CHECK-SD-NEXT: bic v0.8b, v1.8b, v0.8b386; CHECK-SD-NEXT: movi v1.2s, #32387; CHECK-SD-NEXT: clz v0.2s, v0.2s388; CHECK-SD-NEXT: sub v0.2s, v1.2s, v0.2s389; CHECK-SD-NEXT: ret390;391; CHECK-GI-LABEL: v2i32:392; CHECK-GI: // %bb.0: // %entry393; CHECK-GI-NEXT: movi d1, #0xffffffffffffffff394; CHECK-GI-NEXT: add v1.2s, v0.2s, v1.2s395; CHECK-GI-NEXT: bic v0.8b, v1.8b, v0.8b396; CHECK-GI-NEXT: cnt v0.8b, v0.8b397; CHECK-GI-NEXT: uaddlp v0.4h, v0.8b398; CHECK-GI-NEXT: uaddlp v0.2s, v0.4h399; CHECK-GI-NEXT: ret400entry:401 %s = call <2 x i32> @llvm.cttz(<2 x i32> %d, i1 false)402 ret <2 x i32> %s403}404 405define <3 x i32> @v3i32(<3 x i32> %d) {406; CHECK-SD-LABEL: v3i32:407; CHECK-SD: // %bb.0: // %entry408; CHECK-SD-NEXT: movi v1.4s, #1409; CHECK-SD-NEXT: sub v1.4s, v0.4s, v1.4s410; CHECK-SD-NEXT: bic v0.16b, v1.16b, v0.16b411; CHECK-SD-NEXT: movi v1.4s, #32412; CHECK-SD-NEXT: clz v0.4s, v0.4s413; CHECK-SD-NEXT: sub v0.4s, v1.4s, v0.4s414; CHECK-SD-NEXT: ret415;416; CHECK-GI-LABEL: v3i32:417; CHECK-GI: // %bb.0: // %entry418; CHECK-GI-NEXT: mov w8, #-1 // =0xffffffff419; CHECK-GI-NEXT: fmov s1, w8420; CHECK-GI-NEXT: mov v1.s[1], w8421; CHECK-GI-NEXT: mov v1.s[2], w8422; CHECK-GI-NEXT: eor v2.16b, v0.16b, v1.16b423; CHECK-GI-NEXT: add v0.4s, v0.4s, v1.4s424; CHECK-GI-NEXT: and v0.16b, v2.16b, v0.16b425; CHECK-GI-NEXT: cnt v0.16b, v0.16b426; CHECK-GI-NEXT: uaddlp v0.8h, v0.16b427; CHECK-GI-NEXT: uaddlp v0.4s, v0.8h428; CHECK-GI-NEXT: ret429entry:430 %s = call <3 x i32> @llvm.cttz(<3 x i32> %d, i1 false)431 ret <3 x i32> %s432}433 434define <4 x i32> @v4i32(<4 x i32> %d) {435; CHECK-SD-LABEL: v4i32:436; CHECK-SD: // %bb.0: // %entry437; CHECK-SD-NEXT: movi v1.4s, #1438; CHECK-SD-NEXT: sub v1.4s, v0.4s, v1.4s439; CHECK-SD-NEXT: bic v0.16b, v1.16b, v0.16b440; CHECK-SD-NEXT: movi v1.4s, #32441; CHECK-SD-NEXT: clz v0.4s, v0.4s442; CHECK-SD-NEXT: sub v0.4s, v1.4s, v0.4s443; CHECK-SD-NEXT: ret444;445; CHECK-GI-LABEL: v4i32:446; CHECK-GI: // %bb.0: // %entry447; CHECK-GI-NEXT: movi v1.2d, #0xffffffffffffffff448; CHECK-GI-NEXT: add v1.4s, v0.4s, v1.4s449; CHECK-GI-NEXT: bic v0.16b, v1.16b, v0.16b450; CHECK-GI-NEXT: cnt v0.16b, v0.16b451; CHECK-GI-NEXT: uaddlp v0.8h, v0.16b452; CHECK-GI-NEXT: uaddlp v0.4s, v0.8h453; CHECK-GI-NEXT: ret454entry:455 %s = call <4 x i32> @llvm.cttz(<4 x i32> %d, i1 false)456 ret <4 x i32> %s457}458 459define <8 x i32> @v8i32(<8 x i32> %d) {460; CHECK-SD-LABEL: v8i32:461; CHECK-SD: // %bb.0: // %entry462; CHECK-SD-NEXT: movi v2.4s, #1463; CHECK-SD-NEXT: sub v3.4s, v0.4s, v2.4s464; CHECK-SD-NEXT: sub v2.4s, v1.4s, v2.4s465; CHECK-SD-NEXT: bic v0.16b, v3.16b, v0.16b466; CHECK-SD-NEXT: bic v1.16b, v2.16b, v1.16b467; CHECK-SD-NEXT: movi v2.4s, #32468; CHECK-SD-NEXT: clz v0.4s, v0.4s469; CHECK-SD-NEXT: clz v1.4s, v1.4s470; CHECK-SD-NEXT: sub v0.4s, v2.4s, v0.4s471; CHECK-SD-NEXT: sub v1.4s, v2.4s, v1.4s472; CHECK-SD-NEXT: ret473;474; CHECK-GI-LABEL: v8i32:475; CHECK-GI: // %bb.0: // %entry476; CHECK-GI-NEXT: movi v2.2d, #0xffffffffffffffff477; CHECK-GI-NEXT: add v3.4s, v0.4s, v2.4s478; CHECK-GI-NEXT: add v2.4s, v1.4s, v2.4s479; CHECK-GI-NEXT: bic v0.16b, v3.16b, v0.16b480; CHECK-GI-NEXT: bic v1.16b, v2.16b, v1.16b481; CHECK-GI-NEXT: cnt v0.16b, v0.16b482; CHECK-GI-NEXT: cnt v1.16b, v1.16b483; CHECK-GI-NEXT: uaddlp v0.8h, v0.16b484; CHECK-GI-NEXT: uaddlp v1.8h, v1.16b485; CHECK-GI-NEXT: uaddlp v0.4s, v0.8h486; CHECK-GI-NEXT: uaddlp v1.4s, v1.8h487; CHECK-GI-NEXT: ret488entry:489 %s = call <8 x i32> @llvm.cttz(<8 x i32> %d, i1 false)490 ret <8 x i32> %s491}492 493define <2 x i64> @v2i64(<2 x i64> %d) {494; CHECK-SD-LABEL: v2i64:495; CHECK-SD: // %bb.0: // %entry496; CHECK-SD-NEXT: mov w8, #1 // =0x1497; CHECK-SD-NEXT: dup v1.2d, x8498; CHECK-SD-NEXT: sub v1.2d, v0.2d, v1.2d499; CHECK-SD-NEXT: bic v0.16b, v1.16b, v0.16b500; CHECK-SD-NEXT: cnt v0.16b, v0.16b501; CHECK-SD-NEXT: uaddlp v0.8h, v0.16b502; CHECK-SD-NEXT: uaddlp v0.4s, v0.8h503; CHECK-SD-NEXT: uaddlp v0.2d, v0.4s504; CHECK-SD-NEXT: ret505;506; CHECK-GI-LABEL: v2i64:507; CHECK-GI: // %bb.0: // %entry508; CHECK-GI-NEXT: movi v1.2d, #0xffffffffffffffff509; CHECK-GI-NEXT: add v1.2d, v0.2d, v1.2d510; CHECK-GI-NEXT: bic v0.16b, v1.16b, v0.16b511; CHECK-GI-NEXT: cnt v0.16b, v0.16b512; CHECK-GI-NEXT: uaddlp v0.8h, v0.16b513; CHECK-GI-NEXT: uaddlp v0.4s, v0.8h514; CHECK-GI-NEXT: uaddlp v0.2d, v0.4s515; CHECK-GI-NEXT: ret516entry:517 %s = call <2 x i64> @llvm.cttz(<2 x i64> %d, i1 false)518 ret <2 x i64> %s519}520 521define <3 x i64> @v3i64(<3 x i64> %d) {522; CHECK-SD-LABEL: v3i64:523; CHECK-SD: // %bb.0: // %entry524; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0525; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1526; CHECK-SD-NEXT: mov w8, #1 // =0x1527; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2528; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]529; CHECK-SD-NEXT: dup v1.2d, x8530; CHECK-SD-NEXT: sub v3.2d, v0.2d, v1.2d531; CHECK-SD-NEXT: sub v1.2d, v2.2d, v1.2d532; CHECK-SD-NEXT: bic v0.16b, v3.16b, v0.16b533; CHECK-SD-NEXT: bic v1.16b, v1.16b, v2.16b534; CHECK-SD-NEXT: cnt v0.16b, v0.16b535; CHECK-SD-NEXT: cnt v1.16b, v1.16b536; CHECK-SD-NEXT: uaddlp v0.8h, v0.16b537; CHECK-SD-NEXT: uaddlp v1.8h, v1.16b538; CHECK-SD-NEXT: uaddlp v0.4s, v0.8h539; CHECK-SD-NEXT: uaddlp v2.4s, v1.8h540; CHECK-SD-NEXT: uaddlp v0.2d, v0.4s541; CHECK-SD-NEXT: uaddlp v2.2d, v2.4s542; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2543; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8544; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0545; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1546; CHECK-SD-NEXT: ret547;548; CHECK-GI-LABEL: v3i64:549; CHECK-GI: // %bb.0: // %entry550; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0551; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1552; CHECK-GI-NEXT: mov v3.16b, v0.16b553; CHECK-GI-NEXT: movi v4.2d, #0xffffffffffffffff554; CHECK-GI-NEXT: fmov x8, d2555; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]556; CHECK-GI-NEXT: fmov x9, d2557; CHECK-GI-NEXT: mov v3.d[1], v1.d[0]558; CHECK-GI-NEXT: sub x8, x8, #1559; CHECK-GI-NEXT: bic x8, x8, x9560; CHECK-GI-NEXT: add v0.2d, v0.2d, v4.2d561; CHECK-GI-NEXT: fmov d1, x8562; CHECK-GI-NEXT: bic v0.16b, v0.16b, v3.16b563; CHECK-GI-NEXT: cnt v1.8b, v1.8b564; CHECK-GI-NEXT: cnt v0.16b, v0.16b565; CHECK-GI-NEXT: uaddlv h1, v1.8b566; CHECK-GI-NEXT: uaddlp v0.8h, v0.16b567; CHECK-GI-NEXT: mov w8, v1.s[0]568; CHECK-GI-NEXT: uaddlp v0.4s, v0.8h569; CHECK-GI-NEXT: fmov d2, x8570; CHECK-GI-NEXT: uaddlp v0.2d, v0.4s571; CHECK-GI-NEXT: mov d1, v0.d[1]572; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0573; CHECK-GI-NEXT: ret574entry:575 %s = call <3 x i64> @llvm.cttz(<3 x i64> %d, i1 false)576 ret <3 x i64> %s577}578 579define <4 x i64> @v4i64(<4 x i64> %d) {580; CHECK-SD-LABEL: v4i64:581; CHECK-SD: // %bb.0: // %entry582; CHECK-SD-NEXT: mov w8, #1 // =0x1583; CHECK-SD-NEXT: dup v2.2d, x8584; CHECK-SD-NEXT: sub v3.2d, v0.2d, v2.2d585; CHECK-SD-NEXT: sub v2.2d, v1.2d, v2.2d586; CHECK-SD-NEXT: bic v0.16b, v3.16b, v0.16b587; CHECK-SD-NEXT: bic v1.16b, v2.16b, v1.16b588; CHECK-SD-NEXT: cnt v0.16b, v0.16b589; CHECK-SD-NEXT: cnt v1.16b, v1.16b590; CHECK-SD-NEXT: uaddlp v0.8h, v0.16b591; CHECK-SD-NEXT: uaddlp v1.8h, v1.16b592; CHECK-SD-NEXT: uaddlp v0.4s, v0.8h593; CHECK-SD-NEXT: uaddlp v1.4s, v1.8h594; CHECK-SD-NEXT: uaddlp v0.2d, v0.4s595; CHECK-SD-NEXT: uaddlp v1.2d, v1.4s596; CHECK-SD-NEXT: ret597;598; CHECK-GI-LABEL: v4i64:599; CHECK-GI: // %bb.0: // %entry600; CHECK-GI-NEXT: movi v2.2d, #0xffffffffffffffff601; CHECK-GI-NEXT: add v3.2d, v0.2d, v2.2d602; CHECK-GI-NEXT: add v2.2d, v1.2d, v2.2d603; CHECK-GI-NEXT: bic v0.16b, v3.16b, v0.16b604; CHECK-GI-NEXT: bic v1.16b, v2.16b, v1.16b605; CHECK-GI-NEXT: cnt v0.16b, v0.16b606; CHECK-GI-NEXT: cnt v1.16b, v1.16b607; CHECK-GI-NEXT: uaddlp v0.8h, v0.16b608; CHECK-GI-NEXT: uaddlp v1.8h, v1.16b609; CHECK-GI-NEXT: uaddlp v0.4s, v0.8h610; CHECK-GI-NEXT: uaddlp v1.4s, v1.8h611; CHECK-GI-NEXT: uaddlp v0.2d, v0.4s612; CHECK-GI-NEXT: uaddlp v1.2d, v1.4s613; CHECK-GI-NEXT: ret614entry:615 %s = call <4 x i64> @llvm.cttz(<4 x i64> %d, i1 false)616 ret <4 x i64> %s617}618 619define <2 x i128> @v2i128(<2 x i128> %d) {620; CHECK-SD-LABEL: v2i128:621; CHECK-SD: // %bb.0: // %entry622; CHECK-SD-NEXT: rbit x8, x1623; CHECK-SD-NEXT: rbit x9, x0624; CHECK-SD-NEXT: rbit x10, x3625; CHECK-SD-NEXT: rbit x11, x2626; CHECK-SD-NEXT: cmp x0, #0627; CHECK-SD-NEXT: mov x1, xzr628; CHECK-SD-NEXT: clz x8, x8629; CHECK-SD-NEXT: clz x9, x9630; CHECK-SD-NEXT: clz x10, x10631; CHECK-SD-NEXT: add x8, x8, #64632; CHECK-SD-NEXT: mov x3, xzr633; CHECK-SD-NEXT: csel x0, x9, x8, ne634; CHECK-SD-NEXT: clz x8, x11635; CHECK-SD-NEXT: add x9, x10, #64636; CHECK-SD-NEXT: cmp x2, #0637; CHECK-SD-NEXT: csel x2, x8, x9, ne638; CHECK-SD-NEXT: ret639;640; CHECK-GI-LABEL: v2i128:641; CHECK-GI: // %bb.0: // %entry642; CHECK-GI-NEXT: mov x8, #-1 // =0xffffffffffffffff643; CHECK-GI-NEXT: subs x9, x0, #1644; CHECK-GI-NEXT: adc x10, x1, x8645; CHECK-GI-NEXT: subs x11, x2, #1646; CHECK-GI-NEXT: bic x9, x9, x0647; CHECK-GI-NEXT: mov v0.d[0], x9648; CHECK-GI-NEXT: bic x9, x11, x2649; CHECK-GI-NEXT: adc x8, x3, x8650; CHECK-GI-NEXT: mov v1.d[0], x9651; CHECK-GI-NEXT: bic x9, x10, x1652; CHECK-GI-NEXT: bic x8, x8, x3653; CHECK-GI-NEXT: mov x1, xzr654; CHECK-GI-NEXT: mov x3, xzr655; CHECK-GI-NEXT: mov v0.d[1], x9656; CHECK-GI-NEXT: mov v1.d[1], x8657; CHECK-GI-NEXT: cnt v0.16b, v0.16b658; CHECK-GI-NEXT: cnt v1.16b, v1.16b659; CHECK-GI-NEXT: uaddlv h0, v0.16b660; CHECK-GI-NEXT: uaddlv h1, v1.16b661; CHECK-GI-NEXT: mov w0, v0.s[0]662; CHECK-GI-NEXT: mov w2, v1.s[0]663; CHECK-GI-NEXT: ret664entry:665 %s = call <2 x i128> @llvm.cttz(<2 x i128> %d, i1 false)666 ret <2 x i128> %s667}668 669define <3 x i128> @v3i128(<3 x i128> %d) {670; CHECK-SD-LABEL: v3i128:671; CHECK-SD: // %bb.0: // %entry672; CHECK-SD-NEXT: rbit x8, x1673; CHECK-SD-NEXT: rbit x9, x0674; CHECK-SD-NEXT: rbit x11, x3675; CHECK-SD-NEXT: rbit x10, x2676; CHECK-SD-NEXT: cmp x0, #0677; CHECK-SD-NEXT: rbit x12, x5678; CHECK-SD-NEXT: clz x8, x8679; CHECK-SD-NEXT: clz x9, x9680; CHECK-SD-NEXT: clz x11, x11681; CHECK-SD-NEXT: add x8, x8, #64682; CHECK-SD-NEXT: clz x10, x10683; CHECK-SD-NEXT: mov x1, xzr684; CHECK-SD-NEXT: csel x0, x9, x8, ne685; CHECK-SD-NEXT: add x8, x11, #64686; CHECK-SD-NEXT: cmp x2, #0687; CHECK-SD-NEXT: rbit x9, x4688; CHECK-SD-NEXT: csel x2, x10, x8, ne689; CHECK-SD-NEXT: clz x8, x12690; CHECK-SD-NEXT: add x8, x8, #64691; CHECK-SD-NEXT: cmp x4, #0692; CHECK-SD-NEXT: mov x3, xzr693; CHECK-SD-NEXT: clz x9, x9694; CHECK-SD-NEXT: mov x5, xzr695; CHECK-SD-NEXT: csel x4, x9, x8, ne696; CHECK-SD-NEXT: ret697;698; CHECK-GI-LABEL: v3i128:699; CHECK-GI: // %bb.0: // %entry700; CHECK-GI-NEXT: mov x8, #-1 // =0xffffffffffffffff701; CHECK-GI-NEXT: subs x9, x0, #1702; CHECK-GI-NEXT: adc x10, x1, x8703; CHECK-GI-NEXT: subs x11, x2, #1704; CHECK-GI-NEXT: bic x9, x9, x0705; CHECK-GI-NEXT: adc x12, x3, x8706; CHECK-GI-NEXT: subs x13, x4, #1707; CHECK-GI-NEXT: bic x11, x11, x2708; CHECK-GI-NEXT: mov v0.d[0], x9709; CHECK-GI-NEXT: bic x9, x13, x4710; CHECK-GI-NEXT: mov v1.d[0], x11711; CHECK-GI-NEXT: mov v2.d[0], x9712; CHECK-GI-NEXT: adc x8, x5, x8713; CHECK-GI-NEXT: bic x9, x10, x1714; CHECK-GI-NEXT: bic x10, x12, x3715; CHECK-GI-NEXT: bic x8, x8, x5716; CHECK-GI-NEXT: mov x1, xzr717; CHECK-GI-NEXT: mov x3, xzr718; CHECK-GI-NEXT: mov x5, xzr719; CHECK-GI-NEXT: mov v0.d[1], x9720; CHECK-GI-NEXT: mov v1.d[1], x10721; CHECK-GI-NEXT: mov v2.d[1], x8722; CHECK-GI-NEXT: cnt v0.16b, v0.16b723; CHECK-GI-NEXT: cnt v1.16b, v1.16b724; CHECK-GI-NEXT: cnt v2.16b, v2.16b725; CHECK-GI-NEXT: uaddlv h0, v0.16b726; CHECK-GI-NEXT: uaddlv h1, v1.16b727; CHECK-GI-NEXT: uaddlv h2, v2.16b728; CHECK-GI-NEXT: mov w0, v0.s[0]729; CHECK-GI-NEXT: mov w2, v1.s[0]730; CHECK-GI-NEXT: mov w4, v2.s[0]731; CHECK-GI-NEXT: ret732entry:733 %s = call <3 x i128> @llvm.cttz(<3 x i128> %d, i1 false)734 ret <3 x i128> %s735}736 737define <4 x i128> @v4i128(<4 x i128> %d) {738; CHECK-SD-LABEL: v4i128:739; CHECK-SD: // %bb.0: // %entry740; CHECK-SD-NEXT: rbit x9, x1741; CHECK-SD-NEXT: rbit x10, x0742; CHECK-SD-NEXT: rbit x8, x3743; CHECK-SD-NEXT: rbit x11, x2744; CHECK-SD-NEXT: cmp x0, #0745; CHECK-SD-NEXT: mov x1, xzr746; CHECK-SD-NEXT: clz x9, x9747; CHECK-SD-NEXT: clz x10, x10748; CHECK-SD-NEXT: clz x8, x8749; CHECK-SD-NEXT: add x9, x9, #64750; CHECK-SD-NEXT: add x8, x8, #64751; CHECK-SD-NEXT: mov x3, xzr752; CHECK-SD-NEXT: csel x0, x10, x9, ne753; CHECK-SD-NEXT: clz x9, x11754; CHECK-SD-NEXT: rbit x10, x4755; CHECK-SD-NEXT: rbit x11, x5756; CHECK-SD-NEXT: cmp x2, #0757; CHECK-SD-NEXT: mov x5, xzr758; CHECK-SD-NEXT: csel x2, x9, x8, ne759; CHECK-SD-NEXT: clz x8, x10760; CHECK-SD-NEXT: rbit x10, x7761; CHECK-SD-NEXT: clz x9, x11762; CHECK-SD-NEXT: cmp x4, #0763; CHECK-SD-NEXT: rbit x11, x6764; CHECK-SD-NEXT: add x9, x9, #64765; CHECK-SD-NEXT: mov x7, xzr766; CHECK-SD-NEXT: csel x4, x8, x9, ne767; CHECK-SD-NEXT: clz x8, x10768; CHECK-SD-NEXT: clz x9, x11769; CHECK-SD-NEXT: add x8, x8, #64770; CHECK-SD-NEXT: cmp x6, #0771; CHECK-SD-NEXT: csel x6, x9, x8, ne772; CHECK-SD-NEXT: ret773;774; CHECK-GI-LABEL: v4i128:775; CHECK-GI: // %bb.0: // %entry776; CHECK-GI-NEXT: mov x8, #-1 // =0xffffffffffffffff777; CHECK-GI-NEXT: subs x9, x0, #1778; CHECK-GI-NEXT: adc x10, x1, x8779; CHECK-GI-NEXT: subs x11, x2, #1780; CHECK-GI-NEXT: bic x9, x9, x0781; CHECK-GI-NEXT: adc x12, x3, x8782; CHECK-GI-NEXT: subs x13, x4, #1783; CHECK-GI-NEXT: mov v0.d[0], x9784; CHECK-GI-NEXT: adc x14, x5, x8785; CHECK-GI-NEXT: subs x15, x6, #1786; CHECK-GI-NEXT: bic x9, x11, x2787; CHECK-GI-NEXT: bic x11, x13, x4788; CHECK-GI-NEXT: mov v1.d[0], x9789; CHECK-GI-NEXT: bic x9, x15, x6790; CHECK-GI-NEXT: mov v2.d[0], x11791; CHECK-GI-NEXT: mov v3.d[0], x9792; CHECK-GI-NEXT: adc x8, x7, x8793; CHECK-GI-NEXT: bic x9, x10, x1794; CHECK-GI-NEXT: bic x10, x14, x5795; CHECK-GI-NEXT: bic x8, x8, x7796; CHECK-GI-NEXT: mov v0.d[1], x9797; CHECK-GI-NEXT: bic x9, x12, x3798; CHECK-GI-NEXT: mov x1, xzr799; CHECK-GI-NEXT: mov v1.d[1], x9800; CHECK-GI-NEXT: mov x3, xzr801; CHECK-GI-NEXT: mov x5, xzr802; CHECK-GI-NEXT: mov v2.d[1], x10803; CHECK-GI-NEXT: mov v3.d[1], x8804; CHECK-GI-NEXT: mov x7, xzr805; CHECK-GI-NEXT: cnt v0.16b, v0.16b806; CHECK-GI-NEXT: cnt v1.16b, v1.16b807; CHECK-GI-NEXT: cnt v2.16b, v2.16b808; CHECK-GI-NEXT: cnt v3.16b, v3.16b809; CHECK-GI-NEXT: uaddlv h0, v0.16b810; CHECK-GI-NEXT: uaddlv h1, v1.16b811; CHECK-GI-NEXT: uaddlv h2, v2.16b812; CHECK-GI-NEXT: uaddlv h3, v3.16b813; CHECK-GI-NEXT: mov w0, v0.s[0]814; CHECK-GI-NEXT: mov w2, v1.s[0]815; CHECK-GI-NEXT: mov w4, v2.s[0]816; CHECK-GI-NEXT: mov w6, v3.s[0]817; CHECK-GI-NEXT: ret818entry:819 %s = call <4 x i128> @llvm.cttz(<4 x i128> %d, i1 false)820 ret <4 x i128> %s821}822;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:823; CHECK: {{.*}}824