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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple arm64-none-eabi -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple arm64-none-eabi -global-isel -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5@out = internal global i32 0, align 46 7; Ensure that we transform select(C0, x, select(C1, x, y)) towards8; select(C0 | C1, x, y) so we can use CMP;CCMP for the implementation.9define i32 @test0(i32 %v0, i32 %v1, i32 %v2) {10; CHECK-SD-LABEL: test0:11; CHECK-SD: // %bb.0:12; CHECK-SD-NEXT: cmp w0, #713; CHECK-SD-NEXT: ccmp w1, #0, #0, ne14; CHECK-SD-NEXT: csel w0, w1, w2, gt15; CHECK-SD-NEXT: ret16;17; CHECK-GI-LABEL: test0:18; CHECK-GI: // %bb.0:19; CHECK-GI-NEXT: cmp w0, #720; CHECK-GI-NEXT: csel w8, w1, w2, eq21; CHECK-GI-NEXT: cmp w1, #022; CHECK-GI-NEXT: csel w0, w1, w8, gt23; CHECK-GI-NEXT: ret24 %cmp1 = icmp eq i32 %v0, 725 %cmp2 = icmp sgt i32 %v1, 026 %sel0 = select i1 %cmp1, i32 %v1, i32 %v227 %sel1 = select i1 %cmp2, i32 %v1, i32 %sel028 ret i32 %sel129}30 31; Usually we keep select(C0 | C1, x, y) as is on aarch64 to create CMP;CCMP32; sequences. This case should be transformed to select(C0, select(C1, x, y), y)33; anyway to get CSE effects.34define void @test1(i32 %bitset, i32 %val0, i32 %val1) {35; CHECK-SD-LABEL: test1:36; CHECK-SD: // %bb.0:37; CHECK-SD-NEXT: cmp w0, #738; CHECK-SD-NEXT: adrp x9, out39; CHECK-SD-NEXT: csel w8, w1, w2, eq40; CHECK-SD-NEXT: cmp w8, #1341; CHECK-SD-NEXT: csel w8, w1, w2, lo42; CHECK-SD-NEXT: cmp w0, #4243; CHECK-SD-NEXT: csel w10, w1, w8, eq44; CHECK-SD-NEXT: str w8, [x9, :lo12:out]45; CHECK-SD-NEXT: str w10, [x9, :lo12:out]46; CHECK-SD-NEXT: ret47;48; CHECK-GI-LABEL: test1:49; CHECK-GI: // %bb.0:50; CHECK-GI-NEXT: cmp w0, #751; CHECK-GI-NEXT: csel w8, w1, w2, eq52; CHECK-GI-NEXT: cmp w8, #1353; CHECK-GI-NEXT: cset w8, lo54; CHECK-GI-NEXT: tst w8, #0x155; CHECK-GI-NEXT: csel w9, w1, w2, ne56; CHECK-GI-NEXT: cmp w0, #4257; CHECK-GI-NEXT: cset w10, eq58; CHECK-GI-NEXT: orr w8, w10, w859; CHECK-GI-NEXT: tst w8, #0x160; CHECK-GI-NEXT: adrp x8, out61; CHECK-GI-NEXT: csel w10, w1, w2, ne62; CHECK-GI-NEXT: str w9, [x8, :lo12:out]63; CHECK-GI-NEXT: str w10, [x8, :lo12:out]64; CHECK-GI-NEXT: ret65 %cmp1 = icmp eq i32 %bitset, 766 %cond = select i1 %cmp1, i32 %val0, i32 %val167 %cmp5 = icmp ult i32 %cond, 1368 %cond11 = select i1 %cmp5, i32 %val0, i32 %val169 %cmp3 = icmp eq i32 %bitset, 4270 %or.cond = or i1 %cmp3, %cmp571 %cond17 = select i1 %or.cond, i32 %val0, i32 %val172 store volatile i32 %cond11, ptr @out, align 473 store volatile i32 %cond17, ptr @out, align 474 ret void75}76;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:77; CHECK: {{.*}}78