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1; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 -aarch64-enable-atomic-cfg-tidy=0 | FileCheck %s2; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 -aarch64-enable-atomic-cfg-tidy=0 | FileCheck --check-prefix=CHECK-NOFP %s3 4define i32 @test_select_i32(i1 %bit, i32 %a, i32 %b) {5; CHECK-LABEL: test_select_i32:6 %val = select i1 %bit, i32 %a, i32 %b7; CHECK: tst w0, #0x18; CHECK-NEXT: csel w0, w1, w2, ne9 10 ret i32 %val11}12 13define i64 @test_select_i64(i1 %bit, i64 %a, i64 %b) {14; CHECK-LABEL: test_select_i64:15 %val = select i1 %bit, i64 %a, i64 %b16; CHECK: tst w0, #0x117; CHECK-NEXT: csel x0, x1, x2, ne18 19 ret i64 %val20}21 22define float @test_select_float(i1 %bit, float %a, float %b) {23; CHECK-LABEL: test_select_float:24 %val = select i1 %bit, float %a, float %b25; CHECK: tst w0, #0x126; CHECK-NEXT: fcsel s0, s0, s1, ne27; CHECK-NOFP-NOT: fcsel28 ret float %val29}30 31define double @test_select_double(i1 %bit, double %a, double %b) {32; CHECK-LABEL: test_select_double:33 %val = select i1 %bit, double %a, double %b34; CHECK: tst w0, #0x135; CHECK-NEXT: fcsel d0, d0, d1, ne36; CHECK-NOFP-NOT: fcsel37 38 ret double %val39}40 41define i32 @test_brcond(i1 %bit) {42; CHECK-LABEL: test_brcond:43 br i1 %bit, label %true, label %false44; CHECK: tbz {{w[0-9]+}}, #0, {{.?LBB}}45 46true:47 ret i32 048false:49 ret i32 4250}51 52define i1 @test_setcc_float(float %lhs, float %rhs) {53; CHECK: test_setcc_float54 %val = fcmp oeq float %lhs, %rhs55; CHECK: fcmp s0, s156; CHECK: cset w0, eq57; CHECK-NOFP-NOT: fcmp58 ret i1 %val59}60 61define i1 @test_setcc_double(double %lhs, double %rhs) {62; CHECK: test_setcc_double63 %val = fcmp oeq double %lhs, %rhs64; CHECK: fcmp d0, d165; CHECK: cset w0, eq66; CHECK-NOFP-NOT: fcmp67 ret i1 %val68}69 70define i1 @test_setcc_i32(i32 %lhs, i32 %rhs) {71; CHECK: test_setcc_i3272 %val = icmp ugt i32 %lhs, %rhs73; CHECK: cmp w0, w174; CHECK: cset w0, hi75 ret i1 %val76}77 78define i1 @test_setcc_i64(i64 %lhs, i64 %rhs) {79; CHECK: test_setcc_i6480 %val = icmp ne i64 %lhs, %rhs81; CHECK: cmp x0, x182; CHECK: cset w0, ne83 ret i1 %val84}85