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1; RUN: llc -mtriple=aarch64-none-linux-gnu < %s -mattr=+neon | FileCheck %s2 3; SDIVREM/UDIVREM DAG nodes are generated but expanded when lowering and4; should not generate select error.5define <2 x i32> @test_udivrem(<2 x i32> %x, < 2 x i32> %y, ptr %z) {6; CHECK-LABEL: test_udivrem7; CHECK-DAG: udivrem8; CHECK-NOT: LLVM ERROR: Cannot select9 %div = udiv <2 x i32> %x, %y10 store <2 x i32> %div, ptr %z11 %1 = urem <2 x i32> %x, %y12 ret <2 x i32> %113}14 15define <4 x i32> @test_sdivrem(<4 x i32> %x, ptr %y) {16; CHECK-LABEL: test_sdivrem17; CHECK-DAG: sdivrem18 %div = sdiv <4 x i32> %x, < i32 20, i32 20, i32 20, i32 20 >19 store <4 x i32> %div, ptr %y20 %1 = srem <4 x i32> %x, < i32 20, i32 20, i32 20, i32 20 >21 ret <4 x i32> %122}23