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1# RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a55 \2# RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s \3# RUN: -misched-prera-direction=topdown -sched-print-cycles=true \4# RUN: -misched-dump-schedule-trace=true -misched-dump-schedule-trace-col-header-width=21 \5# RUN: 2>&1 | FileCheck %s --check-prefix=TOP --strict-whitespace6 7# RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a55 \8# RUN: -passes=machine-scheduler -debug-only=machine-scheduler -o - %s \9# RUN: -misched-prera-direction=topdown -sched-print-cycles=true \10# RUN: -misched-dump-schedule-trace=true -misched-dump-schedule-trace-col-header-width=21 \11# RUN: 2>&1 | FileCheck %s --check-prefix=TOP --strict-whitespace12 13# RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a55 \14# RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s \15# RUN: -misched-prera-direction=bottomup -sched-print-cycles=true \16# RUN: -misched-dump-schedule-trace=true -misched-dump-schedule-trace-col-width=4 \17# RUN: 2>&1 | FileCheck %s --check-prefix=BOTTOM --strict-whitespace18 19# RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a55 \20# RUN: -passes=machine-scheduler -debug-only=machine-scheduler -o - %s \21# RUN: -misched-prera-direction=bottomup -sched-print-cycles=true \22# RUN: -misched-dump-schedule-trace=true -misched-dump-schedule-trace-col-width=4 \23# RUN: 2>&1 | FileCheck %s --check-prefix=BOTTOM --strict-whitespace24 25# RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a55 \26# RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s \27# RUN: -sched-print-cycles=true -misched-dump-schedule-trace=true \28# RUN: 2>&1 | FileCheck %s --check-prefix=BIDIRECTIONAL29 30# RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a55 \31# RUN: -passes=machine-scheduler -debug-only=machine-scheduler -o - %s \32# RUN: -sched-print-cycles=true -misched-dump-schedule-trace=true \33# RUN: 2>&1 | FileCheck %s --check-prefix=BIDIRECTIONAL34 35# REQUIRES: asserts36---37name: f38tracksRegLiveness: true39body: |40 bb.0:41 liveins: $x0, $x1, $x2, $x6, $q042 %14:fpr128 = EXTv16i8 $q0, $q0, 843 $x3 = ADDXrr $x0, $x044 $x4 = ADDXrr $x1, $x145 $x5 = ADDXrr $x2, $x246 $x7 = ADDXrr $x6, $x647 48# TOP-LABEL: *** Final schedule for %bb.0 ***49# TOP-NEXT: * Schedule table (TopDown):50# TOP-NEXT: i: issue51# TOP-NEXT: x: resource booked52# TOP-NEXT: Cycle | 0 | 1 | 2 |53# TOP-NEXT: SU(0) | i | | |54# TOP-NEXT: CortexA55UnitFPALU | x | x | |55# TOP-NEXT: SU(1) | i | | |56# TOP-NEXT: CortexA55UnitALU | x | | |57# TOP-NEXT: SU(2) | | i | |58# TOP-NEXT: CortexA55UnitALU | | x | |59# TOP-NEXT: SU(3) | | i | |60# TOP-NEXT: CortexA55UnitALU | | x | |61# TOP-NEXT: SU(4) | | | i |62# TOP-NEXT: CortexA55UnitALU | | | x |63# TOP-NEXT: SU(0) [TopReadyCycle = 0, BottomReadyCycle = 3]: dead %0:fpr128 = EXTv16i8 $q0, $q0, 864# TOP-NEXT: SU(1) [TopReadyCycle = 0, BottomReadyCycle = 0]: $x3 = ADDXrr $x0, $x065# TOP-NEXT: SU(2) [TopReadyCycle = 1, BottomReadyCycle = 0]: $x4 = ADDXrr $x1, $x166# TOP-NEXT: SU(3) [TopReadyCycle = 1, BottomReadyCycle = 0]: $x5 = ADDXrr $x2, $x267# TOP-NEXT: SU(4) [TopReadyCycle = 2, BottomReadyCycle = 0]: $x7 = ADDXrr $x6, $x668 69# BOTTOM-LABEL: *** Final schedule for %bb.0 ***70# BOTTOM-NEXT: * Schedule table (BottomUp):71# BOTTOM-NEXT: i: issue72# BOTTOM-NEXT: x: resource booked73# BOTTOM-NEXT: Cycle | 3 | 2 | 1 | 0 |74# BOTTOM-NEXT: SU(0) | i | | | |75# BOTTOM-NEXT: CortexA55UnitFPALU | x | x | | |76# BOTTOM-NEXT: SU(1) | | | i | |77# BOTTOM-NEXT: CortexA55UnitALU | | | x | |78# BOTTOM-NEXT: SU(2) | | | i | |79# BOTTOM-NEXT: CortexA55UnitALU | | | x | |80# BOTTOM-NEXT: SU(3) | | | | i |81# BOTTOM-NEXT: CortexA55UnitALU | | | | x |82# BOTTOM-NEXT: SU(4) | | | | i |83# BOTTOM-NEXT: CortexA55UnitALU | | | | x |84# BOTTOM-NEXT: SU(0) [TopReadyCycle = 0, BottomReadyCycle = 3]: dead %0:fpr128 = EXTv16i8 $q0, $q0, 885# BOTTOM-NEXT: SU(1) [TopReadyCycle = 0, BottomReadyCycle = 1]: $x3 = ADDXrr $x0, $x086# BOTTOM-NEXT: SU(2) [TopReadyCycle = 0, BottomReadyCycle = 1]: $x4 = ADDXrr $x1, $x187# BOTTOM-NEXT: SU(3) [TopReadyCycle = 0, BottomReadyCycle = 0]: $x5 = ADDXrr $x2, $x288# BOTTOM-NEXT: SU(4) [TopReadyCycle = 0, BottomReadyCycle = 0]: $x7 = ADDXrr $x6, $x689 90# This test shows that at the moment we cannot generate the trace of91# bidirectional scheduling as the values of TopReadyCycle and92# BottomReadyCycle are inconsistent.93 94# BIDIRECTIONAL-LABEL: *** Final schedule for %bb.0 ***95# BIDIRECTIONAL-NEXT: * Schedule table (Bidirectional): not implemented96# BIDIRECTIONAL-NEXT: SU(0) [TopReadyCycle = 0, BottomReadyCycle = 3]: dead %0:fpr128 = EXTv16i8 $q0, $q0, 897# BIDIRECTIONAL-NEXT: SU(1) [TopReadyCycle = 0, BottomReadyCycle = 1]: $x3 = ADDXrr $x0, $x098# BIDIRECTIONAL-NEXT: SU(2) [TopReadyCycle = 0, BottomReadyCycle = 1]: $x4 = ADDXrr $x1, $x199# BIDIRECTIONAL-NEXT: SU(3) [TopReadyCycle = 0, BottomReadyCycle = 0]: $x5 = ADDXrr $x2, $x2100# BIDIRECTIONAL-NEXT: SU(4) [TopReadyCycle = 0, BottomReadyCycle = 0]: $x7 = ADDXrr $x6, $x6101