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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple aarch64-none-linux-gnu -mattr=+fullfp16 < %s | FileCheck %s3 4define <8 x half> @sel.v8f16.fmul(ptr %p, ptr %q, <8 x half> %a, <8 x half> %b, <4 x half> %c) {5; CHECK-LABEL: sel.v8f16.fmul:6; CHECK: // %bb.0:7; CHECK-NEXT: fmul v1.8h, v1.8h, v0.h[0]8; CHECK-NEXT: fmul v2.4h, v2.4h, v0.h[0]9; CHECK-NEXT: mov v0.16b, v1.16b10; CHECK-NEXT: str d2, [x0]11; CHECK-NEXT: ret12 %splat = shufflevector <8 x half> %a, <8 x half> poison, <8 x i32> zeroinitializer13 %splat2 = shufflevector <8 x half> %a, <8 x half> poison, <4 x i32> zeroinitializer14 15 %r = fmul <8 x half> %b, %splat16 %r2 = fmul <4 x half> %c, %splat217 store <4 x half> %r2, ptr %p18 ret <8 x half> %r19}20 21define <4 x float> @sel.v4f32.fmul(ptr %p, ptr %q, <4 x float> %a, <4 x float> %b, <2 x float> %c) {22; CHECK-LABEL: sel.v4f32.fmul:23; CHECK: // %bb.0:24; CHECK-NEXT: fmul v1.4s, v1.4s, v0.s[0]25; CHECK-NEXT: fmul v2.2s, v2.2s, v0.s[0]26; CHECK-NEXT: mov v0.16b, v1.16b27; CHECK-NEXT: str d2, [x0]28; CHECK-NEXT: ret29 %splat = shufflevector <4 x float> %a, <4 x float> poison, <4 x i32> zeroinitializer30 %splat2 = shufflevector <4 x float> %a, <4 x float> poison, <2 x i32> zeroinitializer31 32 %r = fmul <4 x float> %b, %splat33 %r2 = fmul <2 x float> %c, %splat234 store <2 x float> %r2, ptr %p35 ret <4 x float> %r36}37 38define <8 x i16> @sel.v8i16.mul(ptr %p, ptr %q, <8 x i16> %a, <8 x i16> %b, <4 x i16> %c) {39; CHECK-LABEL: sel.v8i16.mul:40; CHECK: // %bb.0:41; CHECK-NEXT: mul v1.8h, v1.8h, v0.h[0]42; CHECK-NEXT: mul v2.4h, v2.4h, v0.h[0]43; CHECK-NEXT: mov v0.16b, v1.16b44; CHECK-NEXT: str d2, [x0]45; CHECK-NEXT: ret46 %splat = shufflevector <8 x i16> %a, <8 x i16> poison, <8 x i32> zeroinitializer47 %splat2 = shufflevector <8 x i16> %a, <8 x i16> poison, <4 x i32> zeroinitializer48 49 %r = mul <8 x i16> %b, %splat50 %r2 = mul <4 x i16> %c, %splat251 store <4 x i16> %r2, ptr %p52 ret <8 x i16> %r53}54 55define <4 x i32> @sel.v4i32.mul(ptr %p, ptr %q, <4 x i32> %a, <4 x i32> %b, <2 x i32> %c) {56; CHECK-LABEL: sel.v4i32.mul:57; CHECK: // %bb.0:58; CHECK-NEXT: mul v1.4s, v1.4s, v0.s[0]59; CHECK-NEXT: mul v2.2s, v2.2s, v0.s[0]60; CHECK-NEXT: mov v0.16b, v1.16b61; CHECK-NEXT: str d2, [x0]62; CHECK-NEXT: ret63 %splat = shufflevector <4 x i32> %a, <4 x i32> poison, <4 x i32> zeroinitializer64 %splat2 = shufflevector <4 x i32> %a, <4 x i32> poison, <2 x i32> zeroinitializer65 66 %r = mul <4 x i32> %b, %splat67 %r2 = mul <2 x i32> %c, %splat268 store <2 x i32> %r2, ptr %p69 ret <4 x i32> %r70}71 72define <4 x i64> @sel.v4i32.smull(<4 x i32> %a, <4 x i32> %b, <2 x i32> %c) {73; CHECK-LABEL: sel.v4i32.smull:74; CHECK: // %bb.0:75; CHECK-NEXT: smull2 v2.2d, v1.4s, v0.s[0]76; CHECK-NEXT: smull v0.2d, v1.2s, v0.s[0]77; CHECK-NEXT: mov v1.16b, v2.16b78; CHECK-NEXT: ret79 %ext = sext <4 x i32> %a to <4 x i64>80 %splat = shufflevector <4 x i64> %ext, <4 x i64> poison, <4 x i32> zeroinitializer81 %d = sext <4 x i32> %b to <4 x i64>82 %r = mul <4 x i64> %d, %splat83 ret <4 x i64> %r84}85 86define <4 x i64> @sel.v4i32.umull(<4 x i32> %a, <4 x i32> %b, <2 x i32> %c) {87; CHECK-LABEL: sel.v4i32.umull:88; CHECK: // %bb.0:89; CHECK-NEXT: umull2 v2.2d, v1.4s, v0.s[0]90; CHECK-NEXT: umull v0.2d, v1.2s, v0.s[0]91; CHECK-NEXT: mov v1.16b, v2.16b92; CHECK-NEXT: ret93 %ext = zext <4 x i32> %a to <4 x i64>94 %splat = shufflevector <4 x i64> %ext, <4 x i64> poison, <4 x i32> zeroinitializer95 %d = zext <4 x i32> %b to <4 x i64>96 %r = mul <4 x i64> %d, %splat97 ret <4 x i64> %r98}99 100define <4 x i32> @sel.v4i32.sqdmull(<8 x i16> %a, <4 x i16> %b) {101; CHECK-LABEL: sel.v4i32.sqdmull:102; CHECK: // %bb.0: // %entry103; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1104; CHECK-NEXT: sqdmull v2.4s, v0.4h, v1.h[0]105; CHECK-NEXT: sqdmlal2 v2.4s, v0.8h, v1.h[0]106; CHECK-NEXT: mov v0.16b, v2.16b107; CHECK-NEXT: ret108entry:109 %c = shufflevector <8 x i16> %a, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>110 %d = shufflevector <4 x i16> %b, <4 x i16> poison, <4 x i32> zeroinitializer111 %e = tail call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %c, <4 x i16> %d)112 %f = shufflevector <8 x i16> %a, <8 x i16> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>113 %g = tail call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %f, <4 x i16> %d)114 %h = tail call <4 x i32> @llvm.aarch64.neon.sqadd.v4i32(<4 x i32> %e, <4 x i32> %g)115 ret <4 x i32> %h116}117 118declare <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16>, <4 x i16>)119declare <4 x i32> @llvm.aarch64.neon.sqadd.v4i32(<4 x i32>, <4 x i32>)120