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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=aarch64-- -run-pass=early-ifcvt -stress-early-ifcvt %s -o - -verify-machineinstrs | FileCheck %s3 4# Test that "killed" flag on the same virtual register in merged blocks is5# removed for the first spliced block and is saved for the second one.6# Otherwise, register will be killed twice in a single block in the resulting7# MIR, which is incorrect.8 9---10name: my_func11tracksRegLiveness: true12liveins:13 - { reg: '$w0', virtual-reg: '%0' }14body: |15 ; CHECK-LABEL: name: my_func16 ; CHECK: bb.0.entry:17 ; CHECK-NEXT: liveins: $w018 ; CHECK-NEXT: {{ $}}19 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w020 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x021 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv22 ; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32common = ADDWri [[COPY]], 3, 023 ; CHECK-NEXT: [[SUBWri:%[0-9]+]]:gpr32common = SUBWri killed [[COPY]], 2, 024 ; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32common = CSELWr [[ADDWri]], [[SUBWri]], 1, implicit $nzcv25 ; CHECK-NEXT: $x2 = COPY [[COPY1]]26 ; CHECK-NEXT: RET_ReallyLR implicit $x227 bb.0.entry:28 successors: %bb.1, %bb.229 liveins: $w030 31 %0:gpr32common = COPY $w032 %1:gpr64common = COPY $x033 %2:gpr32 = SUBSWri %0, 1, 0, implicit-def $nzcv34 Bcc 1, %bb.2, implicit $nzcv35 B %bb.136 37 bb.1:38 successors: %bb.339 40 %3:gpr32common = SUBWri killed %0, 2, 041 B %bb.342 43 bb.2:44 successors: %bb.345 46 %4:gpr32common = ADDWri killed %0, 3, 047 B %bb.348 49 bb.3:50 %5:gpr32common = PHI %3, %bb.1, %4, %bb.251 $x2 = COPY %152 RET_ReallyLR implicit $x253 54...55